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33 | 33 | #include "arm-spe.h" |
34 | 34 | #include "arm-spe-decoder/arm-spe-decoder.h" |
35 | 35 | #include "arm-spe-decoder/arm-spe-pkt-decoder.h" |
| 36 | +#include "../../arch/arm64/include/asm/cputype.h" |
36 | 37 |
|
37 | 38 | #define MAX_TIMESTAMP (~0ULL) |
38 | 39 |
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@@ -358,6 +359,13 @@ static u64 arm_spe__synth_data_source(const struct arm_spe_record *record) |
358 | 359 | return data_src.val; |
359 | 360 | } |
360 | 361 |
|
| 362 | +static const struct midr_range neoverse_spe[] = { |
| 363 | + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1), |
| 364 | + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2), |
| 365 | + MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1), |
| 366 | + {}, |
| 367 | +}; |
| 368 | + |
361 | 369 | static const char *hw_dsrc_altra_translate(union perf_mem_data_src data_src) |
362 | 370 | { |
363 | 371 | /* arm-spe has valid hardware data source in load operation only */ |
@@ -388,34 +396,18 @@ static const char *hw_dsrc_altra_translate(union perf_mem_data_src data_src) |
388 | 396 |
|
389 | 397 | const char *hw_dsrc_translate(union perf_mem_data_src data_src) |
390 | 398 | { |
391 | | - FILE *file; |
392 | | - size_t len; |
393 | | - long int cpu_impl = LONG_MAX; |
394 | | - const char *search = "CPU implementer"; |
395 | | - char *start = NULL, *buf = NULL; |
396 | | - |
397 | | - file = fopen("/proc/cpuinfo", "r"); |
398 | | - if (!file) |
399 | | - return NULL; |
| 399 | + static u64 midr = 0; |
400 | 400 |
|
401 | | - while (getline(&buf, &len, file) > 0) { |
402 | | - if (!strncmp(buf, search, strlen(search))) { |
403 | | - start = strchr(buf, ':'); |
404 | | - break; |
405 | | - } |
406 | | - } |
407 | | - fclose(file); |
| 401 | + if (!midr) { |
| 402 | + char cpuid[128]; |
408 | 403 |
|
409 | | - if (start) |
410 | | - cpu_impl = strtol(start + 1, NULL, 16); |
411 | | - free(buf); |
412 | | - |
413 | | - switch (cpu_impl) { |
414 | | - case 0x41: // ARM or Altra |
415 | | - return hw_dsrc_altra_translate(data_src); |
416 | | - default: |
417 | | - break; |
| 404 | + if (get_cpuid(cpuid, sizeof(cpuid))) |
| 405 | + return NULL; |
| 406 | + midr = strtol(cpuid, NULL, 16); |
418 | 407 | } |
| 408 | + |
| 409 | + if (is_midr_in_range(midr, neoverse_spe)) |
| 410 | + return hw_dsrc_altra_translate(data_src); |
419 | 411 | return NULL; |
420 | 412 | } |
421 | 413 |
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