Merge remote-tracking branch 'origin/rel-v2023.1'

Resolved conflicts
Preserved 2022* versions

Signed-off-by: Mark Hatle <mark.hatle@amd.com>

Author: mhatle

.gitmodules

@@ -0,0 +1,4 @@
+[submodule "gen-machine-conf"]
+	path = meta-xilinx-core/gen-machine-conf
+	url = https://github.com/Xilinx/gen-machine-conf.git
+	branch = xlnx_rel_v2023.1

docs/README.fpgamanager.custom.md

@@ -179,8 +179,8 @@ IMAGE_INSTALL:append = " \
 
 * ZynqMP
 ```
-yocto-zynqmp-generic-20222:~$ sudo su
-yocto-zynqmp-generic-20222:/home/petalinux# cat /proc/interrupts
+yocto-zynqmp-generic-20231:~$ sudo su
+yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
            CPU0       CPU1       CPU2       CPU3
  11:      13309      13021      13673      14170     GICv2  30 Level     arch_timer
  14:          0          0          0          0     GICv2  67 Level     zynqmp_ipi
@@ -230,15 +230,15 @@ IPI4:         0          0          0          0       Timer broadcast interrupt
 IPI5:         0          0          0          0       IRQ work interrupts
 IPI6:         0          0          0          0       CPU wake-up interrupts
 Err:          0
-yocto-zynqmp-generic-20222:/home/petalinux# tree /lib/firmware/
+yocto-zynqmp-generic-20231:/home/petalinux# tree /lib/firmware/
 /lib/firmware/
 `-- xilinx
     `-- zcu111-pl-demo
         |-- zcu111-pl-demo.bit.bin
         `-- zcu111-pl-demo.dtbo
 
 2 directories, 2 files
-yocto-zynqmp-generic-20222:/home/petalinux# fpgautil -b /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.bit -o /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.dtbo
+yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -b /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.bit -o /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.dtbo
 [   91.039773] fpga_manager fpga0: writing zcu111-pl-demo.bit to Xilinx ZynqMP FPGA Manager
 [   91.528214] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/firmware-name
 [   91.538354] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/pid
@@ -259,13 +259,13 @@ yocto-zynqmp-generic-20222:/home/petalinux# fpgautil -b /lib/firmware/xilinx/zcu
 [   91.906539] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input1
 Time taken to load BIN is 901.000000 Milli Seconds
 BIN FILE loaded through FPGA manager successfully
-yocto-zynqmp-generic-20222:/home/petalinux#
+yocto-zynqmp-generic-20231:/home/petalinux#
 ```
 * Versal (DFx Static)
 ```
-yocto-vck190-dfx-2022:~$ sudo su
-root@yocto-vck190-dfx-2022:~# 
-root@yocto-vck190-dfx-2022:~# fpgautil -o /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.dtbo
+yocto-vck190-dfx-2023:~$ sudo su
+root@yocto-vck190-dfx-2023:~# 
+root@yocto-vck190-dfx-2023:~# fpgautil -o /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.dtbo
 [  257.555571] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/external-fpga-config
 [  257.565879] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/pid
 [  257.574670] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/uid
@@ -279,11 +279,11 @@ root@yocto-vck190-dfx-2022:~# fpgautil -o /lib/firmware/xilinx/vck190-dfx-static
 [  257.663234] of-fpga-region fpga:fpga-PR0: FPGA Region probed
 [  257.669135] of-fpga-region fpga:fpga-PR1: FPGA Region probed
 [  257.675022] of-fpga-region fpga:fpga-PR2: FPGA Region probed
-root@yocto-vck190-dfx-2022:~#
+root@yocto-vck190-dfx-2023:~#
 ```
 * Versal (DFx RP)
 ```
-root@yocto-vck190-dfx-2022:~# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.pdi -o /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.dtbo -f Partial -n PR0
+root@yocto-vck190-dfx-2023:~# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.pdi -o /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.dtbo -f Partial -n PR0
 [  273.511455] fpga_manager fpga0: writing vck190-dfx-rp1rm1-dipsw.pdi to Xilinx Versal FPGA Manager
 [284052.461]Loading PDI from DDR
 [284052.566]Monolithic/Master Device
@@ -314,7 +314,7 @@ root@yocto-vck190-dfx-2022:~# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static
 [  273.670490] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input0
 Time taken to load BIN is 171.000000 Milli Seconds
 BIN FILE loaded through FPGA manager successfully
-root@yocto-vck190-dfx-2022:~#
+root@yocto-vck190-dfx-2023:~#
 ```
 ---
 
@@ -324,7 +324,7 @@ root@yocto-vck190-dfx-2022:~#
 * Verify PL GPIO DIP switches and Push buttons are registered.
 * Move the DIP Switches ON/OFF and verify the interrupt counts.
 ```
-yocto-zynqmp-generic-20222:/home/petalinux# cat /proc/interrupts
+yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
            CPU0       CPU1       CPU2       CPU3
  11:      23303      22971      24203      24990     GICv2  30 Level     arch_timer
  14:          0          0          0          0     GICv2  67 Level     zynqmp_ipi
@@ -387,7 +387,7 @@ IPI4:         0          0          0          0       Timer broadcast interrupt
 IPI5:         0          0          0          0       IRQ work interrupts
 IPI6:         0          0          0          0       CPU wake-up interrupts
 Err:          0
-yocto-zynqmp-generic-20222:/home/petalinux# cat /proc/interrupts
+yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
            CPU0       CPU1       CPU2       CPU3
  11:      28169      27725      29250      30190     GICv2  30 Level     arch_timer
  14:          0          0          0          0     GICv2  67 Level     zynqmp_ipi
@@ -450,22 +450,22 @@ IPI4:         0          0          0          0       Timer broadcast interrupt
 IPI5:         0          0          0          0       IRQ work interrupts
 IPI6:         0          0          0          0       CPU wake-up interrupts
 Err:          0
-yocto-zynqmp-generic-20222:/home/petalinux#
+yocto-zynqmp-generic-20231:/home/petalinux#
 ```
 ---
 
 ### Unloading PL bitstream or pdi and dt overlay
 * Zynq or ZynqMP
 ```
-yocto-zynqmp-generic-20222:/home/petalinux# fpgautil -R
+yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -R
 ```
 * Versal (DFx RP)
 ```
-root@yocto-vck190-dfx-2022:~# fpgautil -R -n PR0
+root@yocto-vck190-dfx-2023:~# fpgautil -R -n PR0
 ```
 * Versal (DFx Static)
 ```
-root@yocto-vck190-dfx-2022:~# fpgautil -R -n Full
+root@yocto-vck190-dfx-2023:~# fpgautil -R -n Full
 ```
 ---
 

gen-machine-conf

@@ -0,0 +1 @@
+meta-xilinx-core/gen-machine-conf

meta-microblaze/README.md

@@ -18,4 +18,4 @@ This layer depends on:
         https://git.yoctoproject.org/meta-xilinx (official version)
         https://github.com/Xilinx/meta-xilinx (development and amd xilinx release)
 	layers: meta-xilinx-core
-	branch: langdale or amd xilinx release version (e.g. rel-v2022.2)
+	branch: langdale or amd xilinx release version (e.g. rel-v2023.1)

meta-xilinx-bsp/README.md

@@ -24,6 +24,9 @@ The following boards are supported by the meta-xilinx-bsp layer:
 | Devices    | Evaluation Board                                                              | Machine Configuration file                                   | Reference XSA         | HW Board Device tree                | QEMU tested | HW tested |
 |------------|-------------------------------------------------------------------------------|--------------------------------------------------------------|-----------------------|-------------------------------------|-------------|-----------|
 | MicroBlaze | [KC705](https://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html)   | [kc705-microblazeel](conf/machine/kc705-microblazeel.conf)   | `kc705-microblazeel`  | `kc705-full`                        | Yes         | Yes       |
+|            | [AC701](https://www.xilinx.com/products/boards-and-kits/ek-a7-ac701-g.html)   | [ac701-microblazeel](conf/machine/ac701-microblazeel.conf)   | `ac701-microblazeel`  | `ac701-full`                        | Yes         | Yes       |
+|            | [KCU105](https://www.xilinx.com/products/boards-and-kits/kcu105.html)         | [kcu105-microblazeel](conf/machine/kcu105-microblazeel.conf) | `kcu105-microblazeel` | `kcu105`                            | Yes         | Yes       |
+|            | [VCU118](https://www.xilinx.com/products/boards-and-kits/vcu118.html)         | [vcu118-microblazeel](conf/machine/vcu118-microblazeel.conf) | `vcu118-microblazeel` | `vcu118-rev2.0`                     | Yes         | Yes       |
 | Zynq-7000  | [ZC702](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html)   | [zc702-zynq7](conf/machine/zc702-zynq7.conf)                 | `zc702-zynq7`         | `zc702`                             | Yes         | Yes       |
 |            | [ZC706](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html)   | [zc706-zynq7](conf/machine/zc706-zynq7.conf)                 | `zc706-zynq7`         | `zc706`                             | Yes         | Yes       |
 | ZynqMP     | [ZCU102](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) | [zcu102-zynqmp](conf/machine/zcu102-zynqmp.conf)             | `zcu102-zynqmp`       | `zcu102-rev1.0`                     | Yes         | Yes       |
@@ -32,11 +35,16 @@ The following boards are supported by the meta-xilinx-bsp layer:
 |            | [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html)         | [zcu111-zynqmp](conf/machine/zcu111-zynqmp.conf)             | `zcu111-zynqmp`       | `zcu111-reva`                       | Yes         | Yes       |
 |            | [ZCU1275](https://www.xilinx.com/products/boards-and-kits/zcu1275.html)       | [zcu1275-zynqmp](conf/machine/zcu1275-zynqmp.conf)           | `zcu1275-zynqmp`      | `zcu1275-revb`                      | Yes         | Yes       |
 |            | [ZCU1285](https://www.xilinx.com/products/boards-and-kits/zcu1285.html)       | [zcu1285-zynqmp](conf/machine/zcu1285-zynqmp.conf)           | `zcu1285-zynqmp`      | `zcu1285-reva`                      | Yes         | Yes       |
+|            | [ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html)         | [zcu208-zynqmp](conf/machine/zcu208-zynqmp.conf)             | `zcu208-zynqmp`       | `zcu208-reva`                       | Yes         | Yes       |
 |            | [ZCU216](https://www.xilinx.com/products/boards-and-kits/zcu216.html)         | [zcu216-zynqmp](conf/machine/zcu216-zynqmp.conf)             | `zcu216-zynqmp`       | `zcu216-reva`                       | Yes         | Yes       |
+|            | [ZCU670](https://www.xilinx.com/products/boards-and-kits/zcu670.html)         | [zcu670-zynqmp](conf/machine/zcu670-zynqmp.conf)             | `zcu670-zynqmp`       | `zcu670-revb`                       | Yes         | Yes       |
 | Versal     | [VCK190](https://www.xilinx.com/products/boards-and-kits/vck190.html)         | [vck190-versal](conf/machine/vck190-versal.conf)             | `vck190-versal`       | `versal-vck190-reva-x-ebm-01-reva`  | Yes         | Yes       |
 |            | [VMK180](https://www.xilinx.com/products/boards-and-kits/vmk180.html)         | [vmk180-versal](conf/machine/vmk180-versal.conf)             | `vmk180-versal`       | `versal-vmk180-reva-x-ebm-01-reva`  | Yes         | Yes       |
 |            | [VCK5000](https://www.xilinx.com/products/boards-and-kits/vck5000.html)       | [vck5000-versal](conf/machine/vck5000-versal.conf)           | `vck5000-versal`      | `versal-vck5000-reva-x-ebm-01-reva` | No          | No        |
 |            | [VPK120](https://www.xilinx.com/products/boards-and-kits/vpk120.html)         | [vpk120-versal](conf/machine/vpk120-versal.conf)             | `vpk120-versal`       | `versal-vpk120-reva`                | Yes         | Yes       |
+|            | [VPK180](https://www.xilinx.com/products/boards-and-kits/vpk180.html)         | [vpk180-versal](conf/machine/vpk180-versal.conf)             | `vpk180-versal`       | `versal-vpk180-reva`                | Yes         | Yes       |
+|            | [VEK280](https://www.xilinx.com/products/boards-and-kits/vek280.html)         | [vek280-versal](conf/machine/vek280-versal.conf)             | `vek280-versal`       | `versal-vek280-reva`                | Yes         | Yes       |
+|            | [VHK158](https://www.xilinx.com/products/boards-and-kits/vhk158.html)         | [vhk158-versal](conf/machine/vhk158-versal.conf)             | `vhk158-versal`       | `versal-vhk158-reva`                | Yes         | Yes       |
 
 > **Note:** Additional information on Xilinx architectures can be found at:
 	https://www.xilinx.com/products/silicon-devices.html
@@ -57,4 +65,4 @@ This layer depends on:
         https://git.yoctoproject.org/meta-xilinx (official version)
         https://github.com/Xilinx/meta-xilinx (development and amd xilinx release)
 	layers: meta-xilinx-microblaze, meta-xilinx-core
-	branch: langdale or amd xilinx release version (e.g. rel-v2022.2)
+	branch: langdale or amd xilinx release version (e.g. rel-v2023.1)

meta-xilinx-bsp/conf/machine/ac701-microblazeel.conf

@@ -0,0 +1,42 @@
+#@TYPE: Machine
+#@NAME: ac701-microblazeel
+#@DESCRIPTION: Machine configuration for the AC701 evaluation board.
+
+#### Preamble
+MACHINEOVERRIDES =. "${@['', 'ac701-microblazeel:']['ac701-microblazeel' !='${MACHINE}']}"
+#### Regular settings follow
+
+# Variables that changes based on hw design or board specific requirement must be
+# defined before calling the required inclusion file else pre-expansion value
+# defined in microblazeel-generic.conf will be set.
+
+# Yocto AC701 FS-Boot variables
+YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "MIG_7SERIES_0"
+YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
+XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
+
+# Yocto AC701 device-tree variables
+YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "MIG_7SERIES_0"
+DT_PADDING_SIZE:pn-device-tree ?= "0x1000"
+DTC_FLAGS:pn-device-tree ?= ""
+XSCTH_PROC:pn-device-tree ?= "microblaze_0"
+YAML_DT_BOARD_FLAGS ?= "{BOARD ac701-full}"
+
+# Set DDR Base address for u-boot-xlnx-scr variables
+DDR_BASEADDR ?= "0x80000000"
+SKIP_APPEND_BASEADDR ?= "0"
+
+# Required generic machine inclusion
+require conf/machine/microblaze-generic.conf
+
+# This machine conf file uses ac701-microblazeel xsa as reference input.
+# User can override with ac701 custom xsa using HDF_BASE and HDF_PATH variables
+# from local.conf.
+HDF_MACHINE = "ac701-microblazeel"
+
+#### No additional settings should be after the Postamble
+#### Postamble
+PACKAGE_EXTRA_ARCHS:append = "${@['', 'ac701_microblazeel']['ac701-microblazeel' != '${MACHINE}']}"

meta-xilinx-bsp/conf/machine/kcu105-microblazeel.conf

@@ -0,0 +1,42 @@
+#@TYPE: Machine
+#@NAME: kcu105-microblazeel
+#@DESCRIPTION: Machine configuration for the KCU105 evaluation board.
+
+#### Preamble
+MACHINEOVERRIDES =. "${@['', 'kcu105-microblazeel:']['kcu105-microblazeel' !='${MACHINE}']}"
+#### Regular settings follow
+
+# Variables that changes based on hw design or board specific requirement must be
+# defined before calling the required inclusion file else pre-expansion value
+# defined in microblazeel-generic.conf will be set.
+
+# Yocto KCU105 FS-Boot variables
+YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0"
+YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
+XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
+
+# Yocto KCU105 device-tree variables
+YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "DDR4_0"
+DT_PADDING_SIZE:pn-device-tree ?= "0x1000"
+DTC_FLAGS:pn-device-tree ?= ""
+XSCTH_PROC:pn-device-tree ?= "microblaze_0"
+YAML_DT_BOARD_FLAGS ?= "{BOARD kcu105}"
+
+# Set DDR Base address for u-boot-xlnx-scr variables
+DDR_BASEADDR ?= "0x80000000"
+SKIP_APPEND_BASEADDR ?= "0"
+
+# Required generic machine inclusion
+require conf/machine/microblaze-generic.conf
+
+# This machine conf file uses kcu105-microblazeel xsa as reference input.
+# User can override with kcu105 custom xsa using HDF_BASE and HDF_PATH variables
+# from local.conf.
+HDF_MACHINE = "kcu105-microblazeel"
+
+#### No additional settings should be after the Postamble
+#### Postamble
+PACKAGE_EXTRA_ARCHS:append = "${@['', 'kcu105_microblazeel']['kcu105-microblazeel' != '${MACHINE}']}"

meta-xilinx-bsp/conf/machine/vcu118-microblazeel.conf

@@ -0,0 +1,46 @@
+#@TYPE: Machine
+#@NAME: vcu118-microblazeel
+#@DESCRIPTION: Machine configuration for the VCU118 evaluation board.
+
+#### Preamble
+MACHINEOVERRIDES =. "${@['', 'vcu118-microblazeel:']['vcu118-microblazeel' !='${MACHINE}']}"
+#### Regular settings follow
+
+# Variables that changes based on hw design or board specific requirement must be
+# defined before calling the required inclusion file else pre-expansion value
+# defined in microblazeel-generic.conf will be set.
+
+# Yocto VCU118 FS-Boot variables
+YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0"
+YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
+XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
+
+# Yocto VCU118 device-tree variables
+YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "DDR4_0"
+DT_PADDING_SIZE:pn-device-tree ?= "0x1000"
+DTC_FLAGS:pn-device-tree ?= ""
+XSCTH_PROC:pn-device-tree ?= "microblaze_0"
+YAML_DT_BOARD_FLAGS ?= "{BOARD vcu118-rev2.0}"
+
+# Yocto KERNEL Variables
+UBOOT_ENTRYPOINT  ?= "0x80000000"
+UBOOT_LOADADDRESS ?= "0x80000000"
+
+# Set DDR Base address for u-boot-xlnx-scr variables
+DDR_BASEADDR ?= "0x80000000"
+SKIP_APPEND_BASEADDR ?= "0"
+
+# Required generic machine inclusion
+require conf/machine/microblaze-generic.conf
+
+# This machine conf file uses vcu118-microblazeel xsa as reference input.
+# User can override with vcu118 custom xsa using HDF_BASE and HDF_PATH variables
+# from local.conf.
+HDF_MACHINE = "vcu118-microblazeel"
+
+#### No additional settings should be after the Postamble
+#### Postamble
+PACKAGE_EXTRA_ARCHS:append = "${@['', 'vcu118_microblazeel']['vcu118-microblazeel' != '${MACHINE}']}"

meta-xilinx-bsp/conf/machine/vek280-versal.conf

@@ -0,0 +1,35 @@
+#@TYPE: Machine
+#@NAME: vek280-versal
+#@DESCRIPTION: Machine configuration for the VEK280 evaluation boards.
+
+#### Preamble
+MACHINEOVERRIDES =. "${@['', 'vek280-versal:']['vek280-versal' !='${MACHINE}']}"
+#### Regular settings follow
+
+# Variables that changes based on hw design or board specific requirement must be
+# defined before calling the required inclusion file else pre-expansion value
+# defined in versal-generic.conf will be set.
+
+# Yocto device-tree variables
+YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "CIPS_0_pspmc_0_psv_sbsauart_0"
+YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vek280-reva}"
+
+# Yocto PLM variables
+YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0"
+
+# vek280-versal Serial Console
+SERIAL_CONSOLES ?= "115200;ttyAMA0"
+YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
+
+# Required generic machine inclusion
+require conf/machine/versal-ai-edge-generic.conf
+
+# This machine conf file uses vek280-versal xsa as reference input.
+# User can override with vek280 custom xsa using HDF_BASE and HDF_PATH variables
+# from local.conf.
+HDF_MACHINE = "vek280-versal"
+
+#### No additional settings should be after the Postamble
+#### Postamble
+PACKAGE_EXTRA_ARCHS:append = "${@['', 'vek280_versal']['vek280-versal' != '${MACHINE}']}"