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widlarizerwidlarizer
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sdc_expand, opensta: start
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‎techlibs/common/Makefile.inc‎

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ifneq ($(SMALL),1)
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OBJS += techlibs/common/synth.o
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OBJS += techlibs/common/prep.o
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OBJS += techlibs/common/opensta.o
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OBJS += techlibs/common/sdc_expand.o
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endif
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GENFILES += techlibs/common/simlib_help.inc

‎techlibs/common/opensta.cc‎

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#include "kernel/rtlil.h"
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#include "kernel/log.h"
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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#if !defined(YOSYS_DISABLE_SPAWN)
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struct OpenstaPass : public Pass
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{
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const char* default_sta_cmd = "sta";
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OpenstaPass() : Pass("opensta", "run OpenSTA") { }
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void help() override
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" opensta [options]\n");
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log("\n");
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// TOOD
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log("\n");
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log(" -exe <command>\n");
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log(" use <command> to run OpenSTA instead of \"%s\"\n", default_sta_cmd);
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log("\n");
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log(" -sdc-in <filename>\n");
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log(" expand SDC input file <filename>\n");
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log("\n");
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log(" -sdc-out <filename>\n");
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log(" expand SDC file to output file <filename>\n");
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log("\n");
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log(" -nocleanup\n");
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log("\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) override
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{
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string run_from, run_to;
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string opensta_exe = "sta";
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string sdc_filename, sdc_expanded_filename;
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string tempdir_name, script_filename;
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string verilog_filename, liberty_filename;
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bool cleanup = true;
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log_header(design, "Executing OPENSTA pass.\n");
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log_push();
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size_t argidx;
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for (argidx = 1; argidx < args.size(); argidx++)
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{
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if (args[argidx] == "-exe" && argidx+1 < args.size()) {
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opensta_exe = args[++argidx];
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continue;
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}
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if (args[argidx] == "-sdc-in" && argidx+1 < args.size()) {
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sdc_filename = args[++argidx];
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continue;
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}
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if (args[argidx] == "-sdc-out" && argidx+1 < args.size()) {
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sdc_expanded_filename = args[++argidx];
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continue;
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}
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if (args[argidx] == "-verilog" && argidx+1 < args.size()) {
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verilog_filename = args[++argidx];
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continue;
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}
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if (args[argidx] == "-liberty" && argidx+1 < args.size()) {
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liberty_filename = args[++argidx];
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continue;
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}
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if (args[argidx] == "-nocleanup") {
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cleanup = false;
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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if (!design->full_selection())
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log_cmd_error("This command only operates on fully selected designs!\n");
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if (cleanup)
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tempdir_name = get_base_tmpdir() + "/";
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else
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tempdir_name = "_tmp_";
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tempdir_name += proc_program_prefix() + "yosys-opensta-XXXXXX";
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tempdir_name = make_temp_dir(tempdir_name);
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script_filename = tempdir_name + "/opensta.tcl";
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// script_filename
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auto top_mod = design->top_module();
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if (!top_mod)
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log_error("Can't find top module in current design!\n");
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std::ofstream f_script;
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f_script.open(script_filename);
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f_script << "read_verilog " << verilog_filename << "\n";
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f_script << "read_lib " << liberty_filename << "\n";
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f_script << "link_design " << RTLIL::unescape_id(top_mod->name) << "\n";
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f_script << "read_sdc " << sdc_filename << "\n";
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f_script << "write_sdc " << sdc_expanded_filename << "\n";
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f_script.close();
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std::string command = opensta_exe + " -exit " + script_filename;
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int ret = run_command(command);
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if (ret)
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log_error("OpenSTA return %d (error)\n", ret);
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else
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log("sdc_expanded_filename: %s\n", sdc_expanded_filename.c_str());
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if (cleanup) {
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log("Removing temp directory.\n");
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remove_directory(tempdir_name);
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}
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log_pop();
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}
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} OpenstaPass;
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#endif
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PRIVATE_NAMESPACE_END

‎techlibs/common/sdc_expand.cc‎

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#include "kernel/rtlil.h"
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#include "kernel/log.h"
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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struct SdcexpandPass : public ScriptPass
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{
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const char* default_sta_cmd = "sta";
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SdcexpandPass() : ScriptPass("sdc_expand", "run OpenSTA") { }
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void help() override
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" sdc_expand [options]\n");
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log("\n");
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// TODO
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log("\n");
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log(" -exe <command>\n");
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log(" use <command> to run OpenSTA instead of \"%s\"\n", default_sta_cmd);
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log("\n");
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log(" -sdc-in <filename>\n");
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log(" expand SDC file <filename>\n");
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log("\n");
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log(" -nocleanup\n");
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log("\n");
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log("\n");
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log("The following commands are executed by this synthesis command:\n");
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help_script();
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log("\n");
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}
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string opensta_exe, sdc_filename, sdc_expanded_filename;
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bool cleanup;
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void execute(std::vector<std::string> args, RTLIL::Design *design) override
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{
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string run_from, run_to;
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cleanup = true;
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size_t argidx;
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for (argidx = 1; argidx < args.size(); argidx++)
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{
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if (args[argidx] == "-exe" && argidx+1 < args.size()) {
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opensta_exe = args[++argidx];
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continue;
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}
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if (args[argidx] == "-sdc-in" && argidx+1 < args.size()) {
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sdc_filename = args[++argidx];
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continue;
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}
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if (args[argidx] == "-sdc-out" && argidx+1 < args.size()) {
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sdc_expanded_filename = args[++argidx];
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continue;
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}
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if (args[argidx] == "-nocleanup") {
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cleanup = false;
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continue;
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}
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// repetitive boring bit
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if (args[argidx] == "-run" && argidx+1 < args.size()) {
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size_t pos = args[argidx+1].find(':');
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if (pos == std::string::npos) {
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run_from = args[++argidx];
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run_to = args[argidx];
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} else {
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run_from = args[++argidx].substr(0, pos);
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run_to = args[argidx].substr(pos+1);
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}
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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if (!design->full_selection())
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log_cmd_error("This command only operates on fully selected designs!\n");
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log_header(design, "Executing OPENSTA pass.\n");
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log_push();
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run_script(design, run_from, run_to);
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log_pop();
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}
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void script() override
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{
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std::string tempdir_name;
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std::string liberty_path;
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std::string verilog_path;
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run("design -save pre_expand");
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run("proc");
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run("memory");
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// run("dfflegalize -cell $dff");
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std::string write_verilog_cmd = "write_verilog -norename -noexpr -attr2comment -defparam ";
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if (help_mode) {
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run(write_verilog_cmd + "<tmp_dir>/elaborated.v");
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} else {
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if (cleanup)
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tempdir_name = get_base_tmpdir() + "/";
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else
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tempdir_name = "_tmp_";
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tempdir_name += proc_program_prefix() + "yosys-sdc_expand-XXXXXX";
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tempdir_name = make_temp_dir(tempdir_name);
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verilog_path = tempdir_name + "/elaborated.v";
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run(write_verilog_cmd + verilog_path);
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}
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run("read_verilog -setattr whitebox -defer -DSIMLIB_NOCHECKS +/simlib.v");
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run("proc");
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run("hierarchy -auto-top");
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run("publish");
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if (help_mode) {
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run("icell_liberty <tmp_dir>/yosys.lib");
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} else {
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liberty_path = tempdir_name + "/yosys.lib";
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run(stringf("icell_liberty %s", liberty_path.c_str()));
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}
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std::string opensta_pass_call = "opensta -exe ";
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opensta_pass_call += help_mode ? "<exe>" : opensta_exe;
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opensta_pass_call += " -sdc-in ";
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opensta_pass_call += help_mode ? "<sdc-in>" : sdc_filename;
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opensta_pass_call += " -sdc-out ";
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opensta_pass_call += help_mode ? "<sdc-out>" : sdc_expanded_filename;
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opensta_pass_call += " -verilog ";
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opensta_pass_call += help_mode ? "<verilog>" : verilog_path;
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opensta_pass_call += " -liberty ";
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opensta_pass_call += help_mode ? "<tmp_dir>/yosys.lib" : liberty_path;
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if (!cleanup)
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opensta_pass_call += " -nocleanup";
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run(opensta_pass_call.c_str());
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if (!help_mode) {
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if (cleanup) {
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log("Removing temp directory.\n");
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remove_directory(tempdir_name);
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} else {
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log("Keeping temp directory %s\n", tempdir_name.c_str());
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}
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}
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run("design -load pre_expand");
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}
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} SdcexpandPass;
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PRIVATE_NAMESPACE_END

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