Skip to content

Commit 18dffe6

Browse files
ciq-sahlbergbmastbergen
authored andcommitted
x86/boot: Move x86_cache_alignment initialization to correct spot
jira roc-2673 commit 3e32552 c->x86_cache_alignment is initialized from c->x86_clflush_size. However, commit fbf6449 moved c->x86_clflush_size initialization to later in boot without moving the c->x86_cache_alignment assignment: fbf6449 ("x86/sev-es: Set x86_virt_bits to the correct value straight away, instead of a two-phase approach") This presumably left c->x86_cache_alignment set to zero for longer than it should be. The result was an oops on 32-bit kernels while accessing a pointer at 0x20. The 0x20 came from accessing a structure member at offset 0x10 (buffer->cpumask) from a ZERO_SIZE_PTR=0x10. kmalloc() can evidently return ZERO_SIZE_PTR when it's given 0 as its alignment requirement. Move the c->x86_cache_alignment initialization to be after c->x86_clflush_size has an actual value. Fixes: fbf6449 ("x86/sev-es: Set x86_virt_bits to the correct value straight away, instead of a two-phase approach") Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Tested-by: Nathan Chancellor <nathan@kernel.org> Link: https://lore.kernel.org/r/20231002220045.1014760-1-dave.hansen@linux.intel.com (cherry picked from commit 3e32552) Signed-off-by: Ronnie Sahlberg <rsahlberg@ciq.com> Signed-off-by: Jonathan Maple <jmaple@ciq.com> Signed-off-by: Shreeya Patel <spatel@ciq.com> Signed-off-by: Jonathan Maple <jmaple@ciq.com> Signed-off-by: Roxana Nicolescu <rnicolescu@ciq.com> Signed-off-by: Brett Mastbergen <bmastbergen@ciq.com>
1 parent a4160c0 commit 18dffe6

File tree

1 file changed

+1
-2
lines changed

1 file changed

+1
-2
lines changed

arch/x86/kernel/cpu/common.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1047,6 +1047,7 @@ static void get_cpu_address_sizes(struct cpuinfo_x86 *c)
10471047
}
10481048
}
10491049
c->x86_cache_bits = c->x86_phys_bits;
1050+
c->x86_cache_alignment = c->x86_clflush_size;
10501051
}
10511052

10521053
static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
@@ -1500,8 +1501,6 @@ static void __init cpu_parse_early_param(void)
15001501
*/
15011502
static void __init early_identify_cpu(struct cpuinfo_x86 *c)
15021503
{
1503-
c->x86_cache_alignment = c->x86_clflush_size;
1504-
15051504
memset(&c->x86_capability, 0, sizeof(c->x86_capability));
15061505
c->extended_cpuid_level = 0;
15071506

0 commit comments

Comments
 (0)