Skip to content

Commit 583dd2c

Browse files
Alexehv77Alexehv77
committed
fusion support for rmx500
1 parent b208250 commit 583dd2c

File tree

3 files changed

+58
-39
lines changed

3 files changed

+58
-39
lines changed

‎gcc/config/riscv/arcv-rmx500.md‎

Lines changed: 55 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -20,70 +20,86 @@
2020

2121
(define_automaton "arcv_rmx500")
2222

23-
(define_cpu_unit "arcv_rmx500_ALU" "arcv_rmx500")
24-
;(define_cpu_unit "arcv_rmx500_CSR" "arcv_rmx500")
25-
(define_cpu_unit "arcv_rmx500_FPU" "arcv_rmx500")
26-
(define_cpu_unit "arcv_rmx500_MPY" "arcv_rmx500")
27-
(define_cpu_unit "arcv_rmx500_DIV" "arcv_rmx500")
28-
(define_cpu_unit "arcv_rmx500_DMP" "arcv_rmx500")
29-
30-
;; Instruction reservation for arithmetic instructions.
31-
(define_insn_reservation "arcv_rmx500_alu_arith" 3
23+
(define_cpu_unit "arcv_rmx500_ALU_A_fuse0_early" "arcv_rmx500")
24+
(define_cpu_unit "arcv_rmx500_ALU_A_fuse1_early" "arcv_rmx500")
25+
(define_cpu_unit "arcv_rmx500_ALU_B_fuse0_early" "arcv_rmx500")
26+
(define_cpu_unit "arcv_rmx500_ALU_B_fuse1_early" "arcv_rmx500")
27+
(define_cpu_unit "arcv_rmx500_MPY32" "arcv_rmx500")
28+
(define_cpu_unit "arcv_rmx500_DIV" "arcv_rmx500")
29+
(define_cpu_unit "arcv_rmx500_DMP_fuse0" "arcv_rmx500")
30+
(define_cpu_unit "arcv_rmx500_DMP_fuse1" "arcv_rmx500")
31+
(define_cpu_unit "arcv_rmx500_fdivsqrt" "arcv_rmx500")
32+
(define_cpu_unit "arcv_rmx500_issueA_fuse0" "arcv_rmx500")
33+
(define_cpu_unit "arcv_rmx500_issueA_fuse1" "arcv_rmx500")
34+
(define_cpu_unit "arcv_rmx500_issueB_fuse0" "arcv_rmx500")
35+
(define_cpu_unit "arcv_rmx500_issueB_fuse1" "arcv_rmx500")
36+
37+
;; Instruction reservation for arithmetic instructions (pipe A, pipe B).
38+
(define_insn_reservation "arcv_rmx500_alu_early_arith" 1
3239
(and (eq_attr "tune" "arcv_rmx500")
33-
(eq_attr "type" "unknown, const, arith, shift, slt, multi, auipc, nop,
34-
logical, move, atomic, mvpair, bitmanip, clz, ctz, cpop,
35-
zicond, condmove, clmul, min, max, minu, maxu"))
36-
"arcv_rmx500_ALU, nothing*2")
40+
(eq_attr "type" "unknown,move,const,arith,shift,slt,multi,auipc,nop,logical,\
41+
bitmanip,min,max,minu,maxu,clz,ctz,atomic,\
42+
condmove,mvpair,zicond,cpop,clmul"))
43+
"((arcv_rmx500_issueA_fuse0 + arcv_rmx500_ALU_A_fuse0_early) | (arcv_rmx500_issueA_fuse1 + arcv_rmx500_ALU_A_fuse1_early)) | ((arcv_rmx500_issueB_fuse0 + arcv_rmx500_ALU_B_fuse0_early) | (arcv_rmx500_issueB_fuse1 + arcv_rmx500_ALU_B_fuse1_early))")
44+
45+
(define_insn_reservation "arcv_rmx500_imul_fused" 1
46+
(and (eq_attr "tune" "arcv_rmx500")
47+
(eq_attr "type" "imul_fused"))
48+
"(arcv_rmx500_issueA_fuse0 + arcv_rmx500_issueA_fuse1 + arcv_rmx500_ALU_A_fuse0_early + arcv_rmx500_ALU_A_fuse1_early + arcv_rmx500_MPY32)")
49+
50+
(define_insn_reservation "arcv_rmx500_alu_fused" 1
51+
(and (eq_attr "tune" "arcv_rmx500")
52+
(eq_attr "type" "alu_fused"))
53+
"(arcv_rmx500_issueA_fuse0 + arcv_rmx500_issueA_fuse1 + arcv_rmx500_ALU_A_fuse0_early + arcv_rmx500_ALU_A_fuse1_early) | (arcv_rmx500_issueB_fuse0 + arcv_rmx500_issueB_fuse1 + arcv_rmx500_ALU_B_fuse0_early + arcv_rmx500_ALU_B_fuse1_early)")
54+
3755

3856
(define_insn_reservation "arcv_rmx500_jmp_insn" 1
3957
(and (eq_attr "tune" "arcv_rmx500")
40-
(eq_attr "type" "branch, jump, call, jalr, ret, trap"))
41-
"arcv_rmx500_ALU")
58+
(eq_attr "type" "branch,jump,call,jalr,ret,trap"))
59+
"arcv_rmx500_issueA_fuse0 | arcv_rmx500_issueA_fuse1")
4260

4361
(define_insn_reservation "arcv_rmx500_div_insn" 22
4462
(and (eq_attr "tune" "arcv_rmx500")
4563
(eq_attr "type" "idiv"))
46-
"arcv_rmx500_DIV*22")
64+
"arcv_rmx500_issueA_fuse0 + arcv_rmx500_DIV, nothing*21")
4765

4866
(define_insn_reservation "arcv_rmx500_mpy32_insn" 10
4967
(and (eq_attr "tune" "arcv_rmx500")
5068
(eq_attr "type" "imul"))
51-
"arcv_rmx500_MPY*10")
69+
"arcv_rmx500_issueA_fuse0 + arcv_rmx500_MPY32, nothing*9")
5270

5371
(define_insn_reservation "arcv_rmx500_load_insn" 1
5472
(and (eq_attr "tune" "arcv_rmx500")
5573
(eq_attr "type" "load,fpload"))
56-
"arcv_rmx500_DMP")
74+
"(arcv_rmx500_issueB_fuse0 + arcv_rmx500_DMP_fuse0) | (arcv_rmx500_issueB_fuse1 + arcv_rmx500_DMP_fuse1)")
5775

5876
(define_insn_reservation "arcv_rmx500_store_insn" 1
5977
(and (eq_attr "tune" "arcv_rmx500")
6078
(eq_attr "type" "store,fpstore"))
61-
"arcv_rmx500_DMP")
79+
"(arcv_rmx500_issueB_fuse0 + arcv_rmx500_DMP_fuse0) | (arcv_rmx500_issueB_fuse1 + arcv_rmx500_DMP_fuse1)")
6280

63-
(define_insn_reservation "arcv_rmx500_farith_insn" 2
81+
;; (soft) floating points
82+
(define_insn_reservation "arcv_rmx500_xfer" 2
6483
(and (eq_attr "tune" "arcv_rmx500")
65-
(eq_attr "type" "fadd,fmul,fmadd,fcmp"))
66-
"arcv_rmx500_FPU*2")
84+
(eq_attr "type" "mfc,mtc,fcvt,fcvt_i2f,fcvt_f2i,fmove,fcmp"))
85+
"(arcv_rmx500_ALU_A_fuse0_early | arcv_rmx500_ALU_B_fuse0_early), nothing")
6786

68-
(define_insn_reservation "arcv_rmx500_fdiv_insn" 17
87+
(define_insn_reservation "arcv_rmx500_fmul" 2
6988
(and (eq_attr "tune" "arcv_rmx500")
70-
(eq_attr "type" "fdiv,fsqrt"))
71-
"arcv_rmx500_FPU*17")
89+
(eq_attr "type" "fadd,fmul,fmadd"))
90+
"(arcv_rmx500_ALU_A_fuse0_early | arcv_rmx500_ALU_B_fuse0_early,nothing)")
7291

73-
(define_insn_reservation "arcv_rmx500_xfer" 2
92+
(define_insn_reservation "arcv_rmx500_fdiv" 17
7493
(and (eq_attr "tune" "arcv_rmx500")
75-
(eq_attr "type" "fmove,mtc,mfc,fcvt,fcvt_f2i,fcvt_i2f"))
76-
"arcv_rmx500_FPU*2")
77-
78-
;;(define_insn_reservation "core" 1
79-
;; (eq_attr "type" "block, brk, dmb, flag, lr, sr, sync")
80-
;; "arcv_rmx500_ALU0 + arcv_rmx500_ALU1 + arcv_rmx500_DMP + arcv_rmx500_MPY + arcv_rmx500_MPY64 + arcv_rmx500_DIV")
94+
(eq_attr "type" "fdiv,fsqrt"))
95+
"arcv_rmx500_fdivsqrt*17")
8196

8297
;; Bypasses
83-
(define_bypass 9 "arcv_rmx500_mpy32_insn" "arcv_rmx500_mpy32_insn,arcv_rmx500_div_insn")
84-
85-
;;(define_bypass 1 "arcv_rmx500_alu_arith" "arcv_rmx500_mpy32_insn" "!accumulator_bypass_p")
86-
(define_bypass 1 "arcv_rmx500_alu_arith,arcv_rmx500_load_insn"
87-
"arcv_rmx500_alu_arith,arcv_rmx500_mpy32_insn,arcv_rmx500_div_insn,arcv_rmx500_load_insn")
88-
(define_bypass 1 "arcv_rmx500_alu_arith,arcv_rmx500_load_insn"
89-
"arcv_rmx500_store_insn" "riscv_store_data_bypass_p")
98+
(define_bypass 1 "arcv_rmx500_alu_early_arith" "arcv_rmx500_store_insn" "riscv_store_data_bypass_p")
99+
(define_bypass 1 "arcv_rmx500_load_insn" "arcv_rmx500_store_insn" "riscv_store_data_bypass_p")
100+
(define_bypass 1 "arcv_rmx500_load_insn" "arcv_rmx500_alu_early_arith")
101+
(define_bypass 1 "arcv_rmx500_load_insn" "arcv_rmx500_mpy*_insn")
102+
(define_bypass 1 "arcv_rmx500_load_insn" "arcv_rmx500_load_insn")
103+
(define_bypass 1 "arcv_rmx500_load_insn" "arcv_rmx500_div_insn")
104+
(define_bypass 9 "arcv_rmx500_mpy32_insn" "arcv_rmx500_mpy*_insn")
105+
(define_bypass 9 "arcv_rmx500_mpy32_insn" "arcv_rmx500_div_insn")

‎gcc/config/riscv/riscv.cc‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -861,6 +861,7 @@ bool
861861
arcv_micro_arch_supports_fusion_p (void)
862862
{
863863
return (riscv_is_micro_arch (arcv_rhx100)
864+
|| riscv_is_micro_arch (arcv_rmx500)
864865
|| riscv_is_micro_arch (arcv_rpx100));
865866
}
866867

@@ -11477,6 +11478,7 @@ riscv_override_options_internal (struct gcc_options *opts)
1147711478
explicitly disabled.
1147811479
TODO Add arcv_rmx500 once it supports fusion. */
1147911480
if ((riscv_microarchitecture == arcv_rhx100
11481+
|| riscv_microarchitecture == arcv_rmx500
1148011482
|| riscv_microarchitecture == arcv_rpx100)
1148111483
&& (target_flags_explicit & MASK_ARCV_ADVANCED_FUSION) == 0)
1148211484
{

‎gcc/config/riscv/riscv.md‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4948,6 +4948,7 @@
49484948
(include "corev.md")
49494949
(include "xiangshan.md")
49504950
(include "arcv-rmx100.md")
4951+
;;(include "arcv-rmx500_nf.md")
49514952
(include "arcv-rmx500.md")
49524953
(include "arcv-rhx100.md")
49534954
(include "arcv-rpx100.md")

0 commit comments

Comments
 (0)