GCC support for ARC custom extensions

GCC's support for ARC custom extensions

##Using a global asm helper file containing the definition of the custom instructions:

• Define the new assembly instruction in the global assembly helper file (e.g., mycustom.s): 

  .extInstruction chk_pkt, 0x07, 0x01, SUFFIX_NONE, SYNTAX_2OP  

• Define the inline assembly wrapper in a C-source file :

  #define chk_pkt(src)  ({ long __dst_;                                   \

      asm ( "chk_pkt  %0, %1\n\t"                                     
  :"=r" (_dst)                                       
  : "r" (src));                                         
_dst;}) ```

• Use the custom instruction:

  result =chk_pkt(deltachk);  

• Compile,assemble and link it like this (order is important):

  arc-elf32-gcc –O1 –Wa,mycustom.s foo.c   ##Using only defines at the C source level:

• Define a macro to build a two operand custom instruction:

  #define intrinsic_2OP(NAME, MOP, SOP)                        \
     ".extInstruction " NAME "," #MOP ","                  \
         #SOP ",SUFFIX_NONE, SYNTAX_2OP\n\t"

• Define a macro for the custom instruction:

  #define chk_pkt(src) ({long __dst;                                \
         __asm__ ( intrinsic_2OP("chk_pkt", 0x07, 0x01)         \

                        "chk_pkt %0, %1\n\t"                        
         : "=r" (__dst)                             
         : "r" (src));                              
__dst;})

* Use the custom instruction:

 result = chk_pkt(deltachk);
 	 
* Compile,assemble and link it like this:

 arc-elf32-gcc –O1 foo.c
 


Using the inline assembly can prove difficult if one is using complex instructions.  It is recommended to check always if the output/input constrains are matching the instruction definition. In the above example, my assumption is that the custom instruction can access all the “r” registers. If this is not the case, then we should take special care when making the #define(using mov/lr/sr/aex instructions for example).  We can also define extension core registers using “.extCoreRegister” assembly directive. Probably here, we can do an application note if it is not there yet.
 


References:

* GNU assembler manual:  Arc Machine Directives [Link](http://sourceware.org/binutils/docs-2.20/as/ARC-Directives.html)

* GCC –Inline assembly –Howto [Link](http://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html)