AVX-256/AVX-512 support?

[alexandergunnarson]

I'm looking to use gtl::parallel_flat_hash_map. Forgive my ignorance, as most of my experience has been in the JVM world and I'm still learning about vector intrinsics.

I was curious why there's SSE2/SSE3 support (up to 128-bit vectorization, IIRC), but no AVX-256/AVX-512 support. I know there's the AVX-512 downclocking phenomenon, so perhaps potential performance gains are offset by that in this context. However AFAIK AVX-256 doesn't suffer from this. I'm sure you have a rationale for not using 256-bit/512-bit vector instructions, but curious to know 1) whether they would actually speed up the implementation and 2) if so, why they're not being used.

Thanks! Looks like an amazing project.

[greg7mdp]

Hi @alexandergunnarson , thanks for using gtl and for the interesting question.
To be honest, I have not looked in great detail at AVX-256/AVX-512 support, so I can really answer whether this. Still, I doubt that in real world use, you would find that this parallel probing ends up being a bottleneck of your application or even of the hash map lookups (usually these are constrained by the speed of memory reads).

[alexandergunnarson]

Thanks for your thoughtful reply! Curious if it’s simple to experiment with adding the instructions by using some AVX-specific C header library and ifdef-ing where the SSE3 instructions are currently being used.

Also, shamelessly, I’m wondering whether there are any hash map implementations even more performant than gtl’s. I haven’t found any yet — incredible work! 🎉 — but I’m always on the hunt ;)

[greg7mdp]

Sure, here is the implementation for both the SSE2 and portable C++ versions. You could definitely experiment with adding a AVX version.

Boost since version 1.82 also has a good unordered_flat_map and concurrent_flat_map implementation. If you compare it with gtl, I'd be interested to hear your thoughts.

[alexandergunnarson]

Thanks @greg7mdp 🙌 Will take a look!