@@ -138,18 +138,19 @@ static void __tusb_irq_path_func(hw_handle_buff_status)(void)
138138 _handle_buff_status_bit (bit , ep );
139139 }
140140
141- // Check interrupt endpoints
141+ // Check " interrupt" (asynchronous) endpoints for both IN and OUT
142142 for (uint i = 1 ; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers ; i ++ )
143143 {
144- // EPX is bit 0
144+ // EPX is bit 0 & 1
145145 // IEP1 IN is bit 2
146146 // IEP1 OUT is bit 3
147147 // IEP2 IN is bit 4
148148 // IEP2 OUT is bit 5
149149 // IEP3 IN is bit 6
150150 // IEP3 OUT is bit 7
151151 // etc
152- for (int j = 0 ; j < 2 ; j ++ ){
152+ for (uint j = 0 ; j < 2 ; j ++ )
153+ {
153154 bit = 1 << (i * 2 + j );
154155 if (remaining_buffers & bit )
155156 {
@@ -279,6 +280,8 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
279280
280281 if (transfer_type != TUSB_XFER_CONTROL )
281282 {
283+ // Note: even though datasheet name these "Interrupt" endpoints. These are actually
284+ // "Asynchronous" endpoints and can be used for other type such as: Bulk (ISO need confirmation)
282285 ep = _next_free_interrupt_ep ();
283286 pico_info ("Allocate %s ep %d\n" , tu_edpt_type_str (transfer_type ), ep -> interrupt_num );
284287 assert (ep );
@@ -344,11 +347,10 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
344347 if (ep != & epx )
345348 {
346349 // Endpoint has its own addr_endp and interrupt bits to be setup!
347- // This is an interrupt endpoint
348- // so need to set up interrupt endpoint address control register with:
349- // device address
350- // endpoint number / direction
351- // preamble
350+ // This is an interrupt/async endpoint. so need to set up ADDR_ENDP register with:
351+ // - device address
352+ // - endpoint number / direction
353+ // - preamble
352354 uint32_t reg = (uint32_t ) (dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB ));
353355
354356 if (dir == TUSB_DIR_OUT )
0 commit comments