Commit 3976c0b
[Autobackout][FunctionalRegression]Revert of change: c3e6c9d: Don't cache volatile load store instructions
On platforms with default cache policy set to L1 and L3 cached
such as DG2 or BMG volatile instructions are also cached. Since
CUDA doesn't cache volatile pointers, there is a code that is
not supported by Intel GPU, as caching volatile can lead to hangs.1 parent b23eb1e commit 3976c0b
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