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bcheng0127igcbot
bcheng0127
authored and
igcbot
committed
Local data flow analysis for AddrExp
Local data flow analysis for AddrExp
1 parent c94321e commit 6096caf

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4 files changed

+76
-10
lines changed

4 files changed

+76
-10
lines changed

‎visa/G4_IR.cpp‎

Lines changed: 41 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -651,7 +651,6 @@ const G4_Operand* G4_INST::getOperand(Gen4_Operand_Number opnd_num) const
651651
return NULL;
652652
}
653653

654-
655654
USE_EDGE_LIST_ITER G4_INST::eraseUse(USE_EDGE_LIST_ITER iter)
656655
{
657656
G4_INST *useInst = iter->first;
@@ -1361,8 +1360,12 @@ G4_INST *G4_INST::getSingleDef(Gen4_Operand_Number opndNum, bool MakeUnique)
13611360
// Note that this function does not check for duplicates
13621361
void G4_INST::addDefUse(G4_INST* inst, Gen4_Operand_Number srcPos)
13631362
{
1364-
MUST_BE_TRUE(srcPos == Opnd_dst || srcPos == Opnd_src0 || srcPos == Opnd_src1 ||
1365-
srcPos == Opnd_src2 || srcPos == Opnd_src3 || srcPos == Opnd_pred ||
1363+
MUST_BE_TRUE(srcPos == Opnd_dst ||
1364+
srcPos == Opnd_src0 || srcPos == Opnd_src1 ||
1365+
srcPos == Opnd_src2 || srcPos == Opnd_src3 ||
1366+
srcPos == Opnd_src4 || srcPos == Opnd_src5 ||
1367+
srcPos == Opnd_src6 || srcPos == Opnd_src7 ||
1368+
srcPos == Opnd_pred ||
13661369
srcPos == Opnd_implAccSrc, "unexpected operand number");
13671370
useInstList.emplace_back(inst, srcPos);
13681371
inst->defInstList.emplace_back(this, srcPos);
@@ -4892,13 +4895,24 @@ unsigned G4_DstRegRegion::computeRightBound(uint8_t exec_size)
48924895
static G4_CmpRelation compareRegRegionToOperand(G4_Operand* regRegion, G4_Operand* opnd)
48934896
{
48944897
assert((regRegion->isSrcRegRegion() || regRegion->isDstRegRegion()) && "expect either src or dst regRegion");
4895-
bool legal_opnd = opnd->isSrcRegRegion() || opnd->isDstRegRegion() || opnd->isPredicate() || opnd->isCondMod();
4898+
bool legal_opnd = opnd->isSrcRegRegion() || opnd->isDstRegRegion() || opnd->isPredicate() || opnd->isCondMod() || opnd->isAddrExp();
48964899
G4_VarBase* myBase = regRegion->getBase();
48974900
G4_VarBase *opndBase = opnd->getBase();
48984901
G4_RegAccess myAcc = regRegion->getRegAccess();
48994902
G4_RegAccess opndAcc = opnd->getRegAccess();
49004903
G4_Declare* myDcl = regRegion->getTopDcl();
49014904
G4_Declare* opndDcl = opnd->getTopDcl();
4905+
if (opnd->isAddrExp())
4906+
{
4907+
opndBase = opnd->asAddrExp()->getRegVar()->getBaseRegVar();
4908+
opndDcl = opnd->asAddrExp()->getRegVar()->getDeclare();
4909+
}
4910+
4911+
if (regRegion->isAddrExp())
4912+
{
4913+
myBase = opnd->asAddrExp()->getRegVar()->getBaseRegVar();
4914+
myDcl = opnd->asAddrExp()->getRegVar()->getDeclare();
4915+
}
49024916

49034917
if (!legal_opnd || myBase == nullptr || opndBase == nullptr)
49044918
{
@@ -4920,6 +4934,11 @@ static G4_CmpRelation compareRegRegionToOperand(G4_Operand* regRegion, G4_Operan
49204934
{
49214935
return Rel_interfere;
49224936
}
4937+
4938+
if (opnd->isAddrExp() || regRegion->isAddrExp())
4939+
{
4940+
return Rel_interfere;
4941+
}
49234942
}
49244943

49254944
if (opndAcc == myAcc && myAcc != Direct)
@@ -8318,6 +8337,24 @@ G4_Operand* G4_InstIntrinsic::getIntrinsicSrc(unsigned i) const
83188337
return srcs[i];
83198338
}
83208339

8340+
G4_Operand* G4_InstIntrinsic::getOperand(Gen4_Operand_Number opnd_num) const
8341+
{
8342+
switch (opnd_num) {
8343+
case Opnd_src0: return srcs[0];
8344+
case Opnd_src1: return srcs[1];
8345+
case Opnd_src2: return srcs[2];
8346+
case Opnd_src3: return srcs[3];
8347+
case Opnd_src4: return srcs[4];
8348+
case Opnd_src5: return srcs[5];
8349+
case Opnd_src6: return srcs[6];
8350+
case Opnd_src7: return srcs[7];
8351+
default:
8352+
MUST_BE_TRUE(0, "Operand number is out of range.");
8353+
break;
8354+
}
8355+
return NULL;
8356+
}
8357+
83218358
void G4_InstIntrinsic::setIntrinsicSrc(G4_Operand* opnd, unsigned i)
83228359
{
83238360
MUST_BE_TRUE(i < G4_MAX_INTRINSIC_SRCS, ERROR_INTERNAL_ARGUMENT);

‎visa/G4_IR.hpp‎

Lines changed: 19 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -626,6 +626,8 @@ typedef struct _SWSBInfo
626626
}
627627
bool isComprInvariantSrcRegion(G4_SrcRegRegion* src, int srcPos);
628628

629+
G4_Operand* getOperand(Gen4_Operand_Number opnd_num);
630+
629631
G4_Operand* getSrc(unsigned i) const;
630632
void setSrc(G4_Operand* opnd, unsigned i);
631633
int getNumSrc() const;
@@ -810,13 +812,16 @@ typedef struct _SWSBInfo
810812
static bool isSrcNum(Gen4_Operand_Number opndNum)
811813
{
812814
return opndNum == Opnd_src0 || opndNum == Opnd_src1 ||
813-
opndNum == Opnd_src2 || opndNum == Opnd_src3;
815+
opndNum == Opnd_src2 || opndNum == Opnd_src3 ||
816+
opndNum == Opnd_src4 || opndNum == Opnd_src5 ||
817+
opndNum == Opnd_src6 || opndNum == Opnd_src7;
814818
}
815-
const G4_Operand* getOperand(Gen4_Operand_Number opnd_num) const;
816-
G4_Operand* getOperand(Gen4_Operand_Number opnd_num)
819+
static bool isInstrinsicOnlySrcNum(Gen4_Operand_Number opndNum)
817820
{
818-
return const_cast<G4_Operand*>(((const G4_INST *)this)->getOperand(opnd_num));
821+
return opndNum == Opnd_src4 || opndNum == Opnd_src5 ||
822+
opndNum == Opnd_src6 || opndNum == Opnd_src7;
819823
}
824+
const G4_Operand* getOperand(Gen4_Operand_Number opnd_num) const;
820825

821826
/// Remove all definitons that contribute to this[opndNum] and remove all
822827
/// uses from their corresponding definitions. To maintain def-use's, this
@@ -1627,6 +1632,7 @@ class G4_InstIntrinsic : public G4_INST
16271632
G4_InstOpts opt);
16281633

16291634
G4_Operand* getIntrinsicSrc(unsigned i) const;
1635+
G4_Operand* getOperand(Gen4_Operand_Number opnd_num) const;
16301636

16311637
void setIntrinsicSrc(G4_Operand* opnd, unsigned i);
16321638

@@ -3987,6 +3993,15 @@ class PhyRegPool
39873993
}
39883994
};
39893995

3996+
inline G4_Operand* G4_INST::getOperand(Gen4_Operand_Number opnd_num)
3997+
{
3998+
if (isPseudoAddrMovIntrinsic() && isSrcNum(opnd_num))
3999+
return asIntrinsicInst()->getOperand(opnd_num);
4000+
if (isInstrinsicOnlySrcNum(opnd_num))
4001+
return NULL;
4002+
return const_cast<G4_Operand*>(((const G4_INST*)this)->getOperand(opnd_num));
4003+
}
4004+
39904005
inline G4_Operand* G4_INST::getSrc(unsigned i) const
39914006
{
39924007
if (isPseudoAddrMovIntrinsic())

‎visa/G4_Opcode.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -403,6 +403,10 @@ enum G4_CmpRelation
403403
DO(Opnd_src1) \
404404
DO(Opnd_src2) \
405405
DO(Opnd_src3) \
406+
DO(Opnd_src4) \
407+
DO(Opnd_src5) \
408+
DO(Opnd_src6) \
409+
DO(Opnd_src7) \
406410
DO(Opnd_pred) \
407411
DO(Opnd_condMod) \
408412
DO(Opnd_implAccSrc) \

‎visa/LocalDataflow.cpp‎

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -433,13 +433,23 @@ static void processReadOpnds(G4_BB *BB, G4_INST *Inst, LocalLivenessInfo &LLI)
433433
for (auto OpNum :
434434
{ Gen4_Operand_Number::Opnd_src0, Gen4_Operand_Number::Opnd_src1,
435435
Gen4_Operand_Number::Opnd_src2, Gen4_Operand_Number::Opnd_src3,
436+
Gen4_Operand_Number::Opnd_src4, Gen4_Operand_Number::Opnd_src5,
437+
Gen4_Operand_Number::Opnd_src6, Gen4_Operand_Number::Opnd_src7,
436438
Gen4_Operand_Number::Opnd_pred, Gen4_Operand_Number::Opnd_implAccSrc }) {
437439
G4_Operand* opnd = Inst->getOperand(OpNum);
438440
if (opnd == nullptr || opnd->isImm() || opnd->isNullReg() || opnd->isLabel())
439441
continue;
440442

441-
G4_Declare* Dcl = opnd->getTopDcl();
442-
LLI.LiveNodes[Dcl].emplace_back(Inst, OpNum);
443+
if (Inst->isPseudoAddrMovIntrinsic())
444+
{
445+
G4_Declare* Dcl = opnd->asAddrExp()->getRegVar()->getDeclare();
446+
LLI.LiveNodes[Dcl].emplace_back(Inst, OpNum);
447+
}
448+
else
449+
{
450+
G4_Declare* Dcl = opnd->getTopDcl();
451+
LLI.LiveNodes[Dcl].emplace_back(Inst, OpNum);
452+
}
443453
}
444454
}
445455

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