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Implement interface for SPIRV extensions and compilation options
This change implements tablegen file which is used to generate: - documentation for supported SPIRV extensions - YAML file with supported SPIRV extensions that is passed to Neo via new interface
1 parent 86a8111 commit aba5310

14 files changed

+533
-2
lines changed

IGC/AdaptorOCL/CMakeLists.txt

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@@ -45,6 +45,7 @@ list(APPEND IGC_BUILD__SRC__AdaptorOCL
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/gt_system_info_impl.cpp"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/platform_impl.cpp"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/igc_builtins_impl.cpp"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/igc_options_and_capabilities_impl.cpp"
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${CIF_SOURCES_EXPORT_ABSOLUTE_PATH})
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list(APPEND IGC_BUILD__HDR__IGC_AdaptorOCL
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/igc_features_and_workarounds_impl.h"
@@ -55,6 +56,7 @@ list(APPEND IGC_BUILD__SRC__AdaptorOCL
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/gt_system_info_impl.h"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/platform_impl.h"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/igc_builtins_impl.h"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/impl/igc_options_and_capabilities_impl.h"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/igc_features_and_workarounds.h"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/igc_ocl_device_ctx.h"
@@ -64,6 +66,7 @@ list(APPEND IGC_BUILD__SRC__AdaptorOCL
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/gt_system_info.h"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/platform.h"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/igc_builtins.h"
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"${CMAKE_CURRENT_SOURCE_DIR}/ocl_igc_interface/igc_options_and_capabilities.h"
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${CIF_HEADERS_ABSOLUTE_PATH})
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set(IGC_BUILD__SRC__IGC_AdaptorOCL ${IGC_BUILD__SRC__IGC_AdaptorOCL} PARENT_SCOPE) # set directly
@@ -124,6 +127,9 @@ add_library("${IGC_BUILD__PROJ__AdaptorOCL}" STATIC
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set_target_properties("${IGC_BUILD__PROJ__AdaptorOCL}" PROPERTIES FOLDER "Libraries/Adaptors")
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add_dependencies("${IGC_BUILD__PROJ__AdaptorOCL}" "${IGC_BUILD__PROJ__GenISAIntrinsics}")
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if(USE_SPIRV_EXTENSIONS_YAML_GENERATOR)
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add_dependencies(${IGC_BUILD__PROJ__AdaptorOCL} IGCCSPIRVExtensionsYaml)
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endif()
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set_property(TARGET "${IGC_BUILD__PROJ__AdaptorOCL}" PROPERTY PROJECT_LABEL "${IGC_BUILD__PROJ_LABEL__AdaptorOCL}")
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if(IGC_BUILD__VC_ENABLED)
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#=========================== begin_copyright_notice ============================
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#
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# Copyright (C) 2025 Intel Corporation
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#
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# SPDX-License-Identifier: MIT
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#
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#============================ end_copyright_notice =============================
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include(TableGen)
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add_tablegen(igcc-yaml-docs-tblgen IGCC_YAML_DOCS_TBLGEN
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IGCCOptionsAndCapabilitiesEmitter.cpp
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)
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set(LLVM_LINK_COMPONENTS
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Support
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TableGen
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)
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llvm_update_compile_flags(igcc-yaml-docs-tblgen)
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# Always link static TableGen explicitly — never rely on libLLVM.so here
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# TableGen is never part of libLLVM.so (ref: llvm-project/llvm/tools/llvm-shlib/CMakeLists.txt)
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target_link_libraries(igcc-yaml-docs-tblgen PRIVATE
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LLVMSupport
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LLVMTableGen
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)
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/*========================== begin_copyright_notice ============================
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Copyright (C) 2025 Intel Corporation
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SPDX-License-Identifier: MIT
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============================= end_copyright_notice ===========================*/
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This tablegen backend emits headers for YAML interfaces related to
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/// igc-compute options and capabilities, like supported SPIR-V extensions.
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///
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/// It is also capable of emitting documentation for the supported SPIR-V
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/// extensions and compilation options
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/InitLLVM.h"
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#include "llvm/Support/YAMLTraits.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/TableGen/Error.h"
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#include "llvm/TableGen/Main.h"
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#include "llvm/TableGen/Record.h"
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#include "llvm/TableGen/TableGenBackend.h"
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using namespace llvm;
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using namespace std;
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#define DEBUG_TYPE "IGCCOptionsAndCapabilitiesEmitter"
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namespace {
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struct SPIRVExtensionInfo {
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StringRef ExtName;
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StringRef ExtSpecURL;
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std::vector<StringRef> ExtCapabilities;
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};
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struct SPIRVExtensionsList {
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std::vector<SPIRVExtensionInfo> Extensions;
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};
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} // namespace
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LLVM_YAML_IS_SEQUENCE_VECTOR(SPIRVExtensionInfo)
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namespace llvm {
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namespace yaml {
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template <> struct MappingTraits<SPIRVExtensionInfo> {
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static void mapping(IO &IO, SPIRVExtensionInfo &info) {
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IO.mapRequired("name", info.ExtName);
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IO.mapRequired("spec_url", info.ExtSpecURL);
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IO.mapRequired("supported_capabilities", info.ExtCapabilities);
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}
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};
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template <> struct MappingTraits<SPIRVExtensionsList> {
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static void mapping(IO &IO, SPIRVExtensionsList &ExtList) { IO.mapRequired("spirv_extensions", ExtList.Extensions); }
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};
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} // namespace yaml
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} // namespace llvm
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namespace {
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class IGCCOptionsAndCapabilitiesEmitter {
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const RecordKeeper &Records;
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public:
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IGCCOptionsAndCapabilitiesEmitter(const RecordKeeper &R) : Records(R) {}
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void emitSPIRVYaml(raw_ostream &OS);
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void emitSPIRVDocs(raw_ostream &OS);
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void emitOptionsDocs(raw_ostream &OS);
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private:
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void getSPIRVExtensionList(SPIRVExtensionsList &ExtList);
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};
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} // end anonymous namespace
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void IGCCOptionsAndCapabilitiesEmitter::getSPIRVExtensionList(SPIRVExtensionsList &ExtList) {
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auto AllExtensions = Records.getAllDerivedDefinitions("SPIRVExtension");
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for (const Record *Ext : AllExtensions) {
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StringRef ExtName = Ext->getValueAsString("ExtName");
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StringRef ExtSpecURL = Ext->getValueAsString("ExtSpecURL");
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auto Capabilities = Ext->getValueAsListOfStrings("ExtCapabilities");
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ExtList.Extensions.push_back({ExtName, ExtSpecURL, Capabilities});
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}
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}
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void IGCCOptionsAndCapabilitiesEmitter::emitSPIRVYaml(raw_ostream &OS) {
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OS << "#ifndef IGCC_LIB_INTERFACE_SPIRV_EXTENSIONS_H\n";
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OS << "#define IGCC_LIB_INTERFACE_SPIRV_EXTENSIONS_H\n";
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OS << "static const char SPIRVExtensionsYAML[] = R\"(\n";
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yaml::Output Yout(OS);
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SPIRVExtensionsList ExtList;
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getSPIRVExtensionList(ExtList);
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Yout << ExtList;
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OS << ")\";\n";
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OS << "#endif\n";
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}
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void IGCCOptionsAndCapabilitiesEmitter::emitSPIRVDocs(raw_ostream &OS) {
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SPIRVExtensionsList ExtList;
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getSPIRVExtensionList(ExtList);
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OS << "# Supported SPIR-V Extensions\n";
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for (const auto &Ext : ExtList.Extensions) {
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OS << "### " << Ext.ExtName << "\n";
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OS << " - Spec URL: " << Ext.ExtSpecURL << "\n";
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OS << " - Supported Capabilities:\n";
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for (const auto &Cap : Ext.ExtCapabilities) {
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OS << " - " << Cap << "\n";
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}
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}
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}
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void IGCCOptionsAndCapabilitiesEmitter::emitOptionsDocs(raw_ostream &OS) {
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// To be implemented
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}
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static void emitSPIRVYaml(const RecordKeeper &Records, raw_ostream &OS) {
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IGCCOptionsAndCapabilitiesEmitter(Records).emitSPIRVYaml(OS);
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}
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static void emitSPIRVDocs(const RecordKeeper &Records, raw_ostream &OS) {
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IGCCOptionsAndCapabilitiesEmitter(Records).emitSPIRVDocs(OS);
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}
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static void emitOptionsDocs(const RecordKeeper &Records, raw_ostream &OS) {
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IGCCOptionsAndCapabilitiesEmitter(Records).emitOptionsDocs(OS);
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}
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namespace {
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enum ActionType { EmitSPIRVYaml, EmitSPIRVDocs, EmitOptionsDocs };
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cl::opt<ActionType> Action(cl::desc("Action to perform:"),
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cl::values(clEnumValN(EmitSPIRVYaml, "gen-igcc-spirv-extensions-yaml",
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"Generate IGCCompute supported SPIR-V extensions YAML"),
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clEnumValN(EmitSPIRVDocs, "gen-igcc-spirv-extensions-docs",
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"Generate IGCCompute supported SPIR-V extensions documentation"),
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clEnumValN(EmitOptionsDocs, "gen-igcc-options-docs",
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"Generate IGCCompute supported options documentation")));
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} // namespace
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static bool OptionsAndDocsTblgenMain(raw_ostream &OS, RecordKeeper &Records) {
146+
switch (Action) {
147+
case EmitSPIRVYaml:
148+
emitSPIRVYaml(Records, OS);
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break;
150+
case EmitSPIRVDocs:
151+
emitSPIRVDocs(Records, OS);
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break;
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case EmitOptionsDocs:
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emitOptionsDocs(Records, OS);
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break;
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}
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return false;
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}
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int main(int argc, char **argv) {
162+
InitLLVM y(argc, argv);
163+
cl::ParseCommandLineOptions(argc, argv);
164+
return TableGenMain(argv[0], &OptionsAndDocsTblgenMain);
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}
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# Supported SPIR-V Extensions
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### SPV_INTEL_2d_block_io
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- Spec URL: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_2d_block_io.asciidoc
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- Supported Capabilities:
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- Subgroup2DBlockIOINTEL
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- Subgroup2DBlockTransformINTEL
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- Subgroup2DBlockTransposeINTEL
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### SPV_INTEL_bfloat16_conversion
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- Spec URL: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_bfloat16_conversion.asciidoc
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- Supported Capabilities:
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- BFloat16ConversionINTEL
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### SPV_INTEL_cache_controls
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- Spec URL: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_cache_controls.asciidoc
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- Supported Capabilities:
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- CacheControlsINTEL
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### SPV_INTEL_fp_fast_math_mode
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- Spec URL: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_fp_fast_math_mode.asciidoc
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- Supported Capabilities:
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- FPFastMathModeINTEL
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### SPV_INTEL_subgroups
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- Spec URL: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_subgroups.asciidoc
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- Supported Capabilities:
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- SubgroupShuffleINTEL
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- SubgroupBufferBlockIOINTEL
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- SubgroupImageBlockIOINTEL
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#=========================== begin_copyright_notice ============================
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#
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# Copyright (C) 2025 Intel Corporation
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#
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# SPDX-License-Identifier: MIT
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#
7+
#============================ end_copyright_notice =============================
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9+
# Generate the docs for the supported SPIR-V extensions
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set(DOC_FILENAME "supported-spirv-extensions")
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set(OUT_DOC_FILE ${CMAKE_SOURCE_DIR}/IGC/AdaptorOCL/docs/autogen/${DOC_FILENAME}.md)
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set(LLVM_TARGET_DEFINITIONS SPIRVExtensions.td)
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set(IGCC_LIB_INTERFACES_DOCS_TABLEGEN_EXE igcc-yaml-docs-tblgen)
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tablegen(IGCC_LIB_INTERFACES_DOCS ${DOC_FILENAME}.md -gen-igcc-spirv-extensions-docs)
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add_public_tablegen_target(IGCCSPIRVExtensionsDocs)
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add_custom_command(
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OUTPUT ${OUT_DOC_FILE}
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COMMAND ${CMAKE_COMMAND} -E copy
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${CMAKE_CURRENT_BINARY_DIR}/${DOC_FILENAME}.md
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${OUT_DOC_FILE}
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DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${DOC_FILENAME}.md)
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add_custom_target(${DOC_FILENAME}DocGen DEPENDS ${OUT_DOC_FILE})
26+
add_dependencies(${DOC_FILENAME}DocGen IGCCSPIRVExtensionsDocs)
27+
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# Generate the header with YAML descriptions of the supported SPIR-V extensions
29+
set(IGCC_LIB_INTERFACES_TABLEGEN_EXE igcc-yaml-docs-tblgen)
30+
set(LLVM_TARGET_DEFINITIONS SPIRVExtensions.td)
31+
tablegen(IGCC_LIB_INTERFACES IGCCSPIRVExtensionsYaml.inc -gen-igcc-spirv-extensions-yaml)
32+
add_public_tablegen_target(IGCCSPIRVExtensionsYaml)
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add_dependencies(IGCCSPIRVExtensionsYaml IGCCSPIRVExtensionsDocs)
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add_dependencies(IGCCSPIRVExtensionsYaml ${DOC_FILENAME}DocGen)
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/*========================== begin_copyright_notice ============================
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Copyright (C) 2025 Intel Corporation
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SPDX-License-Identifier: MIT
6+
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============================= end_copyright_notice ===========================*/
8+
//===- SPIRVExtensions.td - SPIR-V Extensions supported by igc-compute ----*- tablegen -*-===//
9+
//
10+
// This file declares a set of SPIR-V extensions supported by igc-compute.
11+
//
12+
//===-------------------------------------------------------------------------------------===//
13+
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// Note! After editing this file, please run the build locally, to generate the documentation.
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// SPIRVExtension class accepts:
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// 1) The extension name
18+
// 2) A list of supported capabilities in this extension
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// 3) Specification URL
20+
class SPIRVExtension<
21+
string ExtensionName,
22+
list<string> Capabilities,
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string SpecURL
24+
> {
25+
string ExtName = ExtensionName;
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list<string> ExtCapabilities = Capabilities;
27+
string ExtSpecURL = SpecURL;
28+
}
29+
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// Note: the list is incomplete. TODO: extend the list with all supported extensions.
31+
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def SPV_INTEL_subgroups : SPIRVExtension<
33+
"SPV_INTEL_subgroups",
34+
[ "SubgroupShuffleINTEL",
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"SubgroupBufferBlockIOINTEL",
36+
"SubgroupImageBlockIOINTEL" ],
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"https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_subgroups.asciidoc"
38+
>;
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def SPV_INTEL_bfloat16_conversion : SPIRVExtension<
41+
"SPV_INTEL_bfloat16_conversion",
42+
[ "BFloat16ConversionINTEL" ],
43+
"https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_bfloat16_conversion.asciidoc"
44+
>;
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46+
def SPV_INTEL_2d_block_io : SPIRVExtension<
47+
"SPV_INTEL_2d_block_io",
48+
[ "Subgroup2DBlockIOINTEL",
49+
"Subgroup2DBlockTransformINTEL",
50+
"Subgroup2DBlockTransposeINTEL" ],
51+
"https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_2d_block_io.asciidoc"
52+
>;
53+
54+
def SPV_INTEL_cache_controls : SPIRVExtension<
55+
"SPV_INTEL_cache_controls",
56+
[ "CacheControlsINTEL" ],
57+
"https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_cache_controls.asciidoc"
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>;
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def SPV_INTEL_fp_fast_math_mode : SPIRVExtension<
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"SPV_INTEL_fp_fast_math_mode",
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[ "FPFastMathModeINTEL" ],
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"https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_fp_fast_math_mode.asciidoc"
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>;
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IGC/AdaptorOCL/ocl_igc_interface/igc_ocl_device_ctx.h

Lines changed: 16 additions & 1 deletion
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@@ -18,6 +18,7 @@ SPDX-License-Identifier: MIT
1818
#include "ocl_igc_interface/ocl_gen_binary.h"
1919
#include "ocl_igc_interface/platform.h"
2020
#include "ocl_igc_interface/igc_builtins.h"
21+
#include "ocl_igc_interface/igc_options_and_capabilities.h"
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2223
#include "cif/macros/enable.h"
2324
#include "OCLAPI/oclapi.h"
@@ -103,9 +104,23 @@ CIF_DEFINE_INTERFACE_VER_WITH_COMPATIBILITY(IgcOclDeviceCtx, 4, 3) {
103104
OCL_API_CALL virtual IgcBuiltinsBase *GetIgcBuiltinsHandleImpl(CIF::Version_t ver);
104105
};
105106

107+
CIF_DEFINE_INTERFACE_VER_WITH_COMPATIBILITY(IgcOclDeviceCtx, 5, 4) {
108+
CIF_INHERIT_CONSTRUCTOR();
109+
110+
template <typename IgcOptionsAndCapabilitiesInterface = IgcOptionsAndCapabilitiesLatest>
111+
CIF::RAII::UPtr_t<IgcOptionsAndCapabilitiesInterface> GetIgcOptionsAndCapabilitiesHandle() {
112+
return CIF::RAII::RetainAndPack<IgcOptionsAndCapabilitiesInterface>(
113+
GetIgcOptionsAndCapabilitiesHandleImpl(IgcOptionsAndCapabilitiesInterface::GetVersion()));
114+
}
115+
116+
protected:
117+
virtual IgcOptionsAndCapabilitiesBase *GetIgcOptionsAndCapabilitiesHandleImpl(CIF::Version_t ver);
118+
};
119+
106120
CIF_GENERATE_VERSIONS_LIST_AND_DECLARE_INTERFACE_DEPENDENCIES(IgcOclDeviceCtx, IGC::Platform, IGC::GTSystemInfo,
107121
IGC::OclGenBinary, IGC::IgcFeaturesAndWorkarounds,
108-
IGC::IgcOclTranslationCtx, IGC::IgcBuiltins);
122+
IGC::IgcOclTranslationCtx, IGC::IgcBuiltins,
123+
IGC::IgcOptionsAndCapabilities);
109124
CIF_MARK_LATEST_VERSION(IgcOclDeviceCtxLatest, IgcOclDeviceCtx);
110125
using IgcOclDeviceCtxTagOCL = IgcOclDeviceCtx<3>; // Note : can tag with different version for
111126
// transition periods

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