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Description
I'd like to be able to query the master clock rate for a UHD device - I see this is exposed in the soapysdr_sys
crate but there's no exposed method on Device
for it.
The reason is that for some (or all?) SDRs, the sampling rate needs to an even decimation of the clock rate.
From the Ettus knowledge base:
Clocking and Sampling Rates
There are two master clock rates (MCR) supported on the X300 and X310: 200.0 MHz and 184.32 MHz.The sampling rate must be an integer decimation rate of the MCR. Ideally, this decimation factor should be an even number. An odd decimation factor will result in additional unwanted attenuation (roll-off from the CIC filter in the DUC and DDC blocks in the FPGA). The valid decimation rates are between 1 and 1024.
For the MCR of 200.0 MHz, the achievable sampling rates using an even decimation factor are 200.0, 100.0, 50.0, 33.33, 25.0, 20.0, 16.67, 14.286 Msps, ... 195.31 Ksps.
For the MCR of 184.32 MHz, the achievable sampling rates using an even decimation factor are 184.32, 92.16, 46.08, 30.72, 23.04, 18.432, 15.36, 13.166 Msps, ... 180.0 Ksps.
If the desired sampling rate is not directly supported by the hardware, then it will be necessary to re-sample in software. This can be done in C++ using libraries such as Liquid DSP [1], or can be done in GNU Radio, in which there are three blocks that perform sampling rate conversion.
The list of valid sample rate ranges doesn't preclude odd sample rates, so afaik there is no other method for an application to know which sampling rates will result in attenuation and also afaik set_sample_rate
doesn't report any issues, even though the following warning is logged to stdout:
[WARNING] [0/DDC#1] The requested decimation is odd; the user should expect passband CIC rolloff.
Select an even decimation to ensure that a halfband filter is enabled.
Decimations factorable by 4 will enable 2 halfbands, those factorable by 8 will enable 3 halfbands.
decimation = dsp_rate/samp_rate -> 25