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adjust recipe in tryToWidenMemory
1 parent 6a9cf7d commit 06a9ecb

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4 files changed

+27
-61
lines changed

4 files changed

+27
-61
lines changed

llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines changed: 25 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -7734,9 +7734,9 @@ void EpilogueVectorizerEpilogueLoop::printDebugTracesAtEnd() {
77347734
});
77357735
}
77367736

7737-
VPWidenMemoryRecipe *
7738-
VPRecipeBuilder::tryToWidenMemory(Instruction *I, ArrayRef<VPValue *> Operands,
7739-
VFRange &Range) {
7737+
VPRecipeBase *VPRecipeBuilder::tryToWidenMemory(Instruction *I,
7738+
ArrayRef<VPValue *> Operands,
7739+
VFRange &Range) {
77407740
assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
77417741
"Must be called with either a load or store");
77427742

@@ -7793,14 +7793,30 @@ VPRecipeBuilder::tryToWidenMemory(Instruction *I, ArrayRef<VPValue *> Operands,
77937793
Builder.insert(VectorPtr);
77947794
Ptr = VectorPtr;
77957795
}
7796-
if (LoadInst *Load = dyn_cast<LoadInst>(I))
7797-
return new VPWidenLoadRecipe(*Load, Ptr, Mask, Consecutive, Reverse,
7798-
VPIRMetadata(*Load, LVer), I->getDebugLoc());
77997796

7800-
StoreInst *Store = cast<StoreInst>(I);
7801-
return new VPWidenStoreRecipe(*Store, Ptr, Operands[0], Mask, Consecutive,
7797+
if (auto *Load = dyn_cast<LoadInst>(I)) {
7798+
auto *LoadR =
7799+
new VPWidenLoadRecipe(*Load, Ptr, Mask, Consecutive, Reverse,
7800+
VPIRMetadata(*Load, LVer), Load->getDebugLoc());
7801+
if (Reverse) {
7802+
Builder.insert(LoadR);
7803+
return new VPInstruction(VPInstruction::Reverse, {LoadR},
7804+
LoadR->getDebugLoc());
7805+
}
7806+
return LoadR;
7807+
}
7808+
7809+
auto *Store = cast<StoreInst>(I);
7810+
VPValue *StoredVal = Operands[0];
7811+
if (Reverse) {
7812+
auto *ReverseR = new VPInstruction(VPInstruction::Reverse, {StoredVal},
7813+
Store->getDebugLoc());
7814+
Builder.insert(ReverseR);
7815+
StoredVal = ReverseR;
7816+
}
7817+
return new VPWidenStoreRecipe(*Store, Ptr, StoredVal, Mask, Consecutive,
78027818
Reverse, VPIRMetadata(*Store, LVer),
7803-
I->getDebugLoc());
7819+
Store->getDebugLoc());
78047820
}
78057821

78067822
/// Creates a VPWidenIntOrFpInductionRecpipe for \p Phi. If needed, it will also
@@ -8878,10 +8894,6 @@ VPlanPtr LoopVectorizationPlanner::tryToBuildVPlanWithVPRecipes(
88788894
// bring the VPlan to its final state.
88798895
// ---------------------------------------------------------------------------
88808896

8881-
// Adjust the result of reverse memory accesses.
8882-
VPlanTransforms::runPass(VPlanTransforms::adjustRecipesForReverseAccesses,
8883-
*Plan);
8884-
88858897
// Adjust the recipes for any inloop reductions.
88868898
adjustRecipesForReductions(Plan, RecipeBuilder, Range.Start);
88878899

llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -96,9 +96,8 @@ class VPRecipeBuilder {
9696
/// Check if the load or store instruction \p I should widened for \p
9797
/// Range.Start and potentially masked. Such instructions are handled by a
9898
/// recipe that takes an additional VPInstruction for the mask.
99-
VPWidenMemoryRecipe *tryToWidenMemory(Instruction *I,
100-
ArrayRef<VPValue *> Operands,
101-
VFRange &Range);
99+
VPRecipeBase *tryToWidenMemory(Instruction *I, ArrayRef<VPValue *> Operands,
100+
VFRange &Range);
102101

103102
/// Check if an induction recipe should be constructed for \p Phi. If so build
104103
/// and return it. If not, return null.

llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Lines changed: 0 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -3557,34 +3557,3 @@ void VPlanTransforms::addBranchWeightToMiddleTerminator(
35573557
MDB.createBranchWeights({1, VectorStep - 1}, /*IsExpected=*/false);
35583558
MiddleTerm->addMetadata(LLVMContext::MD_prof, BranchWeights);
35593559
}
3560-
3561-
void VPlanTransforms::adjustRecipesForReverseAccesses(VPlan &Plan) {
3562-
if (Plan.hasScalarVFOnly())
3563-
return;
3564-
3565-
for (VPBasicBlock *VPBB : VPBlockUtils::blocksOnly<VPBasicBlock>(
3566-
vp_depth_first_deep(Plan.getVectorLoopRegion()))) {
3567-
for (VPRecipeBase &R : *VPBB) {
3568-
auto *MemR = dyn_cast<VPWidenMemoryRecipe>(&R);
3569-
if (!MemR || !MemR->isReverse())
3570-
continue;
3571-
3572-
if (auto *L = dyn_cast<VPWidenLoadRecipe>(MemR)) {
3573-
auto *Reverse =
3574-
new VPInstruction(VPInstruction::Reverse, {L}, L->getDebugLoc());
3575-
Reverse->insertAfter(L);
3576-
L->replaceAllUsesWith(Reverse);
3577-
Reverse->setOperand(0, L);
3578-
continue;
3579-
}
3580-
3581-
if (auto *S = dyn_cast<VPWidenStoreRecipe>(MemR)) {
3582-
VPValue *StoredVal = S->getStoredValue();
3583-
auto *Reverse = new VPInstruction(VPInstruction::Reverse, {StoredVal},
3584-
S->getDebugLoc());
3585-
Reverse->insertBefore(S);
3586-
S->setOperand(1, Reverse);
3587-
}
3588-
}
3589-
}
3590-
}

llvm/lib/Transforms/Vectorize/VPlanTransforms.h

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -284,20 +284,6 @@ struct VPlanTransforms {
284284
static void
285285
addBranchWeightToMiddleTerminator(VPlan &Plan, ElementCount VF,
286286
std::optional<unsigned> VScaleForTuning);
287-
288-
/// Add reverse recipes for reverse memory accesses.
289-
/// For reverse loads, transform
290-
/// WIDEN ir<%L> = load vp<%addr>
291-
/// into
292-
/// WIDEN ir<%L> = load vp<%addr>
293-
/// EMIT vp<%RevL> = reverse ir<%L>
294-
///
295-
/// For reverse stores, transform
296-
/// WIDEN store vp<%addr>, ir<%SVal>
297-
/// into
298-
/// EMIT vp<%RevS> = reverse ir<%SVal>
299-
/// WIDEN store vp<%addr>, vp<%RevS>
300-
static void adjustRecipesForReverseAccesses(VPlan &Plan);
301287
};
302288

303289
} // namespace llvm

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