cortex-m: fix typos

Author: newAM

cortex-m/src/peripheral/ac.rs

@@ -16,7 +16,7 @@ pub struct RegisterBlock {
     /// AHB Slave Control Register
     pub ahbscr: RW<u32>,
     reserved0: u32,
-    /// Auxilary Bus Fault Status Register
+    /// Auxiliary Bus Fault Status Register
     pub abfsr: RW<u32>,
 }
 

cortex-m/src/peripheral/scb.rs

@@ -344,7 +344,7 @@ impl SCB {
         let mut cbp = unsafe { CBP::new() };
 
         // Disable I-cache
-        // NOTE(unsafe): We have synchronised access by &mut self
+        // NOTE(unsafe): We have synchronized access by &mut self
         unsafe { self.ccr.modify(|r| r & !SCB_CCR_IC_MASK) };
 
         // Invalidate I-cache
@@ -417,7 +417,7 @@ impl SCB {
         }
 
         // Turn off the D-cache
-        // NOTE(unsafe): We have synchronised access by &mut self
+        // NOTE(unsafe): We have synchronized access by &mut self
         unsafe { self.ccr.modify(|r| r & !SCB_CCR_DC_MASK) };
 
         // Clean and invalidate whatever was left in it