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Merged
nordicjm merged 2 commits into from
Dec 3, 2025
Merged

Update nRF7120 FPGA pinset #25889

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8b834c2
tests: Update pins to align with Malago FPGA pinset.
rob-robinson-14 Nov 13, 2025
5d1bf8d
dts: common: nordic: Correct ngpios on ports for nrf7120_enga
rob-robinson-14 Nov 20, 2025
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8 changes: 4 additions & 4 deletions boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120-pinctrl.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -30,12 +30,12 @@
/omit-if-no-ref/ uart30_default: uart30_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 5)>,
<NRF_PSEL(UART_RTS, 0, 2)>;
<NRF_PSEL(UART_RTS, 0, 8)>;
};

group2 {
psels = <NRF_PSEL(UART_RX, 0, 6)>,
<NRF_PSEL(UART_CTS, 0, 3)>;
<NRF_PSEL(UART_CTS, 0, 7)>;
bias-pull-up;
};
};
Expand All @@ -44,8 +44,8 @@
group1 {
psels = <NRF_PSEL(UART_TX, 0, 5)>,
<NRF_PSEL(UART_RX, 0, 6)>,
<NRF_PSEL(UART_RTS, 0, 2)>,
<NRF_PSEL(UART_CTS, 0, 3)>;
<NRF_PSEL(UART_RTS, 0, 8)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
Expand Down
6 changes: 3 additions & 3 deletions dts/common/nordic/nrf7120_enga.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -643,7 +643,7 @@
gpio-controller;
#gpio-cells = <2>;
port = <1>;
ngpios = <20>;
ngpios = <16>;
gpiote-instance = <&gpiote20>;
status = "disabled";
};
Expand All @@ -654,7 +654,7 @@
gpio-controller;
#gpio-cells = <2>;
port = <3>;
ngpios = <13>;
ngpios = <12>;
gpiote-instance = <&gpiote20>;
status = "disabled";
};
Expand Down Expand Up @@ -831,7 +831,7 @@
gpio-controller;
#gpio-cells = <2>;
port = <0>;
ngpios = <10>;
ngpios = <13>;
gpiote-instance = <&gpiote30>;
status = "disabled";
};
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10 changes: 5 additions & 5 deletions samples/zephyr/drivers/i2c/rtio_loopback/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@

/*
* SDA = P1.8 and P1.9
* SCL = P1.14 and P1.15
* SCL = P1.2 and P1.3
*/

/ {
Expand All @@ -20,31 +20,31 @@
i2c21_default: i2c21_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 8)>,
<NRF_PSEL(TWIS_SCL, 1, 14)>;
<NRF_PSEL(TWIS_SCL, 1, 2)>;
bias-pull-up;
};
};

i2c21_sleep: i2c21_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 8)>,
<NRF_PSEL(TWIS_SCL, 1, 14)>;
<NRF_PSEL(TWIS_SCL, 1, 2)>;
low-power-enable;
};
};

i2c22_default: i2c22_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 15)>;
<NRF_PSEL(TWIS_SCL, 1, 3)>;
bias-pull-up;
};
};

i2c22_sleep: i2c22_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 15)>;
<NRF_PSEL(TWIS_SCL, 1, 3)>;
low-power-enable;
};
};
Expand Down
12 changes: 6 additions & 6 deletions tests/drivers/gpio/gpio_nfct/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -6,18 +6,18 @@

/ {
/* Test requirements:
* P1.00 shorted with P1.01;
* P1.02 shorted with P1.03.
* (NFC pins are P1.01 and P1.02)
* P0.00 shorted with P0.03;
* P0.12 shorted with P0.04.
* (NFC pins are P0.03 and P0.04)
*/
test_gpios {
compatible = "gpio-leds";
out_gpios: out_gpios {
gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>, <&gpio1 2 GPIO_ACTIVE_HIGH>;
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>, <&gpio0 12 GPIO_ACTIVE_HIGH>;
};

in_gpios: in_gpios {
gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>, <&gpio1 3 GPIO_ACTIVE_HIGH>;
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>, <&gpio0 4 GPIO_ACTIVE_HIGH>;
};
};
};
Expand All @@ -30,6 +30,6 @@
status = "okay";
};

&gpio1 {
&gpio0 {
status = "okay";
};
8 changes: 4 additions & 4 deletions tests/zephyr/boards/nrf/i2c/i2c_slave/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -8,14 +8,14 @@
i2c21_default_alt: i2c21_default_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 14)>;
<NRF_PSEL(TWIM_SCL, 1, 2)>;
};
};

i2c21_sleep_alt: i2c21_sleep_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 14)>;
<NRF_PSEL(TWIM_SCL, 1, 2)>;
low-power-enable;
};
};
Expand All @@ -26,15 +26,15 @@
* to configure pins for TWIS with pinctrl.
*/
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 15)>;
<NRF_PSEL(TWIM_SCL, 1, 3)>;
bias-pull-up;
};
};

i2c22_sleep_alt: i2c22_sleep_alt {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 15)>;
<NRF_PSEL(TWIM_SCL, 1, 3)>;
low-power-enable;
};
};
Expand Down
10 changes: 5 additions & 5 deletions tests/zephyr/boards/nrf/qdec/boards/nrf7120pdk_nrf7120_common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,8 @@
/* Required loopbacks
* P1.11 <-> P1.12
* P1.13 <-> P1.15
* P1.2 <-> P1.3
* P1.4 <-> P2.5
* P1.02 <-> P1.3
* P1.00 <-> P1.14
*/

/ {
Expand All @@ -24,7 +24,7 @@
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
};
phase_b1: phase_b1 {
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
};
};

Expand Down Expand Up @@ -60,14 +60,14 @@
qdec_21_pinctrl: qdec_21_pinctrl {
group1 {
psels = <NRF_PSEL(QDEC_A, 1, 3)>,
<NRF_PSEL(QDEC_B, 1, 5)>;
<NRF_PSEL(QDEC_B, 1, 14)>;
};
};

qdec_21_sleep_pinctrl: qdec_21_sleep_pinctrl {
group1 {
psels = <NRF_PSEL(QDEC_A, 1, 3)>,
<NRF_PSEL(QDEC_B, 1, 5)>;
<NRF_PSEL(QDEC_B, 1, 14)>;
low-power-enable;
};
};
Expand Down
10 changes: 5 additions & 5 deletions tests/zephyr/drivers/i2c/i2c_nrfx_twim/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@

/*
* SDA = P1.8 and P1.9
* SCL = P1.14 and P1.15
* SCL = P1.2 and P1.3
*/

/ {
Expand All @@ -20,31 +20,31 @@
i2c21_default: i2c21_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 8)>,
<NRF_PSEL(TWIS_SCL, 1, 14)>;
<NRF_PSEL(TWIS_SCL, 1, 2)>;
bias-pull-up;
};
};

i2c21_sleep: i2c21_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 8)>,
<NRF_PSEL(TWIS_SCL, 1, 14)>;
<NRF_PSEL(TWIS_SCL, 1, 2)>;
low-power-enable;
};
};

i2c22_default: i2c22_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 15)>;
<NRF_PSEL(TWIS_SCL, 1, 3)>;
bias-pull-up;
};
};

i2c22_sleep: i2c22_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 15)>;
<NRF_PSEL(TWIS_SCL, 1, 3)>;
low-power-enable;
};
};
Expand Down
10 changes: 5 additions & 5 deletions tests/zephyr/drivers/i2c/i2c_target_api/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
@@ -1,37 +1,37 @@
/*
* SDA = P1.8 and P1.9
* SCL = P1.14 and P1.15
* SCL = P1.2 and P1.3
*/

&pinctrl {
i2c21_default: i2c21_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 14)>;
<NRF_PSEL(TWIM_SCL, 1, 2)>;
bias-pull-up;
};
};

i2c21_sleep: i2c21_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 8)>,
<NRF_PSEL(TWIM_SCL, 1, 14)>;
<NRF_PSEL(TWIM_SCL, 1, 2)>;
low-power-enable;
};
};

i2c22_default: i2c22_default {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 15)>;
<NRF_PSEL(TWIS_SCL, 1, 3)>;
bias-pull-up;
};
};

i2c22_sleep: i2c22_sleep {
group1 {
psels = <NRF_PSEL(TWIS_SDA, 1, 9)>,
<NRF_PSEL(TWIS_SCL, 1, 15)>;
<NRF_PSEL(TWIS_SCL, 1, 3)>;
low-power-enable;
};
};
Expand Down
6 changes: 3 additions & 3 deletions tests/zephyr/drivers/spi/spi_controller_peripheral/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 14)>,
<NRF_PSEL(SPIS_MOSI, 1, 9)>,
<NRF_PSEL(SPIS_CSN, 1, 5)>;
<NRF_PSEL(SPIS_CSN, 1, 13)>;
};
};

Expand All @@ -36,7 +36,7 @@
psels = <NRF_PSEL(SPIS_SCK, 1, 12)>,
<NRF_PSEL(SPIS_MISO, 1, 14)>,
<NRF_PSEL(SPIS_MOSI, 1, 9)>,
<NRF_PSEL(SPIS_CSN, 1, 5)>;
<NRF_PSEL(SPIS_CSN, 1, 13)>;
low-power-enable;
};
};
Expand All @@ -52,7 +52,7 @@
pinctrl-1 = <&spi22_sleep_alt>;
pinctrl-names = "default", "sleep";
overrun-character = <0x00>;
cs-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
cs-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
zephyr,pm-device-runtime-auto;
dut_spi_dt: test-spi-dev@0 {
compatible = "vnd,spi-device";
Expand Down
10 changes: 5 additions & 5 deletions tests/zephyr/drivers/spi/spi_loopback/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -6,24 +6,24 @@

/*
* Test requires following loopback:
* P1.4 - P1.5
* P1.11 - P1.12
*/

&pinctrl {
spi20_default: spi20_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
<NRF_PSEL(SPIM_MISO, 1, 4)>,
<NRF_PSEL(SPIM_MOSI, 1, 5)>;
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 12)>;
low-power-enable;
};
};

spi20_sleep: spi20_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 2, 6)>,
<NRF_PSEL(SPIM_MISO, 1, 4)>,
<NRF_PSEL(SPIM_MOSI, 1, 5)>;
<NRF_PSEL(SPIM_MISO, 1, 11)>,
<NRF_PSEL(SPIM_MOSI, 1, 12)>;
low-power-enable;
};
};
Expand Down
8 changes: 4 additions & 4 deletions tests/zephyr/drivers/uart/uart_async_api/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -7,15 +7,15 @@
&pinctrl {
uart21_default_alt: uart21_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 04)>,
<NRF_PSEL(UART_RX, 1, 05)>;
psels = <NRF_PSEL(UART_TX, 1, 13)>,
<NRF_PSEL(UART_RX, 1, 15)>;
};
};

uart21_sleep_alt: uart21_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 04)>,
<NRF_PSEL(UART_RX, 1, 05)>;
psels = <NRF_PSEL(UART_TX, 1, 13)>,
<NRF_PSEL(UART_RX, 1, 15)>;
low-power-enable;
};
};
Expand Down
8 changes: 4 additions & 4 deletions tests/zephyr/drivers/uart/uart_elementary/boards/nrf7120pdk_nrf7120_cpuapp.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -7,17 +7,17 @@
&pinctrl {
uart21_default: uart21_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 04)>,
<NRF_PSEL(UART_RX, 1, 05)>,
psels = <NRF_PSEL(UART_TX, 1, 13)>,
<NRF_PSEL(UART_RX, 1, 15)>,
<NRF_PSEL(UART_RTS, 1, 02)>,
<NRF_PSEL(UART_CTS, 1, 03)>;
};
};

uart21_sleep: uart21_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 04)>,
<NRF_PSEL(UART_RX, 1, 05)>,
psels = <NRF_PSEL(UART_TX, 1, 13)>,
<NRF_PSEL(UART_RX, 1, 15)>,
<NRF_PSEL(UART_RTS, 1, 02)>,
<NRF_PSEL(UART_CTS, 1, 03)>;
low-power-enable;
Expand Down
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