|
14 | 14 | */ |
15 | 15 |
|
16 | 16 | #include <linux/clk.h> |
| 17 | +#include <linux/cleanup.h> |
17 | 18 | #include <linux/debugfs.h> |
18 | 19 | #include <linux/delay.h> |
19 | 20 | #include <linux/export.h> |
@@ -269,7 +270,7 @@ struct tegra_msi { |
269 | 270 | DECLARE_BITMAP(used, INT_PCI_MSI_NR); |
270 | 271 | struct irq_domain *domain; |
271 | 272 | struct mutex map_lock; |
272 | | - spinlock_t mask_lock; |
| 273 | + raw_spinlock_t mask_lock; |
273 | 274 | void *virt; |
274 | 275 | dma_addr_t phys; |
275 | 276 | int irq; |
@@ -1604,29 +1605,27 @@ static void tegra_msi_irq_mask(struct irq_data *d) |
1604 | 1605 | struct tegra_msi *msi = irq_data_get_irq_chip_data(d); |
1605 | 1606 | struct tegra_pcie *pcie = msi_to_pcie(msi); |
1606 | 1607 | unsigned int index = d->hwirq / 32; |
1607 | | - unsigned long flags; |
1608 | 1608 | u32 value; |
1609 | 1609 |
|
1610 | | - spin_lock_irqsave(&msi->mask_lock, flags); |
1611 | | - value = afi_readl(pcie, AFI_MSI_EN_VEC(index)); |
1612 | | - value &= ~BIT(d->hwirq % 32); |
1613 | | - afi_writel(pcie, value, AFI_MSI_EN_VEC(index)); |
1614 | | - spin_unlock_irqrestore(&msi->mask_lock, flags); |
| 1610 | + scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) { |
| 1611 | + value = afi_readl(pcie, AFI_MSI_EN_VEC(index)); |
| 1612 | + value &= ~BIT(d->hwirq % 32); |
| 1613 | + afi_writel(pcie, value, AFI_MSI_EN_VEC(index)); |
| 1614 | + } |
1615 | 1615 | } |
1616 | 1616 |
|
1617 | 1617 | static void tegra_msi_irq_unmask(struct irq_data *d) |
1618 | 1618 | { |
1619 | 1619 | struct tegra_msi *msi = irq_data_get_irq_chip_data(d); |
1620 | 1620 | struct tegra_pcie *pcie = msi_to_pcie(msi); |
1621 | 1621 | unsigned int index = d->hwirq / 32; |
1622 | | - unsigned long flags; |
1623 | 1622 | u32 value; |
1624 | 1623 |
|
1625 | | - spin_lock_irqsave(&msi->mask_lock, flags); |
1626 | | - value = afi_readl(pcie, AFI_MSI_EN_VEC(index)); |
1627 | | - value |= BIT(d->hwirq % 32); |
1628 | | - afi_writel(pcie, value, AFI_MSI_EN_VEC(index)); |
1629 | | - spin_unlock_irqrestore(&msi->mask_lock, flags); |
| 1624 | + scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) { |
| 1625 | + value = afi_readl(pcie, AFI_MSI_EN_VEC(index)); |
| 1626 | + value |= BIT(d->hwirq % 32); |
| 1627 | + afi_writel(pcie, value, AFI_MSI_EN_VEC(index)); |
| 1628 | + } |
1630 | 1629 | } |
1631 | 1630 |
|
1632 | 1631 | static void tegra_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) |
@@ -1736,7 +1735,7 @@ static int tegra_pcie_msi_setup(struct tegra_pcie *pcie) |
1736 | 1735 | int err; |
1737 | 1736 |
|
1738 | 1737 | mutex_init(&msi->map_lock); |
1739 | | - spin_lock_init(&msi->mask_lock); |
| 1738 | + raw_spin_lock_init(&msi->mask_lock); |
1740 | 1739 |
|
1741 | 1740 | if (IS_ENABLED(CONFIG_PCI_MSI)) { |
1742 | 1741 | err = tegra_allocate_domains(msi); |
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