Extending Zvbc32e vclmul[h] to SEW 8 and 16

nibrunie · nibrunie · commit 21a280b12aab · 2024-10-06T13:22:14.000-07:00
diff --git a/riscv/insns/vclmul_vv.h b/riscv/insns/vclmul_vv.h
@@ -3,7 +3,7 @@
 #include "zvk_ext_macros.h"
 
 require_any_zvbc;
-require_either_extension_condition(EXT_ZVBC, P.VU.vsew == 64, EXT_ZVBC32E, P.VU.vsew == 32);
+require_either_extension_condition(EXT_ZVBC, P.VU.vsew == 64, EXT_ZVBC32E, P.VU.vsew == 32 || P.VU.vsew == 16 || P.VU.vsew == 8);
 
 VI_VV_ULOOP
 ({
diff --git a/riscv/insns/vclmul_vx.h b/riscv/insns/vclmul_vx.h
@@ -3,7 +3,7 @@
 #include "zvk_ext_macros.h"
 
 require_any_zvbc;
-require_either_extension_condition(EXT_ZVBC, P.VU.vsew == 64, EXT_ZVBC32E, P.VU.vsew == 32);
+require_either_extension_condition(EXT_ZVBC, P.VU.vsew == 64, EXT_ZVBC32E, P.VU.vsew == 32 || P.VU.vsew == 16 || P.VU.vsew == 8);
 
 VI_VX_ULOOP
 ({
diff --git a/riscv/insns/vclmulh_vv.h b/riscv/insns/vclmulh_vv.h
@@ -3,7 +3,7 @@
 #include "zvk_ext_macros.h"
 
 require_any_zvbc;
-require_either_extension_condition(EXT_ZVBC, P.VU.vsew == 64, EXT_ZVBC32E, P.VU.vsew == 32);
+require_either_extension_condition(EXT_ZVBC, P.VU.vsew == 64, EXT_ZVBC32E, P.VU.vsew == 32 || P.VU.vsew == 16 || P.VU.vsew == 8);
 
 VI_VV_ULOOP
 ({
diff --git a/riscv/insns/vclmulh_vx.h b/riscv/insns/vclmulh_vx.h
@@ -3,7 +3,7 @@
 #include "zvk_ext_macros.h"
 
 require_any_zvbc;
-require_either_extension_condition(EXT_ZVBC, P.VU.vsew == 64, EXT_ZVBC32E, P.VU.vsew == 32);
+require_either_extension_condition(EXT_ZVBC, P.VU.vsew == 64, EXT_ZVBC32E, P.VU.vsew == 32 || P.VU.vsew == 16 || P.VU.vsew == 8);
 
 VI_VX_ULOOP
 ({
