From ed76b6a906357deacc23c64b241f887aa6ebbbcc Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Wed, 26 Mar 2025 15:13:34 +0000 Subject: [PATCH 001/207] Change several CSRs from unspecified base to base: 32 to comply with the spec. This is required for several use cases like Go risc-v support which relies only on 64-bit spec, thus being able to filter rv32 CSRs is mandatory. (#532) Signed-off-by: Afonso Oliveira Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> --- arch/csr/H/henvcfgh.yaml | 1 + arch/csr/Zihpm/hpmcounter10h.yaml | 1 + arch/csr/Zihpm/hpmcounter11h.yaml | 1 + arch/csr/Zihpm/hpmcounter12h.yaml | 1 + arch/csr/Zihpm/hpmcounter13h.yaml | 1 + arch/csr/Zihpm/hpmcounter14h.yaml | 1 + arch/csr/Zihpm/hpmcounter15h.yaml | 1 + arch/csr/Zihpm/hpmcounter16h.yaml | 1 + arch/csr/Zihpm/hpmcounter17h.yaml | 1 + arch/csr/Zihpm/hpmcounter18h.yaml | 1 + arch/csr/Zihpm/hpmcounter19h.yaml | 1 + arch/csr/Zihpm/hpmcounter20h.yaml | 1 + arch/csr/Zihpm/hpmcounter21h.yaml | 1 + arch/csr/Zihpm/hpmcounter22h.yaml | 1 + arch/csr/Zihpm/hpmcounter23h.yaml | 1 + arch/csr/Zihpm/hpmcounter24h.yaml | 1 + arch/csr/Zihpm/hpmcounter25h.yaml | 1 + arch/csr/Zihpm/hpmcounter26h.yaml | 1 + arch/csr/Zihpm/hpmcounter27h.yaml | 1 + arch/csr/Zihpm/hpmcounter28h.yaml | 1 + arch/csr/Zihpm/hpmcounter29h.yaml | 1 + arch/csr/Zihpm/hpmcounter30h.yaml | 1 + arch/csr/Zihpm/hpmcounter31h.yaml | 1 + arch/csr/Zihpm/hpmcounter3h.yaml | 1 + arch/csr/Zihpm/hpmcounter4h.yaml | 1 + arch/csr/Zihpm/hpmcounter5h.yaml | 1 + arch/csr/Zihpm/hpmcounter6h.yaml | 1 + arch/csr/Zihpm/hpmcounter7h.yaml | 1 + arch/csr/Zihpm/hpmcounter8h.yaml | 1 + arch/csr/Zihpm/hpmcounter9h.yaml | 1 + arch/csr/menvcfgh.yaml | 1 + arch/csr/mseccfgh.yaml | 1 + arch/csr/timeh.yaml | 1 + 33 files changed, 33 insertions(+) diff --git a/arch/csr/H/henvcfgh.yaml b/arch/csr/H/henvcfgh.yaml index 3b45ec2d44..4f136fce3f 100644 --- a/arch/csr/H/henvcfgh.yaml +++ b/arch/csr/H/henvcfgh.yaml @@ -4,6 +4,7 @@ $schema: "csr_schema.json#" kind: csr name: henvcfgh address: 0x61A +base: 32 long_name: most-significant 32 bits of Hypervisor Environment Configuration description: | The henvcfgh CSR is a 32-bit read/write register for the most-significant 32 bits of `henvcfg`. diff --git a/arch/csr/Zihpm/hpmcounter10h.yaml b/arch/csr/Zihpm/hpmcounter10h.yaml index b903ef0217..81f80156af 100644 --- a/arch/csr/Zihpm/hpmcounter10h.yaml +++ b/arch/csr/Zihpm/hpmcounter10h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter10h long_name: User-mode Hardware Performance Counter 7, high half address: 0xC8A +base: 32 description: | Alias for M-mode CSR `mhpmcounter10h`. diff --git a/arch/csr/Zihpm/hpmcounter11h.yaml b/arch/csr/Zihpm/hpmcounter11h.yaml index 24c3187660..5eefd08e03 100644 --- a/arch/csr/Zihpm/hpmcounter11h.yaml +++ b/arch/csr/Zihpm/hpmcounter11h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter11h long_name: User-mode Hardware Performance Counter 8, high half address: 0xC8B +base: 32 description: | Alias for M-mode CSR `mhpmcounter11h`. diff --git a/arch/csr/Zihpm/hpmcounter12h.yaml b/arch/csr/Zihpm/hpmcounter12h.yaml index c0c468c19d..9007c8f506 100644 --- a/arch/csr/Zihpm/hpmcounter12h.yaml +++ b/arch/csr/Zihpm/hpmcounter12h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter12h long_name: User-mode Hardware Performance Counter 9, high half address: 0xC8C +base: 32 description: | Alias for M-mode CSR `mhpmcounter12h`. diff --git a/arch/csr/Zihpm/hpmcounter13h.yaml b/arch/csr/Zihpm/hpmcounter13h.yaml index cd055f9404..fb684749df 100644 --- a/arch/csr/Zihpm/hpmcounter13h.yaml +++ b/arch/csr/Zihpm/hpmcounter13h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter13h long_name: User-mode Hardware Performance Counter 10, high half address: 0xC8D +base: 32 description: | Alias for M-mode CSR `mhpmcounter13h`. diff --git a/arch/csr/Zihpm/hpmcounter14h.yaml b/arch/csr/Zihpm/hpmcounter14h.yaml index 1a4290b354..9e38f55a14 100644 --- a/arch/csr/Zihpm/hpmcounter14h.yaml +++ b/arch/csr/Zihpm/hpmcounter14h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter14h long_name: User-mode Hardware Performance Counter 11, high half address: 0xC8E +base: 32 description: | Alias for M-mode CSR `mhpmcounter14h`. diff --git a/arch/csr/Zihpm/hpmcounter15h.yaml b/arch/csr/Zihpm/hpmcounter15h.yaml index 8f7a0fb94e..745a8d284e 100644 --- a/arch/csr/Zihpm/hpmcounter15h.yaml +++ b/arch/csr/Zihpm/hpmcounter15h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter15h long_name: User-mode Hardware Performance Counter 12, high half address: 0xC8F +base: 32 description: | Alias for M-mode CSR `mhpmcounter15h`. diff --git a/arch/csr/Zihpm/hpmcounter16h.yaml b/arch/csr/Zihpm/hpmcounter16h.yaml index b3d05236b9..39f9043123 100644 --- a/arch/csr/Zihpm/hpmcounter16h.yaml +++ b/arch/csr/Zihpm/hpmcounter16h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter16h long_name: User-mode Hardware Performance Counter 13, high half address: 0xC90 +base: 32 description: | Alias for M-mode CSR `mhpmcounter16h`. diff --git a/arch/csr/Zihpm/hpmcounter17h.yaml b/arch/csr/Zihpm/hpmcounter17h.yaml index 0cd5f864e3..6a55a4e1ec 100644 --- a/arch/csr/Zihpm/hpmcounter17h.yaml +++ b/arch/csr/Zihpm/hpmcounter17h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter17h long_name: User-mode Hardware Performance Counter 14, high half address: 0xC91 +base: 32 description: | Alias for M-mode CSR `mhpmcounter17h`. diff --git a/arch/csr/Zihpm/hpmcounter18h.yaml b/arch/csr/Zihpm/hpmcounter18h.yaml index d45aa624b9..4427ba61d7 100644 --- a/arch/csr/Zihpm/hpmcounter18h.yaml +++ b/arch/csr/Zihpm/hpmcounter18h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter18h long_name: User-mode Hardware Performance Counter 15, high half address: 0xC92 +base: 32 description: | Alias for M-mode CSR `mhpmcounter18h`. diff --git a/arch/csr/Zihpm/hpmcounter19h.yaml b/arch/csr/Zihpm/hpmcounter19h.yaml index f5bff3f22d..bc4872908c 100644 --- a/arch/csr/Zihpm/hpmcounter19h.yaml +++ b/arch/csr/Zihpm/hpmcounter19h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter19h long_name: User-mode Hardware Performance Counter 16, high half address: 0xC93 +base: 32 description: | Alias for M-mode CSR `mhpmcounter19h`. diff --git a/arch/csr/Zihpm/hpmcounter20h.yaml b/arch/csr/Zihpm/hpmcounter20h.yaml index 6734e2d79b..6b75ff97e6 100644 --- a/arch/csr/Zihpm/hpmcounter20h.yaml +++ b/arch/csr/Zihpm/hpmcounter20h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter20h long_name: User-mode Hardware Performance Counter 17, high half address: 0xC94 +base: 32 description: | Alias for M-mode CSR `mhpmcounter20h`. diff --git a/arch/csr/Zihpm/hpmcounter21h.yaml b/arch/csr/Zihpm/hpmcounter21h.yaml index 12012a7bca..d644bf0ca9 100644 --- a/arch/csr/Zihpm/hpmcounter21h.yaml +++ b/arch/csr/Zihpm/hpmcounter21h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter21h long_name: User-mode Hardware Performance Counter 18, high half address: 0xC95 +base: 32 description: | Alias for M-mode CSR `mhpmcounter21h`. diff --git a/arch/csr/Zihpm/hpmcounter22h.yaml b/arch/csr/Zihpm/hpmcounter22h.yaml index 994240044e..ab3836ad4a 100644 --- a/arch/csr/Zihpm/hpmcounter22h.yaml +++ b/arch/csr/Zihpm/hpmcounter22h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter22h long_name: User-mode Hardware Performance Counter 19, high half address: 0xC96 +base: 32 description: | Alias for M-mode CSR `mhpmcounter22h`. diff --git a/arch/csr/Zihpm/hpmcounter23h.yaml b/arch/csr/Zihpm/hpmcounter23h.yaml index ecb16e6844..11c69f5e77 100644 --- a/arch/csr/Zihpm/hpmcounter23h.yaml +++ b/arch/csr/Zihpm/hpmcounter23h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter23h long_name: User-mode Hardware Performance Counter 20, high half address: 0xC97 +base: 32 description: | Alias for M-mode CSR `mhpmcounter23h`. diff --git a/arch/csr/Zihpm/hpmcounter24h.yaml b/arch/csr/Zihpm/hpmcounter24h.yaml index ffe667a456..d1223f183b 100644 --- a/arch/csr/Zihpm/hpmcounter24h.yaml +++ b/arch/csr/Zihpm/hpmcounter24h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter24h long_name: User-mode Hardware Performance Counter 21, high half address: 0xC98 +base: 32 description: | Alias for M-mode CSR `mhpmcounter24h`. diff --git a/arch/csr/Zihpm/hpmcounter25h.yaml b/arch/csr/Zihpm/hpmcounter25h.yaml index f4b3286a4f..891956a29d 100644 --- a/arch/csr/Zihpm/hpmcounter25h.yaml +++ b/arch/csr/Zihpm/hpmcounter25h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter25h long_name: User-mode Hardware Performance Counter 22, high half address: 0xC99 +base: 32 description: | Alias for M-mode CSR `mhpmcounter25h`. diff --git a/arch/csr/Zihpm/hpmcounter26h.yaml b/arch/csr/Zihpm/hpmcounter26h.yaml index 995483b4fe..267827d2ac 100644 --- a/arch/csr/Zihpm/hpmcounter26h.yaml +++ b/arch/csr/Zihpm/hpmcounter26h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter26h long_name: User-mode Hardware Performance Counter 23, high half address: 0xC9A +base: 32 description: | Alias for M-mode CSR `mhpmcounter26h`. diff --git a/arch/csr/Zihpm/hpmcounter27h.yaml b/arch/csr/Zihpm/hpmcounter27h.yaml index 8e17ad1758..ecc4f89d37 100644 --- a/arch/csr/Zihpm/hpmcounter27h.yaml +++ b/arch/csr/Zihpm/hpmcounter27h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter27h long_name: User-mode Hardware Performance Counter 24, high half address: 0xC9B +base: 32 description: | Alias for M-mode CSR `mhpmcounter27h`. diff --git a/arch/csr/Zihpm/hpmcounter28h.yaml b/arch/csr/Zihpm/hpmcounter28h.yaml index 9a1e7714f3..ee3b013e17 100644 --- a/arch/csr/Zihpm/hpmcounter28h.yaml +++ b/arch/csr/Zihpm/hpmcounter28h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter28h long_name: User-mode Hardware Performance Counter 25, high half address: 0xC9C +base: 32 description: | Alias for M-mode CSR `mhpmcounter28h`. diff --git a/arch/csr/Zihpm/hpmcounter29h.yaml b/arch/csr/Zihpm/hpmcounter29h.yaml index e3fd8e6a2f..f903b631f4 100644 --- a/arch/csr/Zihpm/hpmcounter29h.yaml +++ b/arch/csr/Zihpm/hpmcounter29h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter29h long_name: User-mode Hardware Performance Counter 26, high half address: 0xC9D +base: 32 description: | Alias for M-mode CSR `mhpmcounter29h`. diff --git a/arch/csr/Zihpm/hpmcounter30h.yaml b/arch/csr/Zihpm/hpmcounter30h.yaml index 08bc8149a7..4c370ead95 100644 --- a/arch/csr/Zihpm/hpmcounter30h.yaml +++ b/arch/csr/Zihpm/hpmcounter30h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter30h long_name: User-mode Hardware Performance Counter 27, high half address: 0xC9E +base: 32 description: | Alias for M-mode CSR `mhpmcounter30h`. diff --git a/arch/csr/Zihpm/hpmcounter31h.yaml b/arch/csr/Zihpm/hpmcounter31h.yaml index 02f8f77b23..397143b275 100644 --- a/arch/csr/Zihpm/hpmcounter31h.yaml +++ b/arch/csr/Zihpm/hpmcounter31h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter31h long_name: User-mode Hardware Performance Counter 28, high half address: 0xC9F +base: 32 description: | Alias for M-mode CSR `mhpmcounter31h`. diff --git a/arch/csr/Zihpm/hpmcounter3h.yaml b/arch/csr/Zihpm/hpmcounter3h.yaml index 2c49c0fe4c..6eb41a9e0f 100644 --- a/arch/csr/Zihpm/hpmcounter3h.yaml +++ b/arch/csr/Zihpm/hpmcounter3h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter3h long_name: User-mode Hardware Performance Counter 0, high half address: 0xC83 +base: 32 description: | Alias for M-mode CSR `mhpmcounter3h`. diff --git a/arch/csr/Zihpm/hpmcounter4h.yaml b/arch/csr/Zihpm/hpmcounter4h.yaml index ac6a575ccc..9faab3c5c0 100644 --- a/arch/csr/Zihpm/hpmcounter4h.yaml +++ b/arch/csr/Zihpm/hpmcounter4h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter4h long_name: User-mode Hardware Performance Counter 1, high half address: 0xC84 +base: 32 description: | Alias for M-mode CSR `mhpmcounter4h`. diff --git a/arch/csr/Zihpm/hpmcounter5h.yaml b/arch/csr/Zihpm/hpmcounter5h.yaml index 1529a2f8a2..662458fdab 100644 --- a/arch/csr/Zihpm/hpmcounter5h.yaml +++ b/arch/csr/Zihpm/hpmcounter5h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter5h long_name: User-mode Hardware Performance Counter 2, high half address: 0xC85 +base: 32 description: | Alias for M-mode CSR `mhpmcounter5h`. diff --git a/arch/csr/Zihpm/hpmcounter6h.yaml b/arch/csr/Zihpm/hpmcounter6h.yaml index 9995fc0eee..e481365550 100644 --- a/arch/csr/Zihpm/hpmcounter6h.yaml +++ b/arch/csr/Zihpm/hpmcounter6h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter6h long_name: User-mode Hardware Performance Counter 3, high half address: 0xC86 +base: 32 description: | Alias for M-mode CSR `mhpmcounter6h`. diff --git a/arch/csr/Zihpm/hpmcounter7h.yaml b/arch/csr/Zihpm/hpmcounter7h.yaml index 416f912193..4b1e69a34d 100644 --- a/arch/csr/Zihpm/hpmcounter7h.yaml +++ b/arch/csr/Zihpm/hpmcounter7h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter7h long_name: User-mode Hardware Performance Counter 4, high half address: 0xC87 +base: 32 description: | Alias for M-mode CSR `mhpmcounter7h`. diff --git a/arch/csr/Zihpm/hpmcounter8h.yaml b/arch/csr/Zihpm/hpmcounter8h.yaml index 11a341b4bb..a71d48687a 100644 --- a/arch/csr/Zihpm/hpmcounter8h.yaml +++ b/arch/csr/Zihpm/hpmcounter8h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter8h long_name: User-mode Hardware Performance Counter 5, high half address: 0xC88 +base: 32 description: | Alias for M-mode CSR `mhpmcounter8h`. diff --git a/arch/csr/Zihpm/hpmcounter9h.yaml b/arch/csr/Zihpm/hpmcounter9h.yaml index f3fcfdc25b..9a751b36c8 100644 --- a/arch/csr/Zihpm/hpmcounter9h.yaml +++ b/arch/csr/Zihpm/hpmcounter9h.yaml @@ -7,6 +7,7 @@ kind: csr name: hpmcounter9h long_name: User-mode Hardware Performance Counter 6, high half address: 0xC89 +base: 32 description: | Alias for M-mode CSR `mhpmcounter9h`. diff --git a/arch/csr/menvcfgh.yaml b/arch/csr/menvcfgh.yaml index 41aa7f8163..3543f9ea6f 100644 --- a/arch/csr/menvcfgh.yaml +++ b/arch/csr/menvcfgh.yaml @@ -4,6 +4,7 @@ $schema: "csr_schema.json#" kind: csr name: menvcfgh address: 0x31A +base: 32 long_name: Machine Environment Configuration description: Contains bits to enable/disable extensions priv_mode: M diff --git a/arch/csr/mseccfgh.yaml b/arch/csr/mseccfgh.yaml index 16d7196411..3f2330a5c7 100644 --- a/arch/csr/mseccfgh.yaml +++ b/arch/csr/mseccfgh.yaml @@ -4,6 +4,7 @@ $schema: "csr_schema.json#" kind: csr name: mseccfgh long_name: Most significant 32 bits of Machine Security Configuration +base: 32 address: 0x757 priv_mode: M length: 32 diff --git a/arch/csr/timeh.yaml b/arch/csr/timeh.yaml index 61dc0857a0..cdf1ff35be 100644 --- a/arch/csr/timeh.yaml +++ b/arch/csr/timeh.yaml @@ -5,6 +5,7 @@ kind: csr name: timeh long_name: High-half timer for RDTIME Instruction address: 0xC81 +base: 32 description: | [when,"TIME_CSR_IMPLEMENTED == false"] This CSR does not exist, and access will cause an IllegalInstruction exception. From ab7d188489a05fc1684dfc333c475fe46de41a6d Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Wed, 26 Mar 2025 15:15:05 +0000 Subject: [PATCH 002/207] Add README.md to arch/inst (#531) Co-authored-by: Your Name Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> --- arch/inst/README.md | 73 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 arch/inst/README.md diff --git a/arch/inst/README.md b/arch/inst/README.md new file mode 100644 index 0000000000..4f1139ae4d --- /dev/null +++ b/arch/inst/README.md @@ -0,0 +1,73 @@ +# Instructions Repository + +This repository contains definitions for instructions following the standardized JSON schema provided by UDB (Universal Design Base). Each instruction is specified within its own YAML file. + +## Structure + +Instructions are organized under the following path: + +``` +arch/ + inst/ + / # Typically alphabetical order of extensions defining instructions; however, this is not mandatory. + .yaml +``` + +## Creating an Instruction Definition + +Each instruction definition should conform to the provided schema (`inst_schema.json`). Below is a detailed template and explanation for creating a new instruction YAML file. + +### YAML Template + +```yaml +$schema: "inst_schema.json#" +kind: instruction +name: +long_name: +description: | + Detailed explanation of what the instruction does. + Use clear and precise asciidoc-formatted text. +definedBy: +assembly: +encoding: + match: + variables: + - name: + location: +access: + s: always | sometimes | never + u: always | sometimes | never + vs: always | sometimes | never + vu: always | sometimes | never +data_independent_timing: true | false +operation(): | + # Optional IDL operation + leave empty if not provided + +sail(): | + # Optional Sail operation + leave empty if not provided +``` + +### Explanation of Fields + +- **`name`**: The mnemonic of the instruction (lowercase, alphanumeric and periods only). +- **`long_name`**: Short, human-readable description. +- **`description`**: Full, detailed description of the instruction behavior (asciidoc format). +- **`definedBy`**: Specifies the extension defining this instruction. +- **`assembly`**: Instruction format in assembly language, including operands. +- **`encoding.match`**: Binary encoding of the instruction with fixed bits defined by `0` or `1` and variable bits indicated by `-`. +- **`encoding.variables`**: Defines fields in the instruction encoding, including their location. + - **`name`**: Name of the field (e.g., `rs1`, `rs2`). + - **`location`**: Bit positions of the field in the instruction encoding. +- **`access`**: Specifies the privilege mode access for the instruction (`always`, `sometimes`, or `never`). +- **`data_independent_timing`**: Indicates whether the execution timing is data-independent. +- **`operation()` & `sail()`**: Optional fields for IDL or Sail descriptions. Leave empty if unused. + +## JSON Schema + +All instruction definitions must adhere strictly to the provided JSON schema: + +[`inst_schema.json`](schemas/inst_schema.json) + +Ensure compliance with schema validation to facilitate integration and usage within UDB. From 694d09d06c0077a99a76afed42d7a6b790f4f129 Mon Sep 17 00:00:00 2001 From: ayosher Date: Wed, 26 Mar 2025 16:41:32 +0100 Subject: [PATCH 003/207] Xqci/Xqciint extension: move extension codes from cfgs/qc_iu to Xqciint extension (#543) Signed-off-by: Albert Yosher --- arch_overlay/qc_iu/ext/Xqciint.yaml | 17 +++++++++++++++++ cfgs/qc_iu.yaml | 16 ---------------- 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/arch_overlay/qc_iu/ext/Xqciint.yaml b/arch_overlay/qc_iu/ext/Xqciint.yaml index 61b0c62f01..a5bddfc06e 100644 --- a/arch_overlay/qc_iu/ext/Xqciint.yaml +++ b/arch_overlay/qc_iu/ext/Xqciint.yaml @@ -90,3 +90,20 @@ doc_license: company: name: Qualcomm Technologies, Inc. url: https://qualcomm.com + +exception_codes: + - num: 27 + name: Illegal Stack Pointer + var: IllegalStackPointer + - num: 28 + name: Stack Pointer Out-Of-Range + var: SpOutOfRange + - num: 29 + name: Execution Watchpoint + var: ExecWatchpoint + - num: 30 + name: Read Watchpoint + var: ReadWatchpoint + - num: 31 + name: Write Watchpoint + var: WriteWatchpoint diff --git a/cfgs/qc_iu.yaml b/cfgs/qc_iu.yaml index 69168fd468..7c77637532 100644 --- a/cfgs/qc_iu.yaml +++ b/cfgs/qc_iu.yaml @@ -21,22 +21,6 @@ implemented_extensions: - { name: Zihpm, version: "2.0" } - { name: Xqccmp, version: "0.3" } - { name: Xqci, version: "0.8" } -exception_codes: - - num: 27 - name: Illegal Stack Pointer - var: IllegalStackPointer - - num: 28 - name: Stack Pointer Out-Of-Range - var: SpOutOfRange - - num: 29 - name: Execution Watchpoint - var: ExecWatchpoint - - num: 30 - name: Read Watchpoint - var: ReadWatchpoint - - num: 31 - name: Write Watchpoint - var: WriteWatchpoint params: XLEN: 32 PHYS_ADDR_WIDTH: 32 From 563e9306decfec4525e6b7fdd4ac769104f621c6 Mon Sep 17 00:00:00 2001 From: ayosher Date: Wed, 26 Mar 2025 16:41:54 +0100 Subject: [PATCH 004/207] Separate Zcf and Zcd extensions from Zce (#539) * Separate Zcf and Zcd extensions from Zce Signed-off-by: Albert Yosher * Restore per-instruction dependencies of Zcf/Zcd Signed-off-by: Albert Yosher --------- Signed-off-by: Albert Yosher --- arch/ext/Zcd.yaml | 2 +- arch/ext/Zce.yaml | 4 ++++ arch/ext/Zcf.yaml | 9 +++++++-- arch/ext/Zcmp.yaml | 1 + arch/inst/{C => Zcd}/c.fld.yaml | 0 arch/inst/{C => Zcd}/c.fldsp.yaml | 0 arch/inst/{C => Zcd}/c.fsd.yaml | 0 arch/inst/{C => Zcd}/c.fsdsp.yaml | 0 arch/inst/{C => Zcf}/c.flw.yaml | 8 +++++--- arch/inst/{C => Zcf}/c.flwsp.yaml | 8 +++++--- arch/inst/{C => Zcf}/c.fsw.yaml | 8 +++++--- arch/inst/{C => Zcf}/c.fswsp.yaml | 8 +++++--- 12 files changed, 33 insertions(+), 15 deletions(-) rename arch/inst/{C => Zcd}/c.fld.yaml (100%) rename arch/inst/{C => Zcd}/c.fldsp.yaml (100%) rename arch/inst/{C => Zcd}/c.fsd.yaml (100%) rename arch/inst/{C => Zcd}/c.fsdsp.yaml (100%) rename arch/inst/{C => Zcf}/c.flw.yaml (94%) rename arch/inst/{C => Zcf}/c.flwsp.yaml (95%) rename arch/inst/{C => Zcf}/c.fsw.yaml (94%) rename arch/inst/{C => Zcf}/c.fswsp.yaml (95%) diff --git a/arch/ext/Zcd.yaml b/arch/ext/Zcd.yaml index 70cec37698..9da66612ee 100644 --- a/arch/ext/Zcd.yaml +++ b/arch/ext/Zcd.yaml @@ -39,5 +39,5 @@ versions: allOf: - anyOf: - { name: Zca, version: "= 1.0.0" } - - { name: C, version: "= 1.0.0" } + - { name: C, version: "~> 2.0.0" } - { name: D, version: "~> 2.2.0" } diff --git a/arch/ext/Zce.yaml b/arch/ext/Zce.yaml index cd63718083..7581ceaf42 100644 --- a/arch/ext/Zce.yaml +++ b/arch/ext/Zce.yaml @@ -76,3 +76,7 @@ versions: # - [Zcb, "1.0.0"] # - [Zcmp, "1.0.0"] # - [Zcmt, "1.0.0"] +conflicts: + anyOf: + - allOf: [C, D] + - Zcd diff --git a/arch/ext/Zcf.yaml b/arch/ext/Zcf.yaml index 22b9bbc290..c2248e413a 100644 --- a/arch/ext/Zcf.yaml +++ b/arch/ext/Zcf.yaml @@ -5,7 +5,7 @@ kind: extension name: Zcf long_name: Compressed instructions for single precision floating point description: | - Zcf is the existing set of compressed single precision floating point loads and stores: + Zcf is the existing set of compressed single precision floating point loads and stores (RV32 only): `c.flw`, `c.flwsp`, `c.fsw`, `c.fswsp`. type: unprivileged @@ -35,4 +35,9 @@ versions: - name: Graeme Smecher - name: Nicolas Brunie - name: Jiawei - requires: F + requires: + allOf: + - anyOf: + - { name: Zca, version: "= 1.0.0" } + - { name: C, version: "~> 2.0.0" } + - { name: F, version: "~> 2.2.0" } diff --git a/arch/ext/Zcmp.yaml b/arch/ext/Zcmp.yaml index d62fe86ccb..6488b17a79 100644 --- a/arch/ext/Zcmp.yaml +++ b/arch/ext/Zcmp.yaml @@ -88,6 +88,7 @@ versions: - name: Graeme Smecher - name: Nicolas Brunie - name: Jiawei + requires: { name: Zca, version: ">= 1.0.0" } conflicts: anyOf: - allOf: [C, D] diff --git a/arch/inst/C/c.fld.yaml b/arch/inst/Zcd/c.fld.yaml similarity index 100% rename from arch/inst/C/c.fld.yaml rename to arch/inst/Zcd/c.fld.yaml diff --git a/arch/inst/C/c.fldsp.yaml b/arch/inst/Zcd/c.fldsp.yaml similarity index 100% rename from arch/inst/C/c.fldsp.yaml rename to arch/inst/Zcd/c.fldsp.yaml diff --git a/arch/inst/C/c.fsd.yaml b/arch/inst/Zcd/c.fsd.yaml similarity index 100% rename from arch/inst/C/c.fsd.yaml rename to arch/inst/Zcd/c.fsd.yaml diff --git a/arch/inst/C/c.fsdsp.yaml b/arch/inst/Zcd/c.fsdsp.yaml similarity index 100% rename from arch/inst/C/c.fsdsp.yaml rename to arch/inst/Zcd/c.fsdsp.yaml diff --git a/arch/inst/C/c.flw.yaml b/arch/inst/Zcf/c.flw.yaml similarity index 94% rename from arch/inst/C/c.flw.yaml rename to arch/inst/Zcf/c.flw.yaml index 3866dcbd42..20604ec1e1 100644 --- a/arch/inst/C/c.flw.yaml +++ b/arch/inst/Zcf/c.flw.yaml @@ -10,9 +10,11 @@ description: | to the base address in register rs1. It expands to `flw` `rd, offset(rs1)`. definedBy: - allOf: - - C - - F + anyOf: + - allOf: + - C + - F + - Zcf assembly: xd, imm(xs1) base: 32 encoding: diff --git a/arch/inst/C/c.flwsp.yaml b/arch/inst/Zcf/c.flwsp.yaml similarity index 95% rename from arch/inst/C/c.flwsp.yaml rename to arch/inst/Zcf/c.flwsp.yaml index 4a46a06016..c6961914de 100644 --- a/arch/inst/C/c.flwsp.yaml +++ b/arch/inst/Zcf/c.flwsp.yaml @@ -10,9 +10,11 @@ description: | to the stack pointer, x2. It expands to `flw` `rd, offset(x2)`. definedBy: - allOf: - - C - - F + anyOf: + - allOf: + - C + - F + - Zcf assembly: fd, imm(sp) base: 32 encoding: diff --git a/arch/inst/C/c.fsw.yaml b/arch/inst/Zcf/c.fsw.yaml similarity index 94% rename from arch/inst/C/c.fsw.yaml rename to arch/inst/Zcf/c.fsw.yaml index 48daecaac1..4fedb9d164 100644 --- a/arch/inst/C/c.fsw.yaml +++ b/arch/inst/Zcf/c.fsw.yaml @@ -10,9 +10,11 @@ description: | to the base address in register rs1. It expands to `fsw` `rs2, offset(rs1)`. definedBy: - allOf: - - C - - F + anyOf: + - allOf: + - C + - F + - Zcf base: 32 assembly: xs2, imm(xs1) encoding: diff --git a/arch/inst/C/c.fswsp.yaml b/arch/inst/Zcf/c.fswsp.yaml similarity index 95% rename from arch/inst/C/c.fswsp.yaml rename to arch/inst/Zcf/c.fswsp.yaml index 808a023a4f..25268034f6 100644 --- a/arch/inst/C/c.fswsp.yaml +++ b/arch/inst/Zcf/c.fswsp.yaml @@ -10,9 +10,11 @@ description: | to the stack pointer, x2. It expands to `fsw` `rs2, offset(x2)`. definedBy: - allOf: - - C - - F + anyOf: + - allOf: + - C + - F + - Zcf assembly: fs2, imm(sp) base: 32 encoding: From 017698d5586179e44d77396f709fe9bd33570c54 Mon Sep 17 00:00:00 2001 From: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Date: Thu, 27 Mar 2025 04:35:42 -0400 Subject: [PATCH 005/207] Misc. fixes to generators and Xqci extensions fixes (#551) * Xqci/Xqcibm extension: fix some representation issues, fix qc.extdur rs1 != 31 Signed-off-by: Albert Yosher * Xqci: fix asciidoc formatting in description * gen:adoc fix asciidoc generation of IDL csr read * gen:ext_pdf fix implication list; improve version display * Add missing word 'CSRs' in CSR summary generation Signed-off-by: Albert Yosher --------- Signed-off-by: Albert Yosher Co-authored-by: Albert Yosher --- arch_overlay/qc_iu/ext/Xqci.yaml | 10 +++++----- arch_overlay/qc_iu/ext/Xqcibm.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml | 1 + arch_overlay/qc_iu/inst/Xqci/qc.insbh.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.insbhr.yaml | 2 +- backends/ext_pdf_doc/templates/ext_pdf.adoc.erb | 9 ++++++--- lib/idl/passes/gen_adoc.rb | 12 ++++++------ 7 files changed, 21 insertions(+), 17 deletions(-) diff --git a/arch_overlay/qc_iu/ext/Xqci.yaml b/arch_overlay/qc_iu/ext/Xqci.yaml index 28afe4569d..ffcc9df08b 100644 --- a/arch_overlay/qc_iu/ext/Xqci.yaml +++ b/arch_overlay/qc_iu/ext/Xqci.yaml @@ -242,7 +242,7 @@ versions: - Fix rs1 cannot be 31 for qc.extdu, qc.extd, qc.extdur, instructions - Fix rs1 cannot be 31 for qc.extduprh, qc.extdprh, qc.extdupr, qc.extdr qc.extdpr instructions - Fix typos in IDL code (missing ')' ) for qc.extdpr, qc.extdr instructions - - Fix IDL code to look correct in PDF for qc.insbhr and qc.insbh instructions + - Fix IDL code and description to look correct in PDF for qc.insbhr and qc.insbh instructions - Fix Xqci extension description to reflect correct 48-bit format field names - Fix IDL code to to match description for qc.insbr instruction - Add stack checks to qc.c.mienter, qc.c.mienter.nest, qc.c.mileaveret @@ -330,7 +330,7 @@ description: | QC.EAI format used for 48-bit instructions that operate on 32-bit immediate argument. -- - [%autowidth, cols="4*", options="header" } + [%autowidth, cols="4*", options="header" ] |=== ^|Field ^|Start bit @@ -367,7 +367,7 @@ description: | QC.EI format used for 48-bit instructions that operate on 26-bit immediate argument, including loads. -- - [%autowidth, cols="4*", options="header" } + [%autowidth, cols="4*", options="header" ] |=== ^|Field ^|Start bit @@ -414,7 +414,7 @@ description: | QC.EB format used for 48-bit branch instructions that compare register with 16-bit immediate. -- - [%autowidth, cols="4*", options="header" } + [%autowidth, cols="4*", options="header" ] |=== ^|Field ^|Start bit @@ -461,7 +461,7 @@ description: | QC.EJ format used for 48-bit jump/call instructions with 32-bit immediate target address. -- - [%autowidth, cols="4*", options="header" } + [%autowidth, cols="4*", options="header" ] |=== ^|Field ^|Start bit diff --git a/arch_overlay/qc_iu/ext/Xqcibm.yaml b/arch_overlay/qc_iu/ext/Xqcibm.yaml index 290c76445e..115525e8cf 100644 --- a/arch_overlay/qc_iu/ext/Xqcibm.yaml +++ b/arch_overlay/qc_iu/ext/Xqcibm.yaml @@ -85,7 +85,7 @@ versions: - Fix rs1 cannot be 31 for qc.extdu, qc.extd, qc.extdur, instructions - Fix rs1 cannot be 31 for qc.extduprh, qc.extdprh, qc.extdupr, qc.extdr qc.extdpr instructions - Fix typos in IDL code (missing ')' ) for qc.extdpr, qc.extdr instructions - - Fix IDL code to look correct in PDF for qc.insbhr and qc.insbh instructions + - Fix IDL code and description to look correct in PDF for qc.insbhr and qc.insbh instructions - Fix IDL code to to match description for qc.insbr instruction requires: { name: Zca, version: ">= 1.0.0" } description: | diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml index bbd4b15a53..a63092396f 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml @@ -24,6 +24,7 @@ encoding: not: 0 - name: rs1 location: 19-15 + not: 31 - name: rd location: 11-7 not: 0 diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.insbh.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.insbh.yaml index 2a4471865e..96d981c81b 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.insbh.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.insbh.yaml @@ -12,7 +12,7 @@ description: | higher part using QC32.INSBH. The width of the subset is determined by (`width_minus1` + 1) (1..32), and the offset of the subset is determined by `shamt`. - In case when width + offset <= 32, the destination register is left unchanged. + In case when width + offset < 33, the destination register is left unchanged. Instruction encoded in I instruction format. definedBy: anyOf: diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.insbhr.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.insbhr.yaml index b2270628df..a7675d7c58 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.insbhr.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.insbhr.yaml @@ -12,7 +12,7 @@ description: | higher part using QC32.INSBHR. The width of the subset is determined by `rs2` bits [21:16] (0..32), and the offset of the subset is determined by `rs2` bits [4:0]. - In case when width + offset <= 32 or width == 0, the destination register is left unchanged. + In case when width + offset < 33 or width == 0, the destination register is left unchanged. In case when `rs2` bit [21] == 1 width is enforced to 32. Instruction encoded in R instruction format. definedBy: diff --git a/backends/ext_pdf_doc/templates/ext_pdf.adoc.erb b/backends/ext_pdf_doc/templates/ext_pdf.adoc.erb index 61e0ffbb68..2a67bb9937 100644 --- a/backends/ext_pdf_doc/templates/ext_pdf.adoc.erb +++ b/backends/ext_pdf_doc/templates/ext_pdf.adoc.erb @@ -154,8 +154,9 @@ This specification documents version <%= max_version.version_spec %> of <%= ext. === Version History <%- ext.versions.each do |version| -%> +==== <%= version.version_spec %> + -- -Version:: <%= version.version_spec %> State:: <%= version.state %> <%- unless version.ratification_date.nil? -%> Ratification Date:: <%= version.ratification_date %> @@ -173,7 +174,9 @@ Changes:: <%- end -%> <%- unless version.implications.empty? -%> Implies:: -<%= version.implications.each { |i| "* #{i[:ext_ver].name} (#{i[:ext_ver].version_spec}) #{i[:cond].empty? ? '' : i[:cond].to_asciidoc(join: ', ')}" }.join("\n* ") %> + +<%= version.implications.map { |i| " * #{i[:ext_ver].name} (#{i[:ext_ver].version_spec}) #{i[:cond].empty? ? '' : i[:cond].to_asciidoc(join: ', ')}" }.join("\n") %> + <%- unless version.requirement_condition.empty? -%> Requires:: <%= version.requirement_condition.to_asciidoc %> @@ -281,7 +284,7 @@ The following <%= ext.instructions.size %> instructions are affected by this ext <%- csr_list = ext.csrs.select { |csr| versions.any? { |ext_ver| csr.affected_by?(ext_ver) } } -%> -The following <%= csr_list.size %> are affected by this extension. +The following <%= csr_list.size %> CSRs are affected by this extension. [%autowidth] |=== diff --git a/lib/idl/passes/gen_adoc.rb b/lib/idl/passes/gen_adoc.rb index f3c56d4a27..5dde948cd6 100644 --- a/lib/idl/passes/gen_adoc.rb +++ b/lib/idl/passes/gen_adoc.rb @@ -299,14 +299,14 @@ def gen_adoc(indent = 0, indent_spaces: 2) class CsrReadExpressionAst def gen_adoc(indent = 0, indent_spaces: 2) - idx_text = - if @idx.is_a?(AstNode) - @idx.text_value + idx = + if @idx_expr.nil? + @idx_text else - @idx + @idx_expr.gen_adoc(0) end - csr_text = "CSR[#{idx_text}]" + csr_text = "CSR[#{idx}]" if idx_text =~ /[0-9]+/ # we don't have the symtab to map this to a csr name "#{' '*indent}#{csr_text}" @@ -314,7 +314,7 @@ def gen_adoc(indent = 0, indent_spaces: 2) if @cfg_arch.csr(csr_text).nil? "#{' '*indent}#{csr_text}" else - "#{' '*indent}%%LINK%csr;#{idx_text};#{csr_text}%%" + "#{' '*indent}%%LINK%csr;#{idx};#{csr_text}%%" end end end From 3b854dc11d72aec596f126b162e3ee09ae348ad4 Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Fri, 28 Mar 2025 10:09:28 +0000 Subject: [PATCH 006/207] Add initial Golang generation support. (#526) * Add initial Golang generation support. Signed-off-by: Afonso Oliveira * Enhance go generator to allow filtering by extensions * Enhance Go CSR generation by filtering out unused extensions and define set of extensions that GO currently supports. Signed-off-by: Afonso Oliveira * update checked out version of inst.go changed by latest commits. Signed-off-by: Afonso Oliveira * Refactor to ensure reusable code, given the extensibility of outputs generator.py may be used to generate. Signed-off-by: Afonso Oliveira * Fix Go awkward struct spacing. Signed-off-by: Afonso Oliveira * Add rake task to generate Golang input - inst.go Signed-off-by: Afonso Oliveira * Add CSR ordering to match riscv-opcodes. Signed-off-by: Afonso Oliveira * Remove checked out inst.go Signed-off-by: Afonso Oliveira * Update all spacing to exactly match riscv-opcodes. Signed-off-by: Afonso Oliveira * Change check_requirement due to being out of scope for go_generator call. Signed-off-by: Afonso Oliveira * Add gen:go to CI regression. Signed-off-by: Afonso Oliveira * Add gen:go to local regression test. Signed-off-by: Afonso Oliveira --------- Signed-off-by: Afonso Oliveira Co-authored-by: Your Name --- .github/workflows/regress.yml | 28 ++ Rakefile | 2 + backends/generators/Go/go_generator.py | 170 ++++++++++ backends/generators/generator.py | 422 +++++++++++++++++++++++++ backends/generators/tasks.rake | 37 +++ 5 files changed, 659 insertions(+) create mode 100644 backends/generators/Go/go_generator.py create mode 100644 backends/generators/generator.py create mode 100644 backends/generators/tasks.rake diff --git a/.github/workflows/regress.yml b/.github/workflows/regress.yml index 1bd50a4096..fc11643df1 100644 --- a/.github/workflows/regress.yml +++ b/.github/workflows/regress.yml @@ -191,3 +191,31 @@ jobs: run: ./bin/build_container - name: Generate extension PDF run: ./do gen:profile[MockProfileRelease] + regress-gen-go: + runs-on: ubuntu-latest + env: + SINGULARITY: 1 + steps: + - name: Clone Github Repo Action + uses: actions/checkout@v4 + - name: Setup apptainer + uses: eWaterCycle/setup-apptainer@v2.0.0 + - name: Get container from cache + id: cache-sif + uses: actions/cache@v4 + with: + path: .singularity/image.sif + key: ${{ hashFiles('container.def', 'bin/.container-tag') }} + - name: Get gems and node files from cache + id: cache-bundle-npm + uses: actions/cache@v4 + with: + path: | + .home/.gems + node_modules + key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} + - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} + name: Build container + run: ./bin/build_container + - name: Generate Go code + run: ./do gen:go diff --git a/Rakefile b/Rakefile index 0d930c346c..ccda666883 100755 --- a/Rakefile +++ b/Rakefile @@ -435,6 +435,8 @@ namespace :test do Rake::Task["#{$root}/gen/certificate_doc/pdf/MockCertificateModel.pdf"].invoke Rake::Task["#{$root}/gen/profile_doc/pdf/MockProfileRelease.pdf"].invoke + Rake::Task["gen:go"].invoke + puts puts "Regression test PASSED" end diff --git a/backends/generators/Go/go_generator.py b/backends/generators/Go/go_generator.py new file mode 100644 index 0000000000..b02c8337ee --- /dev/null +++ b/backends/generators/Go/go_generator.py @@ -0,0 +1,170 @@ +#!/usr/bin/env python3 +import os +import sys +import argparse +import logging + +# Add parent directory to path to find generator.py +sys.path.append(os.path.dirname(os.path.dirname(os.path.abspath(__file__)))) +from generator import load_instructions, load_csrs, parse_match, signed + +logging.basicConfig(level=logging.INFO, format="%(levelname)s:: %(message)s") + + +def make_go(instr_dict, csrs, output_file="inst.go"): + """ + Generate a Go source file with the instruction encodings followed by + a map of CSR names and addresses. + """ + args = " ".join(sys.argv) + prelude = f"// Code generated by {args}; DO NOT EDIT.\n" + prelude += """package riscv + +import "cmd/internal/obj" + +type inst struct { + opcode uint32 + funct3 uint32 + rs1 uint32 + rs2 uint32 + csr int64 + funct7 uint32 +} + +func encode(a obj.As) *inst { + switch a { +""" + + instr_str = "" + # Process instructions in sorted order (by name) + for name, info in sorted(instr_dict.items(), key=lambda x: x[0].upper()): + match_str = info["match"] + enc_match = parse_match(match_str) + opcode = (enc_match >> 0) & ((1 << 7) - 1) + funct3 = (enc_match >> 12) & ((1 << 3) - 1) + rs1 = (enc_match >> 15) & ((1 << 5) - 1) + rs2 = (enc_match >> 20) & ((1 << 5) - 1) + csr_val = (enc_match >> 20) & ((1 << 12) - 1) + funct7 = (enc_match >> 25) & ((1 << 7) - 1) + # Create the instruction case name. For example, "bclri" becomes "ABCLRI" + instr_case = f"A{name.upper().replace('.','')}" + instr_str += f""" case {instr_case}: + return &inst{{ {hex(opcode)}, {hex(funct3)}, {hex(rs1)}, {hex(rs2)}, {signed(csr_val,12)}, {hex(funct7)} }} +""" + instructions_end = """ } + return nil +} +""" + + # Build the CSR map block - now matching the second script's format + csrs_map_str = "var csrs = map[uint16]string {\n" + # Convert the dictionary to a list of tuples and sort by address + csr_items = [(int(addr), name.upper()) for addr, name in csrs.items()] + for addr, name in sorted(csr_items, key=lambda x: x[0]): + csrs_map_str += f'{hex(addr)} : "{name}",\n' + csrs_map_str += "}\n" + + go_code = prelude + instr_str + instructions_end + "\n" + csrs_map_str + + with open(output_file, "w", encoding="utf-8") as f: + f.write(go_code) + logging.info( + f"Generated {output_file} with {len(instr_dict)} instructions and {len(csrs)} CSRs" + ) + + +def parse_args(): + parser = argparse.ArgumentParser( + description="Generate Go code for RISC-V instructions and CSRs filtered by extensions" + ) + parser.add_argument( + "--inst-dir", + default="../../../arch/inst/", + help="Directory containing instruction YAML files", + ) + parser.add_argument( + "--csr-dir", + default="../../../arch/csr/", + help="Directory containing CSR YAML files", + ) + parser.add_argument("--output", default="inst.go", help="Output Go file name") + parser.add_argument( + "--extensions", + default="A,D,F,I,M,Q,Zba,Zbb,Zbs,S,System,V,Zicsr,Smpmp,Sm,H,U,Zicntr,Zihpm,Smhpm", + help="Comma-separated list of enabled extensions. Default includes standard extensions.", + ) + parser.add_argument( + "--arch", + default="RV64", + choices=["RV32", "RV64", "BOTH"], + help="Target architecture (RV32, RV64, or BOTH). Default is RV64.", + ) + parser.add_argument( + "--verbose", "-v", action="store_true", help="Enable verbose logging" + ) + parser.add_argument( + "--include-all", + "-a", + action="store_true", + help="Include all instructions, ignoring extension filtering", + ) + return parser.parse_args() + + +def main(): + args = parse_args() + + if args.verbose: + logging.getLogger().setLevel(logging.DEBUG) + + # Check if we should include all instructions + include_all = args.include_all or not args.extensions + + # Parse enabled extensions + if include_all: + enabled_extensions = [] + logging.info( + "Including all instructions and CSRs (extension filtering disabled)" + ) + else: + # Get extensions from the command line + enabled_extensions = [ + ext.strip() for ext in args.extensions.split(",") if ext.strip() + ] + logging.info(f"Enabled extensions: {', '.join(enabled_extensions)}") + + # Log target architecture + logging.info(f"Target architecture: {args.arch}") + + # Check if the directories exist + if not os.path.isdir(args.inst_dir): + logging.error(f"Instruction directory not found: {args.inst_dir}") + sys.exit(1) + if not os.path.isdir(args.csr_dir): + logging.warning(f"CSR directory not found: {args.csr_dir}") + + # Load instructions filtered by extensions or all instructions + instr_dict = load_instructions( + args.inst_dir, enabled_extensions, include_all, args.arch + ) + if not instr_dict: + logging.error("No instructions found or all were filtered out.") + logging.error( + "Try using --verbose to see more details about the filtering process." + ) + sys.exit(1) + logging.info(f"Loaded {len(instr_dict)} instructions") + + # Load CSRs filtered by extensions or all CSRs + csrs = load_csrs(args.csr_dir, enabled_extensions, include_all, args.arch) + if not csrs: + logging.warning("No CSRs found or all were filtered out.") + else: + logging.info(f"Loaded {len(csrs)} CSRs") + + # Generate the Go code + make_go(instr_dict, csrs, args.output) + + +if __name__ == "__main__": + main() diff --git a/backends/generators/generator.py b/backends/generators/generator.py new file mode 100644 index 0000000000..2ff7d0ea69 --- /dev/null +++ b/backends/generators/generator.py @@ -0,0 +1,422 @@ +#!/usr/bin/env python3 +import os +import yaml +import logging +import pprint + +pp = pprint.PrettyPrinter(indent=2) +logging.basicConfig(level=logging.INFO, format="%(levelname)s:: %(message)s") + + +def check_requirement(req, exts): + if isinstance(req, str): + return req in exts + elif isinstance(req, dict) and "name" in req: + # If it has a name field, just match the extension name and ignore version + return req["name"] in exts + return False + + +def parse_extension_requirements(extensions_spec): + """ + Parse the extension requirements from the definedBy field. + Extensions can be specified as a string or a dictionary with allOf/oneOf/anyOf fields. + Returns a function that checks if the given extensions satisfy the requirements. + """ + if extensions_spec is None: + # If definedBy is None, we should never match + logging.error(f"Missing 'definedBy' field") + return lambda exts: False + + if isinstance(extensions_spec, str): + # Simple case: a single extension + extension = extensions_spec + if extension.startswith("RV"): + # Extract the actual extension part from RV prefix + if extension.startswith("RV32") or extension.startswith("RV64"): + ext_parts = extension[4:] + else: + ext_parts = extension[2:] + # Check if any part matches enabled extensions + return lambda enabled_exts: any( + ext_part in enabled_exts for ext_part in ext_parts + ) + return lambda exts: extension in exts + + # Handle complex cases with allOf/oneOf/anyOf + if "allOf" in extensions_spec: + required = extensions_spec["allOf"] + if isinstance(required, str): + required = [required] + + # Process each requirement, which could be a string or a dict with name/version + return lambda exts: all(check_requirement(req, exts) for req in required) + + if "oneOf" in extensions_spec: + alternatives = extensions_spec["oneOf"] + if isinstance(alternatives, str): + alternatives = [alternatives] + + # Process each alternative, which could be a string or a dict with name/version + def check_alternative_one_of(alt, exts): + if isinstance(alt, str): + return alt in exts + elif isinstance(alt, dict) and "name" in alt: + return alt["name"] in exts + return False + + return lambda exts: any( + check_alternative_one_of(alt, exts) for alt in alternatives + ) + + # Handle anyOf case (most common in the error output) + if "anyOf" in extensions_spec: + alternatives = extensions_spec["anyOf"] + if isinstance(alternatives, str): + alternatives = [alternatives] + + # Process each alternative, which could be a string, dict with name/version, or nested allOf + def check_alternative(alt, exts): + if isinstance(alt, str): + return alt in exts + elif isinstance(alt, dict): + if "allOf" in alt: + reqs = alt["allOf"] + if isinstance(reqs, str): + reqs = [reqs] + return all(check_requirement(r, exts) for r in reqs) + elif "name" in alt: + return alt["name"] in exts + return False + + return lambda exts: any(check_alternative(alt, exts) for alt in alternatives) + + # Handle direct name/version specification + if "name" in extensions_spec and "version" in extensions_spec: + extension = extensions_spec["name"] + # We don't actually check the version, just the extension name + return lambda exts: extension in exts + + # Default case if we can't parse the requirements + logging.debug(f"Unrecognized extension specification format: {extensions_spec}") + # Let's be more permissive for now - we'll include instructions + # that have an unrecognized format rather than excluding them + return lambda exts: True + + +def load_instructions( + root_dir, enabled_extensions, include_all=False, target_arch="RV64" +): + """ + Recursively walk through root_dir, load YAML files that define an instruction, + filter by enabled extensions, and collect them into a dictionary keyed by the instruction name. + + If include_all is True, extension filtering is bypassed. + target_arch can be "RV32", "RV64", or "BOTH". + """ + instr_dict = {} + found_files = 0 + found_instructions = 0 + extension_filtered = 0 + encoding_filtered = 0 + + logging.info( + f"Searching for instruction files in {root_dir} for target architecture {target_arch}" + ) + + for dirpath, _, filenames in os.walk(root_dir): + for fname in filenames: + if not fname.endswith(".yaml"): + continue + found_files += 1 + path = os.path.join(dirpath, fname) + try: + with open(path, encoding="utf-8") as f: + data = yaml.safe_load(f) + except Exception as e: + logging.error(f"Error parsing {path}: {e}") + continue + + if data.get("kind") != "instruction": + continue + + found_instructions += 1 + name = data.get("name") + if not name: + logging.error(f"Missing 'name' field in {path}") + continue + + # If include_all is True, skip extension filtering + if not include_all: + # Check if this instruction is defined by an enabled extension + definedBy = data.get("definedBy") + if definedBy is None: + logging.error( + f"Missing 'definedBy' field in instruction {name} in {path}" + ) + extension_filtered += 1 + continue + + logging.debug(f"Instruction {name} definedBy: {definedBy}") + meets_extension_req = parse_extension_requirements(definedBy) + if not meets_extension_req(enabled_extensions): + msg = f"Skipping {name} because its extension is not enabled" + logging.debug(msg) + extension_filtered += 1 + continue + + # Check if this instruction is excluded by an enabled extension + excludedBy = data.get("excludedBy") + if excludedBy: + exclusion_check = parse_extension_requirements(excludedBy) + if exclusion_check(enabled_extensions): + msg = f"Skipping {name} because it's excluded by an enabled extension" + logging.debug(msg) + extension_filtered += 1 + continue + + encoding = data.get("encoding", {}) + if not encoding: + logging.error( + f"Missing 'encoding' field in instruction {name} in {path}" + ) + encoding_filtered += 1 + continue + + # Check if the instruction specifies a base architecture constraint + base = data.get("base") + if base is not None: + if (base == 32 and target_arch not in ["RV32", "BOTH"]) or ( + base == 64 and target_arch not in ["RV64", "BOTH"] + ): + msg = f"Skipping {name} because it requires base {base} which doesn't match target arch {target_arch}" + logging.debug(msg) + encoding_filtered += 1 + continue + + # Determine which encoding to use based on target architecture + if isinstance(encoding, dict): + if "RV64" in encoding and "RV32" in encoding: + # Instruction has both RV32 and RV64 encodings + if target_arch == "RV64": + encoding_to_use = encoding["RV64"] + instr_key = name + elif target_arch == "RV32": + encoding_to_use = encoding["RV32"] + instr_key = name + else: # BOTH + # For "BOTH", include both encodings with suitable naming + rv64_encoding = encoding["RV64"] + rv32_encoding = encoding["RV32"] + + # Process RV64 encoding + rv64_match = rv64_encoding.get("match") + if rv64_match: + instr_dict[name] = { + "match": rv64_match + } # RV64 gets the default name + + # Process RV32 encoding with a .rv32 suffix + rv32_match = rv32_encoding.get("match") + if rv32_match: + instr_dict[f"{name}.rv32"] = {"match": rv32_match} + + continue # Skip the rest of the loop as we've already added the encodings + elif "RV64" in encoding: + if target_arch in ["RV64", "BOTH"]: + encoding_to_use = encoding["RV64"] + instr_key = name + else: + msg = f"Skipping {name} because it has only RV64 encoding in {path}" + logging.debug(msg) + encoding_filtered += 1 + continue + elif "RV32" in encoding: + if target_arch in ["RV32", "BOTH"]: + encoding_to_use = encoding["RV32"] + instr_key = f"{name}.rv32" if target_arch == "BOTH" else name + else: + msg = f"Skipping {name} because it has only RV32 encoding in {path}" + logging.debug(msg) + encoding_filtered += 1 + continue + elif "match" in encoding: + # Generic encoding, no specific architecture + encoding_to_use = encoding + instr_key = name + else: + msg = f"Skipping {name} because its encoding in {path} has no recognized match field." + logging.warning(msg) + encoding_filtered += 1 + continue + else: + msg = f"Skipping {name} because its encoding in {path} is not a dictionary." + logging.warning(msg) + encoding_filtered += 1 + continue + + match_str = encoding_to_use.get("match") + if not match_str: + msg = f"Skipping {name} because 'match' field is missing in {path}" + logging.warning(msg) + encoding_filtered += 1 + continue + + instr_dict[instr_key] = {"match": match_str} + + if found_instructions > 0: + logging.info( + f"Found {found_instructions} instruction definitions in {found_files} files" + ) + if extension_filtered > 0: + logging.info(f"Filtered out {extension_filtered} instructions by extension") + if encoding_filtered > 0: + logging.info( + f"Filtered out {encoding_filtered} instructions due to encoding issues" + ) + logging.info(f"Added {len(instr_dict)} instruction encodings to the output") + else: + logging.warning(f"No instruction definitions found in {root_dir}") + + return instr_dict + + +def load_csrs(csr_root, enabled_extensions, include_all=False, target_arch="RV64"): + """ + Recursively walk through csr_root, load YAML files that define a CSR, + filter by enabled extensions, and collect them into a dictionary mapping + each address (as an integer) to the CSR name. + + If include_all is True, extension filtering is bypassed. + target_arch can be "RV32", "RV64", or "BOTH". + """ + csrs = {} + found_files = 0 + found_csrs = 0 + extension_filtered = 0 + arch_filtered = 0 + address_errors = 0 + + logging.info( + f"Searching for CSR files in {csr_root} for target architecture {target_arch}" + ) + + for dirpath, _, filenames in os.walk(csr_root): + for fname in filenames: + if not fname.endswith(".yaml"): + continue + found_files += 1 + path = os.path.join(dirpath, fname) + try: + with open(path, encoding="utf-8") as f: + data = yaml.safe_load(f) + except Exception as e: + logging.error(f"Error parsing CSR file {path}: {e}") + continue + + if data.get("kind") != "csr": + continue + + found_csrs += 1 + name = data.get("name") + if not name: + logging.error(f"Missing 'name' field in {path}") + continue + + address = data.get("address") + indirect_address = data.get("indirect_address") + + if not address and not indirect_address: + logging.error( + f"Missing 'address' or 'indirect_address' field in CSR {name} in {path}" + ) + address_errors += 1 + continue + + # Check if the CSR has a base constraint (32 or 64) + base = data.get("base") + if base: + if base == 32 and target_arch not in ["RV32", "BOTH"]: + logging.debug(f"Skipping CSR {name} because it requires RV32 base") + arch_filtered += 1 + continue + elif base == 64 and target_arch not in ["RV64", "BOTH"]: + logging.debug(f"Skipping CSR {name} because it requires RV64 base") + arch_filtered += 1 + continue + + # If include_all is True, skip extension filtering + if not include_all: + # Check if this CSR is defined by an enabled extension + definedBy = data.get("definedBy") + + # If definedBy is missing, log a warning but don't skip + # This is different from instructions where we're more strict + if definedBy is None: + logging.warning( + f"Missing 'definedBy' field in CSR {name} in {path}, including anyway" + ) + else: + logging.debug(f"CSR {name} definedBy: {definedBy}") + meets_extension_req = parse_extension_requirements(definedBy) + if not meets_extension_req(enabled_extensions): + msg = ( + f"Skipping CSR {name} because its extension is not enabled" + ) + logging.debug(msg) + extension_filtered += 1 + continue + + # If we're here, we've passed all checks + try: + # Use address if available, otherwise use indirect_address + addr_to_use = address if address is not None else indirect_address + if isinstance(addr_to_use, int): + addr_int = addr_to_use + else: + addr_int = int(addr_to_use, 0) + + # For BOTH architecture, add suffix to RV32-specific CSRs + if target_arch == "BOTH" and base == 32: + csrs[addr_int] = f"{name.upper()}.RV32" + else: + csrs[addr_int] = name.upper() + except Exception as e: + logging.error(f"Error parsing address {addr_to_use} in {path}: {e}") + address_errors += 1 + continue + + if found_csrs > 0: + logging.info(f"Found {found_csrs} CSR definitions in {found_files} files") + if extension_filtered > 0: + logging.info(f"Filtered out {extension_filtered} CSRs by extension") + if arch_filtered > 0: + logging.info( + f"Filtered out {arch_filtered} CSRs by architecture constraints" + ) + if address_errors > 0: + logging.info(f"Filtered out {address_errors} CSRs due to address issues") + logging.info(f"Added {len(csrs)} CSRs to the output") + else: + logging.warning(f"No CSR definitions found in {csr_root}") + + return csrs + + +def parse_match(match_str): + """ + Convert the bit pattern string to an integer. + Replace all '-' (variable bits) with '0' so that only constant bits are set. + """ + binary_str = "".join("0" if c == "-" else c for c in match_str) + return int(binary_str, 2) + + +# Returns signed interpretation of a value within a given width. +def signed(value: int, width: int) -> int: + return value if 0 <= value < (1 << (width - 1)) else value - (1 << width) + + +if __name__ == "__main__": + print("This module is not meant to be run directly.") + print("Please use go_generator.py instead.") diff --git a/backends/generators/tasks.rake b/backends/generators/tasks.rake new file mode 100644 index 0000000000..e158ea8917 --- /dev/null +++ b/backends/generators/tasks.rake @@ -0,0 +1,37 @@ +# frozen_string_literal: true + +directory "#{$root}/gen/go" + +namespace :gen do + desc <<~DESC + Generate Go code from RISC-V instruction and CSR definitions + + Options: + * CONFIG - Configuration name (defaults to "_") + * OUTPUT_DIR - Output directory for generated Go code (defaults to "#{$root}/gen/go") + DESC + task :go => "#{$root}/gen/go" do + config_name = ENV["CONFIG"] || "_" + output_dir = ENV["OUTPUT_DIR"] || "#{$root}/gen/go/" + + # Ensure the output directory exists + FileUtils.mkdir_p output_dir + + # Make sure the architecture is resolved + Rake::Task["#{$root}/.stamps/resolve-#{config_name}.stamp"].invoke + + # Get the arch paths based on the config + inst_dir = $root / "arch" / "inst" + csr_dir = $root / "arch" / "csr" + + # If using a specific config other than the default, use the resolved arch + if config_name != "_" + inst_dir = $root / "gen" / "resolved_arch" / config_name / "inst" + csr_dir = $root / "gen" / "resolved_arch" / config_name / "csr" + end + + # Run the Go generator script using the same Python environment + # Note: The script uses --output not --output-dir + sh "#{$root}/.home/.venv/bin/python3 #{$root}/backends/generators/Go/go_generator.py --inst-dir=#{inst_dir} --csr-dir=#{csr_dir} --output=#{output_dir}inst.go" + end +end From 20eeeff520eb2adf1b3609d32e8b4c3441f164ae Mon Sep 17 00:00:00 2001 From: Kevin Broch <86068473+kbroch-rivosinc@users.noreply.github.com> Date: Fri, 28 Mar 2025 06:14:02 -0700 Subject: [PATCH 007/207] create local shellcheck hook that uses shellcheck from container (#523) fixes #520 Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> --- .devcontainer/Dockerfile | 3 ++- .pre-commit-config.yaml | 13 ++++++++----- bin/.container-tag | 2 +- container.def | 3 ++- lib/deploy.sh | 4 ++-- 5 files changed, 15 insertions(+), 10 deletions(-) diff --git a/.devcontainer/Dockerfile b/.devcontainer/Dockerfile index f708c60c03..55106b2693 100644 --- a/.devcontainer/Dockerfile +++ b/.devcontainer/Dockerfile @@ -25,7 +25,8 @@ RUN apt-get install -y --no-install-recommends git \ clang-format \ clang-tidy \ libelf-dev \ - gcc-riscv64-unknown-elf + gcc-riscv64-unknown-elf \ + shellcheck RUN apt-get clean autoclean RUN apt-get autoremove -y RUN rm -rf /var/lib/{apt,dpkg,cache,log}/* diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 00d1ce8e7b..95da7e8c85 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -74,11 +74,14 @@ repos: hooks: - id: pyupgrade - # - repo: https://github.com/koalaman/shellcheck-precommit - # rev: v0.10.0 - # hooks: - # - id: shellcheck - # args: ["--severity=error"] + - repo: local + hooks: + - id: shellcheck + name: shellcheck + types: [shell] + language: system + entry: shellcheck + args: ["--severity=error"] - repo: https://github.com/scop/pre-commit-shfmt rev: v3.11.0-1 diff --git a/bin/.container-tag b/bin/.container-tag index 2eb3c4fe4e..5a2a5806df 100644 --- a/bin/.container-tag +++ b/bin/.container-tag @@ -1 +1 @@ -0.5 +0.6 diff --git a/container.def b/container.def index 2754ebb8c6..ce1030f0d9 100644 --- a/container.def +++ b/container.def @@ -34,7 +34,8 @@ From: ubuntu:24.04 libelf-dev \ gcc-riscv64-linux-gnu \ gcc-riscv64-unknown-elf \ - libc6-dev-riscv64-cross + libc6-dev-riscv64-cross \ + shellcheck # cleanup apt-get clean autoclean apt-get autoremove -y diff --git a/lib/deploy.sh b/lib/deploy.sh index 8f6c35372d..74b7224477 100644 --- a/lib/deploy.sh +++ b/lib/deploy.sh @@ -1,8 +1,8 @@ -#!/bin/bash +#!/usr/bin/env bash # deploy artifacts to a directory, in preparation for GitHub deployment -ROOT=$(dirname $(dirname $(realpath $BASH_SOURCE[0]))) +ROOT=$(dirname $(dirname $(realpath ${BASH_SOURCE[0]}))) DEPLOY_DIR="$ROOT/_site" PAGES_URL="https://riscv-software-src.github.io/riscv-unified-db" From 3d458ea8b25d2af8489fd3b5ca89d056c600f139 Mon Sep 17 00:00:00 2001 From: Usman Akinyemi Date: Wed, 26 Mar 2025 21:39:15 +0530 Subject: [PATCH 008/207] arch/inst: Add SPDX snippet to YAML files containing sail() function. Mentored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Mentored-by: Paul A. Clarke Signed-off-by: Usman Akinyemi --- arch/inst/A/amoadd.d.yaml | 5 +++++ arch/inst/A/amoadd.w.yaml | 5 +++++ arch/inst/A/amoand.d.yaml | 5 +++++ arch/inst/A/amoand.w.yaml | 5 +++++ arch/inst/A/amomax.d.yaml | 5 +++++ arch/inst/A/amomax.w.yaml | 5 +++++ arch/inst/A/amomaxu.d.yaml | 5 +++++ arch/inst/A/amomaxu.w.yaml | 5 +++++ arch/inst/A/amomin.d.yaml | 5 +++++ arch/inst/A/amomin.w.yaml | 5 +++++ arch/inst/A/amominu.d.yaml | 5 +++++ arch/inst/A/amominu.w.yaml | 5 +++++ arch/inst/A/amoor.d.yaml | 5 +++++ arch/inst/A/amoor.w.yaml | 5 +++++ arch/inst/A/amoswap.d.yaml | 5 +++++ arch/inst/A/amoswap.w.yaml | 5 +++++ arch/inst/A/amoxor.d.yaml | 5 +++++ arch/inst/A/amoxor.w.yaml | 5 +++++ arch/inst/A/lr.d.yaml | 5 +++++ arch/inst/A/lr.w.yaml | 5 +++++ arch/inst/A/sc.d.yaml | 5 +++++ arch/inst/A/sc.w.yaml | 5 +++++ arch/inst/B/add.uw.yaml | 5 +++++ arch/inst/B/andn.yaml | 5 +++++ arch/inst/B/bclr.yaml | 5 +++++ arch/inst/B/bclri.yaml | 5 +++++ arch/inst/B/bext.yaml | 5 +++++ arch/inst/B/bexti.yaml | 5 +++++ arch/inst/B/binv.yaml | 5 +++++ arch/inst/B/binvi.yaml | 5 +++++ arch/inst/B/bset.yaml | 5 +++++ arch/inst/B/bseti.yaml | 5 +++++ arch/inst/B/clmul.yaml | 5 +++++ arch/inst/B/clmulh.yaml | 5 +++++ arch/inst/B/clmulr.yaml | 5 +++++ arch/inst/B/clz.yaml | 5 +++++ arch/inst/B/clzw.yaml | 5 +++++ arch/inst/B/cpop.yaml | 5 +++++ arch/inst/B/cpopw.yaml | 5 +++++ arch/inst/B/ctz.yaml | 5 +++++ arch/inst/B/ctzw.yaml | 5 +++++ arch/inst/B/max.yaml | 5 +++++ arch/inst/B/maxu.yaml | 5 +++++ arch/inst/B/min.yaml | 5 +++++ arch/inst/B/minu.yaml | 5 +++++ arch/inst/B/orc.b.yaml | 5 +++++ arch/inst/B/orn.yaml | 5 +++++ arch/inst/B/rev8.yaml | 5 +++++ arch/inst/B/rol.yaml | 5 +++++ arch/inst/B/rolw.yaml | 5 +++++ arch/inst/B/ror.yaml | 5 +++++ arch/inst/B/rori.yaml | 5 +++++ arch/inst/B/roriw.yaml | 5 +++++ arch/inst/B/rorw.yaml | 5 +++++ arch/inst/B/sext.b.yaml | 5 +++++ arch/inst/B/sext.h.yaml | 5 +++++ arch/inst/B/sh1add.uw.yaml | 5 +++++ arch/inst/B/sh1add.yaml | 5 +++++ arch/inst/B/sh2add.uw.yaml | 5 +++++ arch/inst/B/sh2add.yaml | 5 +++++ arch/inst/B/sh3add.uw.yaml | 5 +++++ arch/inst/B/sh3add.yaml | 5 +++++ arch/inst/B/slli.uw.yaml | 5 +++++ arch/inst/B/xnor.yaml | 5 +++++ arch/inst/B/zext.h.yaml | 5 +++++ arch/inst/C/c.add.yaml | 5 +++++ arch/inst/C/c.addw.yaml | 5 +++++ arch/inst/C/c.and.yaml | 5 +++++ arch/inst/C/c.andi.yaml | 5 +++++ arch/inst/C/c.beqz.yaml | 5 +++++ arch/inst/C/c.bnez.yaml | 5 +++++ arch/inst/C/c.ebreak.yaml | 5 +++++ arch/inst/C/c.ld.yaml | 5 +++++ arch/inst/C/c.lw.yaml | 5 +++++ arch/inst/C/c.mv.yaml | 5 +++++ arch/inst/C/c.or.yaml | 5 +++++ arch/inst/C/c.slli.yaml | 5 +++++ arch/inst/C/c.srai.yaml | 5 +++++ arch/inst/C/c.srli.yaml | 5 +++++ arch/inst/C/c.sub.yaml | 5 +++++ arch/inst/C/c.subw.yaml | 5 +++++ arch/inst/C/c.xor.yaml | 5 +++++ arch/inst/F/fadd.s.yaml | 5 +++++ arch/inst/F/fclass.s.yaml | 5 +++++ arch/inst/F/fcvt.l.s.yaml | 5 +++++ arch/inst/F/fcvt.lu.s.yaml | 5 +++++ arch/inst/F/fcvt.s.l.yaml | 5 +++++ arch/inst/F/fcvt.s.lu.yaml | 5 +++++ arch/inst/F/fcvt.s.w.yaml | 5 +++++ arch/inst/F/fcvt.s.wu.yaml | 5 +++++ arch/inst/F/fcvt.w.s.yaml | 5 +++++ arch/inst/F/fcvt.wu.s.yaml | 5 +++++ arch/inst/F/fdiv.s.yaml | 5 +++++ arch/inst/F/feq.s.yaml | 5 +++++ arch/inst/F/fle.s.yaml | 5 +++++ arch/inst/F/fleq.s.yaml | 5 +++++ arch/inst/F/fli.s.yaml | 5 +++++ arch/inst/F/flt.s.yaml | 5 +++++ arch/inst/F/fltq.s.yaml | 5 +++++ arch/inst/F/flw.yaml | 5 +++++ arch/inst/F/fmadd.s.yaml | 5 +++++ arch/inst/F/fmax.s.yaml | 5 +++++ arch/inst/F/fmaxm.s.yaml | 5 +++++ arch/inst/F/fmin.s.yaml | 5 +++++ arch/inst/F/fminm.s.yaml | 5 +++++ arch/inst/F/fmsub.s.yaml | 5 +++++ arch/inst/F/fmul.s.yaml | 5 +++++ arch/inst/F/fmv.w.x.yaml | 5 +++++ arch/inst/F/fmv.x.w.yaml | 5 +++++ arch/inst/F/fnmadd.s.yaml | 5 +++++ arch/inst/F/fnmsub.s.yaml | 5 +++++ arch/inst/F/fround.s.yaml | 5 +++++ arch/inst/F/froundnx.s.yaml | 5 +++++ arch/inst/F/fsgnj.s.yaml | 5 +++++ arch/inst/F/fsgnjn.s.yaml | 5 +++++ arch/inst/F/fsgnjx.s.yaml | 5 +++++ arch/inst/F/fsqrt.s.yaml | 5 +++++ arch/inst/F/fsub.s.yaml | 5 +++++ arch/inst/F/fsw.yaml | 5 +++++ arch/inst/I/add.yaml | 5 +++++ arch/inst/I/addi.yaml | 5 +++++ arch/inst/I/addiw.yaml | 5 +++++ arch/inst/I/addw.yaml | 5 +++++ arch/inst/I/and.yaml | 5 +++++ arch/inst/I/andi.yaml | 5 +++++ arch/inst/I/auipc.yaml | 5 +++++ arch/inst/I/beq.yaml | 5 +++++ arch/inst/I/bge.yaml | 5 +++++ arch/inst/I/bgeu.yaml | 5 +++++ arch/inst/I/blt.yaml | 5 +++++ arch/inst/I/bltu.yaml | 5 +++++ arch/inst/I/bne.yaml | 5 +++++ arch/inst/I/ebreak.yaml | 5 +++++ arch/inst/I/ecall.yaml | 5 +++++ arch/inst/I/fence.yaml | 5 +++++ arch/inst/I/jal.yaml | 5 +++++ arch/inst/I/jalr.yaml | 5 +++++ arch/inst/I/lb.yaml | 5 +++++ arch/inst/I/lbu.yaml | 5 +++++ arch/inst/I/ld.yaml | 5 +++++ arch/inst/I/lh.yaml | 5 +++++ arch/inst/I/lhu.yaml | 5 +++++ arch/inst/I/lui.yaml | 5 +++++ arch/inst/I/lw.yaml | 5 +++++ arch/inst/I/lwu.yaml | 5 +++++ arch/inst/I/mret.yaml | 5 +++++ arch/inst/I/or.yaml | 5 +++++ arch/inst/I/ori.yaml | 5 +++++ arch/inst/I/sb.yaml | 5 +++++ arch/inst/I/sd.yaml | 5 +++++ arch/inst/I/sh.yaml | 5 +++++ arch/inst/I/sll.yaml | 5 +++++ arch/inst/I/slli.yaml | 5 +++++ arch/inst/I/slliw.yaml | 5 +++++ arch/inst/I/sllw.yaml | 5 +++++ arch/inst/I/slt.yaml | 5 +++++ arch/inst/I/slti.yaml | 5 +++++ arch/inst/I/sltiu.yaml | 5 +++++ arch/inst/I/sltu.yaml | 5 +++++ arch/inst/I/sra.yaml | 5 +++++ arch/inst/I/srai.yaml | 5 +++++ arch/inst/I/sraiw.yaml | 5 +++++ arch/inst/I/sraw.yaml | 5 +++++ arch/inst/I/srl.yaml | 5 +++++ arch/inst/I/srli.yaml | 5 +++++ arch/inst/I/srliw.yaml | 5 +++++ arch/inst/I/srlw.yaml | 5 +++++ arch/inst/I/sub.yaml | 5 +++++ arch/inst/I/subw.yaml | 5 +++++ arch/inst/I/sw.yaml | 5 +++++ arch/inst/I/wfi.yaml | 5 +++++ arch/inst/I/xor.yaml | 5 +++++ arch/inst/I/xori.yaml | 5 +++++ arch/inst/M/div.yaml | 5 +++++ arch/inst/M/divu.yaml | 5 +++++ arch/inst/M/divuw.yaml | 5 +++++ arch/inst/M/divw.yaml | 5 +++++ arch/inst/M/mul.yaml | 5 +++++ arch/inst/M/mulh.yaml | 5 +++++ arch/inst/M/mulhsu.yaml | 5 +++++ arch/inst/M/mulhu.yaml | 5 +++++ arch/inst/M/mulw.yaml | 5 +++++ arch/inst/M/rem.yaml | 5 +++++ arch/inst/M/remu.yaml | 5 +++++ arch/inst/M/remuw.yaml | 5 +++++ arch/inst/M/remw.yaml | 5 +++++ arch/inst/S/sfence.vma.yaml | 5 +++++ arch/inst/S/sret.yaml | 5 +++++ arch/inst/V/vaadd.vv.yaml | 5 +++++ arch/inst/V/vaadd.vx.yaml | 5 +++++ arch/inst/V/vaaddu.vv.yaml | 5 +++++ arch/inst/V/vaaddu.vx.yaml | 5 +++++ arch/inst/V/vadc.vim.yaml | 5 +++++ arch/inst/V/vadc.vvm.yaml | 5 +++++ arch/inst/V/vadc.vxm.yaml | 5 +++++ arch/inst/V/vadd.vi.yaml | 5 +++++ arch/inst/V/vadd.vv.yaml | 5 +++++ arch/inst/V/vadd.vx.yaml | 5 +++++ arch/inst/V/vand.vi.yaml | 5 +++++ arch/inst/V/vand.vv.yaml | 5 +++++ arch/inst/V/vand.vx.yaml | 5 +++++ arch/inst/V/vasub.vv.yaml | 5 +++++ arch/inst/V/vasub.vx.yaml | 5 +++++ arch/inst/V/vasubu.vv.yaml | 5 +++++ arch/inst/V/vasubu.vx.yaml | 5 +++++ arch/inst/V/vcompress.vm.yaml | 5 +++++ arch/inst/V/vdiv.vv.yaml | 5 +++++ arch/inst/V/vdiv.vx.yaml | 5 +++++ arch/inst/V/vdivu.vv.yaml | 5 +++++ arch/inst/V/vdivu.vx.yaml | 5 +++++ arch/inst/V/vfadd.vf.yaml | 5 +++++ arch/inst/V/vfadd.vv.yaml | 5 +++++ arch/inst/V/vfclass.v.yaml | 5 +++++ arch/inst/V/vfcvt.f.x.v.yaml | 5 +++++ arch/inst/V/vfcvt.f.xu.v.yaml | 5 +++++ arch/inst/V/vfcvt.rtz.x.f.v.yaml | 5 +++++ arch/inst/V/vfcvt.rtz.xu.f.v.yaml | 5 +++++ arch/inst/V/vfcvt.x.f.v.yaml | 5 +++++ arch/inst/V/vfcvt.xu.f.v.yaml | 5 +++++ arch/inst/V/vfdiv.vf.yaml | 5 +++++ arch/inst/V/vfdiv.vv.yaml | 5 +++++ arch/inst/V/vfirst.m.yaml | 5 +++++ arch/inst/V/vfmacc.vf.yaml | 5 +++++ arch/inst/V/vfmacc.vv.yaml | 5 +++++ arch/inst/V/vfmadd.vf.yaml | 5 +++++ arch/inst/V/vfmadd.vv.yaml | 5 +++++ arch/inst/V/vfmax.vf.yaml | 5 +++++ arch/inst/V/vfmax.vv.yaml | 5 +++++ arch/inst/V/vfmerge.vfm.yaml | 5 +++++ arch/inst/V/vfmin.vf.yaml | 5 +++++ arch/inst/V/vfmin.vv.yaml | 5 +++++ arch/inst/V/vfmsac.vf.yaml | 5 +++++ arch/inst/V/vfmsac.vv.yaml | 5 +++++ arch/inst/V/vfmsub.vf.yaml | 5 +++++ arch/inst/V/vfmsub.vv.yaml | 5 +++++ arch/inst/V/vfmul.vf.yaml | 5 +++++ arch/inst/V/vfmul.vv.yaml | 5 +++++ arch/inst/V/vfmv.f.s.yaml | 5 +++++ arch/inst/V/vfmv.s.f.yaml | 5 +++++ arch/inst/V/vfmv.v.f.yaml | 5 +++++ arch/inst/V/vfncvt.f.f.w.yaml | 5 +++++ arch/inst/V/vfncvt.f.x.w.yaml | 5 +++++ arch/inst/V/vfncvt.f.xu.w.yaml | 5 +++++ arch/inst/V/vfncvt.rod.f.f.w.yaml | 5 +++++ arch/inst/V/vfncvt.rtz.x.f.w.yaml | 5 +++++ arch/inst/V/vfncvt.rtz.xu.f.w.yaml | 5 +++++ arch/inst/V/vfncvt.x.f.w.yaml | 5 +++++ arch/inst/V/vfncvt.xu.f.w.yaml | 5 +++++ arch/inst/V/vfnmacc.vf.yaml | 5 +++++ arch/inst/V/vfnmacc.vv.yaml | 5 +++++ arch/inst/V/vfnmadd.vf.yaml | 5 +++++ arch/inst/V/vfnmadd.vv.yaml | 5 +++++ arch/inst/V/vfnmsac.vf.yaml | 5 +++++ arch/inst/V/vfnmsac.vv.yaml | 5 +++++ arch/inst/V/vfnmsub.vf.yaml | 5 +++++ arch/inst/V/vfnmsub.vv.yaml | 5 +++++ arch/inst/V/vfrdiv.vf.yaml | 5 +++++ arch/inst/V/vfrec7.v.yaml | 5 +++++ arch/inst/V/vfredmax.vs.yaml | 5 +++++ arch/inst/V/vfredmin.vs.yaml | 5 +++++ arch/inst/V/vfredosum.vs.yaml | 5 +++++ arch/inst/V/vfredusum.vs.yaml | 5 +++++ arch/inst/V/vfrsqrt7.v.yaml | 5 +++++ arch/inst/V/vfrsub.vf.yaml | 5 +++++ arch/inst/V/vfsgnj.vf.yaml | 5 +++++ arch/inst/V/vfsgnj.vv.yaml | 5 +++++ arch/inst/V/vfsgnjn.vf.yaml | 5 +++++ arch/inst/V/vfsgnjn.vv.yaml | 5 +++++ arch/inst/V/vfsgnjx.vf.yaml | 5 +++++ arch/inst/V/vfsgnjx.vv.yaml | 5 +++++ arch/inst/V/vfslide1down.vf.yaml | 5 +++++ arch/inst/V/vfslide1up.vf.yaml | 5 +++++ arch/inst/V/vfsqrt.v.yaml | 5 +++++ arch/inst/V/vfsub.vf.yaml | 5 +++++ arch/inst/V/vfsub.vv.yaml | 5 +++++ arch/inst/V/vfwadd.vf.yaml | 5 +++++ arch/inst/V/vfwadd.vv.yaml | 5 +++++ arch/inst/V/vfwadd.wf.yaml | 5 +++++ arch/inst/V/vfwadd.wv.yaml | 5 +++++ arch/inst/V/vfwcvt.f.f.v.yaml | 5 +++++ arch/inst/V/vfwcvt.f.x.v.yaml | 5 +++++ arch/inst/V/vfwcvt.f.xu.v.yaml | 5 +++++ arch/inst/V/vfwcvt.rtz.x.f.v.yaml | 5 +++++ arch/inst/V/vfwcvt.rtz.xu.f.v.yaml | 5 +++++ arch/inst/V/vfwcvt.x.f.v.yaml | 5 +++++ arch/inst/V/vfwcvt.xu.f.v.yaml | 5 +++++ arch/inst/V/vfwmacc.vf.yaml | 5 +++++ arch/inst/V/vfwmacc.vv.yaml | 5 +++++ arch/inst/V/vfwmsac.vf.yaml | 5 +++++ arch/inst/V/vfwmsac.vv.yaml | 5 +++++ arch/inst/V/vfwmul.vf.yaml | 5 +++++ arch/inst/V/vfwmul.vv.yaml | 5 +++++ arch/inst/V/vfwnmacc.vf.yaml | 5 +++++ arch/inst/V/vfwnmacc.vv.yaml | 5 +++++ arch/inst/V/vfwnmsac.vf.yaml | 5 +++++ arch/inst/V/vfwnmsac.vv.yaml | 5 +++++ arch/inst/V/vfwredosum.vs.yaml | 5 +++++ arch/inst/V/vfwredusum.vs.yaml | 5 +++++ arch/inst/V/vfwsub.vf.yaml | 5 +++++ arch/inst/V/vfwsub.vv.yaml | 5 +++++ arch/inst/V/vfwsub.wf.yaml | 5 +++++ arch/inst/V/vfwsub.wv.yaml | 5 +++++ arch/inst/V/vid.v.yaml | 5 +++++ arch/inst/V/viota.m.yaml | 5 +++++ arch/inst/V/vle16.v.yaml | 5 +++++ arch/inst/V/vle16ff.v.yaml | 5 +++++ arch/inst/V/vle32.v.yaml | 5 +++++ arch/inst/V/vle32ff.v.yaml | 5 +++++ arch/inst/V/vle64.v.yaml | 5 +++++ arch/inst/V/vle64ff.v.yaml | 5 +++++ arch/inst/V/vle8.v.yaml | 5 +++++ arch/inst/V/vle8ff.v.yaml | 5 +++++ arch/inst/V/vlm.v.yaml | 5 +++++ arch/inst/V/vloxei16.v.yaml | 5 +++++ arch/inst/V/vloxei32.v.yaml | 5 +++++ arch/inst/V/vloxei64.v.yaml | 5 +++++ arch/inst/V/vloxei8.v.yaml | 5 +++++ arch/inst/V/vlse16.v.yaml | 5 +++++ arch/inst/V/vlse32.v.yaml | 5 +++++ arch/inst/V/vlse64.v.yaml | 5 +++++ arch/inst/V/vlse8.v.yaml | 5 +++++ arch/inst/V/vluxei16.v.yaml | 5 +++++ arch/inst/V/vluxei32.v.yaml | 5 +++++ arch/inst/V/vluxei64.v.yaml | 5 +++++ arch/inst/V/vluxei8.v.yaml | 5 +++++ arch/inst/V/vmacc.vv.yaml | 5 +++++ arch/inst/V/vmacc.vx.yaml | 5 +++++ arch/inst/V/vmadc.vi.yaml | 5 +++++ arch/inst/V/vmadc.vim.yaml | 5 +++++ arch/inst/V/vmadc.vv.yaml | 5 +++++ arch/inst/V/vmadc.vvm.yaml | 5 +++++ arch/inst/V/vmadc.vx.yaml | 5 +++++ arch/inst/V/vmadc.vxm.yaml | 5 +++++ arch/inst/V/vmadd.vv.yaml | 5 +++++ arch/inst/V/vmadd.vx.yaml | 5 +++++ arch/inst/V/vmand.mm.yaml | 5 +++++ arch/inst/V/vmax.vv.yaml | 5 +++++ arch/inst/V/vmax.vx.yaml | 5 +++++ arch/inst/V/vmaxu.vv.yaml | 5 +++++ arch/inst/V/vmaxu.vx.yaml | 5 +++++ arch/inst/V/vmerge.vim.yaml | 5 +++++ arch/inst/V/vmerge.vvm.yaml | 5 +++++ arch/inst/V/vmerge.vxm.yaml | 5 +++++ arch/inst/V/vmfeq.vf.yaml | 5 +++++ arch/inst/V/vmfeq.vv.yaml | 5 +++++ arch/inst/V/vmfge.vf.yaml | 5 +++++ arch/inst/V/vmfgt.vf.yaml | 5 +++++ arch/inst/V/vmfle.vf.yaml | 5 +++++ arch/inst/V/vmfle.vv.yaml | 5 +++++ arch/inst/V/vmflt.vf.yaml | 5 +++++ arch/inst/V/vmflt.vv.yaml | 5 +++++ arch/inst/V/vmfne.vf.yaml | 5 +++++ arch/inst/V/vmfne.vv.yaml | 5 +++++ arch/inst/V/vmin.vv.yaml | 5 +++++ arch/inst/V/vmin.vx.yaml | 5 +++++ arch/inst/V/vminu.vv.yaml | 5 +++++ arch/inst/V/vminu.vx.yaml | 5 +++++ arch/inst/V/vmnand.mm.yaml | 5 +++++ arch/inst/V/vmnor.mm.yaml | 5 +++++ arch/inst/V/vmor.mm.yaml | 5 +++++ arch/inst/V/vmsbc.vv.yaml | 5 +++++ arch/inst/V/vmsbc.vvm.yaml | 5 +++++ arch/inst/V/vmsbc.vx.yaml | 5 +++++ arch/inst/V/vmsbc.vxm.yaml | 5 +++++ arch/inst/V/vmsbf.m.yaml | 5 +++++ arch/inst/V/vmseq.vi.yaml | 5 +++++ arch/inst/V/vmseq.vv.yaml | 5 +++++ arch/inst/V/vmseq.vx.yaml | 5 +++++ arch/inst/V/vmsgt.vi.yaml | 5 +++++ arch/inst/V/vmsgt.vx.yaml | 5 +++++ arch/inst/V/vmsgtu.vi.yaml | 5 +++++ arch/inst/V/vmsgtu.vx.yaml | 5 +++++ arch/inst/V/vmsif.m.yaml | 5 +++++ arch/inst/V/vmsle.vi.yaml | 5 +++++ arch/inst/V/vmsle.vv.yaml | 5 +++++ arch/inst/V/vmsle.vx.yaml | 5 +++++ arch/inst/V/vmsleu.vi.yaml | 5 +++++ arch/inst/V/vmsleu.vv.yaml | 5 +++++ arch/inst/V/vmsleu.vx.yaml | 5 +++++ arch/inst/V/vmslt.vv.yaml | 5 +++++ arch/inst/V/vmslt.vx.yaml | 5 +++++ arch/inst/V/vmsltu.vv.yaml | 5 +++++ arch/inst/V/vmsltu.vx.yaml | 5 +++++ arch/inst/V/vmsne.vi.yaml | 5 +++++ arch/inst/V/vmsne.vv.yaml | 5 +++++ arch/inst/V/vmsne.vx.yaml | 5 +++++ arch/inst/V/vmsof.m.yaml | 5 +++++ arch/inst/V/vmul.vv.yaml | 5 +++++ arch/inst/V/vmul.vx.yaml | 5 +++++ arch/inst/V/vmulh.vv.yaml | 5 +++++ arch/inst/V/vmulh.vx.yaml | 5 +++++ arch/inst/V/vmulhsu.vv.yaml | 5 +++++ arch/inst/V/vmulhsu.vx.yaml | 5 +++++ arch/inst/V/vmulhu.vv.yaml | 5 +++++ arch/inst/V/vmulhu.vx.yaml | 5 +++++ arch/inst/V/vmv.s.x.yaml | 5 +++++ arch/inst/V/vmv.v.i.yaml | 5 +++++ arch/inst/V/vmv.v.v.yaml | 5 +++++ arch/inst/V/vmv.v.x.yaml | 5 +++++ arch/inst/V/vmv.x.s.yaml | 5 +++++ arch/inst/V/vmv1r.v.yaml | 5 +++++ arch/inst/V/vmv2r.v.yaml | 5 +++++ arch/inst/V/vmv4r.v.yaml | 5 +++++ arch/inst/V/vmv8r.v.yaml | 5 +++++ arch/inst/V/vmxnor.mm.yaml | 5 +++++ arch/inst/V/vmxor.mm.yaml | 5 +++++ arch/inst/V/vnclip.wi.yaml | 5 +++++ arch/inst/V/vnclip.wv.yaml | 5 +++++ arch/inst/V/vnclip.wx.yaml | 5 +++++ arch/inst/V/vnclipu.wi.yaml | 5 +++++ arch/inst/V/vnclipu.wv.yaml | 5 +++++ arch/inst/V/vnclipu.wx.yaml | 5 +++++ arch/inst/V/vnmsac.vv.yaml | 5 +++++ arch/inst/V/vnmsac.vx.yaml | 5 +++++ arch/inst/V/vnmsub.vv.yaml | 5 +++++ arch/inst/V/vnmsub.vx.yaml | 5 +++++ arch/inst/V/vnsra.wi.yaml | 5 +++++ arch/inst/V/vnsra.wv.yaml | 5 +++++ arch/inst/V/vnsra.wx.yaml | 5 +++++ arch/inst/V/vnsrl.wi.yaml | 5 +++++ arch/inst/V/vnsrl.wv.yaml | 5 +++++ arch/inst/V/vnsrl.wx.yaml | 5 +++++ arch/inst/V/vor.vi.yaml | 5 +++++ arch/inst/V/vor.vv.yaml | 5 +++++ arch/inst/V/vor.vx.yaml | 5 +++++ arch/inst/V/vredand.vs.yaml | 5 +++++ arch/inst/V/vredmax.vs.yaml | 5 +++++ arch/inst/V/vredmaxu.vs.yaml | 5 +++++ arch/inst/V/vredmin.vs.yaml | 5 +++++ arch/inst/V/vredminu.vs.yaml | 5 +++++ arch/inst/V/vredor.vs.yaml | 5 +++++ arch/inst/V/vredsum.vs.yaml | 5 +++++ arch/inst/V/vredxor.vs.yaml | 5 +++++ arch/inst/V/vrem.vv.yaml | 5 +++++ arch/inst/V/vrem.vx.yaml | 5 +++++ arch/inst/V/vremu.vv.yaml | 5 +++++ arch/inst/V/vremu.vx.yaml | 5 +++++ arch/inst/V/vrgather.vi.yaml | 5 +++++ arch/inst/V/vrgather.vv.yaml | 5 +++++ arch/inst/V/vrgather.vx.yaml | 5 +++++ arch/inst/V/vrgatherei16.vv.yaml | 5 +++++ arch/inst/V/vrsub.vi.yaml | 5 +++++ arch/inst/V/vrsub.vx.yaml | 5 +++++ arch/inst/V/vsadd.vi.yaml | 5 +++++ arch/inst/V/vsadd.vv.yaml | 5 +++++ arch/inst/V/vsadd.vx.yaml | 5 +++++ arch/inst/V/vsaddu.vi.yaml | 5 +++++ arch/inst/V/vsaddu.vv.yaml | 5 +++++ arch/inst/V/vsaddu.vx.yaml | 5 +++++ arch/inst/V/vsbc.vvm.yaml | 5 +++++ arch/inst/V/vsbc.vxm.yaml | 5 +++++ arch/inst/V/vse16.v.yaml | 5 +++++ arch/inst/V/vse32.v.yaml | 5 +++++ arch/inst/V/vse64.v.yaml | 5 +++++ arch/inst/V/vse8.v.yaml | 5 +++++ arch/inst/V/vsetivli.yaml | 5 +++++ arch/inst/V/vsetvli.yaml | 5 +++++ arch/inst/V/vsext.vf2.yaml | 5 +++++ arch/inst/V/vsext.vf4.yaml | 5 +++++ arch/inst/V/vsext.vf8.yaml | 5 +++++ arch/inst/V/vslide1down.vx.yaml | 5 +++++ arch/inst/V/vslide1up.vx.yaml | 5 +++++ arch/inst/V/vslidedown.vi.yaml | 5 +++++ arch/inst/V/vslidedown.vx.yaml | 5 +++++ arch/inst/V/vslideup.vi.yaml | 5 +++++ arch/inst/V/vslideup.vx.yaml | 5 +++++ arch/inst/V/vsll.vi.yaml | 5 +++++ arch/inst/V/vsll.vv.yaml | 5 +++++ arch/inst/V/vsll.vx.yaml | 5 +++++ arch/inst/V/vsm.v.yaml | 5 +++++ arch/inst/V/vsmul.vv.yaml | 5 +++++ arch/inst/V/vsmul.vx.yaml | 5 +++++ arch/inst/V/vsoxei16.v.yaml | 5 +++++ arch/inst/V/vsoxei32.v.yaml | 5 +++++ arch/inst/V/vsoxei64.v.yaml | 5 +++++ arch/inst/V/vsoxei8.v.yaml | 5 +++++ arch/inst/V/vsra.vi.yaml | 5 +++++ arch/inst/V/vsra.vv.yaml | 5 +++++ arch/inst/V/vsra.vx.yaml | 5 +++++ arch/inst/V/vsrl.vi.yaml | 5 +++++ arch/inst/V/vsrl.vv.yaml | 5 +++++ arch/inst/V/vsrl.vx.yaml | 5 +++++ arch/inst/V/vsse16.v.yaml | 5 +++++ arch/inst/V/vsse32.v.yaml | 5 +++++ arch/inst/V/vsse64.v.yaml | 5 +++++ arch/inst/V/vsse8.v.yaml | 5 +++++ arch/inst/V/vssra.vi.yaml | 5 +++++ arch/inst/V/vssra.vv.yaml | 5 +++++ arch/inst/V/vssra.vx.yaml | 5 +++++ arch/inst/V/vssrl.vi.yaml | 5 +++++ arch/inst/V/vssrl.vv.yaml | 5 +++++ arch/inst/V/vssrl.vx.yaml | 5 +++++ arch/inst/V/vssub.vv.yaml | 5 +++++ arch/inst/V/vssub.vx.yaml | 5 +++++ arch/inst/V/vssubu.vv.yaml | 5 +++++ arch/inst/V/vssubu.vx.yaml | 5 +++++ arch/inst/V/vsub.vv.yaml | 5 +++++ arch/inst/V/vsub.vx.yaml | 5 +++++ arch/inst/V/vsuxei16.v.yaml | 5 +++++ arch/inst/V/vsuxei32.v.yaml | 5 +++++ arch/inst/V/vsuxei64.v.yaml | 5 +++++ arch/inst/V/vsuxei8.v.yaml | 5 +++++ arch/inst/V/vwadd.vv.yaml | 5 +++++ arch/inst/V/vwadd.vx.yaml | 5 +++++ arch/inst/V/vwadd.wv.yaml | 5 +++++ arch/inst/V/vwadd.wx.yaml | 5 +++++ arch/inst/V/vwaddu.vv.yaml | 5 +++++ arch/inst/V/vwaddu.vx.yaml | 5 +++++ arch/inst/V/vwaddu.wv.yaml | 5 +++++ arch/inst/V/vwaddu.wx.yaml | 5 +++++ arch/inst/V/vwmacc.vv.yaml | 5 +++++ arch/inst/V/vwmacc.vx.yaml | 5 +++++ arch/inst/V/vwmaccsu.vv.yaml | 5 +++++ arch/inst/V/vwmaccsu.vx.yaml | 5 +++++ arch/inst/V/vwmaccu.vv.yaml | 5 +++++ arch/inst/V/vwmaccu.vx.yaml | 5 +++++ arch/inst/V/vwmaccus.vx.yaml | 5 +++++ arch/inst/V/vwmul.vv.yaml | 5 +++++ arch/inst/V/vwmul.vx.yaml | 5 +++++ arch/inst/V/vwmulsu.vv.yaml | 5 +++++ arch/inst/V/vwmulsu.vx.yaml | 5 +++++ arch/inst/V/vwmulu.vv.yaml | 5 +++++ arch/inst/V/vwmulu.vx.yaml | 5 +++++ arch/inst/V/vwredsum.vs.yaml | 5 +++++ arch/inst/V/vwredsumu.vs.yaml | 5 +++++ arch/inst/V/vwsub.vv.yaml | 5 +++++ arch/inst/V/vwsub.vx.yaml | 5 +++++ arch/inst/V/vwsub.wv.yaml | 5 +++++ arch/inst/V/vwsub.wx.yaml | 5 +++++ arch/inst/V/vwsubu.vv.yaml | 5 +++++ arch/inst/V/vwsubu.vx.yaml | 5 +++++ arch/inst/V/vwsubu.wv.yaml | 5 +++++ arch/inst/V/vwsubu.wx.yaml | 5 +++++ arch/inst/V/vxor.vi.yaml | 5 +++++ arch/inst/V/vxor.vv.yaml | 5 +++++ arch/inst/V/vxor.vx.yaml | 5 +++++ arch/inst/V/vzext.vf2.yaml | 5 +++++ arch/inst/V/vzext.vf4.yaml | 5 +++++ arch/inst/V/vzext.vf8.yaml | 5 +++++ arch/inst/Zabha/amoadd.b.yaml | 5 +++++ arch/inst/Zabha/amoadd.h.yaml | 5 +++++ arch/inst/Zabha/amoand.b.yaml | 5 +++++ arch/inst/Zabha/amoand.h.yaml | 5 +++++ arch/inst/Zabha/amomax.b.yaml | 5 +++++ arch/inst/Zabha/amomax.h.yaml | 5 +++++ arch/inst/Zabha/amomaxu.b.yaml | 5 +++++ arch/inst/Zabha/amomaxu.h.yaml | 5 +++++ arch/inst/Zabha/amomin.b.yaml | 5 +++++ arch/inst/Zabha/amomin.h.yaml | 5 +++++ arch/inst/Zabha/amominu.b.yaml | 5 +++++ arch/inst/Zabha/amominu.h.yaml | 5 +++++ arch/inst/Zabha/amoor.b.yaml | 5 +++++ arch/inst/Zabha/amoor.h.yaml | 5 +++++ arch/inst/Zabha/amoswap.b.yaml | 5 +++++ arch/inst/Zabha/amoswap.h.yaml | 5 +++++ arch/inst/Zabha/amoxor.b.yaml | 5 +++++ arch/inst/Zabha/amoxor.h.yaml | 5 +++++ arch/inst/Zalasr/lb.aq.yaml | 5 +++++ arch/inst/Zalasr/ld.aq.yaml | 5 +++++ arch/inst/Zalasr/lh.aq.yaml | 5 +++++ arch/inst/Zalasr/lw.aq.yaml | 5 +++++ arch/inst/Zalasr/sb.rl.yaml | 5 +++++ arch/inst/Zalasr/sd.rl.yaml | 5 +++++ arch/inst/Zalasr/sh.rl.yaml | 5 +++++ arch/inst/Zalasr/sw.rl.yaml | 5 +++++ arch/inst/Zbkb/brev8.yaml | 5 +++++ arch/inst/Zbkb/unzip.yaml | 5 +++++ arch/inst/Zbkb/zip.yaml | 5 +++++ arch/inst/Zbkx/xperm4.yaml | 5 +++++ arch/inst/Zbkx/xperm8.yaml | 5 +++++ arch/inst/Zcb/c.lbu.yaml | 5 +++++ arch/inst/Zcb/c.lh.yaml | 5 +++++ arch/inst/Zcb/c.lhu.yaml | 5 +++++ arch/inst/Zcb/c.mul.yaml | 5 +++++ arch/inst/Zcb/c.not.yaml | 5 +++++ arch/inst/Zcb/c.sext.b.yaml | 5 +++++ arch/inst/Zcb/c.sext.h.yaml | 5 +++++ arch/inst/Zcb/c.zext.b.yaml | 5 +++++ arch/inst/Zcb/c.zext.h.yaml | 5 +++++ arch/inst/Zcb/c.zext.w.yaml | 5 +++++ arch/inst/Zfh/fcvt.h.s.yaml | 5 +++++ arch/inst/Zfh/fcvt.s.h.yaml | 5 +++++ arch/inst/Zfh/flh.yaml | 5 +++++ arch/inst/Zfh/fmv.h.x.yaml | 5 +++++ arch/inst/Zfh/fmv.x.h.yaml | 5 +++++ arch/inst/Zfh/fsh.yaml | 5 +++++ arch/inst/Zicond/czero.eqz.yaml | 5 +++++ arch/inst/Zicond/czero.nez.yaml | 5 +++++ arch/inst/Zicsr/csrrs.yaml | 5 +++++ arch/inst/Zicsr/csrrw.yaml | 5 +++++ arch/inst/Zicsr/csrrwi.yaml | 5 +++++ arch/inst/Zifencei/fence.i.yaml | 5 +++++ 592 files changed, 2960 insertions(+) diff --git a/arch/inst/A/amoadd.d.yaml b/arch/inst/A/amoadd.d.yaml index d0eb0ce3f5..3b95434918 100644 --- a/arch/inst/A/amoadd.d.yaml +++ b/arch/inst/A/amoadd.d.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Add, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -134,3 +137,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoadd.w.yaml b/arch/inst/A/amoadd.w.yaml index f4178c0c0f..fe158dafbe 100644 --- a/arch/inst/A/amoadd.w.yaml +++ b/arch/inst/A/amoadd.w.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Add, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoand.d.yaml b/arch/inst/A/amoand.d.yaml index dd945113d1..37c5f1aa9b 100644 --- a/arch/inst/A/amoand.d.yaml +++ b/arch/inst/A/amoand.d.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::And, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -134,3 +137,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoand.w.yaml b/arch/inst/A/amoand.w.yaml index a941de7bee..f869b4566f 100644 --- a/arch/inst/A/amoand.w.yaml +++ b/arch/inst/A/amoand.w.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::And, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amomax.d.yaml b/arch/inst/A/amomax.d.yaml index ddc0d12225..b2ce7bcdca 100644 --- a/arch/inst/A/amomax.d.yaml +++ b/arch/inst/A/amomax.d.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Max, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -134,3 +137,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amomax.w.yaml b/arch/inst/A/amomax.w.yaml index c7a4d71f9c..694237bb11 100644 --- a/arch/inst/A/amomax.w.yaml +++ b/arch/inst/A/amomax.w.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Max, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amomaxu.d.yaml b/arch/inst/A/amomaxu.d.yaml index 96ba6b0df9..9e2381ddde 100644 --- a/arch/inst/A/amomaxu.d.yaml +++ b/arch/inst/A/amomaxu.d.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Maxu, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amomaxu.w.yaml b/arch/inst/A/amomaxu.w.yaml index a5e4ab919d..7fd936328e 100644 --- a/arch/inst/A/amomaxu.w.yaml +++ b/arch/inst/A/amomaxu.w.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Maxu, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amomin.d.yaml b/arch/inst/A/amomin.d.yaml index 271fd81026..e7daf18534 100644 --- a/arch/inst/A/amomin.d.yaml +++ b/arch/inst/A/amomin.d.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Min, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -134,3 +137,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amomin.w.yaml b/arch/inst/A/amomin.w.yaml index beabe84992..faaad532c4 100644 --- a/arch/inst/A/amomin.w.yaml +++ b/arch/inst/A/amomin.w.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Min, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amominu.d.yaml b/arch/inst/A/amominu.d.yaml index d2a8fae318..29bcb9de31 100644 --- a/arch/inst/A/amominu.d.yaml +++ b/arch/inst/A/amominu.d.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Minu, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -134,3 +137,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amominu.w.yaml b/arch/inst/A/amominu.w.yaml index c1529dcc99..96f46ad1be 100644 --- a/arch/inst/A/amominu.w.yaml +++ b/arch/inst/A/amominu.w.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Minu, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoor.d.yaml b/arch/inst/A/amoor.d.yaml index bad4d513d8..49f64d5b6c 100644 --- a/arch/inst/A/amoor.d.yaml +++ b/arch/inst/A/amoor.d.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Or, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -134,3 +137,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoor.w.yaml b/arch/inst/A/amoor.w.yaml index 2791a551f5..f44e606e57 100644 --- a/arch/inst/A/amoor.w.yaml +++ b/arch/inst/A/amoor.w.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Or, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoswap.d.yaml b/arch/inst/A/amoswap.d.yaml index 10cccfede2..092e549675 100644 --- a/arch/inst/A/amoswap.d.yaml +++ b/arch/inst/A/amoswap.d.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Swap, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoswap.w.yaml b/arch/inst/A/amoswap.w.yaml index 5b03197eb4..415de161ce 100644 --- a/arch/inst/A/amoswap.w.yaml +++ b/arch/inst/A/amoswap.w.yaml @@ -42,6 +42,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Swap, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -132,3 +135,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoxor.d.yaml b/arch/inst/A/amoxor.d.yaml index d9c442659b..3492878f6e 100644 --- a/arch/inst/A/amoxor.d.yaml +++ b/arch/inst/A/amoxor.d.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Xor, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -134,3 +137,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/amoxor.w.yaml b/arch/inst/A/amoxor.w.yaml index e4bf3478ac..ea36b3563b 100644 --- a/arch/inst/A/amoxor.w.yaml +++ b/arch/inst/A/amoxor.w.yaml @@ -43,6 +43,9 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Xor, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/lr.d.yaml b/arch/inst/A/lr.d.yaml index 033d3be647..58115f6d3e 100644 --- a/arch/inst/A/lr.d.yaml +++ b/arch/inst/A/lr.d.yaml @@ -91,6 +91,9 @@ operation(): | X[rd] = load_reserved<32>(virtual_address, aq, rl, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -133,3 +136,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/lr.w.yaml b/arch/inst/A/lr.w.yaml index ca99cf80c9..aba2c7c99c 100644 --- a/arch/inst/A/lr.w.yaml +++ b/arch/inst/A/lr.w.yaml @@ -100,6 +100,9 @@ operation(): | X[rd] = sext(load_value[31:0], 32); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -142,3 +145,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/sc.d.yaml b/arch/inst/A/sc.d.yaml index 7886344e54..f7e1c4aa09 100644 --- a/arch/inst/A/sc.d.yaml +++ b/arch/inst/A/sc.d.yaml @@ -151,6 +151,9 @@ operation(): | Boolean success = store_conditional<64>(virtual_address, value, aq, rl, $encoding); X[rd] = success ? 0 : 1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if speculate_conditional () == false then { @@ -227,3 +230,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/A/sc.w.yaml b/arch/inst/A/sc.w.yaml index 4519f59fe1..f702f75c26 100644 --- a/arch/inst/A/sc.w.yaml +++ b/arch/inst/A/sc.w.yaml @@ -156,6 +156,9 @@ operation(): | Boolean success = store_conditional<32>(virtual_address, value, aq, rl, $encoding); X[rd] = success ? 0 : 1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if speculate_conditional () == false then { @@ -232,3 +235,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/add.uw.yaml b/arch/inst/B/add.uw.yaml index cf0ca7a24b..e91bf0c6af 100644 --- a/arch/inst/B/add.uw.yaml +++ b/arch/inst/B/add.uw.yaml @@ -35,6 +35,9 @@ operation(): | X[rd] = X[rs2] + X[rs1][31:0]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -49,3 +52,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/andn.yaml b/arch/inst/B/andn.yaml index 0b723e1ad3..2374b4243e 100644 --- a/arch/inst/B/andn.yaml +++ b/arch/inst/B/andn.yaml @@ -32,6 +32,9 @@ operation(): | X[rd] = X[rs2] & ~X[rs1]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -54,3 +57,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/bclr.yaml b/arch/inst/B/bclr.yaml index 5de87be7a5..63b69ad259 100644 --- a/arch/inst/B/bclr.yaml +++ b/arch/inst/B/bclr.yaml @@ -32,6 +32,9 @@ operation(): | XReg index = X[rs2] & (xlen() - 1); X[rd] = X[rs1] & ~(1 << index); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -48,3 +51,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/bclri.yaml b/arch/inst/B/bclri.yaml index 17739413fc..d4f9bb3fc3 100644 --- a/arch/inst/B/bclri.yaml +++ b/arch/inst/B/bclri.yaml @@ -43,6 +43,9 @@ operation(): | XReg index = shamt & (xlen() - 1); X[rd] = X[rs1] & ~(1 << index); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -58,3 +61,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/bext.yaml b/arch/inst/B/bext.yaml index 4aafdd2d31..5d407eb0d6 100644 --- a/arch/inst/B/bext.yaml +++ b/arch/inst/B/bext.yaml @@ -32,6 +32,9 @@ operation(): | XReg index = X[rs2] & (xlen() - 1); X[rd] = (X[rs1] >> index) & 1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -48,3 +51,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/bexti.yaml b/arch/inst/B/bexti.yaml index 1584b1af7b..e819cd9457 100644 --- a/arch/inst/B/bexti.yaml +++ b/arch/inst/B/bexti.yaml @@ -43,6 +43,9 @@ operation(): | XReg index = shamt & (xlen() - 1); X[rd] = (X[rs1] >> index) & 1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -58,3 +61,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/binv.yaml b/arch/inst/B/binv.yaml index 4d4af940d2..5501b1dd19 100644 --- a/arch/inst/B/binv.yaml +++ b/arch/inst/B/binv.yaml @@ -32,6 +32,9 @@ operation(): | XReg index = X[rs2] & (xlen() - 1); X[rd] = X[rs1] ^ (1 << index); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -48,3 +51,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/binvi.yaml b/arch/inst/B/binvi.yaml index 6e1edf9bad..839d6d338a 100644 --- a/arch/inst/B/binvi.yaml +++ b/arch/inst/B/binvi.yaml @@ -43,6 +43,9 @@ operation(): | XReg index = shamt & (xlen() - 1); X[rd] = X[rs1] ^ (1 << index); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -58,3 +61,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/bset.yaml b/arch/inst/B/bset.yaml index f3004636de..00c6ab7e8d 100644 --- a/arch/inst/B/bset.yaml +++ b/arch/inst/B/bset.yaml @@ -32,6 +32,9 @@ operation(): | XReg index = X[rs2] & (xlen() - 1); X[rd] = X[rs1] | (1 << index); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -48,3 +51,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/bseti.yaml b/arch/inst/B/bseti.yaml index 56693a4a7d..2e5ce16746 100644 --- a/arch/inst/B/bseti.yaml +++ b/arch/inst/B/bseti.yaml @@ -43,6 +43,9 @@ operation(): | XReg index = shamt & (xlen() - 1); X[rd] = X[rs1] | (1 << index); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -58,3 +61,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/clmul.yaml b/arch/inst/B/clmul.yaml index 29192fff96..3f774cbd91 100644 --- a/arch/inst/B/clmul.yaml +++ b/arch/inst/B/clmul.yaml @@ -41,6 +41,9 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -51,3 +54,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/clmulh.yaml b/arch/inst/B/clmulh.yaml index 48fc7a7798..c204b21eca 100644 --- a/arch/inst/B/clmulh.yaml +++ b/arch/inst/B/clmulh.yaml @@ -41,6 +41,9 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -51,3 +54,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/clmulr.yaml b/arch/inst/B/clmulr.yaml index d379359e71..be4bce3cf4 100644 --- a/arch/inst/B/clmulr.yaml +++ b/arch/inst/B/clmulr.yaml @@ -39,6 +39,9 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -49,3 +52,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/clz.yaml b/arch/inst/B/clz.yaml index 38d9a6f3e9..29f9e73614 100644 --- a/arch/inst/B/clz.yaml +++ b/arch/inst/B/clz.yaml @@ -31,6 +31,9 @@ operation(): | X[rd] = (xlen() - 1) - $signed(highest_set_bit(X[rs1])); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -43,3 +46,5 @@ sail(): | X(rd) = to_bits(sizeof(xlen), result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/clzw.yaml b/arch/inst/B/clzw.yaml index 8e3b006bda..8df6fc837f 100644 --- a/arch/inst/B/clzw.yaml +++ b/arch/inst/B/clzw.yaml @@ -31,6 +31,9 @@ operation(): | X[rd] = 31 - $signed(highest_set_bit(X[rs1][31:0])); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -43,3 +46,5 @@ sail(): | X(rd) = to_bits(sizeof(xlen), result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/cpop.yaml b/arch/inst/B/cpop.yaml index 6b47180986..08ff8c857e 100644 --- a/arch/inst/B/cpop.yaml +++ b/arch/inst/B/cpop.yaml @@ -49,6 +49,9 @@ operation(): | X[rd] = bitcount; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -58,3 +61,5 @@ sail(): | X(rd) = to_bits(sizeof(xlen), result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/cpopw.yaml b/arch/inst/B/cpopw.yaml index 01f475dbd9..3899494b2a 100644 --- a/arch/inst/B/cpopw.yaml +++ b/arch/inst/B/cpopw.yaml @@ -50,6 +50,9 @@ operation(): | X[rd] = bitcount; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -59,3 +62,5 @@ sail(): | X(rd) = to_bits(sizeof(xlen), result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/ctz.yaml b/arch/inst/B/ctz.yaml index d8280b53c8..4f4f039473 100644 --- a/arch/inst/B/ctz.yaml +++ b/arch/inst/B/ctz.yaml @@ -36,6 +36,9 @@ operation(): | X[rd] = lowest_set_bit(X[rs1]); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -48,3 +51,5 @@ sail(): | X(rd) = to_bits(sizeof(xlen), result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/ctzw.yaml b/arch/inst/B/ctzw.yaml index d1634e5221..e6690454b0 100644 --- a/arch/inst/B/ctzw.yaml +++ b/arch/inst/B/ctzw.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = lowest_set_bit(X[rs1][31:0]); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -45,3 +48,5 @@ sail(): | X(rd) = to_bits(sizeof(xlen), result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/max.yaml b/arch/inst/B/max.yaml index e483a3f549..f6fc23a8ad 100644 --- a/arch/inst/B/max.yaml +++ b/arch/inst/B/max.yaml @@ -38,6 +38,9 @@ operation(): | X[rd] = ($signed(X[rs1]) > $signed(X[rs2])) ? X[rs1] : X[rs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -60,3 +63,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/maxu.yaml b/arch/inst/B/maxu.yaml index 9bc665aafc..9b6b928517 100644 --- a/arch/inst/B/maxu.yaml +++ b/arch/inst/B/maxu.yaml @@ -30,6 +30,9 @@ operation(): | X[rd] = (X[rs1] > X[rs2]) ? X[rs1] : X[rs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -52,3 +55,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/min.yaml b/arch/inst/B/min.yaml index cd5fefc85c..0fdc2bac72 100644 --- a/arch/inst/B/min.yaml +++ b/arch/inst/B/min.yaml @@ -30,6 +30,9 @@ operation(): | X[rd] = ($signed(X[rs1]) < $signed(X[rs2])) ? X[rs1] : X[rs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -52,3 +55,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/minu.yaml b/arch/inst/B/minu.yaml index 61d88772a4..9239ce4555 100644 --- a/arch/inst/B/minu.yaml +++ b/arch/inst/B/minu.yaml @@ -30,6 +30,9 @@ operation(): | X[rd] = (X[rs1] < X[rs2]) ? X[rs1] : X[rs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -52,3 +55,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/orc.b.yaml b/arch/inst/B/orc.b.yaml index 52ddd67be9..cbae79bb1f 100644 --- a/arch/inst/B/orc.b.yaml +++ b/arch/inst/B/orc.b.yaml @@ -37,6 +37,9 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -48,3 +51,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/orn.yaml b/arch/inst/B/orn.yaml index 3bd9e8642a..52366d33fe 100644 --- a/arch/inst/B/orn.yaml +++ b/arch/inst/B/orn.yaml @@ -31,6 +31,9 @@ operation(): | X[rd] = X[rs1] | ~X[rs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -53,3 +56,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/rev8.yaml b/arch/inst/B/rev8.yaml index f3a6702d5b..ccafdcfb5b 100644 --- a/arch/inst/B/rev8.yaml +++ b/arch/inst/B/rev8.yaml @@ -55,6 +55,9 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -64,3 +67,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/rol.yaml b/arch/inst/B/rol.yaml index 6f166de0f0..cd6275ee67 100644 --- a/arch/inst/B/rol.yaml +++ b/arch/inst/B/rol.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = (X[rs1] << shamt) | (X[rs1] >> (xlen() - shamt)); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -55,3 +58,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/rolw.yaml b/arch/inst/B/rolw.yaml index 070c001dcd..4cdf61cf5d 100644 --- a/arch/inst/B/rolw.yaml +++ b/arch/inst/B/rolw.yaml @@ -38,6 +38,9 @@ operation(): | X[rd] = {{32{unextended_result[31]}}, unextended_result}; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = (X(rs1))[31..0]; @@ -49,3 +52,5 @@ sail(): | X(rd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/ror.yaml b/arch/inst/B/ror.yaml index df4dedf74c..72cd1b29cd 100644 --- a/arch/inst/B/ror.yaml +++ b/arch/inst/B/ror.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = (X[rs1] >> shamt) | (X[rs1] << (xlen() - shamt)); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -55,3 +58,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/rori.yaml b/arch/inst/B/rori.yaml index b8e7023bc6..6d28cfd419 100644 --- a/arch/inst/B/rori.yaml +++ b/arch/inst/B/rori.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = (X[rs1] >> shamt) | (X[rs1] << (xlen() - shamt)); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -53,3 +56,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/roriw.yaml b/arch/inst/B/roriw.yaml index 7e23ce7aab..d725ee7d1c 100644 --- a/arch/inst/B/roriw.yaml +++ b/arch/inst/B/roriw.yaml @@ -37,6 +37,9 @@ operation(): | XReg unextended_result = (X[rs1] >> shamt) | (X[rs1] << (32 - shamt)); X[rd] = {{32{unextended_result[31]}}, unextended_result}; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = (X(rs1))[31..0]; @@ -44,3 +47,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/rorw.yaml b/arch/inst/B/rorw.yaml index a1a9b2666c..af4c3e9f5a 100644 --- a/arch/inst/B/rorw.yaml +++ b/arch/inst/B/rorw.yaml @@ -38,6 +38,9 @@ operation(): | XReg unextended_result = (X[rs1] >> shamt) | (X[rs1] << (32 - shamt)); X[rd] = {{32{unextended_result[31]}}, unextended_result}; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = (X(rs1))[31..0]; @@ -49,3 +52,5 @@ sail(): | X(rd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/sext.b.yaml b/arch/inst/B/sext.b.yaml index 84dfd40c4b..45d7525788 100644 --- a/arch/inst/B/sext.b.yaml +++ b/arch/inst/B/sext.b.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = {{56{X[rs1][7]}}, X[rs1][7:0]}; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -44,3 +47,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/sext.h.yaml b/arch/inst/B/sext.h.yaml index d7a3a59f0c..d9c5522d49 100644 --- a/arch/inst/B/sext.h.yaml +++ b/arch/inst/B/sext.h.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = {{48{X[rs1][15]}}, X[rs1][15:0]}; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -44,3 +47,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/sh1add.uw.yaml b/arch/inst/B/sh1add.uw.yaml index 441ce3f71a..388f7849f3 100644 --- a/arch/inst/B/sh1add.uw.yaml +++ b/arch/inst/B/sh1add.uw.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = X[rs2] + (X[rs1][31:0] << 1); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -47,3 +50,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/sh1add.yaml b/arch/inst/B/sh1add.yaml index 15f1e23d4b..fa5b9347af 100644 --- a/arch/inst/B/sh1add.yaml +++ b/arch/inst/B/sh1add.yaml @@ -30,6 +30,9 @@ operation(): | X[rd] = X[rs2] + (X[rs1] << 1); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -43,3 +46,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/sh2add.uw.yaml b/arch/inst/B/sh2add.uw.yaml index 27f1c74bde..2868a9b69b 100644 --- a/arch/inst/B/sh2add.uw.yaml +++ b/arch/inst/B/sh2add.uw.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = X[rs2] + (X[rs1][31:0] << 2); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -47,3 +50,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/sh2add.yaml b/arch/inst/B/sh2add.yaml index 02b3905e2e..e11ffa9066 100644 --- a/arch/inst/B/sh2add.yaml +++ b/arch/inst/B/sh2add.yaml @@ -30,6 +30,9 @@ operation(): | X[rd] = X[rs2] + (X[rs1] << 2); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -43,3 +46,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/sh3add.uw.yaml b/arch/inst/B/sh3add.uw.yaml index 5c24796951..95da661571 100644 --- a/arch/inst/B/sh3add.uw.yaml +++ b/arch/inst/B/sh3add.uw.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = X[rs2] + (X[rs1][31:0] << 3); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -47,3 +50,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/sh3add.yaml b/arch/inst/B/sh3add.yaml index 0ceefa2502..59d38df6b8 100644 --- a/arch/inst/B/sh3add.yaml +++ b/arch/inst/B/sh3add.yaml @@ -30,6 +30,9 @@ operation(): | X[rd] = X[rs2] + (X[rs1] << 3); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -43,3 +46,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/slli.uw.yaml b/arch/inst/B/slli.uw.yaml index 4b5b11d838..5ed2e7b684 100644 --- a/arch/inst/B/slli.uw.yaml +++ b/arch/inst/B/slli.uw.yaml @@ -35,6 +35,9 @@ operation(): | X[rd] = X[rs1][31:0] << shamt; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -42,3 +45,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/xnor.yaml b/arch/inst/B/xnor.yaml index 0afd1d30db..948bbcfb43 100644 --- a/arch/inst/B/xnor.yaml +++ b/arch/inst/B/xnor.yaml @@ -31,6 +31,9 @@ operation(): | X[rd] = ~(X[rs1] ^ X[rs2]); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -53,3 +56,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/B/zext.h.yaml b/arch/inst/B/zext.h.yaml index dc08ef84e3..76efcf669a 100644 --- a/arch/inst/B/zext.h.yaml +++ b/arch/inst/B/zext.h.yaml @@ -47,6 +47,9 @@ operation(): | X[rd] = X[rs1][15:0]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -58,3 +61,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.add.yaml b/arch/inst/C/c.add.yaml index 6fc98276d6..00ae28db49 100644 --- a/arch/inst/C/c.add.yaml +++ b/arch/inst/C/c.add.yaml @@ -31,6 +31,9 @@ operation(): | XReg t1 = X[rs2]; X[rd] = t0 + t1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rd); @@ -38,3 +41,5 @@ sail(): | X(rd) = rs1_val + rs2_val; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.addw.yaml b/arch/inst/C/c.addw.yaml index 095c798116..af5cf2cc7f 100644 --- a/arch/inst/C/c.addw.yaml +++ b/arch/inst/C/c.addw.yaml @@ -31,6 +31,9 @@ operation(): | Bits<32> t1 = X[creg2reg(rs2)][31:0]; X[creg2reg(rd)] = $signed(t0 + t1); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = (X(rd+8))[31..0]; @@ -45,3 +48,5 @@ sail(): | X(rd+8) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.and.yaml b/arch/inst/C/c.and.yaml index 5a1d6514d4..2ee631c788 100644 --- a/arch/inst/C/c.and.yaml +++ b/arch/inst/C/c.and.yaml @@ -30,6 +30,9 @@ operation(): | XReg t1 = X[creg2reg(rs2)]; X[creg2reg(rd)] = t0 & t1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rd+8); @@ -55,3 +58,5 @@ sail(): | X(rd+8) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.andi.yaml b/arch/inst/C/c.andi.yaml index e1b807c0a6..eec018b4fc 100644 --- a/arch/inst/C/c.andi.yaml +++ b/arch/inst/C/c.andi.yaml @@ -29,6 +29,9 @@ operation(): | # shamt is between 0-63 X[creg2reg(rd)] = X[creg2reg(rd)] & $signed(imm); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rd_val = X(rd+8); @@ -44,3 +47,5 @@ sail(): | X(rd+8) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.beqz.yaml b/arch/inst/C/c.beqz.yaml index 04dd70d9e6..681d378bf0 100644 --- a/arch/inst/C/c.beqz.yaml +++ b/arch/inst/C/c.beqz.yaml @@ -33,6 +33,9 @@ operation(): | jump($pc + $signed(imm)); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -65,3 +68,5 @@ sail(): | } } else RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.bnez.yaml b/arch/inst/C/c.bnez.yaml index fe0384d507..ace4b8d3b9 100644 --- a/arch/inst/C/c.bnez.yaml +++ b/arch/inst/C/c.bnez.yaml @@ -33,6 +33,9 @@ operation(): | jump($pc + $signed(imm)); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rs1); @@ -65,3 +68,5 @@ sail(): | } } else RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.ebreak.yaml b/arch/inst/C/c.ebreak.yaml index 09f19331d9..23b54f1e6f 100644 --- a/arch/inst/C/c.ebreak.yaml +++ b/arch/inst/C/c.ebreak.yaml @@ -39,8 +39,13 @@ operation(): | eei_ebreak(); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { handle_mem_exception(PC, E_Breakpoint()); RETIRE_FAIL } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.ld.yaml b/arch/inst/C/c.ld.yaml index 06798d7170..9482dc7c92 100644 --- a/arch/inst/C/c.ld.yaml +++ b/arch/inst/C/c.ld.yaml @@ -39,6 +39,9 @@ operation(): | X[creg2reg(rd)] = sext(read_memory<64>(virtual_address, $encoding), 64); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -66,3 +69,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.lw.yaml b/arch/inst/C/c.lw.yaml index 5cd3340fcc..98bdca08cc 100644 --- a/arch/inst/C/c.lw.yaml +++ b/arch/inst/C/c.lw.yaml @@ -38,6 +38,9 @@ operation(): | X[creg2reg(xd)] = sext(read_memory<32>(virtual_address, $encoding), 32); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -65,3 +68,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.mv.yaml b/arch/inst/C/c.mv.yaml index 9f7758cb3d..c6d6396613 100644 --- a/arch/inst/C/c.mv.yaml +++ b/arch/inst/C/c.mv.yaml @@ -33,9 +33,14 @@ operation(): | X[xd] = X[xs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs2_val = X(xs2); X(rs) = xs2_val RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.or.yaml b/arch/inst/C/c.or.yaml index 9bac760be4..aad10ef76c 100644 --- a/arch/inst/C/c.or.yaml +++ b/arch/inst/C/c.or.yaml @@ -30,6 +30,9 @@ operation(): | XReg t1 = X[creg2reg(rs2)]; X[creg2reg(rd)] = t0 | t1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rd+8); @@ -55,3 +58,5 @@ sail(): | X(rd+8) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.slli.yaml b/arch/inst/C/c.slli.yaml index 69118301a0..c7b4b78be4 100644 --- a/arch/inst/C/c.slli.yaml +++ b/arch/inst/C/c.slli.yaml @@ -38,6 +38,9 @@ operation(): | # shamt is between 0-63 X[rd] = X[rd] << shamt; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rd_val = X(rd); @@ -56,3 +59,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.srai.yaml b/arch/inst/C/c.srai.yaml index c96a70a519..d8e81cc098 100644 --- a/arch/inst/C/c.srai.yaml +++ b/arch/inst/C/c.srai.yaml @@ -39,6 +39,9 @@ operation(): | # shamt is between 0-63 X[creg2reg(rd)] = X[creg2reg(rd)] >>> shamt; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rd_val = X(rd+8); @@ -57,3 +60,5 @@ sail(): | X(rd+8) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.srli.yaml b/arch/inst/C/c.srli.yaml index 8d58ef905f..d93e81769e 100644 --- a/arch/inst/C/c.srli.yaml +++ b/arch/inst/C/c.srli.yaml @@ -39,6 +39,9 @@ operation(): | # shamt is between 0-63 X[creg2reg(rd)] = X[creg2reg(rd)] >> shamt; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rd_val = X(rd+8); @@ -57,3 +60,5 @@ sail(): | X(rd+8) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.sub.yaml b/arch/inst/C/c.sub.yaml index eeb1d61ad8..08f67aedbd 100644 --- a/arch/inst/C/c.sub.yaml +++ b/arch/inst/C/c.sub.yaml @@ -30,6 +30,9 @@ operation(): | XReg t1 = X[creg2reg(rs2)]; X[creg2reg(rd)] = t0 - t1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rd+8); @@ -55,3 +58,5 @@ sail(): | X(rd+8) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.subw.yaml b/arch/inst/C/c.subw.yaml index bdaa2bd5ae..8b5ac0e5b9 100644 --- a/arch/inst/C/c.subw.yaml +++ b/arch/inst/C/c.subw.yaml @@ -31,6 +31,9 @@ operation(): | Bits<32> t1 = X[creg2reg(rs2)][31:0]; X[creg2reg(rd)] = sext(t0 - t1, 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = (X(rd+8))[31..0]; @@ -45,3 +48,5 @@ sail(): | X(rd+8) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/C/c.xor.yaml b/arch/inst/C/c.xor.yaml index ae612de57c..a75880c308 100644 --- a/arch/inst/C/c.xor.yaml +++ b/arch/inst/C/c.xor.yaml @@ -30,6 +30,9 @@ operation(): | XReg t1 = X[creg2reg(rs2)]; X[creg2reg(rd)] = t0 ^ t1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rd+8); @@ -55,3 +58,5 @@ sail(): | X(rd+8) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fadd.s.yaml b/arch/inst/F/fadd.s.yaml index 98a28185fe..8f14e17f42 100644 --- a/arch/inst/F/fadd.s.yaml +++ b/arch/inst/F/fadd.s.yaml @@ -31,6 +31,9 @@ operation(): | RoundingMode mode = rm_to_mode(rm, $encoding); X[fd] = f32_add(X[fs1], X[fs2], mode); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_32b = F_or_X_S(rs1); @@ -51,3 +54,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fclass.s.yaml b/arch/inst/F/fclass.s.yaml index 4e559a1d1e..254928f647 100644 --- a/arch/inst/F/fclass.s.yaml +++ b/arch/inst/F/fclass.s.yaml @@ -74,6 +74,9 @@ operation(): | X[rd] = 1 << 9; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_X = X(rs1); @@ -81,3 +84,5 @@ sail(): | F(rd) = nan_box (rd_val_S); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fcvt.l.s.yaml b/arch/inst/F/fcvt.l.s.yaml index 85e56d0def..29787ae5d6 100644 --- a/arch/inst/F/fcvt.l.s.yaml +++ b/arch/inst/F/fcvt.l.s.yaml @@ -26,6 +26,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -42,3 +45,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fcvt.lu.s.yaml b/arch/inst/F/fcvt.lu.s.yaml index f80fe600a7..ccb8d50a18 100644 --- a/arch/inst/F/fcvt.lu.s.yaml +++ b/arch/inst/F/fcvt.lu.s.yaml @@ -26,6 +26,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -42,3 +45,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fcvt.s.l.yaml b/arch/inst/F/fcvt.s.l.yaml index 2893034c63..07fd03d178 100644 --- a/arch/inst/F/fcvt.s.l.yaml +++ b/arch/inst/F/fcvt.s.l.yaml @@ -26,6 +26,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -42,3 +45,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fcvt.s.lu.yaml b/arch/inst/F/fcvt.s.lu.yaml index 31dbe48712..1153c2bb80 100644 --- a/arch/inst/F/fcvt.s.lu.yaml +++ b/arch/inst/F/fcvt.s.lu.yaml @@ -26,6 +26,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -42,3 +45,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fcvt.s.w.yaml b/arch/inst/F/fcvt.s.w.yaml index f79c946b02..3d4112297f 100644 --- a/arch/inst/F/fcvt.s.w.yaml +++ b/arch/inst/F/fcvt.s.w.yaml @@ -38,6 +38,9 @@ operation(): | X[fd] = i32_to_f32(X[rs1], rounding_mode); mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -54,3 +57,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fcvt.s.wu.yaml b/arch/inst/F/fcvt.s.wu.yaml index a0474330c6..be84b1f8df 100644 --- a/arch/inst/F/fcvt.s.wu.yaml +++ b/arch/inst/F/fcvt.s.wu.yaml @@ -37,6 +37,9 @@ operation(): | RoundingMode rounding_mode = rm_to_mode(rm, $encoding); X[fd] = ui32_to_f32(X[rs1], rounding_mode); mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -53,3 +56,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fcvt.w.s.yaml b/arch/inst/F/fcvt.w.s.yaml index 9921dd935a..ebd7c57e28 100644 --- a/arch/inst/F/fcvt.w.s.yaml +++ b/arch/inst/F/fcvt.w.s.yaml @@ -79,6 +79,9 @@ operation(): | X[rd] = softfloat_roundToI32( sign, sig64, rounding_mode ); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -95,3 +98,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fcvt.wu.s.yaml b/arch/inst/F/fcvt.wu.s.yaml index 6dc4667bc3..60588caf32 100644 --- a/arch/inst/F/fcvt.wu.s.yaml +++ b/arch/inst/F/fcvt.wu.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -41,3 +44,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fdiv.s.yaml b/arch/inst/F/fdiv.s.yaml index 297533cb99..7690bcbe92 100644 --- a/arch/inst/F/fdiv.s.yaml +++ b/arch/inst/F/fdiv.s.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_32b = F_or_X_S(rs1); @@ -47,3 +50,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/feq.s.yaml b/arch/inst/F/feq.s.yaml index c278a79185..11fc506b7c 100644 --- a/arch/inst/F/feq.s.yaml +++ b/arch/inst/F/feq.s.yaml @@ -46,6 +46,9 @@ operation(): | ) ? 1 : 0; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_or_X_S(rs1); @@ -58,3 +61,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fle.s.yaml b/arch/inst/F/fle.s.yaml index 12043cddbf..f03080022c 100644 --- a/arch/inst/F/fle.s.yaml +++ b/arch/inst/F/fle.s.yaml @@ -47,6 +47,9 @@ operation(): | ) ? 1 : 0; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_or_X_S(rs1); @@ -59,3 +62,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fleq.s.yaml b/arch/inst/F/fleq.s.yaml index 63ecf58c9e..a6b28c150d 100644 --- a/arch/inst/F/fleq.s.yaml +++ b/arch/inst/F/fleq.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_S(rs1); @@ -37,3 +40,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fli.s.yaml b/arch/inst/F/fli.s.yaml index 65838a6ebd..b233195103 100644 --- a/arch/inst/F/fli.s.yaml +++ b/arch/inst/F/fli.s.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let bits : bits(32) = match constantidx { @@ -62,3 +65,5 @@ sail(): | F_S(rd) = bits; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/flt.s.yaml b/arch/inst/F/flt.s.yaml index 468aa9d4fa..c9cf50f015 100644 --- a/arch/inst/F/flt.s.yaml +++ b/arch/inst/F/flt.s.yaml @@ -47,6 +47,9 @@ operation(): | X[rd] = a_lt_b ? 1 : 0; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_or_X_S(rs1); @@ -59,3 +62,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fltq.s.yaml b/arch/inst/F/fltq.s.yaml index dce9f1f329..52f72c5f37 100644 --- a/arch/inst/F/fltq.s.yaml +++ b/arch/inst/F/fltq.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_S(rs1); @@ -37,3 +40,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/flw.yaml b/arch/inst/F/flw.yaml index 948394d82b..09df8457b7 100644 --- a/arch/inst/F/flw.yaml +++ b/arch/inst/F/flw.yaml @@ -41,6 +41,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -69,3 +72,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fmadd.s.yaml b/arch/inst/F/fmadd.s.yaml index 84b8138007..b66531cb4c 100644 --- a/arch/inst/F/fmadd.s.yaml +++ b/arch/inst/F/fmadd.s.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_32b = F_or_X_S(rs1); @@ -51,3 +54,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fmax.s.yaml b/arch/inst/F/fmax.s.yaml index 4836edacb2..f29a9ddfbf 100644 --- a/arch/inst/F/fmax.s.yaml +++ b/arch/inst/F/fmax.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_or_X_S(rs1); @@ -37,3 +40,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fmaxm.s.yaml b/arch/inst/F/fmaxm.s.yaml index 111082155c..0fe80fd495 100644 --- a/arch/inst/F/fmaxm.s.yaml +++ b/arch/inst/F/fmaxm.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_S(rs1); @@ -43,3 +46,5 @@ sail(): | F_S(rd) = rd_val_S; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fmin.s.yaml b/arch/inst/F/fmin.s.yaml index fa278a102f..8c391b12ab 100644 --- a/arch/inst/F/fmin.s.yaml +++ b/arch/inst/F/fmin.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_or_X_S(rs1); @@ -37,3 +40,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fminm.s.yaml b/arch/inst/F/fminm.s.yaml index 2b058ae091..c9d16360da 100644 --- a/arch/inst/F/fminm.s.yaml +++ b/arch/inst/F/fminm.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_S(rs1); @@ -43,3 +46,5 @@ sail(): | F_S(rd) = rd_val_S; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fmsub.s.yaml b/arch/inst/F/fmsub.s.yaml index a363361903..8a06c83b1a 100644 --- a/arch/inst/F/fmsub.s.yaml +++ b/arch/inst/F/fmsub.s.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_32b = F_or_X_S(rs1); @@ -51,3 +54,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fmul.s.yaml b/arch/inst/F/fmul.s.yaml index d64c434d79..3c8a55581a 100644 --- a/arch/inst/F/fmul.s.yaml +++ b/arch/inst/F/fmul.s.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_32b = F_or_X_S(rs1); @@ -47,3 +50,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fmv.w.x.yaml b/arch/inst/F/fmv.w.x.yaml index a3cbe3a5c7..f6c952df73 100644 --- a/arch/inst/F/fmv.w.x.yaml +++ b/arch/inst/F/fmv.w.x.yaml @@ -37,6 +37,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_X = X(rs1); @@ -44,3 +47,5 @@ sail(): | F(rd) = nan_box (rd_val_S); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fmv.x.w.yaml b/arch/inst/F/fmv.x.w.yaml index 353ac0f9d9..7df16991b1 100644 --- a/arch/inst/F/fmv.x.w.yaml +++ b/arch/inst/F/fmv.x.w.yaml @@ -31,6 +31,9 @@ operation(): | X[rd] = sext(f[fs1][31:0], 32); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_X = X(rs1); @@ -38,3 +41,5 @@ sail(): | F(rd) = nan_box (rd_val_S); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fnmadd.s.yaml b/arch/inst/F/fnmadd.s.yaml index b18f8c6fb5..0b2e3c6920 100644 --- a/arch/inst/F/fnmadd.s.yaml +++ b/arch/inst/F/fnmadd.s.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_32b = F_or_X_S(rs1); @@ -51,3 +54,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fnmsub.s.yaml b/arch/inst/F/fnmsub.s.yaml index ee988c4563..2251b78942 100644 --- a/arch/inst/F/fnmsub.s.yaml +++ b/arch/inst/F/fnmsub.s.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_32b = F_or_X_S(rs1); @@ -51,3 +54,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fround.s.yaml b/arch/inst/F/fround.s.yaml index 813b35f8c5..82f9ab6b91 100644 --- a/arch/inst/F/fround.s.yaml +++ b/arch/inst/F/fround.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_S(rs1); @@ -41,3 +44,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/froundnx.s.yaml b/arch/inst/F/froundnx.s.yaml index 7e46a90ec7..d57421234b 100644 --- a/arch/inst/F/froundnx.s.yaml +++ b/arch/inst/F/froundnx.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_S(rs1); @@ -41,3 +44,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fsgnj.s.yaml b/arch/inst/F/fsgnj.s.yaml index 65e1322470..d01b1daed6 100644 --- a/arch/inst/F/fsgnj.s.yaml +++ b/arch/inst/F/fsgnj.s.yaml @@ -43,6 +43,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_or_X_S(rs1); @@ -55,3 +58,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fsgnjn.s.yaml b/arch/inst/F/fsgnjn.s.yaml index d39200cd61..63ba98d010 100644 --- a/arch/inst/F/fsgnjn.s.yaml +++ b/arch/inst/F/fsgnjn.s.yaml @@ -42,6 +42,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_or_X_S(rs1); @@ -54,3 +57,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fsgnjx.s.yaml b/arch/inst/F/fsgnjx.s.yaml index 50d0f3ef25..f5b68d5b05 100644 --- a/arch/inst/F/fsgnjx.s.yaml +++ b/arch/inst/F/fsgnjx.s.yaml @@ -41,6 +41,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_S = F_or_X_S(rs1); @@ -53,3 +56,5 @@ sail(): | X(rd) = zero_extend(bool_to_bits(rd_val)); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fsqrt.s.yaml b/arch/inst/F/fsqrt.s.yaml index 939cdbac8d..a565280a6e 100644 --- a/arch/inst/F/fsqrt.s.yaml +++ b/arch/inst/F/fsqrt.s.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -41,3 +44,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fsub.s.yaml b/arch/inst/F/fsub.s.yaml index 905c1a6b7e..9f1539e5e9 100644 --- a/arch/inst/F/fsub.s.yaml +++ b/arch/inst/F/fsub.s.yaml @@ -30,6 +30,9 @@ operation(): | check_f_ok($encoding); RoundingMode mode = rm_to_mode(rm, $encoding); X[fd] = f32_sub(X[fs1], X[fs2], mode); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_32b = F_or_X_S(rs1); @@ -50,3 +53,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/F/fsw.yaml b/arch/inst/F/fsw.yaml index 47745eefb6..cce2de6680 100644 --- a/arch/inst/F/fsw.yaml +++ b/arch/inst/F/fsw.yaml @@ -33,6 +33,9 @@ operation(): | write_memory<32>(virtual_address, f[fs2][31:0], $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -71,3 +74,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/add.yaml b/arch/inst/I/add.yaml index 7ae35fc3d6..7e4c4c14a8 100644 --- a/arch/inst/I/add.yaml +++ b/arch/inst/I/add.yaml @@ -26,6 +26,9 @@ access: data_independent_timing: true operation(): X[xd] = X[xs1] + X[xs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -51,3 +54,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/addi.yaml b/arch/inst/I/addi.yaml index 259a8f5d10..97b240dcd2 100644 --- a/arch/inst/I/addi.yaml +++ b/arch/inst/I/addi.yaml @@ -24,6 +24,9 @@ access: data_independent_timing: true operation(): X[xd] = X[xs1] + $signed(imm); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -39,3 +42,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/addiw.yaml b/arch/inst/I/addiw.yaml index 8427667ffd..6b896b1789 100644 --- a/arch/inst/I/addiw.yaml +++ b/arch/inst/I/addiw.yaml @@ -27,9 +27,14 @@ operation(): | XReg operand = sext(X[xs1], 31); X[xd] = sext(operand + imm, 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let result : xlenbits = sign_extend(imm) + X(xs1); X(xd) = sign_extend(result[31..0]); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/addw.yaml b/arch/inst/I/addw.yaml index 0bed9a386e..e3aeb31f5e 100644 --- a/arch/inst/I/addw.yaml +++ b/arch/inst/I/addw.yaml @@ -30,6 +30,9 @@ operation(): | XReg operand2 = sext(X[xs2], 31); X[xd] = sext(operand1 + operand2, 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = (X(xs1))[31..0]; @@ -44,3 +47,5 @@ sail(): | X(xd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/and.yaml b/arch/inst/I/and.yaml index e61a096346..5a708db716 100644 --- a/arch/inst/I/and.yaml +++ b/arch/inst/I/and.yaml @@ -24,6 +24,9 @@ access: data_independent_timing: true operation(): X[xd] = X[xs1] & X[xs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -49,3 +52,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/andi.yaml b/arch/inst/I/andi.yaml index d4fbf18d44..72f8b4d3d2 100644 --- a/arch/inst/I/andi.yaml +++ b/arch/inst/I/andi.yaml @@ -24,6 +24,9 @@ access: data_independent_timing: true operation(): X[xd] = X[xs1] & $signed(imm); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -39,3 +42,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/auipc.yaml b/arch/inst/I/auipc.yaml index a461f09d82..345696813d 100644 --- a/arch/inst/I/auipc.yaml +++ b/arch/inst/I/auipc.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: true operation(): X[xd] = $pc + $signed(imm); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let off : xlenbits = sign_extend(imm @ 0x000); @@ -35,3 +38,5 @@ sail(): | X(xd) = ret; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/beq.yaml b/arch/inst/I/beq.yaml index b736a1b3eb..b2f0efdf28 100644 --- a/arch/inst/I/beq.yaml +++ b/arch/inst/I/beq.yaml @@ -34,6 +34,9 @@ operation(): | jump_halfword($pc + $signed(imm)); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -66,3 +69,5 @@ sail(): | } } else RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/bge.yaml b/arch/inst/I/bge.yaml index a19cedd692..69cf1b2c44 100644 --- a/arch/inst/I/bge.yaml +++ b/arch/inst/I/bge.yaml @@ -34,6 +34,9 @@ operation(): | jump_halfword($pc + $signed(imm)); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -66,3 +69,5 @@ sail(): | } } else RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/bgeu.yaml b/arch/inst/I/bgeu.yaml index 9a4583a988..f9362e3eb9 100644 --- a/arch/inst/I/bgeu.yaml +++ b/arch/inst/I/bgeu.yaml @@ -34,6 +34,9 @@ operation(): | jump_halfword($pc + $signed(imm)); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -66,3 +69,5 @@ sail(): | } } else RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/blt.yaml b/arch/inst/I/blt.yaml index a6898ede89..5e8783ccc2 100644 --- a/arch/inst/I/blt.yaml +++ b/arch/inst/I/blt.yaml @@ -34,6 +34,9 @@ operation(): | jump_halfword($pc + $signed(imm)); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -66,3 +69,5 @@ sail(): | } } else RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/bltu.yaml b/arch/inst/I/bltu.yaml index a379a838cf..9f5ecd2d1c 100644 --- a/arch/inst/I/bltu.yaml +++ b/arch/inst/I/bltu.yaml @@ -34,6 +34,9 @@ operation(): | jump_halfword($pc + $signed(imm)); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -66,3 +69,5 @@ sail(): | } } else RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/bne.yaml b/arch/inst/I/bne.yaml index 8abd75137e..6511c2de22 100644 --- a/arch/inst/I/bne.yaml +++ b/arch/inst/I/bne.yaml @@ -34,6 +34,9 @@ operation(): | jump_halfword($pc + $signed(imm)); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -66,3 +69,5 @@ sail(): | } } else RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/ebreak.yaml b/arch/inst/I/ebreak.yaml index 92155a62f7..5bce59bdf5 100644 --- a/arch/inst/I/ebreak.yaml +++ b/arch/inst/I/ebreak.yaml @@ -33,8 +33,13 @@ operation(): | eei_ebreak(); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { handle_mem_exception(PC, E_Breakpoint()); RETIRE_FAIL } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/ecall.yaml b/arch/inst/I/ecall.yaml index 1c78c49674..e516c804f4 100644 --- a/arch/inst/I/ecall.yaml +++ b/arch/inst/I/ecall.yaml @@ -56,6 +56,9 @@ operation(): | } } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let t : sync_exception = @@ -69,3 +72,5 @@ sail(): | set_next_pc(exception_handler(cur_privilege, CTL_TRAP(t), PC)); RETIRE_FAIL } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/fence.yaml b/arch/inst/I/fence.yaml index a0b04aa089..5fd4f5de7c 100644 --- a/arch/inst/I/fence.yaml +++ b/arch/inst/I/fence.yaml @@ -208,6 +208,9 @@ pseudoinstructions: - when: (pred == 1) && (succ == 0) && (fm == 0) && (xd == 0) && (xs1 == 0) to: pause +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { // If the FIOM bit in menvcfg/senvcfg is set then the I/O bits can imply R/W. @@ -234,3 +237,5 @@ sail(): | }; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/jal.yaml b/arch/inst/I/jal.yaml index d853009db6..bc134879be 100644 --- a/arch/inst/I/jal.yaml +++ b/arch/inst/I/jal.yaml @@ -29,6 +29,9 @@ operation(): | jump_halfword($pc + $signed(imm)); X[xd] = retrun_addr; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let t : xlenbits = PC + sign_extend(imm); @@ -52,3 +55,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/jalr.yaml b/arch/inst/I/jalr.yaml index c12fe0881f..c43842d0c7 100644 --- a/arch/inst/I/jalr.yaml +++ b/arch/inst/I/jalr.yaml @@ -32,6 +32,9 @@ operation(): | jump((X[xs1] + $signed(imm)) & ~XLEN'1); X[xd] = returnaddr; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { /* For the sequential model, the memory-model definition doesn't work directly @@ -60,3 +63,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/lb.yaml b/arch/inst/I/lb.yaml index ce3ea1a077..550b0c8857 100644 --- a/arch/inst/I/lb.yaml +++ b/arch/inst/I/lb.yaml @@ -29,6 +29,9 @@ operation(): | X[xd] = sext(read_memory<8>(virtual_address, $encoding), 8); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -56,3 +59,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/lbu.yaml b/arch/inst/I/lbu.yaml index c13926511d..e1418daac0 100644 --- a/arch/inst/I/lbu.yaml +++ b/arch/inst/I/lbu.yaml @@ -29,6 +29,9 @@ operation(): | X[xd] = read_memory<8>(virtual_address, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -56,3 +59,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/ld.yaml b/arch/inst/I/ld.yaml index 0a73f77ac8..fe09662acc 100644 --- a/arch/inst/I/ld.yaml +++ b/arch/inst/I/ld.yaml @@ -29,6 +29,9 @@ operation(): | X[xd] = read_memory<64>(virtual_address, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -56,3 +59,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/lh.yaml b/arch/inst/I/lh.yaml index 24e7879381..15d9763666 100644 --- a/arch/inst/I/lh.yaml +++ b/arch/inst/I/lh.yaml @@ -29,6 +29,9 @@ operation(): | X[xd] = sext(read_memory<16>(virtual_address, $encoding), 16); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -56,3 +59,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/lhu.yaml b/arch/inst/I/lhu.yaml index a670098b35..a83faeb558 100644 --- a/arch/inst/I/lhu.yaml +++ b/arch/inst/I/lhu.yaml @@ -29,6 +29,9 @@ operation(): | X[xd] = read_memory<16>(virtual_address, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -56,3 +59,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/lui.yaml b/arch/inst/I/lui.yaml index 93610f42a2..ec2f5a2de5 100644 --- a/arch/inst/I/lui.yaml +++ b/arch/inst/I/lui.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: true operation(): X[xd] = imm; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let off : xlenbits = sign_extend(imm @ 0x000); @@ -33,3 +36,5 @@ sail(): | X(xd) = ret; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/lw.yaml b/arch/inst/I/lw.yaml index 7ffd96206e..f2f4364bf5 100644 --- a/arch/inst/I/lw.yaml +++ b/arch/inst/I/lw.yaml @@ -29,6 +29,9 @@ operation(): | X[xd] = $signed(read_memory<32>(virtual_address, $encoding)); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -56,3 +59,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/lwu.yaml b/arch/inst/I/lwu.yaml index 4b7c60859a..6eb69dff21 100644 --- a/arch/inst/I/lwu.yaml +++ b/arch/inst/I/lwu.yaml @@ -30,6 +30,9 @@ operation(): | X[xd] = read_memory<32>(virtual_address, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -57,3 +60,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/mret.yaml b/arch/inst/I/mret.yaml index f22c58bb49..5e4bd60407 100644 --- a/arch/inst/I/mret.yaml +++ b/arch/inst/I/mret.yaml @@ -29,6 +29,9 @@ operation(): | CSR[mstatus].MPP = implemented?(ExtensionName::U) ? 2'b00 : 2'b11; $pc = $bits(CSR[mepc]); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if cur_privilege != Machine @@ -40,3 +43,5 @@ sail(): | RETIRE_SUCCESS } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/or.yaml b/arch/inst/I/or.yaml index 2957c4252f..2e9de2d408 100644 --- a/arch/inst/I/or.yaml +++ b/arch/inst/I/or.yaml @@ -24,6 +24,9 @@ access: data_independent_timing: true operation(): X[xd] = X[xs1] | X[xs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -49,3 +52,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/ori.yaml b/arch/inst/I/ori.yaml index b4e76762b8..14cb951b06 100644 --- a/arch/inst/I/ori.yaml +++ b/arch/inst/I/ori.yaml @@ -49,6 +49,9 @@ pseudoinstructions: - when: (xd == 0) && (imm[4:0] == 3) to: prefetch.w offset +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -64,3 +67,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sb.yaml b/arch/inst/I/sb.yaml index 980ddff09b..dc921ecb5c 100644 --- a/arch/inst/I/sb.yaml +++ b/arch/inst/I/sb.yaml @@ -28,6 +28,9 @@ operation(): | write_memory<8>(virtual_address, X[xs2][7:0], $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -70,3 +73,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sd.yaml b/arch/inst/I/sd.yaml index 7f2b13d221..22494f5703 100644 --- a/arch/inst/I/sd.yaml +++ b/arch/inst/I/sd.yaml @@ -30,6 +30,9 @@ operation(): | write_memory<64>(virtual_address, X[xs2], $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -72,3 +75,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sh.yaml b/arch/inst/I/sh.yaml index 4594779825..d541da47e0 100644 --- a/arch/inst/I/sh.yaml +++ b/arch/inst/I/sh.yaml @@ -28,6 +28,9 @@ operation(): | write_memory<16>(virtual_address, X[xs2][15:0], $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -70,3 +73,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sll.yaml b/arch/inst/I/sll.yaml index fe901e2fee..e51eff743e 100644 --- a/arch/inst/I/sll.yaml +++ b/arch/inst/I/sll.yaml @@ -30,6 +30,9 @@ operation(): | X[xd] = X[xs1] << X[xs2][4:0]; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -55,3 +58,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/slli.yaml b/arch/inst/I/slli.yaml index f55a70eae9..088fe75540 100644 --- a/arch/inst/I/slli.yaml +++ b/arch/inst/I/slli.yaml @@ -36,6 +36,9 @@ operation(): | # shamt is between 0-(XLEN-1) X[xd] = X[xs1] << shamt; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -54,3 +57,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/slliw.yaml b/arch/inst/I/slliw.yaml index bc035f6f0c..1845fd865f 100644 --- a/arch/inst/I/slliw.yaml +++ b/arch/inst/I/slliw.yaml @@ -27,6 +27,9 @@ operation(): | # shamt is between 0-32 X[xd] = sext(X[xs1] << shamt, 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = (X(xs1))[31..0]; @@ -38,3 +41,5 @@ sail(): | X(xd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sllw.yaml b/arch/inst/I/sllw.yaml index b288ee9b2c..db6d1067bd 100644 --- a/arch/inst/I/sllw.yaml +++ b/arch/inst/I/sllw.yaml @@ -26,6 +26,9 @@ access: data_independent_timing: true operation(): X[xd] = sext(X[xs1] << X[xs2][4:0], 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = (X(xs1))[31..0]; @@ -40,3 +43,5 @@ sail(): | X(xd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/slt.yaml b/arch/inst/I/slt.yaml index 4ec55f3234..4532f017a8 100644 --- a/arch/inst/I/slt.yaml +++ b/arch/inst/I/slt.yaml @@ -30,6 +30,9 @@ operation(): | X[xd] = ($signed(src1) < $signed(src2)) ? '1 : '0; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -55,3 +58,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/slti.yaml b/arch/inst/I/slti.yaml index a4a610b8fa..e5db50f167 100644 --- a/arch/inst/I/slti.yaml +++ b/arch/inst/I/slti.yaml @@ -27,6 +27,9 @@ data_independent_timing: true operation(): | X[xd] = ($signed(X[xs1]) < $signed(imm)) ? '1 : '0; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -42,3 +45,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sltiu.yaml b/arch/inst/I/sltiu.yaml index ea48c6c92d..182c71fb77 100644 --- a/arch/inst/I/sltiu.yaml +++ b/arch/inst/I/sltiu.yaml @@ -32,6 +32,9 @@ operation(): | Bits sign_extend_imm = $signed(imm); X[xd] = (X[xs1] < sign_extend_imm) ? 1 : 0; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -47,3 +50,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sltu.yaml b/arch/inst/I/sltu.yaml index a0721b2168..72a858cab0 100644 --- a/arch/inst/I/sltu.yaml +++ b/arch/inst/I/sltu.yaml @@ -27,6 +27,9 @@ data_independent_timing: true operation(): | X[xd] = (X[xs1] < X[xs2]) ? 1 : 0; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -52,3 +55,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sra.yaml b/arch/inst/I/sra.yaml index 66a3f951e3..73d111f953 100644 --- a/arch/inst/I/sra.yaml +++ b/arch/inst/I/sra.yaml @@ -30,6 +30,9 @@ operation(): | X[xd] = X[xs1] >>> X[xs2][4:0]; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -55,3 +58,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/srai.yaml b/arch/inst/I/srai.yaml index 55ac5d7f69..8cb269fc67 100644 --- a/arch/inst/I/srai.yaml +++ b/arch/inst/I/srai.yaml @@ -38,6 +38,9 @@ operation(): | # shamt is between 0-63 X[xd] = X[xs1] >>> shamt; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -56,3 +59,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sraiw.yaml b/arch/inst/I/sraiw.yaml index a93d1d4bca..4cd7c6a176 100644 --- a/arch/inst/I/sraiw.yaml +++ b/arch/inst/I/sraiw.yaml @@ -30,6 +30,9 @@ operation(): | XReg operand = sext(X[xs1], 31); X[xd] = sext(operand >>> shamt, 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = (X(xs1))[31..0]; @@ -41,3 +44,5 @@ sail(): | X(xd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sraw.yaml b/arch/inst/I/sraw.yaml index 5e2529d9ae..0a6ce3fbc9 100644 --- a/arch/inst/I/sraw.yaml +++ b/arch/inst/I/sraw.yaml @@ -29,6 +29,9 @@ operation(): | X[xd] = sext(operand1 >>> X[xs2][4:0], 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = (X(xs1))[31..0]; @@ -43,3 +46,5 @@ sail(): | X(xd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/srl.yaml b/arch/inst/I/srl.yaml index 9eede2f378..e939e9d204 100644 --- a/arch/inst/I/srl.yaml +++ b/arch/inst/I/srl.yaml @@ -30,6 +30,9 @@ operation(): | X[xd] = X[xs1] >> X[xs2][4:0]; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -55,3 +58,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/srli.yaml b/arch/inst/I/srli.yaml index f83bd8059e..955ef125b7 100644 --- a/arch/inst/I/srli.yaml +++ b/arch/inst/I/srli.yaml @@ -35,6 +35,9 @@ operation(): | # shamt is between 0-63 X[xd] = X[xs1] >> shamt; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -53,3 +56,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/srliw.yaml b/arch/inst/I/srliw.yaml index 554559d06d..1cf088b988 100644 --- a/arch/inst/I/srliw.yaml +++ b/arch/inst/I/srliw.yaml @@ -29,6 +29,9 @@ operation(): | X[xd] = sext(operand >> shamt, 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = (X(xs1))[31..0]; @@ -40,3 +43,5 @@ sail(): | X(xd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/srlw.yaml b/arch/inst/I/srlw.yaml index 974a53fdf6..f106ce801f 100644 --- a/arch/inst/I/srlw.yaml +++ b/arch/inst/I/srlw.yaml @@ -26,6 +26,9 @@ access: data_independent_timing: true operation(): X[xd] = sext(X[xs1][31:0] >> X[xs2][4:0], 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = (X(xs1))[31..0]; @@ -40,3 +43,5 @@ sail(): | X(xd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sub.yaml b/arch/inst/I/sub.yaml index eb30a4bfce..370a08f2e3 100644 --- a/arch/inst/I/sub.yaml +++ b/arch/inst/I/sub.yaml @@ -27,6 +27,9 @@ operation(): | XReg t1 = X[xs2]; X[xd] = t0 - t1; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -52,3 +55,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/subw.yaml b/arch/inst/I/subw.yaml index a05518f6b2..980aeed265 100644 --- a/arch/inst/I/subw.yaml +++ b/arch/inst/I/subw.yaml @@ -28,6 +28,9 @@ operation(): | Bits<32> t1 = X[xs2][31:0]; X[xd] = sext(t0 - t1, 31); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = (X(xs1))[31..0]; @@ -42,3 +45,5 @@ sail(): | X(xd) = sign_extend(result); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/sw.yaml b/arch/inst/I/sw.yaml index e40ddfa4f0..f71c169edc 100644 --- a/arch/inst/I/sw.yaml +++ b/arch/inst/I/sw.yaml @@ -28,6 +28,9 @@ operation(): | write_memory<32>(virtual_address, X[xs2][31:0], $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -70,3 +73,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/wfi.yaml b/arch/inst/I/wfi.yaml index 4c05807ee9..b6ab283bfa 100644 --- a/arch/inst/I/wfi.yaml +++ b/arch/inst/I/wfi.yaml @@ -111,6 +111,9 @@ operation(): | # passed, so now do the wait wfi(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | match cur_privilege { Machine => { platform_wfi(); RETIRE_SUCCESS }, @@ -119,3 +122,5 @@ sail(): | else { platform_wfi(); RETIRE_SUCCESS }, User => { handle_illegal(); RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/xor.yaml b/arch/inst/I/xor.yaml index 5b4a30686c..17e9dca97b 100644 --- a/arch/inst/I/xor.yaml +++ b/arch/inst/I/xor.yaml @@ -24,6 +24,9 @@ access: data_independent_timing: true operation(): X[xd] = X[xs1] ^ X[xs2]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -49,3 +52,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/I/xori.yaml b/arch/inst/I/xori.yaml index 032530b3d7..58bf7281d2 100644 --- a/arch/inst/I/xori.yaml +++ b/arch/inst/I/xori.yaml @@ -24,6 +24,9 @@ access: data_independent_timing: true operation(): X[xd] = X[xs1] ^ $signed(imm); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let xs1_val = X(xs1); @@ -39,3 +42,5 @@ sail(): | X(xd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/div.yaml b/arch/inst/M/div.yaml index d48a144a45..53864e0b7f 100644 --- a/arch/inst/M/div.yaml +++ b/arch/inst/M/div.yaml @@ -53,6 +53,9 @@ operation(): | X[rd] = $signed(src1) / $signed(src2); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") then { @@ -70,3 +73,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/divu.yaml b/arch/inst/M/divu.yaml index 71ce0a624a..093ed56ef4 100644 --- a/arch/inst/M/divu.yaml +++ b/arch/inst/M/divu.yaml @@ -42,6 +42,9 @@ operation(): | X[rd] = src1 / src2; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") then { @@ -59,3 +62,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/divuw.yaml b/arch/inst/M/divuw.yaml index aea69c2119..28d2fc273a 100644 --- a/arch/inst/M/divuw.yaml +++ b/arch/inst/M/divuw.yaml @@ -48,6 +48,9 @@ operation(): | X[rd] = {{32{sign_bit}}, result}; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") then { @@ -65,3 +68,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/divw.yaml b/arch/inst/M/divw.yaml index 1f180a746d..574f97da19 100644 --- a/arch/inst/M/divw.yaml +++ b/arch/inst/M/divw.yaml @@ -57,6 +57,9 @@ operation(): | X[rd] = {{32{sign_bit}}, result}; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") then { @@ -74,3 +77,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/mul.yaml b/arch/inst/M/mul.yaml index b4187b3685..51938ee25d 100644 --- a/arch/inst/M/mul.yaml +++ b/arch/inst/M/mul.yaml @@ -45,6 +45,9 @@ operation(): | X[rd] = (src1 * src2)[XLEN-1:0]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") | haveZmmul() then { @@ -63,3 +66,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/mulh.yaml b/arch/inst/M/mulh.yaml index d36c6b79f4..21aa4f385a 100644 --- a/arch/inst/M/mulh.yaml +++ b/arch/inst/M/mulh.yaml @@ -49,6 +49,9 @@ operation(): | # grab the high half of the result, and put it in rd X[rd] = (src1 * src2)[(xlen()*8'd2)-1:xlen()]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") | haveZmmul() then { @@ -67,3 +70,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/mulhsu.yaml b/arch/inst/M/mulhsu.yaml index 7b92c2af5f..250f9ef58d 100644 --- a/arch/inst/M/mulhsu.yaml +++ b/arch/inst/M/mulhsu.yaml @@ -46,6 +46,9 @@ operation(): | X[rd] = (src1 * src2)[(XLEN*8'd2)-1:XLEN]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") | haveZmmul() then { @@ -64,3 +67,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/mulhu.yaml b/arch/inst/M/mulhu.yaml index 123e089cf1..31fa8484c1 100644 --- a/arch/inst/M/mulhu.yaml +++ b/arch/inst/M/mulhu.yaml @@ -45,6 +45,9 @@ operation(): | X[rd] = (src1 * src2)[(XLEN*8'd2)-1:XLEN]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") | haveZmmul() then { @@ -63,3 +66,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/mulw.yaml b/arch/inst/M/mulw.yaml index a839db862a..3059a08d29 100644 --- a/arch/inst/M/mulw.yaml +++ b/arch/inst/M/mulw.yaml @@ -48,6 +48,9 @@ operation(): | # return the sign-extended result X[rd] = {{32{sign_bit}}, result}; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") | haveZmmul() then { @@ -65,3 +68,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/rem.yaml b/arch/inst/M/rem.yaml index acd7006742..8968f95520 100644 --- a/arch/inst/M/rem.yaml +++ b/arch/inst/M/rem.yaml @@ -48,6 +48,9 @@ operation(): | X[rd] = $signed(src1) % $signed(src2); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") then { @@ -64,3 +67,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/remu.yaml b/arch/inst/M/remu.yaml index 0d00d50051..943aace5bf 100644 --- a/arch/inst/M/remu.yaml +++ b/arch/inst/M/remu.yaml @@ -38,6 +38,9 @@ operation(): | X[rd] = src1 % src2; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") then { @@ -54,3 +57,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/remuw.yaml b/arch/inst/M/remuw.yaml index d6eac0d021..01a07c0954 100644 --- a/arch/inst/M/remuw.yaml +++ b/arch/inst/M/remuw.yaml @@ -50,6 +50,9 @@ operation(): | X[rd] = {{32{sign_bit}}, result}; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") then { @@ -66,3 +69,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/M/remw.yaml b/arch/inst/M/remw.yaml index 1418819ec7..cd25b45649 100644 --- a/arch/inst/M/remw.yaml +++ b/arch/inst/M/remw.yaml @@ -55,6 +55,9 @@ operation(): | X[rd] = {{32{sign_bit}}, result}; } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("M") then { @@ -71,3 +74,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/S/sfence.vma.yaml b/arch/inst/S/sfence.vma.yaml index ac877929ac..5443b5e19b 100644 --- a/arch/inst/S/sfence.vma.yaml +++ b/arch/inst/S/sfence.vma.yaml @@ -305,6 +305,9 @@ operation(): | # else, silently do nothing } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let addr : option(xlenbits) = if rs1 == 0b00000 then None() else Some(X(rs1)); @@ -319,3 +322,5 @@ sail(): | Machine => { flush_TLB(asid, addr); RETIRE_SUCCESS } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/S/sret.yaml b/arch/inst/S/sret.yaml index 295f6c73e2..4617657734 100644 --- a/arch/inst/S/sret.yaml +++ b/arch/inst/S/sret.yaml @@ -126,6 +126,9 @@ operation(): | $pc = $bits(CSR[vsepc]); } +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let sret_illegal : bool = match cur_privilege { @@ -142,3 +145,5 @@ sail(): | RETIRE_SUCCESS } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vaadd.vv.yaml b/arch/inst/V/vaadd.vv.yaml index 0b6966fe7f..69faae4185 100644 --- a/arch/inst/V/vaadd.vv.yaml +++ b/arch/inst/V/vaadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vaadd.vx.yaml b/arch/inst/V/vaadd.vx.yaml index 03e13b0d44..d06eccb983 100644 --- a/arch/inst/V/vaadd.vx.yaml +++ b/arch/inst/V/vaadd.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vaaddu.vv.yaml b/arch/inst/V/vaaddu.vv.yaml index 3b9c7562fe..df6a12d3c3 100644 --- a/arch/inst/V/vaaddu.vv.yaml +++ b/arch/inst/V/vaaddu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vaaddu.vx.yaml b/arch/inst/V/vaaddu.vx.yaml index 90164d1ef1..fae01c88e4 100644 --- a/arch/inst/V/vaaddu.vx.yaml +++ b/arch/inst/V/vaaddu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vadc.vim.yaml b/arch/inst/V/vadc.vim.yaml index fe2eefa6c2..2015681e62 100644 --- a/arch/inst/V/vadc.vim.yaml +++ b/arch/inst/V/vadc.vim.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vadc.vvm.yaml b/arch/inst/V/vadc.vvm.yaml index a2049511e6..e4a0adb247 100644 --- a/arch/inst/V/vadc.vvm.yaml +++ b/arch/inst/V/vadc.vvm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -64,3 +67,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vadc.vxm.yaml b/arch/inst/V/vadc.vxm.yaml index b2e2c39789..51335ef3d5 100644 --- a/arch/inst/V/vadc.vxm.yaml +++ b/arch/inst/V/vadc.vxm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -64,3 +67,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vadd.vi.yaml b/arch/inst/V/vadd.vi.yaml index bbfd787ba2..227223295b 100644 --- a/arch/inst/V/vadd.vi.yaml +++ b/arch/inst/V/vadd.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vadd.vv.yaml b/arch/inst/V/vadd.vv.yaml index b44b40a671..d470f37845 100644 --- a/arch/inst/V/vadd.vv.yaml +++ b/arch/inst/V/vadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vadd.vx.yaml b/arch/inst/V/vadd.vx.yaml index 8496de5dbb..052a37f54b 100644 --- a/arch/inst/V/vadd.vx.yaml +++ b/arch/inst/V/vadd.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vand.vi.yaml b/arch/inst/V/vand.vi.yaml index d6916defd1..712f760a1f 100644 --- a/arch/inst/V/vand.vi.yaml +++ b/arch/inst/V/vand.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vand.vv.yaml b/arch/inst/V/vand.vv.yaml index afb8dc2288..6b2d934007 100644 --- a/arch/inst/V/vand.vv.yaml +++ b/arch/inst/V/vand.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vand.vx.yaml b/arch/inst/V/vand.vx.yaml index 6b6318c25e..1c68e8e5e2 100644 --- a/arch/inst/V/vand.vx.yaml +++ b/arch/inst/V/vand.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vasub.vv.yaml b/arch/inst/V/vasub.vv.yaml index 645f2a5894..f07ad253b2 100644 --- a/arch/inst/V/vasub.vv.yaml +++ b/arch/inst/V/vasub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vasub.vx.yaml b/arch/inst/V/vasub.vx.yaml index d7112c4326..a0c2af4876 100644 --- a/arch/inst/V/vasub.vx.yaml +++ b/arch/inst/V/vasub.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vasubu.vv.yaml b/arch/inst/V/vasubu.vv.yaml index c1005068df..9463e05fb3 100644 --- a/arch/inst/V/vasubu.vv.yaml +++ b/arch/inst/V/vasubu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vasubu.vx.yaml b/arch/inst/V/vasubu.vx.yaml index 0b21717cd8..6a456e14bc 100644 --- a/arch/inst/V/vasubu.vx.yaml +++ b/arch/inst/V/vasubu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vcompress.vm.yaml b/arch/inst/V/vcompress.vm.yaml index 84653e204f..e2a97467c9 100644 --- a/arch/inst/V/vcompress.vm.yaml +++ b/arch/inst/V/vcompress.vm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let start_element = get_start_element(); @@ -73,3 +76,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vdiv.vv.yaml b/arch/inst/V/vdiv.vv.yaml index e97abdf49d..f049b456a4 100644 --- a/arch/inst/V/vdiv.vv.yaml +++ b/arch/inst/V/vdiv.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vdiv.vx.yaml b/arch/inst/V/vdiv.vx.yaml index cc006e8a13..6341330ae1 100644 --- a/arch/inst/V/vdiv.vx.yaml +++ b/arch/inst/V/vdiv.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vdivu.vv.yaml b/arch/inst/V/vdivu.vv.yaml index d7b4d8ea43..ef5406be4e 100644 --- a/arch/inst/V/vdivu.vv.yaml +++ b/arch/inst/V/vdivu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vdivu.vx.yaml b/arch/inst/V/vdivu.vx.yaml index cbe3bfe308..edf79065d7 100644 --- a/arch/inst/V/vdivu.vx.yaml +++ b/arch/inst/V/vdivu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfadd.vf.yaml b/arch/inst/V/vfadd.vf.yaml index 5aee28612e..5ec0f04647 100644 --- a/arch/inst/V/vfadd.vf.yaml +++ b/arch/inst/V/vfadd.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfadd.vv.yaml b/arch/inst/V/vfadd.vv.yaml index 156a55057e..018da43b89 100644 --- a/arch/inst/V/vfadd.vv.yaml +++ b/arch/inst/V/vfadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfclass.v.yaml b/arch/inst/V/vfclass.v.yaml index b78b61c397..7f8d344caa 100644 --- a/arch/inst/V/vfclass.v.yaml +++ b/arch/inst/V/vfclass.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -85,3 +88,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfcvt.f.x.v.yaml b/arch/inst/V/vfcvt.f.x.v.yaml index 2a543ff27c..62ee7b7437 100644 --- a/arch/inst/V/vfcvt.f.x.v.yaml +++ b/arch/inst/V/vfcvt.f.x.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -110,3 +113,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfcvt.f.xu.v.yaml b/arch/inst/V/vfcvt.f.xu.v.yaml index 78ae990d5d..a70e209289 100644 --- a/arch/inst/V/vfcvt.f.xu.v.yaml +++ b/arch/inst/V/vfcvt.f.xu.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -110,3 +113,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfcvt.rtz.x.f.v.yaml b/arch/inst/V/vfcvt.rtz.x.f.v.yaml index 1cd3617375..396a4397e2 100644 --- a/arch/inst/V/vfcvt.rtz.x.f.v.yaml +++ b/arch/inst/V/vfcvt.rtz.x.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -110,3 +113,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfcvt.rtz.xu.f.v.yaml b/arch/inst/V/vfcvt.rtz.xu.f.v.yaml index 44c874e151..1cd3332156 100644 --- a/arch/inst/V/vfcvt.rtz.xu.f.v.yaml +++ b/arch/inst/V/vfcvt.rtz.xu.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -110,3 +113,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfcvt.x.f.v.yaml b/arch/inst/V/vfcvt.x.f.v.yaml index 51af8e423f..ba748cf292 100644 --- a/arch/inst/V/vfcvt.x.f.v.yaml +++ b/arch/inst/V/vfcvt.x.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -110,3 +113,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfcvt.xu.f.v.yaml b/arch/inst/V/vfcvt.xu.f.v.yaml index a411ca3752..f8fd0ab0d4 100644 --- a/arch/inst/V/vfcvt.xu.f.v.yaml +++ b/arch/inst/V/vfcvt.xu.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -110,3 +113,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfdiv.vf.yaml b/arch/inst/V/vfdiv.vf.yaml index 2a01a08b64..ace7439122 100644 --- a/arch/inst/V/vfdiv.vf.yaml +++ b/arch/inst/V/vfdiv.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfdiv.vv.yaml b/arch/inst/V/vfdiv.vv.yaml index 756d7b6865..587dc8c284 100644 --- a/arch/inst/V/vfdiv.vv.yaml +++ b/arch/inst/V/vfdiv.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfirst.m.yaml b/arch/inst/V/vfirst.m.yaml index 32dc051c70..6128438ab1 100644 --- a/arch/inst/V/vfirst.m.yaml +++ b/arch/inst/V/vfirst.m.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -54,3 +57,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmacc.vf.yaml b/arch/inst/V/vfmacc.vf.yaml index 9344bec1f2..20bab7f1e0 100644 --- a/arch/inst/V/vfmacc.vf.yaml +++ b/arch/inst/V/vfmacc.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmacc.vv.yaml b/arch/inst/V/vfmacc.vv.yaml index c47710addc..c46ff97dec 100644 --- a/arch/inst/V/vfmacc.vv.yaml +++ b/arch/inst/V/vfmacc.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmadd.vf.yaml b/arch/inst/V/vfmadd.vf.yaml index 11fc3a7fad..de0b73e97b 100644 --- a/arch/inst/V/vfmadd.vf.yaml +++ b/arch/inst/V/vfmadd.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmadd.vv.yaml b/arch/inst/V/vfmadd.vv.yaml index 91364916f0..3a1925ecb1 100644 --- a/arch/inst/V/vfmadd.vv.yaml +++ b/arch/inst/V/vfmadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmax.vf.yaml b/arch/inst/V/vfmax.vf.yaml index e4ce7d1db7..a980703d75 100644 --- a/arch/inst/V/vfmax.vf.yaml +++ b/arch/inst/V/vfmax.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmax.vv.yaml b/arch/inst/V/vfmax.vv.yaml index ade095ba57..aef8ac9b0c 100644 --- a/arch/inst/V/vfmax.vv.yaml +++ b/arch/inst/V/vfmax.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmerge.vfm.yaml b/arch/inst/V/vfmerge.vfm.yaml index 45d2f63d36..e77f8ac2e2 100644 --- a/arch/inst/V/vfmerge.vfm.yaml +++ b/arch/inst/V/vfmerge.vfm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -66,3 +69,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmin.vf.yaml b/arch/inst/V/vfmin.vf.yaml index 49037450c0..46eb79c7a9 100644 --- a/arch/inst/V/vfmin.vf.yaml +++ b/arch/inst/V/vfmin.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmin.vv.yaml b/arch/inst/V/vfmin.vv.yaml index 5ccf624970..5f28934d48 100644 --- a/arch/inst/V/vfmin.vv.yaml +++ b/arch/inst/V/vfmin.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmsac.vf.yaml b/arch/inst/V/vfmsac.vf.yaml index 401febe42d..595b172618 100644 --- a/arch/inst/V/vfmsac.vf.yaml +++ b/arch/inst/V/vfmsac.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmsac.vv.yaml b/arch/inst/V/vfmsac.vv.yaml index 3ff6fb6c0b..395e399d18 100644 --- a/arch/inst/V/vfmsac.vv.yaml +++ b/arch/inst/V/vfmsac.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmsub.vf.yaml b/arch/inst/V/vfmsub.vf.yaml index 9029bbfe4a..6f841edc78 100644 --- a/arch/inst/V/vfmsub.vf.yaml +++ b/arch/inst/V/vfmsub.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmsub.vv.yaml b/arch/inst/V/vfmsub.vv.yaml index 6564812fce..dea9c421fd 100644 --- a/arch/inst/V/vfmsub.vv.yaml +++ b/arch/inst/V/vfmsub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmul.vf.yaml b/arch/inst/V/vfmul.vf.yaml index c12c2b1a4a..45b5d7c3e7 100644 --- a/arch/inst/V/vfmul.vf.yaml +++ b/arch/inst/V/vfmul.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmul.vv.yaml b/arch/inst/V/vfmul.vv.yaml index f4a2fc2404..93e6229dfa 100644 --- a/arch/inst/V/vfmul.vv.yaml +++ b/arch/inst/V/vfmul.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmv.f.s.yaml b/arch/inst/V/vfmv.f.s.yaml index b1107b27ff..6f95a5a9e7 100644 --- a/arch/inst/V/vfmv.f.s.yaml +++ b/arch/inst/V/vfmv.f.s.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -46,3 +49,5 @@ sail(): | RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmv.s.f.yaml b/arch/inst/V/vfmv.s.f.yaml index 37c250ef75..a3039799f7 100644 --- a/arch/inst/V/vfmv.s.f.yaml +++ b/arch/inst/V/vfmv.s.f.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -59,3 +62,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfmv.v.f.yaml b/arch/inst/V/vfmv.v.f.yaml index 28e2405a8f..9a6f8154f6 100644 --- a/arch/inst/V/vfmv.v.f.yaml +++ b/arch/inst/V/vfmv.v.f.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -52,3 +55,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfncvt.f.f.w.yaml b/arch/inst/V/vfncvt.f.f.w.yaml index 6f3779646b..528f6a5423 100644 --- a/arch/inst/V/vfncvt.f.f.w.yaml +++ b/arch/inst/V/vfncvt.f.f.w.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -133,3 +136,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfncvt.f.x.w.yaml b/arch/inst/V/vfncvt.f.x.w.yaml index 0214617241..add96c63fd 100644 --- a/arch/inst/V/vfncvt.f.x.w.yaml +++ b/arch/inst/V/vfncvt.f.x.w.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -133,3 +136,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfncvt.f.xu.w.yaml b/arch/inst/V/vfncvt.f.xu.w.yaml index 46a2663ba8..25b49d8228 100644 --- a/arch/inst/V/vfncvt.f.xu.w.yaml +++ b/arch/inst/V/vfncvt.f.xu.w.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -133,3 +136,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfncvt.rod.f.f.w.yaml b/arch/inst/V/vfncvt.rod.f.f.w.yaml index 02555f003e..6ac2988b4d 100644 --- a/arch/inst/V/vfncvt.rod.f.f.w.yaml +++ b/arch/inst/V/vfncvt.rod.f.f.w.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -133,3 +136,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfncvt.rtz.x.f.w.yaml b/arch/inst/V/vfncvt.rtz.x.f.w.yaml index ebcbdd4b44..3ae529d7e1 100644 --- a/arch/inst/V/vfncvt.rtz.x.f.w.yaml +++ b/arch/inst/V/vfncvt.rtz.x.f.w.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -133,3 +136,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfncvt.rtz.xu.f.w.yaml b/arch/inst/V/vfncvt.rtz.xu.f.w.yaml index 0b3f874d53..a46cfadd29 100644 --- a/arch/inst/V/vfncvt.rtz.xu.f.w.yaml +++ b/arch/inst/V/vfncvt.rtz.xu.f.w.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -133,3 +136,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfncvt.x.f.w.yaml b/arch/inst/V/vfncvt.x.f.w.yaml index f0877ef3f9..b78f4b16e0 100644 --- a/arch/inst/V/vfncvt.x.f.w.yaml +++ b/arch/inst/V/vfncvt.x.f.w.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -133,3 +136,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfncvt.xu.f.w.yaml b/arch/inst/V/vfncvt.xu.f.w.yaml index e0560c4dbf..146d264969 100644 --- a/arch/inst/V/vfncvt.xu.f.w.yaml +++ b/arch/inst/V/vfncvt.xu.f.w.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -133,3 +136,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfnmacc.vf.yaml b/arch/inst/V/vfnmacc.vf.yaml index a4d07f05d2..0c5590b505 100644 --- a/arch/inst/V/vfnmacc.vf.yaml +++ b/arch/inst/V/vfnmacc.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfnmacc.vv.yaml b/arch/inst/V/vfnmacc.vv.yaml index 109d253f26..4a6fbc3957 100644 --- a/arch/inst/V/vfnmacc.vv.yaml +++ b/arch/inst/V/vfnmacc.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfnmadd.vf.yaml b/arch/inst/V/vfnmadd.vf.yaml index 96b4c2cb50..3e8ad5dbcf 100644 --- a/arch/inst/V/vfnmadd.vf.yaml +++ b/arch/inst/V/vfnmadd.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfnmadd.vv.yaml b/arch/inst/V/vfnmadd.vv.yaml index c180cfa5b1..2c11b268c1 100644 --- a/arch/inst/V/vfnmadd.vv.yaml +++ b/arch/inst/V/vfnmadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfnmsac.vf.yaml b/arch/inst/V/vfnmsac.vf.yaml index 77d9b7fd0f..6c6e5e93d1 100644 --- a/arch/inst/V/vfnmsac.vf.yaml +++ b/arch/inst/V/vfnmsac.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfnmsac.vv.yaml b/arch/inst/V/vfnmsac.vv.yaml index 8531bcae51..e4b2884e08 100644 --- a/arch/inst/V/vfnmsac.vv.yaml +++ b/arch/inst/V/vfnmsac.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfnmsub.vf.yaml b/arch/inst/V/vfnmsub.vf.yaml index 61aa40ed2d..1d587f0643 100644 --- a/arch/inst/V/vfnmsub.vf.yaml +++ b/arch/inst/V/vfnmsub.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfnmsub.vv.yaml b/arch/inst/V/vfnmsub.vv.yaml index fb18f34932..3f48bd9732 100644 --- a/arch/inst/V/vfnmsub.vv.yaml +++ b/arch/inst/V/vfnmsub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfrdiv.vf.yaml b/arch/inst/V/vfrdiv.vf.yaml index 2b36ad2c54..1c639143c6 100644 --- a/arch/inst/V/vfrdiv.vf.yaml +++ b/arch/inst/V/vfrdiv.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfrec7.v.yaml b/arch/inst/V/vfrec7.v.yaml index e63995f7ec..aef9a5a037 100644 --- a/arch/inst/V/vfrec7.v.yaml +++ b/arch/inst/V/vfrec7.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -85,3 +88,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfredmax.vs.yaml b/arch/inst/V/vfredmax.vs.yaml index 6473da80f8..a6d15b39b4 100644 --- a/arch/inst/V/vfredmax.vs.yaml +++ b/arch/inst/V/vfredmax.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -38,3 +41,5 @@ sail(): | else process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfredmin.vs.yaml b/arch/inst/V/vfredmin.vs.yaml index 2edeecb2b5..6a4f863a57 100644 --- a/arch/inst/V/vfredmin.vs.yaml +++ b/arch/inst/V/vfredmin.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -38,3 +41,5 @@ sail(): | else process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfredosum.vs.yaml b/arch/inst/V/vfredosum.vs.yaml index 67d6af8322..aaf6388629 100644 --- a/arch/inst/V/vfredosum.vs.yaml +++ b/arch/inst/V/vfredosum.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -38,3 +41,5 @@ sail(): | else process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfredusum.vs.yaml b/arch/inst/V/vfredusum.vs.yaml index a46ab889d3..674ca86377 100644 --- a/arch/inst/V/vfredusum.vs.yaml +++ b/arch/inst/V/vfredusum.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -38,3 +41,5 @@ sail(): | else process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfrsqrt7.v.yaml b/arch/inst/V/vfrsqrt7.v.yaml index 8294f7010f..2fcc5f865a 100644 --- a/arch/inst/V/vfrsqrt7.v.yaml +++ b/arch/inst/V/vfrsqrt7.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -85,3 +88,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfrsub.vf.yaml b/arch/inst/V/vfrsub.vf.yaml index 6f9f524654..c5470e7ca6 100644 --- a/arch/inst/V/vfrsub.vf.yaml +++ b/arch/inst/V/vfrsub.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsgnj.vf.yaml b/arch/inst/V/vfsgnj.vf.yaml index 95f9a0483f..a095a325f5 100644 --- a/arch/inst/V/vfsgnj.vf.yaml +++ b/arch/inst/V/vfsgnj.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsgnj.vv.yaml b/arch/inst/V/vfsgnj.vv.yaml index 58fbf938cc..367a340055 100644 --- a/arch/inst/V/vfsgnj.vv.yaml +++ b/arch/inst/V/vfsgnj.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsgnjn.vf.yaml b/arch/inst/V/vfsgnjn.vf.yaml index 1ebc156010..01ae299dce 100644 --- a/arch/inst/V/vfsgnjn.vf.yaml +++ b/arch/inst/V/vfsgnjn.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsgnjn.vv.yaml b/arch/inst/V/vfsgnjn.vv.yaml index e6a04c9536..b28f4b6b11 100644 --- a/arch/inst/V/vfsgnjn.vv.yaml +++ b/arch/inst/V/vfsgnjn.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsgnjx.vf.yaml b/arch/inst/V/vfsgnjx.vf.yaml index 21860c151f..41e72e9ff0 100644 --- a/arch/inst/V/vfsgnjx.vf.yaml +++ b/arch/inst/V/vfsgnjx.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsgnjx.vv.yaml b/arch/inst/V/vfsgnjx.vv.yaml index 31f6fa429b..f2792c4af5 100644 --- a/arch/inst/V/vfsgnjx.vv.yaml +++ b/arch/inst/V/vfsgnjx.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfslide1down.vf.yaml b/arch/inst/V/vfslide1down.vf.yaml index 988f74f067..c99a45a957 100644 --- a/arch/inst/V/vfslide1down.vf.yaml +++ b/arch/inst/V/vfslide1down.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfslide1up.vf.yaml b/arch/inst/V/vfslide1up.vf.yaml index 2846b287bb..2848b90914 100644 --- a/arch/inst/V/vfslide1up.vf.yaml +++ b/arch/inst/V/vfslide1up.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsqrt.v.yaml b/arch/inst/V/vfsqrt.v.yaml index fad2f602bb..c93dfab430 100644 --- a/arch/inst/V/vfsqrt.v.yaml +++ b/arch/inst/V/vfsqrt.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -85,3 +88,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsub.vf.yaml b/arch/inst/V/vfsub.vf.yaml index 319c49e7f8..0a7b3c0e6f 100644 --- a/arch/inst/V/vfsub.vf.yaml +++ b/arch/inst/V/vfsub.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -80,3 +83,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfsub.vv.yaml b/arch/inst/V/vfsub.vv.yaml index e28ca0eafb..e6ae1358ba 100644 --- a/arch/inst/V/vfsub.vv.yaml +++ b/arch/inst/V/vfsub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwadd.vf.yaml b/arch/inst/V/vfwadd.vf.yaml index 62ee2ff690..355c4408b4 100644 --- a/arch/inst/V/vfwadd.vf.yaml +++ b/arch/inst/V/vfwadd.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwadd.vv.yaml b/arch/inst/V/vfwadd.vv.yaml index af3c01af87..6ceb6d102b 100644 --- a/arch/inst/V/vfwadd.vv.yaml +++ b/arch/inst/V/vfwadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwadd.wf.yaml b/arch/inst/V/vfwadd.wf.yaml index 6e27a8d14e..3b01ad10a3 100644 --- a/arch/inst/V/vfwadd.wf.yaml +++ b/arch/inst/V/vfwadd.wf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -66,3 +69,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwadd.wv.yaml b/arch/inst/V/vfwadd.wv.yaml index a5b5157ae3..d68c0c268c 100644 --- a/arch/inst/V/vfwadd.wv.yaml +++ b/arch/inst/V/vfwadd.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwcvt.f.f.v.yaml b/arch/inst/V/vfwcvt.f.f.v.yaml index c261e3e3c5..5faf7250a2 100644 --- a/arch/inst/V/vfwcvt.f.f.v.yaml +++ b/arch/inst/V/vfwcvt.f.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -125,3 +128,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwcvt.f.x.v.yaml b/arch/inst/V/vfwcvt.f.x.v.yaml index 2ac1e94018..96b22d8d92 100644 --- a/arch/inst/V/vfwcvt.f.x.v.yaml +++ b/arch/inst/V/vfwcvt.f.x.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -125,3 +128,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwcvt.f.xu.v.yaml b/arch/inst/V/vfwcvt.f.xu.v.yaml index 73bde966ce..0f579d65d8 100644 --- a/arch/inst/V/vfwcvt.f.xu.v.yaml +++ b/arch/inst/V/vfwcvt.f.xu.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -125,3 +128,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwcvt.rtz.x.f.v.yaml b/arch/inst/V/vfwcvt.rtz.x.f.v.yaml index cd30932ab0..2521cebde3 100644 --- a/arch/inst/V/vfwcvt.rtz.x.f.v.yaml +++ b/arch/inst/V/vfwcvt.rtz.x.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -125,3 +128,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml b/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml index a828b78e56..e0adf2e22d 100644 --- a/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml +++ b/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -125,3 +128,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwcvt.x.f.v.yaml b/arch/inst/V/vfwcvt.x.f.v.yaml index 4e69948bc8..2322f10539 100644 --- a/arch/inst/V/vfwcvt.x.f.v.yaml +++ b/arch/inst/V/vfwcvt.x.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -125,3 +128,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwcvt.xu.f.v.yaml b/arch/inst/V/vfwcvt.xu.f.v.yaml index a93aef64ef..872ec9ea36 100644 --- a/arch/inst/V/vfwcvt.xu.f.v.yaml +++ b/arch/inst/V/vfwcvt.xu.f.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -125,3 +128,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwmacc.vf.yaml b/arch/inst/V/vfwmacc.vf.yaml index 7baff68b96..0b8a35e5ad 100644 --- a/arch/inst/V/vfwmacc.vf.yaml +++ b/arch/inst/V/vfwmacc.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwmacc.vv.yaml b/arch/inst/V/vfwmacc.vv.yaml index 9e24da41e9..7a4defa34b 100644 --- a/arch/inst/V/vfwmacc.vv.yaml +++ b/arch/inst/V/vfwmacc.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwmsac.vf.yaml b/arch/inst/V/vfwmsac.vf.yaml index e1b5bbab3b..af4ee19930 100644 --- a/arch/inst/V/vfwmsac.vf.yaml +++ b/arch/inst/V/vfwmsac.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwmsac.vv.yaml b/arch/inst/V/vfwmsac.vv.yaml index b2c9e3efda..39b16b2ecb 100644 --- a/arch/inst/V/vfwmsac.vv.yaml +++ b/arch/inst/V/vfwmsac.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwmul.vf.yaml b/arch/inst/V/vfwmul.vf.yaml index fb34150d37..cf18b2be55 100644 --- a/arch/inst/V/vfwmul.vf.yaml +++ b/arch/inst/V/vfwmul.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwmul.vv.yaml b/arch/inst/V/vfwmul.vv.yaml index 874a1c4cf5..a23d0868c6 100644 --- a/arch/inst/V/vfwmul.vv.yaml +++ b/arch/inst/V/vfwmul.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwnmacc.vf.yaml b/arch/inst/V/vfwnmacc.vf.yaml index 0111d351f0..6ea5a04fb6 100644 --- a/arch/inst/V/vfwnmacc.vf.yaml +++ b/arch/inst/V/vfwnmacc.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwnmacc.vv.yaml b/arch/inst/V/vfwnmacc.vv.yaml index 583c885947..804aaced47 100644 --- a/arch/inst/V/vfwnmacc.vv.yaml +++ b/arch/inst/V/vfwnmacc.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwnmsac.vf.yaml b/arch/inst/V/vfwnmsac.vf.yaml index 78dfdb8418..0c62575e9f 100644 --- a/arch/inst/V/vfwnmsac.vf.yaml +++ b/arch/inst/V/vfwnmsac.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwnmsac.vv.yaml b/arch/inst/V/vfwnmsac.vv.yaml index 915aa3aa18..6908f6fbfb 100644 --- a/arch/inst/V/vfwnmsac.vv.yaml +++ b/arch/inst/V/vfwnmsac.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwredosum.vs.yaml b/arch/inst/V/vfwredosum.vs.yaml index 9c8e0d4aa3..61ff9f6309 100644 --- a/arch/inst/V/vfwredosum.vs.yaml +++ b/arch/inst/V/vfwredosum.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -38,3 +41,5 @@ sail(): | else process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwredusum.vs.yaml b/arch/inst/V/vfwredusum.vs.yaml index e04a02d0f4..ef1d433037 100644 --- a/arch/inst/V/vfwredusum.vs.yaml +++ b/arch/inst/V/vfwredusum.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -38,3 +41,5 @@ sail(): | else process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwsub.vf.yaml b/arch/inst/V/vfwsub.vf.yaml index 59a755dc2d..0d3b89d9ef 100644 --- a/arch/inst/V/vfwsub.vf.yaml +++ b/arch/inst/V/vfwsub.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -68,3 +71,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwsub.vv.yaml b/arch/inst/V/vfwsub.vv.yaml index 06e45d8287..bee3f307a9 100644 --- a/arch/inst/V/vfwsub.vv.yaml +++ b/arch/inst/V/vfwsub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwsub.wf.yaml b/arch/inst/V/vfwsub.wf.yaml index 8b49b9772f..57a8fccbdf 100644 --- a/arch/inst/V/vfwsub.wf.yaml +++ b/arch/inst/V/vfwsub.wf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -66,3 +69,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vfwsub.wv.yaml b/arch/inst/V/vfwsub.wv.yaml index 8412d8981f..3087959fd0 100644 --- a/arch/inst/V/vfwsub.wv.yaml +++ b/arch/inst/V/vfwsub.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vid.v.yaml b/arch/inst/V/vid.v.yaml index 509ad1f9ba..bf4a84fd85 100644 --- a/arch/inst/V/vid.v.yaml +++ b/arch/inst/V/vid.v.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -49,3 +52,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/viota.m.yaml b/arch/inst/V/viota.m.yaml index 312dfe959b..3786107309 100644 --- a/arch/inst/V/viota.m.yaml +++ b/arch/inst/V/viota.m.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -57,3 +60,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vle16.v.yaml b/arch/inst/V/vle16.v.yaml index 40884f375d..41a1a7d7f7 100644 --- a/arch/inst/V/vle16.v.yaml +++ b/arch/inst/V/vle16.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vlseg(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vle16ff.v.yaml b/arch/inst/V/vle16ff.v.yaml index ec6f9aa68e..8a2763f2b5 100644 --- a/arch/inst/V/vle16ff.v.yaml +++ b/arch/inst/V/vle16ff.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vlsegff(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vle32.v.yaml b/arch/inst/V/vle32.v.yaml index 15e973e691..7ce544ce40 100644 --- a/arch/inst/V/vle32.v.yaml +++ b/arch/inst/V/vle32.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vlseg(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vle32ff.v.yaml b/arch/inst/V/vle32ff.v.yaml index 1203249193..31649b5a02 100644 --- a/arch/inst/V/vle32ff.v.yaml +++ b/arch/inst/V/vle32ff.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vlsegff(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vle64.v.yaml b/arch/inst/V/vle64.v.yaml index aff28632f0..c66865d664 100644 --- a/arch/inst/V/vle64.v.yaml +++ b/arch/inst/V/vle64.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vlseg(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vle64ff.v.yaml b/arch/inst/V/vle64ff.v.yaml index 421d1bda8f..ae0a874c1b 100644 --- a/arch/inst/V/vle64ff.v.yaml +++ b/arch/inst/V/vle64ff.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vlsegff(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vle8.v.yaml b/arch/inst/V/vle8.v.yaml index 68493ddfdb..6e35500174 100644 --- a/arch/inst/V/vle8.v.yaml +++ b/arch/inst/V/vle8.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vlseg(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vle8ff.v.yaml b/arch/inst/V/vle8ff.v.yaml index 19bfd6824a..3873975cac 100644 --- a/arch/inst/V/vle8ff.v.yaml +++ b/arch/inst/V/vle8ff.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vlsegff(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vlm.v.yaml b/arch/inst/V/vlm.v.yaml index bbcb34dff4..96bbcaabc6 100644 --- a/arch/inst/V/vlm.v.yaml +++ b/arch/inst/V/vlm.v.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW = 8; @@ -36,3 +39,5 @@ sail(): | assert(evl >= 0); process_vm(vd_or_vs3, rs1, num_elem, evl, op) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vloxei16.v.yaml b/arch/inst/V/vloxei16.v.yaml index fbe93e5355..36126b7adb 100644 --- a/arch/inst/V/vloxei16.v.yaml +++ b/arch/inst/V/vloxei16.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 3) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vloxei32.v.yaml b/arch/inst/V/vloxei32.v.yaml index 0bb146ad4d..323acc5bb4 100644 --- a/arch/inst/V/vloxei32.v.yaml +++ b/arch/inst/V/vloxei32.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 3) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vloxei64.v.yaml b/arch/inst/V/vloxei64.v.yaml index 0befceaffb..eb3f9a5321 100644 --- a/arch/inst/V/vloxei64.v.yaml +++ b/arch/inst/V/vloxei64.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 3) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vloxei8.v.yaml b/arch/inst/V/vloxei8.v.yaml index 5a3ff0d66e..92cfed7e1f 100644 --- a/arch/inst/V/vloxei8.v.yaml +++ b/arch/inst/V/vloxei8.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 3) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vlse16.v.yaml b/arch/inst/V/vlse16.v.yaml index 3741a01bd3..f62986ace7 100644 --- a/arch/inst/V/vlse16.v.yaml +++ b/arch/inst/V/vlse16.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -42,3 +45,5 @@ sail(): | process_vlsseg(nf_int, vm, vd, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vlse32.v.yaml b/arch/inst/V/vlse32.v.yaml index 8fee226d4b..8a1ed2a2b2 100644 --- a/arch/inst/V/vlse32.v.yaml +++ b/arch/inst/V/vlse32.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -42,3 +45,5 @@ sail(): | process_vlsseg(nf_int, vm, vd, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vlse64.v.yaml b/arch/inst/V/vlse64.v.yaml index bfb8bf3b49..36ef90e9de 100644 --- a/arch/inst/V/vlse64.v.yaml +++ b/arch/inst/V/vlse64.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -42,3 +45,5 @@ sail(): | process_vlsseg(nf_int, vm, vd, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vlse8.v.yaml b/arch/inst/V/vlse8.v.yaml index 14de61233a..5b05d6161f 100644 --- a/arch/inst/V/vlse8.v.yaml +++ b/arch/inst/V/vlse8.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -42,3 +45,5 @@ sail(): | process_vlsseg(nf_int, vm, vd, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vluxei16.v.yaml b/arch/inst/V/vluxei16.v.yaml index 268991b9eb..d788bf8a6e 100644 --- a/arch/inst/V/vluxei16.v.yaml +++ b/arch/inst/V/vluxei16.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vluxei32.v.yaml b/arch/inst/V/vluxei32.v.yaml index 49e5eb45bc..2bbd6408fa 100644 --- a/arch/inst/V/vluxei32.v.yaml +++ b/arch/inst/V/vluxei32.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vluxei64.v.yaml b/arch/inst/V/vluxei64.v.yaml index 4f9b114fac..645acb4aa0 100644 --- a/arch/inst/V/vluxei64.v.yaml +++ b/arch/inst/V/vluxei64.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vluxei8.v.yaml b/arch/inst/V/vluxei8.v.yaml index fd3c8fd00b..23ee4bde23 100644 --- a/arch/inst/V/vluxei8.v.yaml +++ b/arch/inst/V/vluxei8.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmacc.vv.yaml b/arch/inst/V/vmacc.vv.yaml index 5672d0a629..cdaced1037 100644 --- a/arch/inst/V/vmacc.vv.yaml +++ b/arch/inst/V/vmacc.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -62,3 +65,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmacc.vx.yaml b/arch/inst/V/vmacc.vx.yaml index 567e470f40..cd81f3c977 100644 --- a/arch/inst/V/vmacc.vx.yaml +++ b/arch/inst/V/vmacc.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -62,3 +65,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmadc.vi.yaml b/arch/inst/V/vmadc.vi.yaml index 2805add37d..6908f053e4 100644 --- a/arch/inst/V/vmadc.vi.yaml +++ b/arch/inst/V/vmadc.vi.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -57,3 +60,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmadc.vim.yaml b/arch/inst/V/vmadc.vim.yaml index f28cca0d25..7731f49d00 100644 --- a/arch/inst/V/vmadc.vim.yaml +++ b/arch/inst/V/vmadc.vim.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -58,3 +61,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmadc.vv.yaml b/arch/inst/V/vmadc.vv.yaml index 6cbedeccd1..d9978f66f2 100644 --- a/arch/inst/V/vmadc.vv.yaml +++ b/arch/inst/V/vmadc.vv.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -58,3 +61,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmadc.vvm.yaml b/arch/inst/V/vmadc.vvm.yaml index 48715e4762..cbc1562aa5 100644 --- a/arch/inst/V/vmadc.vvm.yaml +++ b/arch/inst/V/vmadc.vvm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -59,3 +62,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmadc.vx.yaml b/arch/inst/V/vmadc.vx.yaml index 639d677d50..ee6f81ab61 100644 --- a/arch/inst/V/vmadc.vx.yaml +++ b/arch/inst/V/vmadc.vx.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -58,3 +61,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmadc.vxm.yaml b/arch/inst/V/vmadc.vxm.yaml index 8929778305..42d41c9839 100644 --- a/arch/inst/V/vmadc.vxm.yaml +++ b/arch/inst/V/vmadc.vxm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -59,3 +62,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmadd.vv.yaml b/arch/inst/V/vmadd.vv.yaml index 3e1b9742c0..ecdeac55ac 100644 --- a/arch/inst/V/vmadd.vv.yaml +++ b/arch/inst/V/vmadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -62,3 +65,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmadd.vx.yaml b/arch/inst/V/vmadd.vx.yaml index 284c069108..b835e064c9 100644 --- a/arch/inst/V/vmadd.vx.yaml +++ b/arch/inst/V/vmadd.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -62,3 +65,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmand.mm.yaml b/arch/inst/V/vmand.mm.yaml index 12c96c2cd2..421fcd3de9 100644 --- a/arch/inst/V/vmand.mm.yaml +++ b/arch/inst/V/vmand.mm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmax.vv.yaml b/arch/inst/V/vmax.vv.yaml index d280f75e74..9b14cf0c8e 100644 --- a/arch/inst/V/vmax.vv.yaml +++ b/arch/inst/V/vmax.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmax.vx.yaml b/arch/inst/V/vmax.vx.yaml index d46e15dc13..2ef4f40cd4 100644 --- a/arch/inst/V/vmax.vx.yaml +++ b/arch/inst/V/vmax.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmaxu.vv.yaml b/arch/inst/V/vmaxu.vv.yaml index cbda877766..cc5707a97e 100644 --- a/arch/inst/V/vmaxu.vv.yaml +++ b/arch/inst/V/vmaxu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmaxu.vx.yaml b/arch/inst/V/vmaxu.vx.yaml index 11ce724d4a..e1d77afebb 100644 --- a/arch/inst/V/vmaxu.vx.yaml +++ b/arch/inst/V/vmaxu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmerge.vim.yaml b/arch/inst/V/vmerge.vim.yaml index 9cf80d2296..2539c3ae0a 100644 --- a/arch/inst/V/vmerge.vim.yaml +++ b/arch/inst/V/vmerge.vim.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let start_element = get_start_element(); @@ -64,3 +67,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmerge.vvm.yaml b/arch/inst/V/vmerge.vvm.yaml index b697a2f83b..b42b3cddb5 100644 --- a/arch/inst/V/vmerge.vvm.yaml +++ b/arch/inst/V/vmerge.vvm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let start_element = get_start_element(); @@ -64,3 +67,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmerge.vxm.yaml b/arch/inst/V/vmerge.vxm.yaml index fab9487e18..e853fd1b5d 100644 --- a/arch/inst/V/vmerge.vxm.yaml +++ b/arch/inst/V/vmerge.vxm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let start_element = get_start_element(); @@ -64,3 +67,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmfeq.vf.yaml b/arch/inst/V/vmfeq.vf.yaml index 2c95068970..0d121c6a02 100644 --- a/arch/inst/V/vmfeq.vf.yaml +++ b/arch/inst/V/vmfeq.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmfeq.vv.yaml b/arch/inst/V/vmfeq.vv.yaml index 18585c143b..c45987d998 100644 --- a/arch/inst/V/vmfeq.vv.yaml +++ b/arch/inst/V/vmfeq.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmfge.vf.yaml b/arch/inst/V/vmfge.vf.yaml index 02719fdf39..26aa90c316 100644 --- a/arch/inst/V/vmfge.vf.yaml +++ b/arch/inst/V/vmfge.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmfgt.vf.yaml b/arch/inst/V/vmfgt.vf.yaml index 0a59ae4ff3..fe4c39fad7 100644 --- a/arch/inst/V/vmfgt.vf.yaml +++ b/arch/inst/V/vmfgt.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmfle.vf.yaml b/arch/inst/V/vmfle.vf.yaml index c6cf50f93f..8e54532355 100644 --- a/arch/inst/V/vmfle.vf.yaml +++ b/arch/inst/V/vmfle.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmfle.vv.yaml b/arch/inst/V/vmfle.vv.yaml index 13a7a16b06..20274c42e9 100644 --- a/arch/inst/V/vmfle.vv.yaml +++ b/arch/inst/V/vmfle.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmflt.vf.yaml b/arch/inst/V/vmflt.vf.yaml index 805fce9209..04082d4110 100644 --- a/arch/inst/V/vmflt.vf.yaml +++ b/arch/inst/V/vmflt.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmflt.vv.yaml b/arch/inst/V/vmflt.vv.yaml index a5f85749c3..ad40300da4 100644 --- a/arch/inst/V/vmflt.vv.yaml +++ b/arch/inst/V/vmflt.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmfne.vf.yaml b/arch/inst/V/vmfne.vf.yaml index 069bb187c5..2fb76b4ce6 100644 --- a/arch/inst/V/vmfne.vf.yaml +++ b/arch/inst/V/vmfne.vf.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmfne.vv.yaml b/arch/inst/V/vmfne.vv.yaml index 7652613a9f..f9bb73e660 100644 --- a/arch/inst/V/vmfne.vv.yaml +++ b/arch/inst/V/vmfne.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rm_3b = fcsr.FRM(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmin.vv.yaml b/arch/inst/V/vmin.vv.yaml index 1921b1c2e2..f2709e2429 100644 --- a/arch/inst/V/vmin.vv.yaml +++ b/arch/inst/V/vmin.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmin.vx.yaml b/arch/inst/V/vmin.vx.yaml index 5c1688142e..bfc7cf279a 100644 --- a/arch/inst/V/vmin.vx.yaml +++ b/arch/inst/V/vmin.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vminu.vv.yaml b/arch/inst/V/vminu.vv.yaml index 5c8ad591c3..d8b9148cfa 100644 --- a/arch/inst/V/vminu.vv.yaml +++ b/arch/inst/V/vminu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vminu.vx.yaml b/arch/inst/V/vminu.vx.yaml index 5ad49941a0..6a1ce965b3 100644 --- a/arch/inst/V/vminu.vx.yaml +++ b/arch/inst/V/vminu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmnand.mm.yaml b/arch/inst/V/vmnand.mm.yaml index 24ae63b6a0..8df2a59730 100644 --- a/arch/inst/V/vmnand.mm.yaml +++ b/arch/inst/V/vmnand.mm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmnor.mm.yaml b/arch/inst/V/vmnor.mm.yaml index e0aa1d8fdb..ca418ae3b3 100644 --- a/arch/inst/V/vmnor.mm.yaml +++ b/arch/inst/V/vmnor.mm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmor.mm.yaml b/arch/inst/V/vmor.mm.yaml index 6f2c1d91a7..02275bf634 100644 --- a/arch/inst/V/vmor.mm.yaml +++ b/arch/inst/V/vmor.mm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsbc.vv.yaml b/arch/inst/V/vmsbc.vv.yaml index f0002611b0..54353d663b 100644 --- a/arch/inst/V/vmsbc.vv.yaml +++ b/arch/inst/V/vmsbc.vv.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -58,3 +61,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsbc.vvm.yaml b/arch/inst/V/vmsbc.vvm.yaml index 53f82a2503..8b42ab658b 100644 --- a/arch/inst/V/vmsbc.vvm.yaml +++ b/arch/inst/V/vmsbc.vvm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -59,3 +62,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsbc.vx.yaml b/arch/inst/V/vmsbc.vx.yaml index 86ac315ec0..edbef058b9 100644 --- a/arch/inst/V/vmsbc.vx.yaml +++ b/arch/inst/V/vmsbc.vx.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -58,3 +61,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsbc.vxm.yaml b/arch/inst/V/vmsbc.vxm.yaml index 71e0187653..b890b8eaa3 100644 --- a/arch/inst/V/vmsbc.vxm.yaml +++ b/arch/inst/V/vmsbc.vxm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -59,3 +62,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsbf.m.yaml b/arch/inst/V/vmsbf.m.yaml index 9d242a5854..89212fa81a 100644 --- a/arch/inst/V/vmsbf.m.yaml +++ b/arch/inst/V/vmsbf.m.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -57,3 +60,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmseq.vi.yaml b/arch/inst/V/vmseq.vi.yaml index ac5705655f..e45b38ebcd 100644 --- a/arch/inst/V/vmseq.vi.yaml +++ b/arch/inst/V/vmseq.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmseq.vv.yaml b/arch/inst/V/vmseq.vv.yaml index 7e611a1a3a..1aeeb5f98c 100644 --- a/arch/inst/V/vmseq.vv.yaml +++ b/arch/inst/V/vmseq.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmseq.vx.yaml b/arch/inst/V/vmseq.vx.yaml index eff36fb712..4790364b77 100644 --- a/arch/inst/V/vmseq.vx.yaml +++ b/arch/inst/V/vmseq.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsgt.vi.yaml b/arch/inst/V/vmsgt.vi.yaml index 8536d5c107..30be07420d 100644 --- a/arch/inst/V/vmsgt.vi.yaml +++ b/arch/inst/V/vmsgt.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsgt.vx.yaml b/arch/inst/V/vmsgt.vx.yaml index 98e1427e23..a2db49866e 100644 --- a/arch/inst/V/vmsgt.vx.yaml +++ b/arch/inst/V/vmsgt.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsgtu.vi.yaml b/arch/inst/V/vmsgtu.vi.yaml index 52f999cd5d..9ac3cd5076 100644 --- a/arch/inst/V/vmsgtu.vi.yaml +++ b/arch/inst/V/vmsgtu.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsgtu.vx.yaml b/arch/inst/V/vmsgtu.vx.yaml index 44ebb47f69..89ffa9d539 100644 --- a/arch/inst/V/vmsgtu.vx.yaml +++ b/arch/inst/V/vmsgtu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsif.m.yaml b/arch/inst/V/vmsif.m.yaml index 1790f1ef3a..04232b05a7 100644 --- a/arch/inst/V/vmsif.m.yaml +++ b/arch/inst/V/vmsif.m.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -57,3 +60,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsle.vi.yaml b/arch/inst/V/vmsle.vi.yaml index 1901822f62..6126e93c1a 100644 --- a/arch/inst/V/vmsle.vi.yaml +++ b/arch/inst/V/vmsle.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsle.vv.yaml b/arch/inst/V/vmsle.vv.yaml index 7d0cbed761..ca1c3ba9b4 100644 --- a/arch/inst/V/vmsle.vv.yaml +++ b/arch/inst/V/vmsle.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsle.vx.yaml b/arch/inst/V/vmsle.vx.yaml index b6183dd83b..dc5a40ffa0 100644 --- a/arch/inst/V/vmsle.vx.yaml +++ b/arch/inst/V/vmsle.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsleu.vi.yaml b/arch/inst/V/vmsleu.vi.yaml index 8e222c8ee2..9eaf76a619 100644 --- a/arch/inst/V/vmsleu.vi.yaml +++ b/arch/inst/V/vmsleu.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsleu.vv.yaml b/arch/inst/V/vmsleu.vv.yaml index 45635d6030..426fcc770a 100644 --- a/arch/inst/V/vmsleu.vv.yaml +++ b/arch/inst/V/vmsleu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsleu.vx.yaml b/arch/inst/V/vmsleu.vx.yaml index 04d5acc736..176ed8bd65 100644 --- a/arch/inst/V/vmsleu.vx.yaml +++ b/arch/inst/V/vmsleu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmslt.vv.yaml b/arch/inst/V/vmslt.vv.yaml index 82749272f2..3216446513 100644 --- a/arch/inst/V/vmslt.vv.yaml +++ b/arch/inst/V/vmslt.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmslt.vx.yaml b/arch/inst/V/vmslt.vx.yaml index 65b858618b..8891ba2b08 100644 --- a/arch/inst/V/vmslt.vx.yaml +++ b/arch/inst/V/vmslt.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsltu.vv.yaml b/arch/inst/V/vmsltu.vv.yaml index 3b3cec1af8..b9c9032761 100644 --- a/arch/inst/V/vmsltu.vv.yaml +++ b/arch/inst/V/vmsltu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsltu.vx.yaml b/arch/inst/V/vmsltu.vx.yaml index a22e631854..48b473fdda 100644 --- a/arch/inst/V/vmsltu.vx.yaml +++ b/arch/inst/V/vmsltu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsne.vi.yaml b/arch/inst/V/vmsne.vi.yaml index f817fb451b..369db176eb 100644 --- a/arch/inst/V/vmsne.vi.yaml +++ b/arch/inst/V/vmsne.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsne.vv.yaml b/arch/inst/V/vmsne.vv.yaml index 2ac5b85a39..3ea05d0c57 100644 --- a/arch/inst/V/vmsne.vv.yaml +++ b/arch/inst/V/vmsne.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -65,3 +68,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsne.vx.yaml b/arch/inst/V/vmsne.vx.yaml index 826577646a..1d4010be10 100644 --- a/arch/inst/V/vmsne.vx.yaml +++ b/arch/inst/V/vmsne.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmsof.m.yaml b/arch/inst/V/vmsof.m.yaml index da6f3d05ba..ee8a3675eb 100644 --- a/arch/inst/V/vmsof.m.yaml +++ b/arch/inst/V/vmsof.m.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -61,3 +64,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmul.vv.yaml b/arch/inst/V/vmul.vv.yaml index a4210779d8..6d3556c6fa 100644 --- a/arch/inst/V/vmul.vv.yaml +++ b/arch/inst/V/vmul.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmul.vx.yaml b/arch/inst/V/vmul.vx.yaml index 310e32ebda..e7fb5b8e25 100644 --- a/arch/inst/V/vmul.vx.yaml +++ b/arch/inst/V/vmul.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmulh.vv.yaml b/arch/inst/V/vmulh.vv.yaml index 53e4b0cdfe..905d4a2c65 100644 --- a/arch/inst/V/vmulh.vv.yaml +++ b/arch/inst/V/vmulh.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmulh.vx.yaml b/arch/inst/V/vmulh.vx.yaml index b3303e0b9a..6344ef5504 100644 --- a/arch/inst/V/vmulh.vx.yaml +++ b/arch/inst/V/vmulh.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmulhsu.vv.yaml b/arch/inst/V/vmulhsu.vv.yaml index 5b86934be4..d168537849 100644 --- a/arch/inst/V/vmulhsu.vv.yaml +++ b/arch/inst/V/vmulhsu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmulhsu.vx.yaml b/arch/inst/V/vmulhsu.vx.yaml index 133fc39f24..32b2a7ff75 100644 --- a/arch/inst/V/vmulhsu.vx.yaml +++ b/arch/inst/V/vmulhsu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmulhu.vv.yaml b/arch/inst/V/vmulhu.vv.yaml index c52e92b956..ea8c1440d7 100644 --- a/arch/inst/V/vmulhu.vv.yaml +++ b/arch/inst/V/vmulhu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmulhu.vx.yaml b/arch/inst/V/vmulhu.vx.yaml index 8997d372f4..a2a2c6181f 100644 --- a/arch/inst/V/vmulhu.vx.yaml +++ b/arch/inst/V/vmulhu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv.s.x.yaml b/arch/inst/V/vmv.s.x.yaml index 668b3eac6f..c6a0ae4d05 100644 --- a/arch/inst/V/vmv.s.x.yaml +++ b/arch/inst/V/vmv.s.x.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -58,3 +61,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv.v.i.yaml b/arch/inst/V/vmv.v.i.yaml index 94adc6c7d0..b674898da1 100644 --- a/arch/inst/V/vmv.v.i.yaml +++ b/arch/inst/V/vmv.v.i.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -50,3 +53,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv.v.v.yaml b/arch/inst/V/vmv.v.v.yaml index bd4775fc56..34e806dcee 100644 --- a/arch/inst/V/vmv.v.v.yaml +++ b/arch/inst/V/vmv.v.v.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -50,3 +53,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv.v.x.yaml b/arch/inst/V/vmv.v.x.yaml index 7ddc9569e7..aec2f593d3 100644 --- a/arch/inst/V/vmv.v.x.yaml +++ b/arch/inst/V/vmv.v.x.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -50,3 +53,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv.x.s.yaml b/arch/inst/V/vmv.x.s.yaml index ae424d3dd4..8f6a1240b8 100644 --- a/arch/inst/V/vmv.x.s.yaml +++ b/arch/inst/V/vmv.x.s.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -42,3 +45,5 @@ sail(): | RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv1r.v.yaml b/arch/inst/V/vmv1r.v.yaml index e6be91c909..4fd9c9d4c0 100644 --- a/arch/inst/V/vmv1r.v.yaml +++ b/arch/inst/V/vmv1r.v.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let start_element = get_start_element(); @@ -50,3 +53,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv2r.v.yaml b/arch/inst/V/vmv2r.v.yaml index 98de56eb60..7431ef99a7 100644 --- a/arch/inst/V/vmv2r.v.yaml +++ b/arch/inst/V/vmv2r.v.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let start_element = get_start_element(); @@ -50,3 +53,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv4r.v.yaml b/arch/inst/V/vmv4r.v.yaml index 525b1e7360..bf8345cfe4 100644 --- a/arch/inst/V/vmv4r.v.yaml +++ b/arch/inst/V/vmv4r.v.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let start_element = get_start_element(); @@ -50,3 +53,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmv8r.v.yaml b/arch/inst/V/vmv8r.v.yaml index d2b6fe8ba7..b07fcbc465 100644 --- a/arch/inst/V/vmv8r.v.yaml +++ b/arch/inst/V/vmv8r.v.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let start_element = get_start_element(); @@ -50,3 +53,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmxnor.mm.yaml b/arch/inst/V/vmxnor.mm.yaml index 426539a0a6..9ba0dd874d 100644 --- a/arch/inst/V/vmxnor.mm.yaml +++ b/arch/inst/V/vmxnor.mm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vmxor.mm.yaml b/arch/inst/V/vmxor.mm.yaml index 1e035d0ad5..356b99aa9b 100644 --- a/arch/inst/V/vmxor.mm.yaml +++ b/arch/inst/V/vmxor.mm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnclip.wi.yaml b/arch/inst/V/vnclip.wi.yaml index 9effdbccdf..fdacf5691d 100644 --- a/arch/inst/V/vnclip.wi.yaml +++ b/arch/inst/V/vnclip.wi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnclip.wv.yaml b/arch/inst/V/vnclip.wv.yaml index bdb5b51274..7c36cabe2c 100644 --- a/arch/inst/V/vnclip.wv.yaml +++ b/arch/inst/V/vnclip.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnclip.wx.yaml b/arch/inst/V/vnclip.wx.yaml index ade93bcf00..0d76a3975c 100644 --- a/arch/inst/V/vnclip.wx.yaml +++ b/arch/inst/V/vnclip.wx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnclipu.wi.yaml b/arch/inst/V/vnclipu.wi.yaml index 8ff4cfea1e..2fadc261a5 100644 --- a/arch/inst/V/vnclipu.wi.yaml +++ b/arch/inst/V/vnclipu.wi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnclipu.wv.yaml b/arch/inst/V/vnclipu.wv.yaml index 286cb1705d..1d20cbf52d 100644 --- a/arch/inst/V/vnclipu.wv.yaml +++ b/arch/inst/V/vnclipu.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnclipu.wx.yaml b/arch/inst/V/vnclipu.wx.yaml index f25012a8b4..869bb51e9e 100644 --- a/arch/inst/V/vnclipu.wx.yaml +++ b/arch/inst/V/vnclipu.wx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnmsac.vv.yaml b/arch/inst/V/vnmsac.vv.yaml index cc878e7d3c..888ddc1cdb 100644 --- a/arch/inst/V/vnmsac.vv.yaml +++ b/arch/inst/V/vnmsac.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -62,3 +65,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnmsac.vx.yaml b/arch/inst/V/vnmsac.vx.yaml index 17ae1f83a2..e7330688fe 100644 --- a/arch/inst/V/vnmsac.vx.yaml +++ b/arch/inst/V/vnmsac.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -62,3 +65,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnmsub.vv.yaml b/arch/inst/V/vnmsub.vv.yaml index 57c1ac53c6..d4428b7cf0 100644 --- a/arch/inst/V/vnmsub.vv.yaml +++ b/arch/inst/V/vnmsub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -62,3 +65,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnmsub.vx.yaml b/arch/inst/V/vnmsub.vx.yaml index 49bb3f4b35..51d198a560 100644 --- a/arch/inst/V/vnmsub.vx.yaml +++ b/arch/inst/V/vnmsub.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -62,3 +65,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnsra.wi.yaml b/arch/inst/V/vnsra.wi.yaml index dd25b26458..f2fb7ced79 100644 --- a/arch/inst/V/vnsra.wi.yaml +++ b/arch/inst/V/vnsra.wi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -74,3 +77,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnsra.wv.yaml b/arch/inst/V/vnsra.wv.yaml index e016d2fef2..1b0f0d8a9e 100644 --- a/arch/inst/V/vnsra.wv.yaml +++ b/arch/inst/V/vnsra.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -74,3 +77,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnsra.wx.yaml b/arch/inst/V/vnsra.wx.yaml index 663fbca1a6..a0866cf378 100644 --- a/arch/inst/V/vnsra.wx.yaml +++ b/arch/inst/V/vnsra.wx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -74,3 +77,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnsrl.wi.yaml b/arch/inst/V/vnsrl.wi.yaml index a46b6644bf..9636d09a6a 100644 --- a/arch/inst/V/vnsrl.wi.yaml +++ b/arch/inst/V/vnsrl.wi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -74,3 +77,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnsrl.wv.yaml b/arch/inst/V/vnsrl.wv.yaml index 1822c68f80..87be5cb268 100644 --- a/arch/inst/V/vnsrl.wv.yaml +++ b/arch/inst/V/vnsrl.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -74,3 +77,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vnsrl.wx.yaml b/arch/inst/V/vnsrl.wx.yaml index 2a65a17df0..9e87278547 100644 --- a/arch/inst/V/vnsrl.wx.yaml +++ b/arch/inst/V/vnsrl.wx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -74,3 +77,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vor.vi.yaml b/arch/inst/V/vor.vi.yaml index a3739c34da..9ff1fcc217 100644 --- a/arch/inst/V/vor.vi.yaml +++ b/arch/inst/V/vor.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vor.vv.yaml b/arch/inst/V/vor.vv.yaml index 276e2c82e6..58bced8ac6 100644 --- a/arch/inst/V/vor.vv.yaml +++ b/arch/inst/V/vor.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vor.vx.yaml b/arch/inst/V/vor.vx.yaml index 2633fb284f..e7542359a8 100644 --- a/arch/inst/V/vor.vx.yaml +++ b/arch/inst/V/vor.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vredand.vs.yaml b/arch/inst/V/vredand.vs.yaml index 7679f5f5c5..80d897ec5e 100644 --- a/arch/inst/V/vredand.vs.yaml +++ b/arch/inst/V/vredand.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vredmax.vs.yaml b/arch/inst/V/vredmax.vs.yaml index 5f69012702..0c78494550 100644 --- a/arch/inst/V/vredmax.vs.yaml +++ b/arch/inst/V/vredmax.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vredmaxu.vs.yaml b/arch/inst/V/vredmaxu.vs.yaml index 76c5a03962..a7ed31ff07 100644 --- a/arch/inst/V/vredmaxu.vs.yaml +++ b/arch/inst/V/vredmaxu.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vredmin.vs.yaml b/arch/inst/V/vredmin.vs.yaml index f7e4124412..b81d122a3c 100644 --- a/arch/inst/V/vredmin.vs.yaml +++ b/arch/inst/V/vredmin.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vredminu.vs.yaml b/arch/inst/V/vredminu.vs.yaml index b54e850d60..0d5cafeb25 100644 --- a/arch/inst/V/vredminu.vs.yaml +++ b/arch/inst/V/vredminu.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vredor.vs.yaml b/arch/inst/V/vredor.vs.yaml index 676a9903ec..f1d5f5a5ca 100644 --- a/arch/inst/V/vredor.vs.yaml +++ b/arch/inst/V/vredor.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vredsum.vs.yaml b/arch/inst/V/vredsum.vs.yaml index 42826d911a..3e75edf563 100644 --- a/arch/inst/V/vredsum.vs.yaml +++ b/arch/inst/V/vredsum.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vredxor.vs.yaml b/arch/inst/V/vredxor.vs.yaml index 5203454a68..365e6239ef 100644 --- a/arch/inst/V/vredxor.vs.yaml +++ b/arch/inst/V/vredxor.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -69,3 +72,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vrem.vv.yaml b/arch/inst/V/vrem.vv.yaml index 39f6b52283..8c57d5559a 100644 --- a/arch/inst/V/vrem.vv.yaml +++ b/arch/inst/V/vrem.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vrem.vx.yaml b/arch/inst/V/vrem.vx.yaml index 4d487b0b21..361f14be31 100644 --- a/arch/inst/V/vrem.vx.yaml +++ b/arch/inst/V/vrem.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vremu.vv.yaml b/arch/inst/V/vremu.vv.yaml index f166b2c60b..f37deefb91 100644 --- a/arch/inst/V/vremu.vv.yaml +++ b/arch/inst/V/vremu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -104,3 +107,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vremu.vx.yaml b/arch/inst/V/vremu.vx.yaml index 1e80ef3c4c..3b070b708e 100644 --- a/arch/inst/V/vremu.vx.yaml +++ b/arch/inst/V/vremu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vrgather.vi.yaml b/arch/inst/V/vrgather.vi.yaml index 1e81be3cf7..8e90d12220 100644 --- a/arch/inst/V/vrgather.vi.yaml +++ b/arch/inst/V/vrgather.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vrgather.vv.yaml b/arch/inst/V/vrgather.vv.yaml index dd538e277b..2cfad03bda 100644 --- a/arch/inst/V/vrgather.vv.yaml +++ b/arch/inst/V/vrgather.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vrgather.vx.yaml b/arch/inst/V/vrgather.vx.yaml index eae65325dc..384f676ff6 100644 --- a/arch/inst/V/vrgather.vx.yaml +++ b/arch/inst/V/vrgather.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vrgatherei16.vv.yaml b/arch/inst/V/vrgatherei16.vv.yaml index f823b9ed6e..3fe707028d 100644 --- a/arch/inst/V/vrgatherei16.vv.yaml +++ b/arch/inst/V/vrgatherei16.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vrsub.vi.yaml b/arch/inst/V/vrsub.vi.yaml index 7ce1c46e2e..dc5c7bf3e3 100644 --- a/arch/inst/V/vrsub.vi.yaml +++ b/arch/inst/V/vrsub.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vrsub.vx.yaml b/arch/inst/V/vrsub.vx.yaml index 026dd276f3..6a5a832c62 100644 --- a/arch/inst/V/vrsub.vx.yaml +++ b/arch/inst/V/vrsub.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsadd.vi.yaml b/arch/inst/V/vsadd.vi.yaml index 7a9a80e2a8..f00ce7be0c 100644 --- a/arch/inst/V/vsadd.vi.yaml +++ b/arch/inst/V/vsadd.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsadd.vv.yaml b/arch/inst/V/vsadd.vv.yaml index e1a4d0ddab..0716e8ae33 100644 --- a/arch/inst/V/vsadd.vv.yaml +++ b/arch/inst/V/vsadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsadd.vx.yaml b/arch/inst/V/vsadd.vx.yaml index b4046c81ca..c23ab241c4 100644 --- a/arch/inst/V/vsadd.vx.yaml +++ b/arch/inst/V/vsadd.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsaddu.vi.yaml b/arch/inst/V/vsaddu.vi.yaml index 6828c2cda1..a41939c70c 100644 --- a/arch/inst/V/vsaddu.vi.yaml +++ b/arch/inst/V/vsaddu.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsaddu.vv.yaml b/arch/inst/V/vsaddu.vv.yaml index 3b75a0cb62..995f05d07c 100644 --- a/arch/inst/V/vsaddu.vv.yaml +++ b/arch/inst/V/vsaddu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsaddu.vx.yaml b/arch/inst/V/vsaddu.vx.yaml index 9806bcb733..587d447857 100644 --- a/arch/inst/V/vsaddu.vx.yaml +++ b/arch/inst/V/vsaddu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsbc.vvm.yaml b/arch/inst/V/vsbc.vvm.yaml index 0c3cd660e6..acf3101185 100644 --- a/arch/inst/V/vsbc.vvm.yaml +++ b/arch/inst/V/vsbc.vvm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -64,3 +67,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsbc.vxm.yaml b/arch/inst/V/vsbc.vxm.yaml index 31b5511dd8..8607999e59 100644 --- a/arch/inst/V/vsbc.vxm.yaml +++ b/arch/inst/V/vsbc.vxm.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -64,3 +67,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vse16.v.yaml b/arch/inst/V/vse16.v.yaml index 97ad5521ea..64d04de8d1 100644 --- a/arch/inst/V/vse16.v.yaml +++ b/arch/inst/V/vse16.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vsseg(nf_int, vm, vs3, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vse32.v.yaml b/arch/inst/V/vse32.v.yaml index 45d3cd35d7..f1a148f8cd 100644 --- a/arch/inst/V/vse32.v.yaml +++ b/arch/inst/V/vse32.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vsseg(nf_int, vm, vs3, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vse64.v.yaml b/arch/inst/V/vse64.v.yaml index 3b21d66e4e..cd4326ff38 100644 --- a/arch/inst/V/vse64.v.yaml +++ b/arch/inst/V/vse64.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vsseg(nf_int, vm, vs3, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vse8.v.yaml b/arch/inst/V/vse8.v.yaml index ed2eefef51..0180242b7d 100644 --- a/arch/inst/V/vse8.v.yaml +++ b/arch/inst/V/vse8.v.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -40,3 +43,5 @@ sail(): | process_vsseg(nf_int, vm, vs3, load_width_bytes, rs1, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsetivli.yaml b/arch/inst/V/vsetivli.yaml index e45be1043c..34d3495b5a 100644 --- a/arch/inst/V/vsetivli.yaml +++ b/arch/inst/V/vsetivli.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let VLEN_pow = get_vlen_pow(); @@ -69,3 +72,5 @@ sail(): | RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsetvli.yaml b/arch/inst/V/vsetvli.yaml index aeb3569bb7..5978b4eaf3 100644 --- a/arch/inst/V/vsetvli.yaml +++ b/arch/inst/V/vsetvli.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let VLEN_pow = get_vlen_pow(); @@ -94,3 +97,5 @@ sail(): | RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsext.vf2.yaml b/arch/inst/V/vsext.vf2.yaml index 4ad76d17f0..067548d4e6 100644 --- a/arch/inst/V/vsext.vf2.yaml +++ b/arch/inst/V/vsext.vf2.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsext.vf4.yaml b/arch/inst/V/vsext.vf4.yaml index 008a0f6293..9f595d5641 100644 --- a/arch/inst/V/vsext.vf4.yaml +++ b/arch/inst/V/vsext.vf4.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsext.vf8.yaml b/arch/inst/V/vsext.vf8.yaml index 864e4141da..e8bf09deab 100644 --- a/arch/inst/V/vsext.vf8.yaml +++ b/arch/inst/V/vsext.vf8.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vslide1down.vx.yaml b/arch/inst/V/vslide1down.vx.yaml index 47ac7e37b1..59959a70c9 100644 --- a/arch/inst/V/vslide1down.vx.yaml +++ b/arch/inst/V/vslide1down.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vslide1up.vx.yaml b/arch/inst/V/vslide1up.vx.yaml index 05335c0fd6..e5008a8028 100644 --- a/arch/inst/V/vslide1up.vx.yaml +++ b/arch/inst/V/vslide1up.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -113,3 +116,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vslidedown.vi.yaml b/arch/inst/V/vslidedown.vi.yaml index dfadb71b66..6c46d6b829 100644 --- a/arch/inst/V/vslidedown.vi.yaml +++ b/arch/inst/V/vslidedown.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vslidedown.vx.yaml b/arch/inst/V/vslidedown.vx.yaml index 2b73f1063a..686ddcda71 100644 --- a/arch/inst/V/vslidedown.vx.yaml +++ b/arch/inst/V/vslidedown.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vslideup.vi.yaml b/arch/inst/V/vslideup.vi.yaml index 0a9ce8b467..e9e55df9b8 100644 --- a/arch/inst/V/vslideup.vi.yaml +++ b/arch/inst/V/vslideup.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vslideup.vx.yaml b/arch/inst/V/vslideup.vx.yaml index 5f4df3da74..582b469cbd 100644 --- a/arch/inst/V/vslideup.vx.yaml +++ b/arch/inst/V/vslideup.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -75,3 +78,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsll.vi.yaml b/arch/inst/V/vsll.vi.yaml index bb7407f04c..58852fde16 100644 --- a/arch/inst/V/vsll.vi.yaml +++ b/arch/inst/V/vsll.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsll.vv.yaml b/arch/inst/V/vsll.vv.yaml index fcf60a37d2..f22621c5d0 100644 --- a/arch/inst/V/vsll.vv.yaml +++ b/arch/inst/V/vsll.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsll.vx.yaml b/arch/inst/V/vsll.vx.yaml index 2c5f041f7d..fb6114e3ba 100644 --- a/arch/inst/V/vsll.vx.yaml +++ b/arch/inst/V/vsll.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsm.v.yaml b/arch/inst/V/vsm.v.yaml index b8e7ace248..83e325426c 100644 --- a/arch/inst/V/vsm.v.yaml +++ b/arch/inst/V/vsm.v.yaml @@ -23,6 +23,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW = 8; @@ -36,3 +39,5 @@ sail(): | assert(evl >= 0); process_vm(vd_or_vs3, rs1, num_elem, evl, op) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsmul.vv.yaml b/arch/inst/V/vsmul.vv.yaml index 856e75f824..7d77841975 100644 --- a/arch/inst/V/vsmul.vv.yaml +++ b/arch/inst/V/vsmul.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsmul.vx.yaml b/arch/inst/V/vsmul.vx.yaml index b70c9b089f..0ce205dcd4 100644 --- a/arch/inst/V/vsmul.vx.yaml +++ b/arch/inst/V/vsmul.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsoxei16.v.yaml b/arch/inst/V/vsoxei16.v.yaml index c0f6d4b0f8..17613223e2 100644 --- a/arch/inst/V/vsoxei16.v.yaml +++ b/arch/inst/V/vsoxei16.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsoxei32.v.yaml b/arch/inst/V/vsoxei32.v.yaml index 1c14c90dbb..d2f5991e95 100644 --- a/arch/inst/V/vsoxei32.v.yaml +++ b/arch/inst/V/vsoxei32.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsoxei64.v.yaml b/arch/inst/V/vsoxei64.v.yaml index f7bcf8faf4..8c1caccf9d 100644 --- a/arch/inst/V/vsoxei64.v.yaml +++ b/arch/inst/V/vsoxei64.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsoxei8.v.yaml b/arch/inst/V/vsoxei8.v.yaml index 6b4107b6f6..6811ae0632 100644 --- a/arch/inst/V/vsoxei8.v.yaml +++ b/arch/inst/V/vsoxei8.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsra.vi.yaml b/arch/inst/V/vsra.vi.yaml index 077d49bfca..7327fa12bc 100644 --- a/arch/inst/V/vsra.vi.yaml +++ b/arch/inst/V/vsra.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsra.vv.yaml b/arch/inst/V/vsra.vv.yaml index b46265e903..59fe637a21 100644 --- a/arch/inst/V/vsra.vv.yaml +++ b/arch/inst/V/vsra.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsra.vx.yaml b/arch/inst/V/vsra.vx.yaml index 405ab82cfa..d2b0f969fd 100644 --- a/arch/inst/V/vsra.vx.yaml +++ b/arch/inst/V/vsra.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsrl.vi.yaml b/arch/inst/V/vsrl.vi.yaml index acdfbc9861..a6b213bffc 100644 --- a/arch/inst/V/vsrl.vi.yaml +++ b/arch/inst/V/vsrl.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsrl.vv.yaml b/arch/inst/V/vsrl.vv.yaml index a458251a6d..fe5f9e5ab1 100644 --- a/arch/inst/V/vsrl.vv.yaml +++ b/arch/inst/V/vsrl.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsrl.vx.yaml b/arch/inst/V/vsrl.vx.yaml index 33400a4b96..8f5b177d2b 100644 --- a/arch/inst/V/vsrl.vx.yaml +++ b/arch/inst/V/vsrl.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsse16.v.yaml b/arch/inst/V/vsse16.v.yaml index 554f3cbad0..307fcb1108 100644 --- a/arch/inst/V/vsse16.v.yaml +++ b/arch/inst/V/vsse16.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -42,3 +45,5 @@ sail(): | process_vssseg(nf_int, vm, vs3, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsse32.v.yaml b/arch/inst/V/vsse32.v.yaml index 790271b4e9..72fdfdae9c 100644 --- a/arch/inst/V/vsse32.v.yaml +++ b/arch/inst/V/vsse32.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -42,3 +45,5 @@ sail(): | process_vssseg(nf_int, vm, vs3, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsse64.v.yaml b/arch/inst/V/vsse64.v.yaml index 65301a84b8..32e09b0cce 100644 --- a/arch/inst/V/vsse64.v.yaml +++ b/arch/inst/V/vsse64.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -42,3 +45,5 @@ sail(): | process_vssseg(nf_int, vm, vs3, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsse8.v.yaml b/arch/inst/V/vsse8.v.yaml index 3dad5795d9..c88c72c33d 100644 --- a/arch/inst/V/vsse8.v.yaml +++ b/arch/inst/V/vsse8.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let load_width_bytes = vlewidth_bytesnumber(width); @@ -42,3 +45,5 @@ sail(): | process_vssseg(nf_int, vm, vs3, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssra.vi.yaml b/arch/inst/V/vssra.vi.yaml index e3fce2d3b8..8c0e30c6ef 100644 --- a/arch/inst/V/vssra.vi.yaml +++ b/arch/inst/V/vssra.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssra.vv.yaml b/arch/inst/V/vssra.vv.yaml index 72f82eea9c..3521d69f71 100644 --- a/arch/inst/V/vssra.vv.yaml +++ b/arch/inst/V/vssra.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssra.vx.yaml b/arch/inst/V/vssra.vx.yaml index 33f3cd692c..3ef571b75e 100644 --- a/arch/inst/V/vssra.vx.yaml +++ b/arch/inst/V/vssra.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssrl.vi.yaml b/arch/inst/V/vssrl.vi.yaml index 49ed2325db..f92d797e96 100644 --- a/arch/inst/V/vssrl.vi.yaml +++ b/arch/inst/V/vssrl.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssrl.vv.yaml b/arch/inst/V/vssrl.vv.yaml index 6538af90aa..0a39a407ea 100644 --- a/arch/inst/V/vssrl.vv.yaml +++ b/arch/inst/V/vssrl.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssrl.vx.yaml b/arch/inst/V/vssrl.vx.yaml index e5ef085721..6700d16045 100644 --- a/arch/inst/V/vssrl.vx.yaml +++ b/arch/inst/V/vssrl.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssub.vv.yaml b/arch/inst/V/vssub.vv.yaml index 582595e089..0f233b9a24 100644 --- a/arch/inst/V/vssub.vv.yaml +++ b/arch/inst/V/vssub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssub.vx.yaml b/arch/inst/V/vssub.vx.yaml index e9aa1eafae..4736fa376f 100644 --- a/arch/inst/V/vssub.vx.yaml +++ b/arch/inst/V/vssub.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssubu.vv.yaml b/arch/inst/V/vssubu.vv.yaml index 52630eedee..8b5eb99c6b 100644 --- a/arch/inst/V/vssubu.vv.yaml +++ b/arch/inst/V/vssubu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vssubu.vx.yaml b/arch/inst/V/vssubu.vx.yaml index cfd69dcebd..20b7de43ee 100644 --- a/arch/inst/V/vssubu.vx.yaml +++ b/arch/inst/V/vssubu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsub.vv.yaml b/arch/inst/V/vsub.vv.yaml index 6839677016..21f5f0910a 100644 --- a/arch/inst/V/vsub.vv.yaml +++ b/arch/inst/V/vsub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsub.vx.yaml b/arch/inst/V/vsub.vx.yaml index a638234fd3..e58674f075 100644 --- a/arch/inst/V/vsub.vx.yaml +++ b/arch/inst/V/vsub.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsuxei16.v.yaml b/arch/inst/V/vsuxei16.v.yaml index ac763081b0..0069dceaf9 100644 --- a/arch/inst/V/vsuxei16.v.yaml +++ b/arch/inst/V/vsuxei16.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsuxei32.v.yaml b/arch/inst/V/vsuxei32.v.yaml index 5620ea6e02..62618a0290 100644 --- a/arch/inst/V/vsuxei32.v.yaml +++ b/arch/inst/V/vsuxei32.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsuxei64.v.yaml b/arch/inst/V/vsuxei64.v.yaml index 7a415e73c7..718443323c 100644 --- a/arch/inst/V/vsuxei64.v.yaml +++ b/arch/inst/V/vsuxei64.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vsuxei8.v.yaml b/arch/inst/V/vsuxei8.v.yaml index 24aa20685b..2b085f21fe 100644 --- a/arch/inst/V/vsuxei8.v.yaml +++ b/arch/inst/V/vsuxei8.v.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let EEW_index_pow = vlewidth_pow(width); @@ -42,3 +45,5 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwadd.vv.yaml b/arch/inst/V/vwadd.vv.yaml index 2a01b899e4..35753d938d 100644 --- a/arch/inst/V/vwadd.vv.yaml +++ b/arch/inst/V/vwadd.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -71,3 +74,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwadd.vx.yaml b/arch/inst/V/vwadd.vx.yaml index 61dce8135b..afec075672 100644 --- a/arch/inst/V/vwadd.vx.yaml +++ b/arch/inst/V/vwadd.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwadd.wv.yaml b/arch/inst/V/vwadd.wv.yaml index c865337a32..080cb4f73c 100644 --- a/arch/inst/V/vwadd.wv.yaml +++ b/arch/inst/V/vwadd.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwadd.wx.yaml b/arch/inst/V/vwadd.wx.yaml index 5f091e84a1..40a992d362 100644 --- a/arch/inst/V/vwadd.wx.yaml +++ b/arch/inst/V/vwadd.wx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -66,3 +69,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwaddu.vv.yaml b/arch/inst/V/vwaddu.vv.yaml index d6544a18f3..d86d31cac8 100644 --- a/arch/inst/V/vwaddu.vv.yaml +++ b/arch/inst/V/vwaddu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -71,3 +74,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwaddu.vx.yaml b/arch/inst/V/vwaddu.vx.yaml index 0f6206d800..db87433e21 100644 --- a/arch/inst/V/vwaddu.vx.yaml +++ b/arch/inst/V/vwaddu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwaddu.wv.yaml b/arch/inst/V/vwaddu.wv.yaml index 70d252b66a..45b35928d3 100644 --- a/arch/inst/V/vwaddu.wv.yaml +++ b/arch/inst/V/vwaddu.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwaddu.wx.yaml b/arch/inst/V/vwaddu.wx.yaml index 399998730b..f120dbb307 100644 --- a/arch/inst/V/vwaddu.wx.yaml +++ b/arch/inst/V/vwaddu.wx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -66,3 +69,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmacc.vv.yaml b/arch/inst/V/vwmacc.vv.yaml index eaee840040..5bfad075c8 100644 --- a/arch/inst/V/vwmacc.vv.yaml +++ b/arch/inst/V/vwmacc.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmacc.vx.yaml b/arch/inst/V/vwmacc.vx.yaml index 0540830fd5..0537888f83 100644 --- a/arch/inst/V/vwmacc.vx.yaml +++ b/arch/inst/V/vwmacc.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmaccsu.vv.yaml b/arch/inst/V/vwmaccsu.vv.yaml index fa51d44a3c..d44b5b4978 100644 --- a/arch/inst/V/vwmaccsu.vv.yaml +++ b/arch/inst/V/vwmaccsu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmaccsu.vx.yaml b/arch/inst/V/vwmaccsu.vx.yaml index 7797552f09..b5ab724532 100644 --- a/arch/inst/V/vwmaccsu.vx.yaml +++ b/arch/inst/V/vwmaccsu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmaccu.vv.yaml b/arch/inst/V/vwmaccu.vv.yaml index 9a9a0ac2d2..9636718e50 100644 --- a/arch/inst/V/vwmaccu.vv.yaml +++ b/arch/inst/V/vwmaccu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmaccu.vx.yaml b/arch/inst/V/vwmaccu.vx.yaml index 70d74dc7d0..3257edb6f9 100644 --- a/arch/inst/V/vwmaccu.vx.yaml +++ b/arch/inst/V/vwmaccu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmaccus.vx.yaml b/arch/inst/V/vwmaccus.vx.yaml index afa161fa1f..5a837117bb 100644 --- a/arch/inst/V/vwmaccus.vx.yaml +++ b/arch/inst/V/vwmaccus.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmul.vv.yaml b/arch/inst/V/vwmul.vv.yaml index 4c33778e70..bfafaa8fdf 100644 --- a/arch/inst/V/vwmul.vv.yaml +++ b/arch/inst/V/vwmul.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -71,3 +74,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmul.vx.yaml b/arch/inst/V/vwmul.vx.yaml index e4f7060fbd..d58c73043d 100644 --- a/arch/inst/V/vwmul.vx.yaml +++ b/arch/inst/V/vwmul.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmulsu.vv.yaml b/arch/inst/V/vwmulsu.vv.yaml index d6c385073f..97b05d18a2 100644 --- a/arch/inst/V/vwmulsu.vv.yaml +++ b/arch/inst/V/vwmulsu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -71,3 +74,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmulsu.vx.yaml b/arch/inst/V/vwmulsu.vx.yaml index 86b26cc94d..4e376030c1 100644 --- a/arch/inst/V/vwmulsu.vx.yaml +++ b/arch/inst/V/vwmulsu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmulu.vv.yaml b/arch/inst/V/vwmulu.vv.yaml index 4ec2bdfdc5..fbdd856bff 100644 --- a/arch/inst/V/vwmulu.vv.yaml +++ b/arch/inst/V/vwmulu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -71,3 +74,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwmulu.vx.yaml b/arch/inst/V/vwmulu.vx.yaml index 5b71c1ed94..ca48edb30f 100644 --- a/arch/inst/V/vwmulu.vx.yaml +++ b/arch/inst/V/vwmulu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwredsum.vs.yaml b/arch/inst/V/vwredsum.vs.yaml index 492d0e7a61..f395e5c568 100644 --- a/arch/inst/V/vwredsum.vs.yaml +++ b/arch/inst/V/vwredsum.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwredsumu.vs.yaml b/arch/inst/V/vwredsumu.vs.yaml index 6b9bc995c6..de177fc6f8 100644 --- a/arch/inst/V/vwredsumu.vs.yaml +++ b/arch/inst/V/vwredsumu.vs.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwsub.vv.yaml b/arch/inst/V/vwsub.vv.yaml index f5280b310a..ab974a9537 100644 --- a/arch/inst/V/vwsub.vv.yaml +++ b/arch/inst/V/vwsub.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -71,3 +74,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwsub.vx.yaml b/arch/inst/V/vwsub.vx.yaml index 1c79543c67..0a309c99b9 100644 --- a/arch/inst/V/vwsub.vx.yaml +++ b/arch/inst/V/vwsub.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwsub.wv.yaml b/arch/inst/V/vwsub.wv.yaml index 6d088c0735..bc500b4a92 100644 --- a/arch/inst/V/vwsub.wv.yaml +++ b/arch/inst/V/vwsub.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwsub.wx.yaml b/arch/inst/V/vwsub.wx.yaml index 264cff457f..a677199930 100644 --- a/arch/inst/V/vwsub.wx.yaml +++ b/arch/inst/V/vwsub.wx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -66,3 +69,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwsubu.vv.yaml b/arch/inst/V/vwsubu.vv.yaml index b85ca3f403..2a33178b80 100644 --- a/arch/inst/V/vwsubu.vv.yaml +++ b/arch/inst/V/vwsubu.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -71,3 +74,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwsubu.vx.yaml b/arch/inst/V/vwsubu.vx.yaml index f4759e0658..eabce4d919 100644 --- a/arch/inst/V/vwsubu.vx.yaml +++ b/arch/inst/V/vwsubu.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -70,3 +73,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwsubu.wv.yaml b/arch/inst/V/vwsubu.wv.yaml index 8426ec2c65..61189a1641 100644 --- a/arch/inst/V/vwsubu.wv.yaml +++ b/arch/inst/V/vwsubu.wv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -67,3 +70,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vwsubu.wx.yaml b/arch/inst/V/vwsubu.wx.yaml index 4a1cfa22e9..9633cc6093 100644 --- a/arch/inst/V/vwsubu.wx.yaml +++ b/arch/inst/V/vwsubu.wx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: true operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -66,3 +69,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vxor.vi.yaml b/arch/inst/V/vxor.vi.yaml index 4c9ba6b85d..dd3ce72a51 100644 --- a/arch/inst/V/vxor.vi.yaml +++ b/arch/inst/V/vxor.vi.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -89,3 +92,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vxor.vv.yaml b/arch/inst/V/vxor.vv.yaml index dfab9e3671..161024d430 100644 --- a/arch/inst/V/vxor.vv.yaml +++ b/arch/inst/V/vxor.vv.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW_pow = get_sew_pow(); @@ -122,3 +125,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vxor.vx.yaml b/arch/inst/V/vxor.vx.yaml index cc3f843664..e28f01ada8 100644 --- a/arch/inst/V/vxor.vx.yaml +++ b/arch/inst/V/vxor.vx.yaml @@ -27,6 +27,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -105,3 +108,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vzext.vf2.yaml b/arch/inst/V/vzext.vf2.yaml index 0f0409f7ab..9ebf12212e 100644 --- a/arch/inst/V/vzext.vf2.yaml +++ b/arch/inst/V/vzext.vf2.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vzext.vf4.yaml b/arch/inst/V/vzext.vf4.yaml index 8bb5470eaf..db0b04742a 100644 --- a/arch/inst/V/vzext.vf4.yaml +++ b/arch/inst/V/vzext.vf4.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/V/vzext.vf8.yaml b/arch/inst/V/vzext.vf8.yaml index 9afef2eed2..18f568563c 100644 --- a/arch/inst/V/vzext.vf8.yaml +++ b/arch/inst/V/vzext.vf8.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let SEW = get_sew(); @@ -63,3 +66,5 @@ sail(): | vstart = zeros(); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoadd.b.yaml b/arch/inst/Zabha/amoadd.b.yaml index f427053e89..8abf81f365 100644 --- a/arch/inst/Zabha/amoadd.b.yaml +++ b/arch/inst/Zabha/amoadd.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoadd.h.yaml b/arch/inst/Zabha/amoadd.h.yaml index 72b6f0a07a..4d718dce1b 100644 --- a/arch/inst/Zabha/amoadd.h.yaml +++ b/arch/inst/Zabha/amoadd.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoand.b.yaml b/arch/inst/Zabha/amoand.b.yaml index 52509d451e..8566474275 100644 --- a/arch/inst/Zabha/amoand.b.yaml +++ b/arch/inst/Zabha/amoand.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoand.h.yaml b/arch/inst/Zabha/amoand.h.yaml index 21e7fa04b8..c8f33d3786 100644 --- a/arch/inst/Zabha/amoand.h.yaml +++ b/arch/inst/Zabha/amoand.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amomax.b.yaml b/arch/inst/Zabha/amomax.b.yaml index 00c77cf2c5..45c6facfc1 100644 --- a/arch/inst/Zabha/amomax.b.yaml +++ b/arch/inst/Zabha/amomax.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amomax.h.yaml b/arch/inst/Zabha/amomax.h.yaml index f3f02354e1..47bfa68ee5 100644 --- a/arch/inst/Zabha/amomax.h.yaml +++ b/arch/inst/Zabha/amomax.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amomaxu.b.yaml b/arch/inst/Zabha/amomaxu.b.yaml index cb675e92ef..2bbc822e4c 100644 --- a/arch/inst/Zabha/amomaxu.b.yaml +++ b/arch/inst/Zabha/amomaxu.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amomaxu.h.yaml b/arch/inst/Zabha/amomaxu.h.yaml index f65f692229..9061aea95b 100644 --- a/arch/inst/Zabha/amomaxu.h.yaml +++ b/arch/inst/Zabha/amomaxu.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amomin.b.yaml b/arch/inst/Zabha/amomin.b.yaml index 5d54cf1542..bd28531d70 100644 --- a/arch/inst/Zabha/amomin.b.yaml +++ b/arch/inst/Zabha/amomin.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amomin.h.yaml b/arch/inst/Zabha/amomin.h.yaml index d003106302..e94e61032e 100644 --- a/arch/inst/Zabha/amomin.h.yaml +++ b/arch/inst/Zabha/amomin.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amominu.b.yaml b/arch/inst/Zabha/amominu.b.yaml index f781b73cfa..28a528947d 100644 --- a/arch/inst/Zabha/amominu.b.yaml +++ b/arch/inst/Zabha/amominu.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amominu.h.yaml b/arch/inst/Zabha/amominu.h.yaml index 75437ea188..c6a1d1f60f 100644 --- a/arch/inst/Zabha/amominu.h.yaml +++ b/arch/inst/Zabha/amominu.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoor.b.yaml b/arch/inst/Zabha/amoor.b.yaml index 32a155296c..456162d216 100644 --- a/arch/inst/Zabha/amoor.b.yaml +++ b/arch/inst/Zabha/amoor.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoor.h.yaml b/arch/inst/Zabha/amoor.h.yaml index 4ef72909e3..1a6cd51117 100644 --- a/arch/inst/Zabha/amoor.h.yaml +++ b/arch/inst/Zabha/amoor.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoswap.b.yaml b/arch/inst/Zabha/amoswap.b.yaml index a17173f588..d9f3f4c27e 100644 --- a/arch/inst/Zabha/amoswap.b.yaml +++ b/arch/inst/Zabha/amoswap.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoswap.h.yaml b/arch/inst/Zabha/amoswap.h.yaml index 47f74a8b84..3be9b573a7 100644 --- a/arch/inst/Zabha/amoswap.h.yaml +++ b/arch/inst/Zabha/amoswap.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoxor.b.yaml b/arch/inst/Zabha/amoxor.b.yaml index 45ec3ff340..73e6801d0d 100644 --- a/arch/inst/Zabha/amoxor.b.yaml +++ b/arch/inst/Zabha/amoxor.b.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zabha/amoxor.h.yaml b/arch/inst/Zabha/amoxor.h.yaml index e3d8799a7c..53882a1afa 100644 --- a/arch/inst/Zabha/amoxor.h.yaml +++ b/arch/inst/Zabha/amoxor.h.yaml @@ -29,6 +29,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { if extension("A") then { @@ -119,3 +122,5 @@ sail(): | RETIRE_FAIL } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zalasr/lb.aq.yaml b/arch/inst/Zalasr/lb.aq.yaml index 8c9ce4603c..23305e6271 100644 --- a/arch/inst/Zalasr/lb.aq.yaml +++ b/arch/inst/Zalasr/lb.aq.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -52,3 +55,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zalasr/ld.aq.yaml b/arch/inst/Zalasr/ld.aq.yaml index ea3e335373..d4a95822b6 100644 --- a/arch/inst/Zalasr/ld.aq.yaml +++ b/arch/inst/Zalasr/ld.aq.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -52,3 +55,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zalasr/lh.aq.yaml b/arch/inst/Zalasr/lh.aq.yaml index 3811cc3067..5a7fbba463 100644 --- a/arch/inst/Zalasr/lh.aq.yaml +++ b/arch/inst/Zalasr/lh.aq.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -52,3 +55,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zalasr/lw.aq.yaml b/arch/inst/Zalasr/lw.aq.yaml index 706065daf8..dd2bd1819a 100644 --- a/arch/inst/Zalasr/lw.aq.yaml +++ b/arch/inst/Zalasr/lw.aq.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -52,3 +55,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zalasr/sb.rl.yaml b/arch/inst/Zalasr/sb.rl.yaml index 038a192d1e..4bb8b3ca6d 100644 --- a/arch/inst/Zalasr/sb.rl.yaml +++ b/arch/inst/Zalasr/sb.rl.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -67,3 +70,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zalasr/sd.rl.yaml b/arch/inst/Zalasr/sd.rl.yaml index e7ba1369e6..1134c6e6d7 100644 --- a/arch/inst/Zalasr/sd.rl.yaml +++ b/arch/inst/Zalasr/sd.rl.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -67,3 +70,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zalasr/sh.rl.yaml b/arch/inst/Zalasr/sh.rl.yaml index a45c0f3282..e3995423c6 100644 --- a/arch/inst/Zalasr/sh.rl.yaml +++ b/arch/inst/Zalasr/sh.rl.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -67,3 +70,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zalasr/sw.rl.yaml b/arch/inst/Zalasr/sw.rl.yaml index a1f2176f68..f98575e381 100644 --- a/arch/inst/Zalasr/sw.rl.yaml +++ b/arch/inst/Zalasr/sw.rl.yaml @@ -25,6 +25,9 @@ access: data_independent_timing: false operation(): | +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -67,3 +70,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zbkb/brev8.yaml b/arch/inst/Zbkb/brev8.yaml index 9f53606b12..d330bac7e2 100644 --- a/arch/inst/Zbkb/brev8.yaml +++ b/arch/inst/Zbkb/brev8.yaml @@ -33,9 +33,14 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | result : xlenbits = EXTZ(0b0); foreach (i from 0 to sizeof(xlen) by 8) { result[i+7..i] = reverse_bits_in_byte(X(rs1)[i+7..i]); }; X(rd) = result; + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zbkb/unzip.yaml b/arch/inst/Zbkb/unzip.yaml index 7ad0a4c237..95a367d01b 100644 --- a/arch/inst/Zbkb/unzip.yaml +++ b/arch/inst/Zbkb/unzip.yaml @@ -35,8 +35,13 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | foreach (i from 0 to xlen/2-1) { X(rd)[i] = X(rs1)[2*i]; X(rd)[i+xlen/2] = X(rs1)[2*i+1]; } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zbkb/zip.yaml b/arch/inst/Zbkb/zip.yaml index 6b74dddb6a..485bb78bda 100644 --- a/arch/inst/Zbkb/zip.yaml +++ b/arch/inst/Zbkb/zip.yaml @@ -35,8 +35,13 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | foreach (i from 0 to xlen/2-1) { X(rd)[2*i] = X(rs1)[i]; X(rd)[2*i+1] = X(rs1)[i+xlen/2]; } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zbkx/xperm4.yaml b/arch/inst/Zbkx/xperm4.yaml index 4d0bebbd4c..e472e7b0da 100644 --- a/arch/inst/Zbkx/xperm4.yaml +++ b/arch/inst/Zbkx/xperm4.yaml @@ -39,6 +39,9 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | val xperm4_lookup : (bits(4), xlenbits) -> bits(4) function xperm4_lookup (idx, lut) = { @@ -52,3 +55,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zbkx/xperm8.yaml b/arch/inst/Zbkx/xperm8.yaml index b9be5932f7..3bf8fc174c 100644 --- a/arch/inst/Zbkx/xperm8.yaml +++ b/arch/inst/Zbkx/xperm8.yaml @@ -39,6 +39,9 @@ operation(): | X[rd] = output; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | val xperm8_lookup : (bits(8), xlenbits) -> bits(8) function xperm8_lookup (idx, lut) = { @@ -52,3 +55,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.lbu.yaml b/arch/inst/Zcb/c.lbu.yaml index bf7d0d6f54..0f94a548be 100644 --- a/arch/inst/Zcb/c.lbu.yaml +++ b/arch/inst/Zcb/c.lbu.yaml @@ -36,6 +36,9 @@ operation(): | X[creg2reg(rd)] = read_memory<8>(virtual_address, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = zero_extend(imm); @@ -63,3 +66,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.lh.yaml b/arch/inst/Zcb/c.lh.yaml index 8edcd6a5fa..1cb375b692 100644 --- a/arch/inst/Zcb/c.lh.yaml +++ b/arch/inst/Zcb/c.lh.yaml @@ -37,6 +37,9 @@ operation(): | X[creg2reg(rd)] = sext(read_memory<16>(virtual_address, $encoding), 16); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = zero_extend(imm); @@ -64,3 +67,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.lhu.yaml b/arch/inst/Zcb/c.lhu.yaml index c1660ff3e2..040bac6c82 100644 --- a/arch/inst/Zcb/c.lhu.yaml +++ b/arch/inst/Zcb/c.lhu.yaml @@ -37,6 +37,9 @@ operation(): | X[creg2reg(rd)] = read_memory<16>(virtual_address, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = zero_extend(imm); @@ -64,3 +67,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.mul.yaml b/arch/inst/Zcb/c.mul.yaml index 194c0875d6..6e47f8cf75 100644 --- a/arch/inst/Zcb/c.mul.yaml +++ b/arch/inst/Zcb/c.mul.yaml @@ -36,9 +36,14 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)] * X[creg2reg(rs2)]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let result_wide = to_bits(2 * sizeof(xlen), signed(X(rsdc)) * signed(X(rs2c))); X(rsdc) = result_wide[(sizeof(xlen) - 1) .. 0]; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.not.yaml b/arch/inst/Zcb/c.not.yaml index 7f18d1ec80..9c8862ba65 100644 --- a/arch/inst/Zcb/c.not.yaml +++ b/arch/inst/Zcb/c.not.yaml @@ -31,8 +31,13 @@ operation(): | X[creg2reg(rd)] = ~X[creg2reg(rd)]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { X(rsdc) = X(rsdc) XOR -1; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.sext.b.yaml b/arch/inst/Zcb/c.sext.b.yaml index 659f8cf977..f0f484feea 100644 --- a/arch/inst/Zcb/c.sext.b.yaml +++ b/arch/inst/Zcb/c.sext.b.yaml @@ -36,6 +36,9 @@ operation(): | X[creg2reg(rd)] = $signed(X[creg2reg(rd)][7:0]); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rsdc); @@ -49,3 +52,5 @@ sail(): | X(rsdc) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.sext.h.yaml b/arch/inst/Zcb/c.sext.h.yaml index 70ef2fc8da..e76c9e4f9e 100644 --- a/arch/inst/Zcb/c.sext.h.yaml +++ b/arch/inst/Zcb/c.sext.h.yaml @@ -36,6 +36,9 @@ operation(): | X[creg2reg(rd)] = $signed(X[creg2reg(rd)][15:0]); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rsdc); @@ -49,3 +52,5 @@ sail(): | X(rsdc) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.zext.b.yaml b/arch/inst/Zcb/c.zext.b.yaml index 8fb59d01e2..348a58a3dc 100644 --- a/arch/inst/Zcb/c.zext.b.yaml +++ b/arch/inst/Zcb/c.zext.b.yaml @@ -36,6 +36,9 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)][7:0]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rsdc); @@ -49,3 +52,5 @@ sail(): | X(rsdc) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.zext.h.yaml b/arch/inst/Zcb/c.zext.h.yaml index 6f04096415..606547b9bc 100644 --- a/arch/inst/Zcb/c.zext.h.yaml +++ b/arch/inst/Zcb/c.zext.h.yaml @@ -36,6 +36,9 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)][15:0]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rsdc); @@ -49,3 +52,5 @@ sail(): | X(rsdc) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zcb/c.zext.w.yaml b/arch/inst/Zcb/c.zext.w.yaml index 2a1a287f46..216ed799b4 100644 --- a/arch/inst/Zcb/c.zext.w.yaml +++ b/arch/inst/Zcb/c.zext.w.yaml @@ -36,6 +36,9 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)][31:0]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val = X(rsdc); @@ -49,3 +52,5 @@ sail(): | X(rsdc) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zfh/fcvt.h.s.yaml b/arch/inst/Zfh/fcvt.h.s.yaml index 4601b28c49..2282bb1b45 100644 --- a/arch/inst/Zfh/fcvt.h.s.yaml +++ b/arch/inst/Zfh/fcvt.h.s.yaml @@ -65,6 +65,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -81,3 +84,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zfh/fcvt.s.h.yaml b/arch/inst/Zfh/fcvt.s.h.yaml index 2b5645699b..661f4fc759 100644 --- a/arch/inst/Zfh/fcvt.s.h.yaml +++ b/arch/inst/Zfh/fcvt.s.h.yaml @@ -62,6 +62,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { assert(sizeof(xlen) >= 64); @@ -78,3 +81,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zfh/flh.yaml b/arch/inst/Zfh/flh.yaml index 687d10a408..2851bb22c3 100644 --- a/arch/inst/Zfh/flh.yaml +++ b/arch/inst/Zfh/flh.yaml @@ -39,6 +39,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -67,3 +70,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zfh/fmv.h.x.yaml b/arch/inst/Zfh/fmv.h.x.yaml index b179c5df82..8b61047cfb 100644 --- a/arch/inst/Zfh/fmv.h.x.yaml +++ b/arch/inst/Zfh/fmv.h.x.yaml @@ -32,6 +32,9 @@ operation(): | mark_f_state_dirty(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_X = X(rs1); @@ -39,3 +42,5 @@ sail(): | F(rd) = nan_box (rd_val_H); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zfh/fmv.x.h.yaml b/arch/inst/Zfh/fmv.x.h.yaml index 51db5f6236..6212b2e1fb 100644 --- a/arch/inst/Zfh/fmv.x.h.yaml +++ b/arch/inst/Zfh/fmv.x.h.yaml @@ -33,6 +33,9 @@ operation(): | X[rd] = sext(f[fs1][15:0], 16); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val_X = X(rs1); @@ -40,3 +43,5 @@ sail(): | F(rd) = nan_box (rd_val_H); RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zfh/fsh.yaml b/arch/inst/Zfh/fsh.yaml index 7139992fcf..2403878fea 100644 --- a/arch/inst/Zfh/fsh.yaml +++ b/arch/inst/Zfh/fsh.yaml @@ -40,6 +40,9 @@ operation(): | write_memory<16>(virtual_address, hp_value, $encoding); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let offset : xlenbits = sign_extend(imm); @@ -78,3 +81,5 @@ sail(): | } } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zicond/czero.eqz.yaml b/arch/inst/Zicond/czero.eqz.yaml index 63bdc5a6be..56ab00d39f 100644 --- a/arch/inst/Zicond/czero.eqz.yaml +++ b/arch/inst/Zicond/czero.eqz.yaml @@ -29,6 +29,9 @@ data_independent_timing: false operation(): | X[rd] = (X[rs2] == 0) ? 0 : X[rs1]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let value = X(rs1); @@ -38,3 +41,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zicond/czero.nez.yaml b/arch/inst/Zicond/czero.nez.yaml index 1e969a605d..6a23e16770 100644 --- a/arch/inst/Zicond/czero.nez.yaml +++ b/arch/inst/Zicond/czero.nez.yaml @@ -29,6 +29,9 @@ data_independent_timing: false operation(): | X[rd] = (X[rs2] != 0) ? 0 : X[rs1]; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let value = X(rs1); @@ -38,3 +41,5 @@ sail(): | X(rd) = result; RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zicsr/csrrs.yaml b/arch/inst/Zicsr/csrrs.yaml index 9ee1f34d8f..b14d6c3987 100644 --- a/arch/inst/Zicsr/csrrs.yaml +++ b/arch/inst/Zicsr/csrrs.yaml @@ -44,6 +44,9 @@ operation(): | X[rd] = initial_csr_value; +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val : xlenbits = if is_imm then zero_extend(rs1) else X(rs1); @@ -69,3 +72,5 @@ sail(): | RETIRE_SUCCESS } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zicsr/csrrw.yaml b/arch/inst/Zicsr/csrrw.yaml index d7479d80b1..59fae84022 100644 --- a/arch/inst/Zicsr/csrrw.yaml +++ b/arch/inst/Zicsr/csrrw.yaml @@ -41,6 +41,9 @@ operation(): | # performing any WARL transformations first CSR[csr].sw_write(initial_value); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val : xlenbits = if is_imm then zero_extend(rs1) else X(rs1); @@ -66,3 +69,5 @@ sail(): | RETIRE_SUCCESS } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zicsr/csrrwi.yaml b/arch/inst/Zicsr/csrrwi.yaml index f0c768347d..8d0570fc56 100644 --- a/arch/inst/Zicsr/csrrwi.yaml +++ b/arch/inst/Zicsr/csrrwi.yaml @@ -39,6 +39,9 @@ operation(): | # performing any WARL transformations first CSR[csr].sw_write({{XLEN-5{1'b0}}, imm}); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { let rs1_val : xlenbits = if is_imm then zero_extend(rs1) else X(rs1); @@ -64,3 +67,5 @@ sail(): | RETIRE_SUCCESS } } + +# SPDX-SnippetEnd \ No newline at end of file diff --git a/arch/inst/Zifencei/fence.i.yaml b/arch/inst/Zifencei/fence.i.yaml index 4d5de9c786..167b4f4a03 100644 --- a/arch/inst/Zifencei/fence.i.yaml +++ b/arch/inst/Zifencei/fence.i.yaml @@ -51,5 +51,10 @@ access: operation(): | ifence(); +# SPDX-SnippetBegin +# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-License-Identifier: BSD-2-Clause sail(): | { /* __barrier(Barrier_RISCV_i); */ RETIRE_SUCCESS } + +# SPDX-SnippetEnd \ No newline at end of file From 74b84dcce9c3aa8d655ad5f4d40330d4e88ce9ba Mon Sep 17 00:00:00 2001 From: Usman Akinyemi Date: Sat, 29 Mar 2025 06:09:26 +0530 Subject: [PATCH 009/207] arch/inst: Update the SPDX license to point to SPDX-FileCopyrightText. Mentored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Mentored-by: Paul A. Clarke Signed-off-by: Usman Akinyemi --- arch/inst/A/amoadd.d.yaml | 2 +- arch/inst/A/amoadd.w.yaml | 2 +- arch/inst/A/amoand.d.yaml | 2 +- arch/inst/A/amoand.w.yaml | 2 +- arch/inst/A/amomax.d.yaml | 2 +- arch/inst/A/amomax.w.yaml | 2 +- arch/inst/A/amomaxu.d.yaml | 2 +- arch/inst/A/amomaxu.w.yaml | 2 +- arch/inst/A/amomin.d.yaml | 2 +- arch/inst/A/amomin.w.yaml | 2 +- arch/inst/A/amominu.d.yaml | 2 +- arch/inst/A/amominu.w.yaml | 2 +- arch/inst/A/amoor.d.yaml | 2 +- arch/inst/A/amoor.w.yaml | 2 +- arch/inst/A/amoswap.d.yaml | 2 +- arch/inst/A/amoswap.w.yaml | 2 +- arch/inst/A/amoxor.d.yaml | 2 +- arch/inst/A/amoxor.w.yaml | 2 +- arch/inst/A/lr.d.yaml | 2 +- arch/inst/A/lr.w.yaml | 2 +- arch/inst/A/sc.d.yaml | 2 +- arch/inst/A/sc.w.yaml | 2 +- arch/inst/B/add.uw.yaml | 2 +- arch/inst/B/andn.yaml | 2 +- arch/inst/B/bclr.yaml | 2 +- arch/inst/B/bclri.yaml | 2 +- arch/inst/B/bext.yaml | 2 +- arch/inst/B/bexti.yaml | 2 +- arch/inst/B/binv.yaml | 2 +- arch/inst/B/binvi.yaml | 2 +- arch/inst/B/bset.yaml | 2 +- arch/inst/B/bseti.yaml | 2 +- arch/inst/B/clmul.yaml | 2 +- arch/inst/B/clmulh.yaml | 2 +- arch/inst/B/clmulr.yaml | 2 +- arch/inst/B/clz.yaml | 2 +- arch/inst/B/clzw.yaml | 2 +- arch/inst/B/cpop.yaml | 2 +- arch/inst/B/cpopw.yaml | 2 +- arch/inst/B/ctz.yaml | 2 +- arch/inst/B/ctzw.yaml | 2 +- arch/inst/B/max.yaml | 2 +- arch/inst/B/maxu.yaml | 2 +- arch/inst/B/min.yaml | 2 +- arch/inst/B/minu.yaml | 2 +- arch/inst/B/orc.b.yaml | 2 +- arch/inst/B/orn.yaml | 2 +- arch/inst/B/rev8.yaml | 2 +- arch/inst/B/rol.yaml | 2 +- arch/inst/B/rolw.yaml | 2 +- arch/inst/B/ror.yaml | 2 +- arch/inst/B/rori.yaml | 2 +- arch/inst/B/roriw.yaml | 2 +- arch/inst/B/rorw.yaml | 2 +- arch/inst/B/sext.b.yaml | 2 +- arch/inst/B/sext.h.yaml | 2 +- arch/inst/B/sh1add.uw.yaml | 2 +- arch/inst/B/sh1add.yaml | 2 +- arch/inst/B/sh2add.uw.yaml | 2 +- arch/inst/B/sh2add.yaml | 2 +- arch/inst/B/sh3add.uw.yaml | 2 +- arch/inst/B/sh3add.yaml | 2 +- arch/inst/B/slli.uw.yaml | 2 +- arch/inst/B/xnor.yaml | 2 +- arch/inst/B/zext.h.yaml | 2 +- arch/inst/C/c.add.yaml | 2 +- arch/inst/C/c.addw.yaml | 2 +- arch/inst/C/c.and.yaml | 2 +- arch/inst/C/c.andi.yaml | 2 +- arch/inst/C/c.beqz.yaml | 2 +- arch/inst/C/c.bnez.yaml | 2 +- arch/inst/C/c.ebreak.yaml | 2 +- arch/inst/C/c.ld.yaml | 2 +- arch/inst/C/c.lw.yaml | 2 +- arch/inst/C/c.mv.yaml | 2 +- arch/inst/C/c.or.yaml | 2 +- arch/inst/C/c.slli.yaml | 2 +- arch/inst/C/c.srai.yaml | 2 +- arch/inst/C/c.srli.yaml | 2 +- arch/inst/C/c.sub.yaml | 2 +- arch/inst/C/c.subw.yaml | 2 +- arch/inst/C/c.xor.yaml | 2 +- arch/inst/F/fadd.s.yaml | 2 +- arch/inst/F/fclass.s.yaml | 2 +- arch/inst/F/fcvt.l.s.yaml | 2 +- arch/inst/F/fcvt.lu.s.yaml | 2 +- arch/inst/F/fcvt.s.l.yaml | 2 +- arch/inst/F/fcvt.s.lu.yaml | 2 +- arch/inst/F/fcvt.s.w.yaml | 2 +- arch/inst/F/fcvt.s.wu.yaml | 2 +- arch/inst/F/fcvt.w.s.yaml | 2 +- arch/inst/F/fcvt.wu.s.yaml | 2 +- arch/inst/F/fdiv.s.yaml | 2 +- arch/inst/F/feq.s.yaml | 2 +- arch/inst/F/fle.s.yaml | 2 +- arch/inst/F/fleq.s.yaml | 2 +- arch/inst/F/fli.s.yaml | 2 +- arch/inst/F/flt.s.yaml | 2 +- arch/inst/F/fltq.s.yaml | 2 +- arch/inst/F/flw.yaml | 2 +- arch/inst/F/fmadd.s.yaml | 2 +- arch/inst/F/fmax.s.yaml | 2 +- arch/inst/F/fmaxm.s.yaml | 2 +- arch/inst/F/fmin.s.yaml | 2 +- arch/inst/F/fminm.s.yaml | 2 +- arch/inst/F/fmsub.s.yaml | 2 +- arch/inst/F/fmul.s.yaml | 2 +- arch/inst/F/fmv.w.x.yaml | 2 +- arch/inst/F/fmv.x.w.yaml | 2 +- arch/inst/F/fnmadd.s.yaml | 2 +- arch/inst/F/fnmsub.s.yaml | 2 +- arch/inst/F/fround.s.yaml | 2 +- arch/inst/F/froundnx.s.yaml | 2 +- arch/inst/F/fsgnj.s.yaml | 2 +- arch/inst/F/fsgnjn.s.yaml | 2 +- arch/inst/F/fsgnjx.s.yaml | 2 +- arch/inst/F/fsqrt.s.yaml | 2 +- arch/inst/F/fsub.s.yaml | 2 +- arch/inst/F/fsw.yaml | 2 +- arch/inst/I/add.yaml | 2 +- arch/inst/I/addi.yaml | 2 +- arch/inst/I/addiw.yaml | 2 +- arch/inst/I/addw.yaml | 2 +- arch/inst/I/and.yaml | 2 +- arch/inst/I/andi.yaml | 2 +- arch/inst/I/auipc.yaml | 2 +- arch/inst/I/beq.yaml | 2 +- arch/inst/I/bge.yaml | 2 +- arch/inst/I/bgeu.yaml | 2 +- arch/inst/I/blt.yaml | 2 +- arch/inst/I/bltu.yaml | 2 +- arch/inst/I/bne.yaml | 2 +- arch/inst/I/ebreak.yaml | 2 +- arch/inst/I/ecall.yaml | 2 +- arch/inst/I/fence.yaml | 2 +- arch/inst/I/jal.yaml | 2 +- arch/inst/I/jalr.yaml | 2 +- arch/inst/I/lb.yaml | 2 +- arch/inst/I/lbu.yaml | 2 +- arch/inst/I/ld.yaml | 2 +- arch/inst/I/lh.yaml | 2 +- arch/inst/I/lhu.yaml | 2 +- arch/inst/I/lui.yaml | 2 +- arch/inst/I/lw.yaml | 2 +- arch/inst/I/lwu.yaml | 2 +- arch/inst/I/mret.yaml | 2 +- arch/inst/I/or.yaml | 2 +- arch/inst/I/ori.yaml | 2 +- arch/inst/I/sb.yaml | 2 +- arch/inst/I/sd.yaml | 2 +- arch/inst/I/sh.yaml | 2 +- arch/inst/I/sll.yaml | 2 +- arch/inst/I/slli.yaml | 2 +- arch/inst/I/slliw.yaml | 2 +- arch/inst/I/sllw.yaml | 2 +- arch/inst/I/slt.yaml | 2 +- arch/inst/I/slti.yaml | 2 +- arch/inst/I/sltiu.yaml | 2 +- arch/inst/I/sltu.yaml | 2 +- arch/inst/I/sra.yaml | 2 +- arch/inst/I/srai.yaml | 2 +- arch/inst/I/sraiw.yaml | 2 +- arch/inst/I/sraw.yaml | 2 +- arch/inst/I/srl.yaml | 2 +- arch/inst/I/srli.yaml | 2 +- arch/inst/I/srliw.yaml | 2 +- arch/inst/I/srlw.yaml | 2 +- arch/inst/I/sub.yaml | 2 +- arch/inst/I/subw.yaml | 2 +- arch/inst/I/sw.yaml | 2 +- arch/inst/I/wfi.yaml | 2 +- arch/inst/I/xor.yaml | 2 +- arch/inst/I/xori.yaml | 2 +- arch/inst/M/div.yaml | 2 +- arch/inst/M/divu.yaml | 2 +- arch/inst/M/divuw.yaml | 2 +- arch/inst/M/divw.yaml | 2 +- arch/inst/M/mul.yaml | 2 +- arch/inst/M/mulh.yaml | 2 +- arch/inst/M/mulhsu.yaml | 2 +- arch/inst/M/mulhu.yaml | 2 +- arch/inst/M/mulw.yaml | 2 +- arch/inst/M/rem.yaml | 2 +- arch/inst/M/remu.yaml | 2 +- arch/inst/M/remuw.yaml | 2 +- arch/inst/M/remw.yaml | 2 +- arch/inst/S/sfence.vma.yaml | 2 +- arch/inst/S/sret.yaml | 2 +- arch/inst/V/vaadd.vv.yaml | 2 +- arch/inst/V/vaadd.vx.yaml | 2 +- arch/inst/V/vaaddu.vv.yaml | 2 +- arch/inst/V/vaaddu.vx.yaml | 2 +- arch/inst/V/vadc.vim.yaml | 2 +- arch/inst/V/vadc.vvm.yaml | 2 +- arch/inst/V/vadc.vxm.yaml | 2 +- arch/inst/V/vadd.vi.yaml | 2 +- arch/inst/V/vadd.vv.yaml | 2 +- arch/inst/V/vadd.vx.yaml | 2 +- arch/inst/V/vand.vi.yaml | 2 +- arch/inst/V/vand.vv.yaml | 2 +- arch/inst/V/vand.vx.yaml | 2 +- arch/inst/V/vasub.vv.yaml | 2 +- arch/inst/V/vasub.vx.yaml | 2 +- arch/inst/V/vasubu.vv.yaml | 2 +- arch/inst/V/vasubu.vx.yaml | 2 +- arch/inst/V/vcompress.vm.yaml | 2 +- arch/inst/V/vdiv.vv.yaml | 2 +- arch/inst/V/vdiv.vx.yaml | 2 +- arch/inst/V/vdivu.vv.yaml | 2 +- arch/inst/V/vdivu.vx.yaml | 2 +- arch/inst/V/vfadd.vf.yaml | 2 +- arch/inst/V/vfadd.vv.yaml | 2 +- arch/inst/V/vfclass.v.yaml | 2 +- arch/inst/V/vfcvt.f.x.v.yaml | 2 +- arch/inst/V/vfcvt.f.xu.v.yaml | 2 +- arch/inst/V/vfcvt.rtz.x.f.v.yaml | 2 +- arch/inst/V/vfcvt.rtz.xu.f.v.yaml | 2 +- arch/inst/V/vfcvt.x.f.v.yaml | 2 +- arch/inst/V/vfcvt.xu.f.v.yaml | 2 +- arch/inst/V/vfdiv.vf.yaml | 2 +- arch/inst/V/vfdiv.vv.yaml | 2 +- arch/inst/V/vfirst.m.yaml | 2 +- arch/inst/V/vfmacc.vf.yaml | 2 +- arch/inst/V/vfmacc.vv.yaml | 2 +- arch/inst/V/vfmadd.vf.yaml | 2 +- arch/inst/V/vfmadd.vv.yaml | 2 +- arch/inst/V/vfmax.vf.yaml | 2 +- arch/inst/V/vfmax.vv.yaml | 2 +- arch/inst/V/vfmerge.vfm.yaml | 2 +- arch/inst/V/vfmin.vf.yaml | 2 +- arch/inst/V/vfmin.vv.yaml | 2 +- arch/inst/V/vfmsac.vf.yaml | 2 +- arch/inst/V/vfmsac.vv.yaml | 2 +- arch/inst/V/vfmsub.vf.yaml | 2 +- arch/inst/V/vfmsub.vv.yaml | 2 +- arch/inst/V/vfmul.vf.yaml | 2 +- arch/inst/V/vfmul.vv.yaml | 2 +- arch/inst/V/vfmv.f.s.yaml | 2 +- arch/inst/V/vfmv.s.f.yaml | 2 +- arch/inst/V/vfmv.v.f.yaml | 2 +- arch/inst/V/vfncvt.f.f.w.yaml | 2 +- arch/inst/V/vfncvt.f.x.w.yaml | 2 +- arch/inst/V/vfncvt.f.xu.w.yaml | 2 +- arch/inst/V/vfncvt.rod.f.f.w.yaml | 2 +- arch/inst/V/vfncvt.rtz.x.f.w.yaml | 2 +- arch/inst/V/vfncvt.rtz.xu.f.w.yaml | 2 +- arch/inst/V/vfncvt.x.f.w.yaml | 2 +- arch/inst/V/vfncvt.xu.f.w.yaml | 2 +- arch/inst/V/vfnmacc.vf.yaml | 2 +- arch/inst/V/vfnmacc.vv.yaml | 2 +- arch/inst/V/vfnmadd.vf.yaml | 2 +- arch/inst/V/vfnmadd.vv.yaml | 2 +- arch/inst/V/vfnmsac.vf.yaml | 2 +- arch/inst/V/vfnmsac.vv.yaml | 2 +- arch/inst/V/vfnmsub.vf.yaml | 2 +- arch/inst/V/vfnmsub.vv.yaml | 2 +- arch/inst/V/vfrdiv.vf.yaml | 2 +- arch/inst/V/vfrec7.v.yaml | 2 +- arch/inst/V/vfredmax.vs.yaml | 2 +- arch/inst/V/vfredmin.vs.yaml | 2 +- arch/inst/V/vfredosum.vs.yaml | 2 +- arch/inst/V/vfredusum.vs.yaml | 2 +- arch/inst/V/vfrsqrt7.v.yaml | 2 +- arch/inst/V/vfrsub.vf.yaml | 2 +- arch/inst/V/vfsgnj.vf.yaml | 2 +- arch/inst/V/vfsgnj.vv.yaml | 2 +- arch/inst/V/vfsgnjn.vf.yaml | 2 +- arch/inst/V/vfsgnjn.vv.yaml | 2 +- arch/inst/V/vfsgnjx.vf.yaml | 2 +- arch/inst/V/vfsgnjx.vv.yaml | 2 +- arch/inst/V/vfslide1down.vf.yaml | 2 +- arch/inst/V/vfslide1up.vf.yaml | 2 +- arch/inst/V/vfsqrt.v.yaml | 2 +- arch/inst/V/vfsub.vf.yaml | 2 +- arch/inst/V/vfsub.vv.yaml | 2 +- arch/inst/V/vfwadd.vf.yaml | 2 +- arch/inst/V/vfwadd.vv.yaml | 2 +- arch/inst/V/vfwadd.wf.yaml | 2 +- arch/inst/V/vfwadd.wv.yaml | 2 +- arch/inst/V/vfwcvt.f.f.v.yaml | 2 +- arch/inst/V/vfwcvt.f.x.v.yaml | 2 +- arch/inst/V/vfwcvt.f.xu.v.yaml | 2 +- arch/inst/V/vfwcvt.rtz.x.f.v.yaml | 2 +- arch/inst/V/vfwcvt.rtz.xu.f.v.yaml | 2 +- arch/inst/V/vfwcvt.x.f.v.yaml | 2 +- arch/inst/V/vfwcvt.xu.f.v.yaml | 2 +- arch/inst/V/vfwmacc.vf.yaml | 2 +- arch/inst/V/vfwmacc.vv.yaml | 2 +- arch/inst/V/vfwmsac.vf.yaml | 2 +- arch/inst/V/vfwmsac.vv.yaml | 2 +- arch/inst/V/vfwmul.vf.yaml | 2 +- arch/inst/V/vfwmul.vv.yaml | 2 +- arch/inst/V/vfwnmacc.vf.yaml | 2 +- arch/inst/V/vfwnmacc.vv.yaml | 2 +- arch/inst/V/vfwnmsac.vf.yaml | 2 +- arch/inst/V/vfwnmsac.vv.yaml | 2 +- arch/inst/V/vfwredosum.vs.yaml | 2 +- arch/inst/V/vfwredusum.vs.yaml | 2 +- arch/inst/V/vfwsub.vf.yaml | 2 +- arch/inst/V/vfwsub.vv.yaml | 2 +- arch/inst/V/vfwsub.wf.yaml | 2 +- arch/inst/V/vfwsub.wv.yaml | 2 +- arch/inst/V/vid.v.yaml | 2 +- arch/inst/V/viota.m.yaml | 2 +- arch/inst/V/vle16.v.yaml | 2 +- arch/inst/V/vle16ff.v.yaml | 2 +- arch/inst/V/vle32.v.yaml | 2 +- arch/inst/V/vle32ff.v.yaml | 2 +- arch/inst/V/vle64.v.yaml | 2 +- arch/inst/V/vle64ff.v.yaml | 2 +- arch/inst/V/vle8.v.yaml | 2 +- arch/inst/V/vle8ff.v.yaml | 2 +- arch/inst/V/vlm.v.yaml | 2 +- arch/inst/V/vloxei16.v.yaml | 2 +- arch/inst/V/vloxei32.v.yaml | 2 +- arch/inst/V/vloxei64.v.yaml | 2 +- arch/inst/V/vloxei8.v.yaml | 2 +- arch/inst/V/vlse16.v.yaml | 2 +- arch/inst/V/vlse32.v.yaml | 2 +- arch/inst/V/vlse64.v.yaml | 2 +- arch/inst/V/vlse8.v.yaml | 2 +- arch/inst/V/vluxei16.v.yaml | 2 +- arch/inst/V/vluxei32.v.yaml | 2 +- arch/inst/V/vluxei64.v.yaml | 2 +- arch/inst/V/vluxei8.v.yaml | 2 +- arch/inst/V/vmacc.vv.yaml | 2 +- arch/inst/V/vmacc.vx.yaml | 2 +- arch/inst/V/vmadc.vi.yaml | 2 +- arch/inst/V/vmadc.vim.yaml | 2 +- arch/inst/V/vmadc.vv.yaml | 2 +- arch/inst/V/vmadc.vvm.yaml | 2 +- arch/inst/V/vmadc.vx.yaml | 2 +- arch/inst/V/vmadc.vxm.yaml | 2 +- arch/inst/V/vmadd.vv.yaml | 2 +- arch/inst/V/vmadd.vx.yaml | 2 +- arch/inst/V/vmand.mm.yaml | 2 +- arch/inst/V/vmax.vv.yaml | 2 +- arch/inst/V/vmax.vx.yaml | 2 +- arch/inst/V/vmaxu.vv.yaml | 2 +- arch/inst/V/vmaxu.vx.yaml | 2 +- arch/inst/V/vmerge.vim.yaml | 2 +- arch/inst/V/vmerge.vvm.yaml | 2 +- arch/inst/V/vmerge.vxm.yaml | 2 +- arch/inst/V/vmfeq.vf.yaml | 2 +- arch/inst/V/vmfeq.vv.yaml | 2 +- arch/inst/V/vmfge.vf.yaml | 2 +- arch/inst/V/vmfgt.vf.yaml | 2 +- arch/inst/V/vmfle.vf.yaml | 2 +- arch/inst/V/vmfle.vv.yaml | 2 +- arch/inst/V/vmflt.vf.yaml | 2 +- arch/inst/V/vmflt.vv.yaml | 2 +- arch/inst/V/vmfne.vf.yaml | 2 +- arch/inst/V/vmfne.vv.yaml | 2 +- arch/inst/V/vmin.vv.yaml | 2 +- arch/inst/V/vmin.vx.yaml | 2 +- arch/inst/V/vminu.vv.yaml | 2 +- arch/inst/V/vminu.vx.yaml | 2 +- arch/inst/V/vmnand.mm.yaml | 2 +- arch/inst/V/vmnor.mm.yaml | 2 +- arch/inst/V/vmor.mm.yaml | 2 +- arch/inst/V/vmsbc.vv.yaml | 2 +- arch/inst/V/vmsbc.vvm.yaml | 2 +- arch/inst/V/vmsbc.vx.yaml | 2 +- arch/inst/V/vmsbc.vxm.yaml | 2 +- arch/inst/V/vmsbf.m.yaml | 2 +- arch/inst/V/vmseq.vi.yaml | 2 +- arch/inst/V/vmseq.vv.yaml | 2 +- arch/inst/V/vmseq.vx.yaml | 2 +- arch/inst/V/vmsgt.vi.yaml | 2 +- arch/inst/V/vmsgt.vx.yaml | 2 +- arch/inst/V/vmsgtu.vi.yaml | 2 +- arch/inst/V/vmsgtu.vx.yaml | 2 +- arch/inst/V/vmsif.m.yaml | 2 +- arch/inst/V/vmsle.vi.yaml | 2 +- arch/inst/V/vmsle.vv.yaml | 2 +- arch/inst/V/vmsle.vx.yaml | 2 +- arch/inst/V/vmsleu.vi.yaml | 2 +- arch/inst/V/vmsleu.vv.yaml | 2 +- arch/inst/V/vmsleu.vx.yaml | 2 +- arch/inst/V/vmslt.vv.yaml | 2 +- arch/inst/V/vmslt.vx.yaml | 2 +- arch/inst/V/vmsltu.vv.yaml | 2 +- arch/inst/V/vmsltu.vx.yaml | 2 +- arch/inst/V/vmsne.vi.yaml | 2 +- arch/inst/V/vmsne.vv.yaml | 2 +- arch/inst/V/vmsne.vx.yaml | 2 +- arch/inst/V/vmsof.m.yaml | 2 +- arch/inst/V/vmul.vv.yaml | 2 +- arch/inst/V/vmul.vx.yaml | 2 +- arch/inst/V/vmulh.vv.yaml | 2 +- arch/inst/V/vmulh.vx.yaml | 2 +- arch/inst/V/vmulhsu.vv.yaml | 2 +- arch/inst/V/vmulhsu.vx.yaml | 2 +- arch/inst/V/vmulhu.vv.yaml | 2 +- arch/inst/V/vmulhu.vx.yaml | 2 +- arch/inst/V/vmv.s.x.yaml | 2 +- arch/inst/V/vmv.v.i.yaml | 2 +- arch/inst/V/vmv.v.v.yaml | 2 +- arch/inst/V/vmv.v.x.yaml | 2 +- arch/inst/V/vmv.x.s.yaml | 2 +- arch/inst/V/vmv1r.v.yaml | 2 +- arch/inst/V/vmv2r.v.yaml | 2 +- arch/inst/V/vmv4r.v.yaml | 2 +- arch/inst/V/vmv8r.v.yaml | 2 +- arch/inst/V/vmxnor.mm.yaml | 2 +- arch/inst/V/vmxor.mm.yaml | 2 +- arch/inst/V/vnclip.wi.yaml | 2 +- arch/inst/V/vnclip.wv.yaml | 2 +- arch/inst/V/vnclip.wx.yaml | 2 +- arch/inst/V/vnclipu.wi.yaml | 2 +- arch/inst/V/vnclipu.wv.yaml | 2 +- arch/inst/V/vnclipu.wx.yaml | 2 +- arch/inst/V/vnmsac.vv.yaml | 2 +- arch/inst/V/vnmsac.vx.yaml | 2 +- arch/inst/V/vnmsub.vv.yaml | 2 +- arch/inst/V/vnmsub.vx.yaml | 2 +- arch/inst/V/vnsra.wi.yaml | 2 +- arch/inst/V/vnsra.wv.yaml | 2 +- arch/inst/V/vnsra.wx.yaml | 2 +- arch/inst/V/vnsrl.wi.yaml | 2 +- arch/inst/V/vnsrl.wv.yaml | 2 +- arch/inst/V/vnsrl.wx.yaml | 2 +- arch/inst/V/vor.vi.yaml | 2 +- arch/inst/V/vor.vv.yaml | 2 +- arch/inst/V/vor.vx.yaml | 2 +- arch/inst/V/vredand.vs.yaml | 2 +- arch/inst/V/vredmax.vs.yaml | 2 +- arch/inst/V/vredmaxu.vs.yaml | 2 +- arch/inst/V/vredmin.vs.yaml | 2 +- arch/inst/V/vredminu.vs.yaml | 2 +- arch/inst/V/vredor.vs.yaml | 2 +- arch/inst/V/vredsum.vs.yaml | 2 +- arch/inst/V/vredxor.vs.yaml | 2 +- arch/inst/V/vrem.vv.yaml | 2 +- arch/inst/V/vrem.vx.yaml | 2 +- arch/inst/V/vremu.vv.yaml | 2 +- arch/inst/V/vremu.vx.yaml | 2 +- arch/inst/V/vrgather.vi.yaml | 2 +- arch/inst/V/vrgather.vv.yaml | 2 +- arch/inst/V/vrgather.vx.yaml | 2 +- arch/inst/V/vrgatherei16.vv.yaml | 2 +- arch/inst/V/vrsub.vi.yaml | 2 +- arch/inst/V/vrsub.vx.yaml | 2 +- arch/inst/V/vsadd.vi.yaml | 2 +- arch/inst/V/vsadd.vv.yaml | 2 +- arch/inst/V/vsadd.vx.yaml | 2 +- arch/inst/V/vsaddu.vi.yaml | 2 +- arch/inst/V/vsaddu.vv.yaml | 2 +- arch/inst/V/vsaddu.vx.yaml | 2 +- arch/inst/V/vsbc.vvm.yaml | 2 +- arch/inst/V/vsbc.vxm.yaml | 2 +- arch/inst/V/vse16.v.yaml | 2 +- arch/inst/V/vse32.v.yaml | 2 +- arch/inst/V/vse64.v.yaml | 2 +- arch/inst/V/vse8.v.yaml | 2 +- arch/inst/V/vsetivli.yaml | 2 +- arch/inst/V/vsetvli.yaml | 2 +- arch/inst/V/vsext.vf2.yaml | 2 +- arch/inst/V/vsext.vf4.yaml | 2 +- arch/inst/V/vsext.vf8.yaml | 2 +- arch/inst/V/vslide1down.vx.yaml | 2 +- arch/inst/V/vslide1up.vx.yaml | 2 +- arch/inst/V/vslidedown.vi.yaml | 2 +- arch/inst/V/vslidedown.vx.yaml | 2 +- arch/inst/V/vslideup.vi.yaml | 2 +- arch/inst/V/vslideup.vx.yaml | 2 +- arch/inst/V/vsll.vi.yaml | 2 +- arch/inst/V/vsll.vv.yaml | 2 +- arch/inst/V/vsll.vx.yaml | 2 +- arch/inst/V/vsm.v.yaml | 2 +- arch/inst/V/vsmul.vv.yaml | 2 +- arch/inst/V/vsmul.vx.yaml | 2 +- arch/inst/V/vsoxei16.v.yaml | 2 +- arch/inst/V/vsoxei32.v.yaml | 2 +- arch/inst/V/vsoxei64.v.yaml | 2 +- arch/inst/V/vsoxei8.v.yaml | 2 +- arch/inst/V/vsra.vi.yaml | 2 +- arch/inst/V/vsra.vv.yaml | 2 +- arch/inst/V/vsra.vx.yaml | 2 +- arch/inst/V/vsrl.vi.yaml | 2 +- arch/inst/V/vsrl.vv.yaml | 2 +- arch/inst/V/vsrl.vx.yaml | 2 +- arch/inst/V/vsse16.v.yaml | 2 +- arch/inst/V/vsse32.v.yaml | 2 +- arch/inst/V/vsse64.v.yaml | 2 +- arch/inst/V/vsse8.v.yaml | 2 +- arch/inst/V/vssra.vi.yaml | 2 +- arch/inst/V/vssra.vv.yaml | 2 +- arch/inst/V/vssra.vx.yaml | 2 +- arch/inst/V/vssrl.vi.yaml | 2 +- arch/inst/V/vssrl.vv.yaml | 2 +- arch/inst/V/vssrl.vx.yaml | 2 +- arch/inst/V/vssub.vv.yaml | 2 +- arch/inst/V/vssub.vx.yaml | 2 +- arch/inst/V/vssubu.vv.yaml | 2 +- arch/inst/V/vssubu.vx.yaml | 2 +- arch/inst/V/vsub.vv.yaml | 2 +- arch/inst/V/vsub.vx.yaml | 2 +- arch/inst/V/vsuxei16.v.yaml | 2 +- arch/inst/V/vsuxei32.v.yaml | 2 +- arch/inst/V/vsuxei64.v.yaml | 2 +- arch/inst/V/vsuxei8.v.yaml | 2 +- arch/inst/V/vwadd.vv.yaml | 2 +- arch/inst/V/vwadd.vx.yaml | 2 +- arch/inst/V/vwadd.wv.yaml | 2 +- arch/inst/V/vwadd.wx.yaml | 2 +- arch/inst/V/vwaddu.vv.yaml | 2 +- arch/inst/V/vwaddu.vx.yaml | 2 +- arch/inst/V/vwaddu.wv.yaml | 2 +- arch/inst/V/vwaddu.wx.yaml | 2 +- arch/inst/V/vwmacc.vv.yaml | 2 +- arch/inst/V/vwmacc.vx.yaml | 2 +- arch/inst/V/vwmaccsu.vv.yaml | 2 +- arch/inst/V/vwmaccsu.vx.yaml | 2 +- arch/inst/V/vwmaccu.vv.yaml | 2 +- arch/inst/V/vwmaccu.vx.yaml | 2 +- arch/inst/V/vwmaccus.vx.yaml | 2 +- arch/inst/V/vwmul.vv.yaml | 2 +- arch/inst/V/vwmul.vx.yaml | 2 +- arch/inst/V/vwmulsu.vv.yaml | 2 +- arch/inst/V/vwmulsu.vx.yaml | 2 +- arch/inst/V/vwmulu.vv.yaml | 2 +- arch/inst/V/vwmulu.vx.yaml | 2 +- arch/inst/V/vwredsum.vs.yaml | 2 +- arch/inst/V/vwredsumu.vs.yaml | 2 +- arch/inst/V/vwsub.vv.yaml | 2 +- arch/inst/V/vwsub.vx.yaml | 2 +- arch/inst/V/vwsub.wv.yaml | 2 +- arch/inst/V/vwsub.wx.yaml | 2 +- arch/inst/V/vwsubu.vv.yaml | 2 +- arch/inst/V/vwsubu.vx.yaml | 2 +- arch/inst/V/vwsubu.wv.yaml | 2 +- arch/inst/V/vwsubu.wx.yaml | 2 +- arch/inst/V/vxor.vi.yaml | 2 +- arch/inst/V/vxor.vv.yaml | 2 +- arch/inst/V/vxor.vx.yaml | 2 +- arch/inst/V/vzext.vf2.yaml | 2 +- arch/inst/V/vzext.vf4.yaml | 2 +- arch/inst/V/vzext.vf8.yaml | 2 +- arch/inst/Zabha/amoadd.b.yaml | 2 +- arch/inst/Zabha/amoadd.h.yaml | 2 +- arch/inst/Zabha/amoand.b.yaml | 2 +- arch/inst/Zabha/amoand.h.yaml | 2 +- arch/inst/Zabha/amomax.b.yaml | 2 +- arch/inst/Zabha/amomax.h.yaml | 2 +- arch/inst/Zabha/amomaxu.b.yaml | 2 +- arch/inst/Zabha/amomaxu.h.yaml | 2 +- arch/inst/Zabha/amomin.b.yaml | 2 +- arch/inst/Zabha/amomin.h.yaml | 2 +- arch/inst/Zabha/amominu.b.yaml | 2 +- arch/inst/Zabha/amominu.h.yaml | 2 +- arch/inst/Zabha/amoor.b.yaml | 2 +- arch/inst/Zabha/amoor.h.yaml | 2 +- arch/inst/Zabha/amoswap.b.yaml | 2 +- arch/inst/Zabha/amoswap.h.yaml | 2 +- arch/inst/Zabha/amoxor.b.yaml | 2 +- arch/inst/Zabha/amoxor.h.yaml | 2 +- arch/inst/Zalasr/lb.aq.yaml | 2 +- arch/inst/Zalasr/ld.aq.yaml | 2 +- arch/inst/Zalasr/lh.aq.yaml | 2 +- arch/inst/Zalasr/lw.aq.yaml | 2 +- arch/inst/Zalasr/sb.rl.yaml | 2 +- arch/inst/Zalasr/sd.rl.yaml | 2 +- arch/inst/Zalasr/sh.rl.yaml | 2 +- arch/inst/Zalasr/sw.rl.yaml | 2 +- arch/inst/Zbkb/brev8.yaml | 2 +- arch/inst/Zbkb/unzip.yaml | 2 +- arch/inst/Zbkb/zip.yaml | 2 +- arch/inst/Zbkx/xperm4.yaml | 2 +- arch/inst/Zbkx/xperm8.yaml | 2 +- arch/inst/Zcb/c.lbu.yaml | 2 +- arch/inst/Zcb/c.lh.yaml | 2 +- arch/inst/Zcb/c.lhu.yaml | 2 +- arch/inst/Zcb/c.mul.yaml | 2 +- arch/inst/Zcb/c.not.yaml | 2 +- arch/inst/Zcb/c.sext.b.yaml | 2 +- arch/inst/Zcb/c.sext.h.yaml | 2 +- arch/inst/Zcb/c.zext.b.yaml | 2 +- arch/inst/Zcb/c.zext.h.yaml | 2 +- arch/inst/Zcb/c.zext.w.yaml | 2 +- arch/inst/Zfh/fcvt.h.s.yaml | 2 +- arch/inst/Zfh/fcvt.s.h.yaml | 2 +- arch/inst/Zfh/flh.yaml | 2 +- arch/inst/Zfh/fmv.h.x.yaml | 2 +- arch/inst/Zfh/fmv.x.h.yaml | 2 +- arch/inst/Zfh/fsh.yaml | 2 +- arch/inst/Zicond/czero.eqz.yaml | 2 +- arch/inst/Zicond/czero.nez.yaml | 2 +- arch/inst/Zicsr/csrrs.yaml | 2 +- arch/inst/Zicsr/csrrw.yaml | 2 +- arch/inst/Zicsr/csrrwi.yaml | 2 +- arch/inst/Zifencei/fence.i.yaml | 2 +- 592 files changed, 592 insertions(+), 592 deletions(-) diff --git a/arch/inst/A/amoadd.d.yaml b/arch/inst/A/amoadd.d.yaml index 3b95434918..c5cc213a45 100644 --- a/arch/inst/A/amoadd.d.yaml +++ b/arch/inst/A/amoadd.d.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Add, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoadd.w.yaml b/arch/inst/A/amoadd.w.yaml index fe158dafbe..117b0815e9 100644 --- a/arch/inst/A/amoadd.w.yaml +++ b/arch/inst/A/amoadd.w.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Add, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoand.d.yaml b/arch/inst/A/amoand.d.yaml index 37c5f1aa9b..d6481cf2f2 100644 --- a/arch/inst/A/amoand.d.yaml +++ b/arch/inst/A/amoand.d.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::And, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoand.w.yaml b/arch/inst/A/amoand.w.yaml index f869b4566f..0cc1ba973d 100644 --- a/arch/inst/A/amoand.w.yaml +++ b/arch/inst/A/amoand.w.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::And, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amomax.d.yaml b/arch/inst/A/amomax.d.yaml index b2ce7bcdca..bd637bf63b 100644 --- a/arch/inst/A/amomax.d.yaml +++ b/arch/inst/A/amomax.d.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Max, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amomax.w.yaml b/arch/inst/A/amomax.w.yaml index 694237bb11..6b245fc799 100644 --- a/arch/inst/A/amomax.w.yaml +++ b/arch/inst/A/amomax.w.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Max, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amomaxu.d.yaml b/arch/inst/A/amomaxu.d.yaml index 9e2381ddde..ae20087b12 100644 --- a/arch/inst/A/amomaxu.d.yaml +++ b/arch/inst/A/amomaxu.d.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Maxu, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amomaxu.w.yaml b/arch/inst/A/amomaxu.w.yaml index 7fd936328e..5633a8deed 100644 --- a/arch/inst/A/amomaxu.w.yaml +++ b/arch/inst/A/amomaxu.w.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Maxu, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amomin.d.yaml b/arch/inst/A/amomin.d.yaml index e7daf18534..d622de64ae 100644 --- a/arch/inst/A/amomin.d.yaml +++ b/arch/inst/A/amomin.d.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Min, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amomin.w.yaml b/arch/inst/A/amomin.w.yaml index faaad532c4..58ec13ac32 100644 --- a/arch/inst/A/amomin.w.yaml +++ b/arch/inst/A/amomin.w.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Min, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amominu.d.yaml b/arch/inst/A/amominu.d.yaml index 29bcb9de31..90b79d7d83 100644 --- a/arch/inst/A/amominu.d.yaml +++ b/arch/inst/A/amominu.d.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Minu, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amominu.w.yaml b/arch/inst/A/amominu.w.yaml index 96f46ad1be..11d1c64c15 100644 --- a/arch/inst/A/amominu.w.yaml +++ b/arch/inst/A/amominu.w.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Minu, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoor.d.yaml b/arch/inst/A/amoor.d.yaml index 49f64d5b6c..d4bcdf4262 100644 --- a/arch/inst/A/amoor.d.yaml +++ b/arch/inst/A/amoor.d.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Or, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoor.w.yaml b/arch/inst/A/amoor.w.yaml index f44e606e57..98a093680b 100644 --- a/arch/inst/A/amoor.w.yaml +++ b/arch/inst/A/amoor.w.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Or, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoswap.d.yaml b/arch/inst/A/amoswap.d.yaml index 092e549675..0323a3593f 100644 --- a/arch/inst/A/amoswap.d.yaml +++ b/arch/inst/A/amoswap.d.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Swap, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoswap.w.yaml b/arch/inst/A/amoswap.w.yaml index 415de161ce..ea11004c0c 100644 --- a/arch/inst/A/amoswap.w.yaml +++ b/arch/inst/A/amoswap.w.yaml @@ -43,7 +43,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Swap, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoxor.d.yaml b/arch/inst/A/amoxor.d.yaml index 3492878f6e..dfa80cb933 100644 --- a/arch/inst/A/amoxor.d.yaml +++ b/arch/inst/A/amoxor.d.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = amo<64>(virtual_address, X[rs2], AmoOperation::Xor, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/amoxor.w.yaml b/arch/inst/A/amoxor.w.yaml index ea36b3563b..3d954cd875 100644 --- a/arch/inst/A/amoxor.w.yaml +++ b/arch/inst/A/amoxor.w.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = amo<32>(virtual_address, X[rs2][31:0], AmoOperation::Xor, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/lr.d.yaml b/arch/inst/A/lr.d.yaml index 58115f6d3e..daf0601236 100644 --- a/arch/inst/A/lr.d.yaml +++ b/arch/inst/A/lr.d.yaml @@ -92,7 +92,7 @@ operation(): | X[rd] = load_reserved<32>(virtual_address, aq, rl, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/lr.w.yaml b/arch/inst/A/lr.w.yaml index aba2c7c99c..8850f725f8 100644 --- a/arch/inst/A/lr.w.yaml +++ b/arch/inst/A/lr.w.yaml @@ -101,7 +101,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/sc.d.yaml b/arch/inst/A/sc.d.yaml index f7e1c4aa09..42a6882920 100644 --- a/arch/inst/A/sc.d.yaml +++ b/arch/inst/A/sc.d.yaml @@ -152,7 +152,7 @@ operation(): | X[rd] = success ? 0 : 1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/A/sc.w.yaml b/arch/inst/A/sc.w.yaml index f702f75c26..dd2f01b071 100644 --- a/arch/inst/A/sc.w.yaml +++ b/arch/inst/A/sc.w.yaml @@ -157,7 +157,7 @@ operation(): | X[rd] = success ? 0 : 1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/add.uw.yaml b/arch/inst/B/add.uw.yaml index e91bf0c6af..9bf9f6fe86 100644 --- a/arch/inst/B/add.uw.yaml +++ b/arch/inst/B/add.uw.yaml @@ -36,7 +36,7 @@ operation(): | X[rd] = X[rs2] + X[rs1][31:0]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/andn.yaml b/arch/inst/B/andn.yaml index 2374b4243e..297b6e064f 100644 --- a/arch/inst/B/andn.yaml +++ b/arch/inst/B/andn.yaml @@ -33,7 +33,7 @@ operation(): | X[rd] = X[rs2] & ~X[rs1]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/bclr.yaml b/arch/inst/B/bclr.yaml index 63b69ad259..3177c323a2 100644 --- a/arch/inst/B/bclr.yaml +++ b/arch/inst/B/bclr.yaml @@ -33,7 +33,7 @@ operation(): | X[rd] = X[rs1] & ~(1 << index); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/bclri.yaml b/arch/inst/B/bclri.yaml index d4f9bb3fc3..9147465b78 100644 --- a/arch/inst/B/bclri.yaml +++ b/arch/inst/B/bclri.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = X[rs1] & ~(1 << index); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/bext.yaml b/arch/inst/B/bext.yaml index 5d407eb0d6..70b0f66aed 100644 --- a/arch/inst/B/bext.yaml +++ b/arch/inst/B/bext.yaml @@ -33,7 +33,7 @@ operation(): | X[rd] = (X[rs1] >> index) & 1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/bexti.yaml b/arch/inst/B/bexti.yaml index e819cd9457..032845b767 100644 --- a/arch/inst/B/bexti.yaml +++ b/arch/inst/B/bexti.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = (X[rs1] >> index) & 1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/binv.yaml b/arch/inst/B/binv.yaml index 5501b1dd19..4c2e4de0fb 100644 --- a/arch/inst/B/binv.yaml +++ b/arch/inst/B/binv.yaml @@ -33,7 +33,7 @@ operation(): | X[rd] = X[rs1] ^ (1 << index); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/binvi.yaml b/arch/inst/B/binvi.yaml index 839d6d338a..c2c6f07660 100644 --- a/arch/inst/B/binvi.yaml +++ b/arch/inst/B/binvi.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = X[rs1] ^ (1 << index); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/bset.yaml b/arch/inst/B/bset.yaml index 00c6ab7e8d..409645d1db 100644 --- a/arch/inst/B/bset.yaml +++ b/arch/inst/B/bset.yaml @@ -33,7 +33,7 @@ operation(): | X[rd] = X[rs1] | (1 << index); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/bseti.yaml b/arch/inst/B/bseti.yaml index 2e5ce16746..8a3aef7791 100644 --- a/arch/inst/B/bseti.yaml +++ b/arch/inst/B/bseti.yaml @@ -44,7 +44,7 @@ operation(): | X[rd] = X[rs1] | (1 << index); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/clmul.yaml b/arch/inst/B/clmul.yaml index 3f774cbd91..22b0f740f9 100644 --- a/arch/inst/B/clmul.yaml +++ b/arch/inst/B/clmul.yaml @@ -42,7 +42,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/clmulh.yaml b/arch/inst/B/clmulh.yaml index c204b21eca..a08c6cc213 100644 --- a/arch/inst/B/clmulh.yaml +++ b/arch/inst/B/clmulh.yaml @@ -42,7 +42,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/clmulr.yaml b/arch/inst/B/clmulr.yaml index be4bce3cf4..640b4b5e07 100644 --- a/arch/inst/B/clmulr.yaml +++ b/arch/inst/B/clmulr.yaml @@ -40,7 +40,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/clz.yaml b/arch/inst/B/clz.yaml index 29f9e73614..10fa785cb4 100644 --- a/arch/inst/B/clz.yaml +++ b/arch/inst/B/clz.yaml @@ -32,7 +32,7 @@ operation(): | X[rd] = (xlen() - 1) - $signed(highest_set_bit(X[rs1])); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/clzw.yaml b/arch/inst/B/clzw.yaml index 8df6fc837f..d05e5a4760 100644 --- a/arch/inst/B/clzw.yaml +++ b/arch/inst/B/clzw.yaml @@ -32,7 +32,7 @@ operation(): | X[rd] = 31 - $signed(highest_set_bit(X[rs1][31:0])); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/cpop.yaml b/arch/inst/B/cpop.yaml index 08ff8c857e..25719c66bc 100644 --- a/arch/inst/B/cpop.yaml +++ b/arch/inst/B/cpop.yaml @@ -50,7 +50,7 @@ operation(): | X[rd] = bitcount; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/cpopw.yaml b/arch/inst/B/cpopw.yaml index 3899494b2a..2dcf6d19f8 100644 --- a/arch/inst/B/cpopw.yaml +++ b/arch/inst/B/cpopw.yaml @@ -51,7 +51,7 @@ operation(): | X[rd] = bitcount; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/ctz.yaml b/arch/inst/B/ctz.yaml index 4f4f039473..e30df8632d 100644 --- a/arch/inst/B/ctz.yaml +++ b/arch/inst/B/ctz.yaml @@ -37,7 +37,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/ctzw.yaml b/arch/inst/B/ctzw.yaml index e6690454b0..91317b67f7 100644 --- a/arch/inst/B/ctzw.yaml +++ b/arch/inst/B/ctzw.yaml @@ -34,7 +34,7 @@ operation(): | X[rd] = lowest_set_bit(X[rs1][31:0]); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/max.yaml b/arch/inst/B/max.yaml index f6fc23a8ad..c82246c7a3 100644 --- a/arch/inst/B/max.yaml +++ b/arch/inst/B/max.yaml @@ -39,7 +39,7 @@ operation(): | X[rd] = ($signed(X[rs1]) > $signed(X[rs2])) ? X[rs1] : X[rs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/maxu.yaml b/arch/inst/B/maxu.yaml index 9b6b928517..9dda171ae4 100644 --- a/arch/inst/B/maxu.yaml +++ b/arch/inst/B/maxu.yaml @@ -31,7 +31,7 @@ operation(): | X[rd] = (X[rs1] > X[rs2]) ? X[rs1] : X[rs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/min.yaml b/arch/inst/B/min.yaml index 0fdc2bac72..56e9118ab9 100644 --- a/arch/inst/B/min.yaml +++ b/arch/inst/B/min.yaml @@ -31,7 +31,7 @@ operation(): | X[rd] = ($signed(X[rs1]) < $signed(X[rs2])) ? X[rs1] : X[rs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/minu.yaml b/arch/inst/B/minu.yaml index 9239ce4555..a1994cd768 100644 --- a/arch/inst/B/minu.yaml +++ b/arch/inst/B/minu.yaml @@ -31,7 +31,7 @@ operation(): | X[rd] = (X[rs1] < X[rs2]) ? X[rs1] : X[rs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/orc.b.yaml b/arch/inst/B/orc.b.yaml index cbae79bb1f..0a75af6ab1 100644 --- a/arch/inst/B/orc.b.yaml +++ b/arch/inst/B/orc.b.yaml @@ -38,7 +38,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/orn.yaml b/arch/inst/B/orn.yaml index 52366d33fe..4e428befc7 100644 --- a/arch/inst/B/orn.yaml +++ b/arch/inst/B/orn.yaml @@ -32,7 +32,7 @@ operation(): | X[rd] = X[rs1] | ~X[rs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/rev8.yaml b/arch/inst/B/rev8.yaml index ccafdcfb5b..5793fc6525 100644 --- a/arch/inst/B/rev8.yaml +++ b/arch/inst/B/rev8.yaml @@ -56,7 +56,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/rol.yaml b/arch/inst/B/rol.yaml index cd6275ee67..f47688045f 100644 --- a/arch/inst/B/rol.yaml +++ b/arch/inst/B/rol.yaml @@ -34,7 +34,7 @@ operation(): | X[rd] = (X[rs1] << shamt) | (X[rs1] >> (xlen() - shamt)); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/rolw.yaml b/arch/inst/B/rolw.yaml index 4cdf61cf5d..df8363fb72 100644 --- a/arch/inst/B/rolw.yaml +++ b/arch/inst/B/rolw.yaml @@ -39,7 +39,7 @@ operation(): | X[rd] = {{32{unextended_result[31]}}, unextended_result}; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/ror.yaml b/arch/inst/B/ror.yaml index 72cd1b29cd..53d3f0748b 100644 --- a/arch/inst/B/ror.yaml +++ b/arch/inst/B/ror.yaml @@ -34,7 +34,7 @@ operation(): | X[rd] = (X[rs1] >> shamt) | (X[rs1] << (xlen() - shamt)); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/rori.yaml b/arch/inst/B/rori.yaml index 6d28cfd419..b4322bbf0e 100644 --- a/arch/inst/B/rori.yaml +++ b/arch/inst/B/rori.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = (X[rs1] >> shamt) | (X[rs1] << (xlen() - shamt)); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/roriw.yaml b/arch/inst/B/roriw.yaml index d725ee7d1c..c2b22f3478 100644 --- a/arch/inst/B/roriw.yaml +++ b/arch/inst/B/roriw.yaml @@ -38,7 +38,7 @@ operation(): | X[rd] = {{32{unextended_result[31]}}, unextended_result}; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/rorw.yaml b/arch/inst/B/rorw.yaml index af4c3e9f5a..6fdd07f1a6 100644 --- a/arch/inst/B/rorw.yaml +++ b/arch/inst/B/rorw.yaml @@ -39,7 +39,7 @@ operation(): | X[rd] = {{32{unextended_result[31]}}, unextended_result}; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/sext.b.yaml b/arch/inst/B/sext.b.yaml index 45d7525788..fc34ada145 100644 --- a/arch/inst/B/sext.b.yaml +++ b/arch/inst/B/sext.b.yaml @@ -34,7 +34,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/sext.h.yaml b/arch/inst/B/sext.h.yaml index d9c5522d49..528220b788 100644 --- a/arch/inst/B/sext.h.yaml +++ b/arch/inst/B/sext.h.yaml @@ -34,7 +34,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/sh1add.uw.yaml b/arch/inst/B/sh1add.uw.yaml index 388f7849f3..effe842e80 100644 --- a/arch/inst/B/sh1add.uw.yaml +++ b/arch/inst/B/sh1add.uw.yaml @@ -34,7 +34,7 @@ operation(): | X[rd] = X[rs2] + (X[rs1][31:0] << 1); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/sh1add.yaml b/arch/inst/B/sh1add.yaml index fa5b9347af..78d9602757 100644 --- a/arch/inst/B/sh1add.yaml +++ b/arch/inst/B/sh1add.yaml @@ -31,7 +31,7 @@ operation(): | X[rd] = X[rs2] + (X[rs1] << 1); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/sh2add.uw.yaml b/arch/inst/B/sh2add.uw.yaml index 2868a9b69b..d69ce4b17c 100644 --- a/arch/inst/B/sh2add.uw.yaml +++ b/arch/inst/B/sh2add.uw.yaml @@ -34,7 +34,7 @@ operation(): | X[rd] = X[rs2] + (X[rs1][31:0] << 2); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/sh2add.yaml b/arch/inst/B/sh2add.yaml index e11ffa9066..fb99b7c845 100644 --- a/arch/inst/B/sh2add.yaml +++ b/arch/inst/B/sh2add.yaml @@ -31,7 +31,7 @@ operation(): | X[rd] = X[rs2] + (X[rs1] << 2); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/sh3add.uw.yaml b/arch/inst/B/sh3add.uw.yaml index 95da661571..74d093109b 100644 --- a/arch/inst/B/sh3add.uw.yaml +++ b/arch/inst/B/sh3add.uw.yaml @@ -34,7 +34,7 @@ operation(): | X[rd] = X[rs2] + (X[rs1][31:0] << 3); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/sh3add.yaml b/arch/inst/B/sh3add.yaml index 59d38df6b8..37336d9afb 100644 --- a/arch/inst/B/sh3add.yaml +++ b/arch/inst/B/sh3add.yaml @@ -31,7 +31,7 @@ operation(): | X[rd] = X[rs2] + (X[rs1] << 3); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/slli.uw.yaml b/arch/inst/B/slli.uw.yaml index 5ed2e7b684..7b4f9d385e 100644 --- a/arch/inst/B/slli.uw.yaml +++ b/arch/inst/B/slli.uw.yaml @@ -36,7 +36,7 @@ operation(): | X[rd] = X[rs1][31:0] << shamt; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/xnor.yaml b/arch/inst/B/xnor.yaml index 948bbcfb43..ad4f8a16c5 100644 --- a/arch/inst/B/xnor.yaml +++ b/arch/inst/B/xnor.yaml @@ -32,7 +32,7 @@ operation(): | X[rd] = ~(X[rs1] ^ X[rs2]); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/B/zext.h.yaml b/arch/inst/B/zext.h.yaml index 76efcf669a..948ba016ff 100644 --- a/arch/inst/B/zext.h.yaml +++ b/arch/inst/B/zext.h.yaml @@ -48,7 +48,7 @@ operation(): | X[rd] = X[rs1][15:0]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.add.yaml b/arch/inst/C/c.add.yaml index 00ae28db49..42105c4b5a 100644 --- a/arch/inst/C/c.add.yaml +++ b/arch/inst/C/c.add.yaml @@ -32,7 +32,7 @@ operation(): | X[rd] = t0 + t1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.addw.yaml b/arch/inst/C/c.addw.yaml index af5cf2cc7f..4ed39d483b 100644 --- a/arch/inst/C/c.addw.yaml +++ b/arch/inst/C/c.addw.yaml @@ -32,7 +32,7 @@ operation(): | X[creg2reg(rd)] = $signed(t0 + t1); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.and.yaml b/arch/inst/C/c.and.yaml index 2ee631c788..50e37d78b8 100644 --- a/arch/inst/C/c.and.yaml +++ b/arch/inst/C/c.and.yaml @@ -31,7 +31,7 @@ operation(): | X[creg2reg(rd)] = t0 & t1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.andi.yaml b/arch/inst/C/c.andi.yaml index eec018b4fc..15369fb360 100644 --- a/arch/inst/C/c.andi.yaml +++ b/arch/inst/C/c.andi.yaml @@ -30,7 +30,7 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)] & $signed(imm); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.beqz.yaml b/arch/inst/C/c.beqz.yaml index 681d378bf0..445308c0ac 100644 --- a/arch/inst/C/c.beqz.yaml +++ b/arch/inst/C/c.beqz.yaml @@ -34,7 +34,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.bnez.yaml b/arch/inst/C/c.bnez.yaml index ace4b8d3b9..b15367e052 100644 --- a/arch/inst/C/c.bnez.yaml +++ b/arch/inst/C/c.bnez.yaml @@ -34,7 +34,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.ebreak.yaml b/arch/inst/C/c.ebreak.yaml index 23b54f1e6f..d710c5f325 100644 --- a/arch/inst/C/c.ebreak.yaml +++ b/arch/inst/C/c.ebreak.yaml @@ -40,7 +40,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.ld.yaml b/arch/inst/C/c.ld.yaml index 9482dc7c92..d5905dadb7 100644 --- a/arch/inst/C/c.ld.yaml +++ b/arch/inst/C/c.ld.yaml @@ -40,7 +40,7 @@ operation(): | X[creg2reg(rd)] = sext(read_memory<64>(virtual_address, $encoding), 64); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.lw.yaml b/arch/inst/C/c.lw.yaml index 98bdca08cc..56ec82d38f 100644 --- a/arch/inst/C/c.lw.yaml +++ b/arch/inst/C/c.lw.yaml @@ -39,7 +39,7 @@ operation(): | X[creg2reg(xd)] = sext(read_memory<32>(virtual_address, $encoding), 32); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.mv.yaml b/arch/inst/C/c.mv.yaml index c6d6396613..3b41e3f1ad 100644 --- a/arch/inst/C/c.mv.yaml +++ b/arch/inst/C/c.mv.yaml @@ -34,7 +34,7 @@ operation(): | X[xd] = X[xs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.or.yaml b/arch/inst/C/c.or.yaml index aad10ef76c..784f0e046a 100644 --- a/arch/inst/C/c.or.yaml +++ b/arch/inst/C/c.or.yaml @@ -31,7 +31,7 @@ operation(): | X[creg2reg(rd)] = t0 | t1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.slli.yaml b/arch/inst/C/c.slli.yaml index c7b4b78be4..9b234f1827 100644 --- a/arch/inst/C/c.slli.yaml +++ b/arch/inst/C/c.slli.yaml @@ -39,7 +39,7 @@ operation(): | X[rd] = X[rd] << shamt; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.srai.yaml b/arch/inst/C/c.srai.yaml index d8e81cc098..48252e85d6 100644 --- a/arch/inst/C/c.srai.yaml +++ b/arch/inst/C/c.srai.yaml @@ -40,7 +40,7 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)] >>> shamt; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.srli.yaml b/arch/inst/C/c.srli.yaml index d93e81769e..ad019a57c6 100644 --- a/arch/inst/C/c.srli.yaml +++ b/arch/inst/C/c.srli.yaml @@ -40,7 +40,7 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)] >> shamt; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.sub.yaml b/arch/inst/C/c.sub.yaml index 08f67aedbd..7266e9d406 100644 --- a/arch/inst/C/c.sub.yaml +++ b/arch/inst/C/c.sub.yaml @@ -31,7 +31,7 @@ operation(): | X[creg2reg(rd)] = t0 - t1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.subw.yaml b/arch/inst/C/c.subw.yaml index 8b5ac0e5b9..047975e111 100644 --- a/arch/inst/C/c.subw.yaml +++ b/arch/inst/C/c.subw.yaml @@ -32,7 +32,7 @@ operation(): | X[creg2reg(rd)] = sext(t0 - t1, 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/C/c.xor.yaml b/arch/inst/C/c.xor.yaml index a75880c308..d81396f41f 100644 --- a/arch/inst/C/c.xor.yaml +++ b/arch/inst/C/c.xor.yaml @@ -31,7 +31,7 @@ operation(): | X[creg2reg(rd)] = t0 ^ t1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fadd.s.yaml b/arch/inst/F/fadd.s.yaml index 8f14e17f42..248361938b 100644 --- a/arch/inst/F/fadd.s.yaml +++ b/arch/inst/F/fadd.s.yaml @@ -32,7 +32,7 @@ operation(): | X[fd] = f32_add(X[fs1], X[fs2], mode); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fclass.s.yaml b/arch/inst/F/fclass.s.yaml index 254928f647..a731554d5b 100644 --- a/arch/inst/F/fclass.s.yaml +++ b/arch/inst/F/fclass.s.yaml @@ -75,7 +75,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fcvt.l.s.yaml b/arch/inst/F/fcvt.l.s.yaml index 29787ae5d6..e29dfb38d1 100644 --- a/arch/inst/F/fcvt.l.s.yaml +++ b/arch/inst/F/fcvt.l.s.yaml @@ -27,7 +27,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fcvt.lu.s.yaml b/arch/inst/F/fcvt.lu.s.yaml index ccb8d50a18..644572e16e 100644 --- a/arch/inst/F/fcvt.lu.s.yaml +++ b/arch/inst/F/fcvt.lu.s.yaml @@ -27,7 +27,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fcvt.s.l.yaml b/arch/inst/F/fcvt.s.l.yaml index 07fd03d178..e949c18b5a 100644 --- a/arch/inst/F/fcvt.s.l.yaml +++ b/arch/inst/F/fcvt.s.l.yaml @@ -27,7 +27,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fcvt.s.lu.yaml b/arch/inst/F/fcvt.s.lu.yaml index 1153c2bb80..0e665e9ec9 100644 --- a/arch/inst/F/fcvt.s.lu.yaml +++ b/arch/inst/F/fcvt.s.lu.yaml @@ -27,7 +27,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fcvt.s.w.yaml b/arch/inst/F/fcvt.s.w.yaml index 3d4112297f..2482ad3995 100644 --- a/arch/inst/F/fcvt.s.w.yaml +++ b/arch/inst/F/fcvt.s.w.yaml @@ -39,7 +39,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fcvt.s.wu.yaml b/arch/inst/F/fcvt.s.wu.yaml index be84b1f8df..d97857d12d 100644 --- a/arch/inst/F/fcvt.s.wu.yaml +++ b/arch/inst/F/fcvt.s.wu.yaml @@ -38,7 +38,7 @@ operation(): | X[fd] = ui32_to_f32(X[rs1], rounding_mode); mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fcvt.w.s.yaml b/arch/inst/F/fcvt.w.s.yaml index ebd7c57e28..9e98f1b79b 100644 --- a/arch/inst/F/fcvt.w.s.yaml +++ b/arch/inst/F/fcvt.w.s.yaml @@ -80,7 +80,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fcvt.wu.s.yaml b/arch/inst/F/fcvt.wu.s.yaml index 60588caf32..4cfdf3a9fc 100644 --- a/arch/inst/F/fcvt.wu.s.yaml +++ b/arch/inst/F/fcvt.wu.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fdiv.s.yaml b/arch/inst/F/fdiv.s.yaml index 7690bcbe92..9805287a73 100644 --- a/arch/inst/F/fdiv.s.yaml +++ b/arch/inst/F/fdiv.s.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/feq.s.yaml b/arch/inst/F/feq.s.yaml index 11fc506b7c..dd3ef04f5f 100644 --- a/arch/inst/F/feq.s.yaml +++ b/arch/inst/F/feq.s.yaml @@ -47,7 +47,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fle.s.yaml b/arch/inst/F/fle.s.yaml index f03080022c..3a58888894 100644 --- a/arch/inst/F/fle.s.yaml +++ b/arch/inst/F/fle.s.yaml @@ -48,7 +48,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fleq.s.yaml b/arch/inst/F/fleq.s.yaml index a6b28c150d..a5ad1664eb 100644 --- a/arch/inst/F/fleq.s.yaml +++ b/arch/inst/F/fleq.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fli.s.yaml b/arch/inst/F/fli.s.yaml index b233195103..696bd62619 100644 --- a/arch/inst/F/fli.s.yaml +++ b/arch/inst/F/fli.s.yaml @@ -24,7 +24,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/flt.s.yaml b/arch/inst/F/flt.s.yaml index c9cf50f015..84c83970ea 100644 --- a/arch/inst/F/flt.s.yaml +++ b/arch/inst/F/flt.s.yaml @@ -48,7 +48,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fltq.s.yaml b/arch/inst/F/fltq.s.yaml index 52f72c5f37..8c09000442 100644 --- a/arch/inst/F/fltq.s.yaml +++ b/arch/inst/F/fltq.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/flw.yaml b/arch/inst/F/flw.yaml index 09df8457b7..bf83598c40 100644 --- a/arch/inst/F/flw.yaml +++ b/arch/inst/F/flw.yaml @@ -42,7 +42,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fmadd.s.yaml b/arch/inst/F/fmadd.s.yaml index b66531cb4c..b9ecb03e8b 100644 --- a/arch/inst/F/fmadd.s.yaml +++ b/arch/inst/F/fmadd.s.yaml @@ -30,7 +30,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fmax.s.yaml b/arch/inst/F/fmax.s.yaml index f29a9ddfbf..1c5d5f70ca 100644 --- a/arch/inst/F/fmax.s.yaml +++ b/arch/inst/F/fmax.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fmaxm.s.yaml b/arch/inst/F/fmaxm.s.yaml index 0fe80fd495..02526deb71 100644 --- a/arch/inst/F/fmaxm.s.yaml +++ b/arch/inst/F/fmaxm.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fmin.s.yaml b/arch/inst/F/fmin.s.yaml index 8c391b12ab..7f165d771e 100644 --- a/arch/inst/F/fmin.s.yaml +++ b/arch/inst/F/fmin.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fminm.s.yaml b/arch/inst/F/fminm.s.yaml index c9d16360da..ede85e20c7 100644 --- a/arch/inst/F/fminm.s.yaml +++ b/arch/inst/F/fminm.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fmsub.s.yaml b/arch/inst/F/fmsub.s.yaml index 8a06c83b1a..f926ca5208 100644 --- a/arch/inst/F/fmsub.s.yaml +++ b/arch/inst/F/fmsub.s.yaml @@ -30,7 +30,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fmul.s.yaml b/arch/inst/F/fmul.s.yaml index 3c8a55581a..ca411c8331 100644 --- a/arch/inst/F/fmul.s.yaml +++ b/arch/inst/F/fmul.s.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fmv.w.x.yaml b/arch/inst/F/fmv.w.x.yaml index f6c952df73..7165b13a31 100644 --- a/arch/inst/F/fmv.w.x.yaml +++ b/arch/inst/F/fmv.w.x.yaml @@ -38,7 +38,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fmv.x.w.yaml b/arch/inst/F/fmv.x.w.yaml index 7df16991b1..187a65d737 100644 --- a/arch/inst/F/fmv.x.w.yaml +++ b/arch/inst/F/fmv.x.w.yaml @@ -32,7 +32,7 @@ operation(): | X[rd] = sext(f[fs1][31:0], 32); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fnmadd.s.yaml b/arch/inst/F/fnmadd.s.yaml index 0b2e3c6920..7e329cda22 100644 --- a/arch/inst/F/fnmadd.s.yaml +++ b/arch/inst/F/fnmadd.s.yaml @@ -30,7 +30,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fnmsub.s.yaml b/arch/inst/F/fnmsub.s.yaml index 2251b78942..c72d10908a 100644 --- a/arch/inst/F/fnmsub.s.yaml +++ b/arch/inst/F/fnmsub.s.yaml @@ -30,7 +30,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fround.s.yaml b/arch/inst/F/fround.s.yaml index 82f9ab6b91..9c37236e49 100644 --- a/arch/inst/F/fround.s.yaml +++ b/arch/inst/F/fround.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/froundnx.s.yaml b/arch/inst/F/froundnx.s.yaml index d57421234b..dfbbe88d5b 100644 --- a/arch/inst/F/froundnx.s.yaml +++ b/arch/inst/F/froundnx.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fsgnj.s.yaml b/arch/inst/F/fsgnj.s.yaml index d01b1daed6..72eaca3f0d 100644 --- a/arch/inst/F/fsgnj.s.yaml +++ b/arch/inst/F/fsgnj.s.yaml @@ -44,7 +44,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fsgnjn.s.yaml b/arch/inst/F/fsgnjn.s.yaml index 63ba98d010..5e341ea3f7 100644 --- a/arch/inst/F/fsgnjn.s.yaml +++ b/arch/inst/F/fsgnjn.s.yaml @@ -43,7 +43,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fsgnjx.s.yaml b/arch/inst/F/fsgnjx.s.yaml index f5b68d5b05..2ad6d29b15 100644 --- a/arch/inst/F/fsgnjx.s.yaml +++ b/arch/inst/F/fsgnjx.s.yaml @@ -42,7 +42,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fsqrt.s.yaml b/arch/inst/F/fsqrt.s.yaml index a565280a6e..77181ad921 100644 --- a/arch/inst/F/fsqrt.s.yaml +++ b/arch/inst/F/fsqrt.s.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fsub.s.yaml b/arch/inst/F/fsub.s.yaml index 9f1539e5e9..93ebeacfbc 100644 --- a/arch/inst/F/fsub.s.yaml +++ b/arch/inst/F/fsub.s.yaml @@ -31,7 +31,7 @@ operation(): | RoundingMode mode = rm_to_mode(rm, $encoding); X[fd] = f32_sub(X[fs1], X[fs2], mode); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/F/fsw.yaml b/arch/inst/F/fsw.yaml index cce2de6680..ab4f4064c0 100644 --- a/arch/inst/F/fsw.yaml +++ b/arch/inst/F/fsw.yaml @@ -34,7 +34,7 @@ operation(): | write_memory<32>(virtual_address, f[fs2][31:0], $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/add.yaml b/arch/inst/I/add.yaml index 7e4c4c14a8..fd6dc4acb2 100644 --- a/arch/inst/I/add.yaml +++ b/arch/inst/I/add.yaml @@ -27,7 +27,7 @@ data_independent_timing: true operation(): X[xd] = X[xs1] + X[xs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/addi.yaml b/arch/inst/I/addi.yaml index 97b240dcd2..df75b568f0 100644 --- a/arch/inst/I/addi.yaml +++ b/arch/inst/I/addi.yaml @@ -25,7 +25,7 @@ data_independent_timing: true operation(): X[xd] = X[xs1] + $signed(imm); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/addiw.yaml b/arch/inst/I/addiw.yaml index 6b896b1789..7fcb775dc5 100644 --- a/arch/inst/I/addiw.yaml +++ b/arch/inst/I/addiw.yaml @@ -28,7 +28,7 @@ operation(): | X[xd] = sext(operand + imm, 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/addw.yaml b/arch/inst/I/addw.yaml index e3aeb31f5e..da0a416a10 100644 --- a/arch/inst/I/addw.yaml +++ b/arch/inst/I/addw.yaml @@ -31,7 +31,7 @@ operation(): | X[xd] = sext(operand1 + operand2, 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/and.yaml b/arch/inst/I/and.yaml index 5a708db716..e60bd348ac 100644 --- a/arch/inst/I/and.yaml +++ b/arch/inst/I/and.yaml @@ -25,7 +25,7 @@ data_independent_timing: true operation(): X[xd] = X[xs1] & X[xs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/andi.yaml b/arch/inst/I/andi.yaml index 72f8b4d3d2..eab318095d 100644 --- a/arch/inst/I/andi.yaml +++ b/arch/inst/I/andi.yaml @@ -25,7 +25,7 @@ data_independent_timing: true operation(): X[xd] = X[xs1] & $signed(imm); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/auipc.yaml b/arch/inst/I/auipc.yaml index 345696813d..c87163fe53 100644 --- a/arch/inst/I/auipc.yaml +++ b/arch/inst/I/auipc.yaml @@ -26,7 +26,7 @@ data_independent_timing: true operation(): X[xd] = $pc + $signed(imm); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/beq.yaml b/arch/inst/I/beq.yaml index b2f0efdf28..5a45fd449a 100644 --- a/arch/inst/I/beq.yaml +++ b/arch/inst/I/beq.yaml @@ -35,7 +35,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/bge.yaml b/arch/inst/I/bge.yaml index 69cf1b2c44..6fd9a38ab8 100644 --- a/arch/inst/I/bge.yaml +++ b/arch/inst/I/bge.yaml @@ -35,7 +35,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/bgeu.yaml b/arch/inst/I/bgeu.yaml index f9362e3eb9..c10b17fcc9 100644 --- a/arch/inst/I/bgeu.yaml +++ b/arch/inst/I/bgeu.yaml @@ -35,7 +35,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/blt.yaml b/arch/inst/I/blt.yaml index 5e8783ccc2..7f7f182903 100644 --- a/arch/inst/I/blt.yaml +++ b/arch/inst/I/blt.yaml @@ -35,7 +35,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/bltu.yaml b/arch/inst/I/bltu.yaml index 9f5ecd2d1c..c49048136c 100644 --- a/arch/inst/I/bltu.yaml +++ b/arch/inst/I/bltu.yaml @@ -35,7 +35,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/bne.yaml b/arch/inst/I/bne.yaml index 6511c2de22..03d2acc7b5 100644 --- a/arch/inst/I/bne.yaml +++ b/arch/inst/I/bne.yaml @@ -35,7 +35,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/ebreak.yaml b/arch/inst/I/ebreak.yaml index 5bce59bdf5..86880b6f42 100644 --- a/arch/inst/I/ebreak.yaml +++ b/arch/inst/I/ebreak.yaml @@ -34,7 +34,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/ecall.yaml b/arch/inst/I/ecall.yaml index e516c804f4..24bd67ae78 100644 --- a/arch/inst/I/ecall.yaml +++ b/arch/inst/I/ecall.yaml @@ -57,7 +57,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/fence.yaml b/arch/inst/I/fence.yaml index 5fd4f5de7c..5323f41026 100644 --- a/arch/inst/I/fence.yaml +++ b/arch/inst/I/fence.yaml @@ -209,7 +209,7 @@ pseudoinstructions: to: pause # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/jal.yaml b/arch/inst/I/jal.yaml index bc134879be..a642fdf076 100644 --- a/arch/inst/I/jal.yaml +++ b/arch/inst/I/jal.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = retrun_addr; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/jalr.yaml b/arch/inst/I/jalr.yaml index c43842d0c7..a9872b7bbf 100644 --- a/arch/inst/I/jalr.yaml +++ b/arch/inst/I/jalr.yaml @@ -33,7 +33,7 @@ operation(): | X[xd] = returnaddr; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/lb.yaml b/arch/inst/I/lb.yaml index 550b0c8857..65dfc1fa31 100644 --- a/arch/inst/I/lb.yaml +++ b/arch/inst/I/lb.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = sext(read_memory<8>(virtual_address, $encoding), 8); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/lbu.yaml b/arch/inst/I/lbu.yaml index e1418daac0..0770ed2bc5 100644 --- a/arch/inst/I/lbu.yaml +++ b/arch/inst/I/lbu.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = read_memory<8>(virtual_address, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/ld.yaml b/arch/inst/I/ld.yaml index fe09662acc..38ca62db6a 100644 --- a/arch/inst/I/ld.yaml +++ b/arch/inst/I/ld.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = read_memory<64>(virtual_address, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/lh.yaml b/arch/inst/I/lh.yaml index 15d9763666..6b136a4d59 100644 --- a/arch/inst/I/lh.yaml +++ b/arch/inst/I/lh.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = sext(read_memory<16>(virtual_address, $encoding), 16); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/lhu.yaml b/arch/inst/I/lhu.yaml index a83faeb558..b43bd48557 100644 --- a/arch/inst/I/lhu.yaml +++ b/arch/inst/I/lhu.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = read_memory<16>(virtual_address, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/lui.yaml b/arch/inst/I/lui.yaml index ec2f5a2de5..c1fc095edb 100644 --- a/arch/inst/I/lui.yaml +++ b/arch/inst/I/lui.yaml @@ -24,7 +24,7 @@ data_independent_timing: true operation(): X[xd] = imm; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/lw.yaml b/arch/inst/I/lw.yaml index f2f4364bf5..ed7ec9814d 100644 --- a/arch/inst/I/lw.yaml +++ b/arch/inst/I/lw.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = $signed(read_memory<32>(virtual_address, $encoding)); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/lwu.yaml b/arch/inst/I/lwu.yaml index 6eb69dff21..a0650a7422 100644 --- a/arch/inst/I/lwu.yaml +++ b/arch/inst/I/lwu.yaml @@ -31,7 +31,7 @@ operation(): | X[xd] = read_memory<32>(virtual_address, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/mret.yaml b/arch/inst/I/mret.yaml index 5e4bd60407..ac79686f80 100644 --- a/arch/inst/I/mret.yaml +++ b/arch/inst/I/mret.yaml @@ -30,7 +30,7 @@ operation(): | $pc = $bits(CSR[mepc]); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/or.yaml b/arch/inst/I/or.yaml index 2e9de2d408..0bf79361ce 100644 --- a/arch/inst/I/or.yaml +++ b/arch/inst/I/or.yaml @@ -25,7 +25,7 @@ data_independent_timing: true operation(): X[xd] = X[xs1] | X[xs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/ori.yaml b/arch/inst/I/ori.yaml index 14cb951b06..6352fe874d 100644 --- a/arch/inst/I/ori.yaml +++ b/arch/inst/I/ori.yaml @@ -50,7 +50,7 @@ pseudoinstructions: to: prefetch.w offset # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sb.yaml b/arch/inst/I/sb.yaml index dc921ecb5c..4b4a779a19 100644 --- a/arch/inst/I/sb.yaml +++ b/arch/inst/I/sb.yaml @@ -29,7 +29,7 @@ operation(): | write_memory<8>(virtual_address, X[xs2][7:0], $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sd.yaml b/arch/inst/I/sd.yaml index 22494f5703..4ec4839a1e 100644 --- a/arch/inst/I/sd.yaml +++ b/arch/inst/I/sd.yaml @@ -31,7 +31,7 @@ operation(): | write_memory<64>(virtual_address, X[xs2], $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sh.yaml b/arch/inst/I/sh.yaml index d541da47e0..a19839b8e0 100644 --- a/arch/inst/I/sh.yaml +++ b/arch/inst/I/sh.yaml @@ -29,7 +29,7 @@ operation(): | write_memory<16>(virtual_address, X[xs2][15:0], $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sll.yaml b/arch/inst/I/sll.yaml index e51eff743e..fba5ce5166 100644 --- a/arch/inst/I/sll.yaml +++ b/arch/inst/I/sll.yaml @@ -31,7 +31,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/slli.yaml b/arch/inst/I/slli.yaml index 088fe75540..5531210bf8 100644 --- a/arch/inst/I/slli.yaml +++ b/arch/inst/I/slli.yaml @@ -37,7 +37,7 @@ operation(): | X[xd] = X[xs1] << shamt; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/slliw.yaml b/arch/inst/I/slliw.yaml index 1845fd865f..3efe5ccd11 100644 --- a/arch/inst/I/slliw.yaml +++ b/arch/inst/I/slliw.yaml @@ -28,7 +28,7 @@ operation(): | X[xd] = sext(X[xs1] << shamt, 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sllw.yaml b/arch/inst/I/sllw.yaml index db6d1067bd..66adeb9251 100644 --- a/arch/inst/I/sllw.yaml +++ b/arch/inst/I/sllw.yaml @@ -27,7 +27,7 @@ data_independent_timing: true operation(): X[xd] = sext(X[xs1] << X[xs2][4:0], 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/slt.yaml b/arch/inst/I/slt.yaml index 4532f017a8..714e2f3123 100644 --- a/arch/inst/I/slt.yaml +++ b/arch/inst/I/slt.yaml @@ -31,7 +31,7 @@ operation(): | X[xd] = ($signed(src1) < $signed(src2)) ? '1 : '0; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/slti.yaml b/arch/inst/I/slti.yaml index e5db50f167..16ce8f1090 100644 --- a/arch/inst/I/slti.yaml +++ b/arch/inst/I/slti.yaml @@ -28,7 +28,7 @@ operation(): | X[xd] = ($signed(X[xs1]) < $signed(imm)) ? '1 : '0; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sltiu.yaml b/arch/inst/I/sltiu.yaml index 182c71fb77..f9ac79dc6c 100644 --- a/arch/inst/I/sltiu.yaml +++ b/arch/inst/I/sltiu.yaml @@ -33,7 +33,7 @@ operation(): | X[xd] = (X[xs1] < sign_extend_imm) ? 1 : 0; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sltu.yaml b/arch/inst/I/sltu.yaml index 72a858cab0..ffa45f91e7 100644 --- a/arch/inst/I/sltu.yaml +++ b/arch/inst/I/sltu.yaml @@ -28,7 +28,7 @@ operation(): | X[xd] = (X[xs1] < X[xs2]) ? 1 : 0; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sra.yaml b/arch/inst/I/sra.yaml index 73d111f953..d8d2cfdc7b 100644 --- a/arch/inst/I/sra.yaml +++ b/arch/inst/I/sra.yaml @@ -31,7 +31,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/srai.yaml b/arch/inst/I/srai.yaml index 8cb269fc67..a2144ca7c5 100644 --- a/arch/inst/I/srai.yaml +++ b/arch/inst/I/srai.yaml @@ -39,7 +39,7 @@ operation(): | X[xd] = X[xs1] >>> shamt; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sraiw.yaml b/arch/inst/I/sraiw.yaml index 4cd7c6a176..e8a9aeaee6 100644 --- a/arch/inst/I/sraiw.yaml +++ b/arch/inst/I/sraiw.yaml @@ -31,7 +31,7 @@ operation(): | X[xd] = sext(operand >>> shamt, 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sraw.yaml b/arch/inst/I/sraw.yaml index 0a6ce3fbc9..226c9f26e0 100644 --- a/arch/inst/I/sraw.yaml +++ b/arch/inst/I/sraw.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = sext(operand1 >>> X[xs2][4:0], 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/srl.yaml b/arch/inst/I/srl.yaml index e939e9d204..afa1c82bd3 100644 --- a/arch/inst/I/srl.yaml +++ b/arch/inst/I/srl.yaml @@ -31,7 +31,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/srli.yaml b/arch/inst/I/srli.yaml index 955ef125b7..c682b1f9ca 100644 --- a/arch/inst/I/srli.yaml +++ b/arch/inst/I/srli.yaml @@ -36,7 +36,7 @@ operation(): | X[xd] = X[xs1] >> shamt; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/srliw.yaml b/arch/inst/I/srliw.yaml index 1cf088b988..f3f9fd3e12 100644 --- a/arch/inst/I/srliw.yaml +++ b/arch/inst/I/srliw.yaml @@ -30,7 +30,7 @@ operation(): | X[xd] = sext(operand >> shamt, 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/srlw.yaml b/arch/inst/I/srlw.yaml index f106ce801f..1b4272fd76 100644 --- a/arch/inst/I/srlw.yaml +++ b/arch/inst/I/srlw.yaml @@ -27,7 +27,7 @@ data_independent_timing: true operation(): X[xd] = sext(X[xs1][31:0] >> X[xs2][4:0], 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sub.yaml b/arch/inst/I/sub.yaml index 370a08f2e3..24f7b6d564 100644 --- a/arch/inst/I/sub.yaml +++ b/arch/inst/I/sub.yaml @@ -28,7 +28,7 @@ operation(): | X[xd] = t0 - t1; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/subw.yaml b/arch/inst/I/subw.yaml index 980aeed265..b05757f5cf 100644 --- a/arch/inst/I/subw.yaml +++ b/arch/inst/I/subw.yaml @@ -29,7 +29,7 @@ operation(): | X[xd] = sext(t0 - t1, 31); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/sw.yaml b/arch/inst/I/sw.yaml index f71c169edc..b3e143f79f 100644 --- a/arch/inst/I/sw.yaml +++ b/arch/inst/I/sw.yaml @@ -29,7 +29,7 @@ operation(): | write_memory<32>(virtual_address, X[xs2][31:0], $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/wfi.yaml b/arch/inst/I/wfi.yaml index b6ab283bfa..2b85aa1fec 100644 --- a/arch/inst/I/wfi.yaml +++ b/arch/inst/I/wfi.yaml @@ -112,7 +112,7 @@ operation(): | wfi(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | match cur_privilege { diff --git a/arch/inst/I/xor.yaml b/arch/inst/I/xor.yaml index 17e9dca97b..3192de9830 100644 --- a/arch/inst/I/xor.yaml +++ b/arch/inst/I/xor.yaml @@ -25,7 +25,7 @@ data_independent_timing: true operation(): X[xd] = X[xs1] ^ X[xs2]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/I/xori.yaml b/arch/inst/I/xori.yaml index 58bf7281d2..650d61a9d8 100644 --- a/arch/inst/I/xori.yaml +++ b/arch/inst/I/xori.yaml @@ -25,7 +25,7 @@ data_independent_timing: true operation(): X[xd] = X[xs1] ^ $signed(imm); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/div.yaml b/arch/inst/M/div.yaml index 53864e0b7f..054454ffb8 100644 --- a/arch/inst/M/div.yaml +++ b/arch/inst/M/div.yaml @@ -54,7 +54,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/divu.yaml b/arch/inst/M/divu.yaml index 093ed56ef4..b66756d1a6 100644 --- a/arch/inst/M/divu.yaml +++ b/arch/inst/M/divu.yaml @@ -43,7 +43,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/divuw.yaml b/arch/inst/M/divuw.yaml index 28d2fc273a..430a7dd338 100644 --- a/arch/inst/M/divuw.yaml +++ b/arch/inst/M/divuw.yaml @@ -49,7 +49,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/divw.yaml b/arch/inst/M/divw.yaml index 574f97da19..0890f1aeb2 100644 --- a/arch/inst/M/divw.yaml +++ b/arch/inst/M/divw.yaml @@ -58,7 +58,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/mul.yaml b/arch/inst/M/mul.yaml index 51938ee25d..730b494b7b 100644 --- a/arch/inst/M/mul.yaml +++ b/arch/inst/M/mul.yaml @@ -46,7 +46,7 @@ operation(): | X[rd] = (src1 * src2)[XLEN-1:0]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/mulh.yaml b/arch/inst/M/mulh.yaml index 21aa4f385a..842552e5d7 100644 --- a/arch/inst/M/mulh.yaml +++ b/arch/inst/M/mulh.yaml @@ -50,7 +50,7 @@ operation(): | X[rd] = (src1 * src2)[(xlen()*8'd2)-1:xlen()]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/mulhsu.yaml b/arch/inst/M/mulhsu.yaml index 250f9ef58d..b95dd409f9 100644 --- a/arch/inst/M/mulhsu.yaml +++ b/arch/inst/M/mulhsu.yaml @@ -47,7 +47,7 @@ operation(): | X[rd] = (src1 * src2)[(XLEN*8'd2)-1:XLEN]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/mulhu.yaml b/arch/inst/M/mulhu.yaml index 31fa8484c1..e85617c51e 100644 --- a/arch/inst/M/mulhu.yaml +++ b/arch/inst/M/mulhu.yaml @@ -46,7 +46,7 @@ operation(): | X[rd] = (src1 * src2)[(XLEN*8'd2)-1:XLEN]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/mulw.yaml b/arch/inst/M/mulw.yaml index 3059a08d29..92288aa454 100644 --- a/arch/inst/M/mulw.yaml +++ b/arch/inst/M/mulw.yaml @@ -49,7 +49,7 @@ operation(): | X[rd] = {{32{sign_bit}}, result}; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/rem.yaml b/arch/inst/M/rem.yaml index 8968f95520..349dfd7ff8 100644 --- a/arch/inst/M/rem.yaml +++ b/arch/inst/M/rem.yaml @@ -49,7 +49,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/remu.yaml b/arch/inst/M/remu.yaml index 943aace5bf..952c698642 100644 --- a/arch/inst/M/remu.yaml +++ b/arch/inst/M/remu.yaml @@ -39,7 +39,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/remuw.yaml b/arch/inst/M/remuw.yaml index 01a07c0954..817ad495bd 100644 --- a/arch/inst/M/remuw.yaml +++ b/arch/inst/M/remuw.yaml @@ -51,7 +51,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/M/remw.yaml b/arch/inst/M/remw.yaml index cd25b45649..66a8878c5b 100644 --- a/arch/inst/M/remw.yaml +++ b/arch/inst/M/remw.yaml @@ -56,7 +56,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/S/sfence.vma.yaml b/arch/inst/S/sfence.vma.yaml index 5443b5e19b..328a67a8ca 100644 --- a/arch/inst/S/sfence.vma.yaml +++ b/arch/inst/S/sfence.vma.yaml @@ -306,7 +306,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/S/sret.yaml b/arch/inst/S/sret.yaml index 4617657734..f021c147e9 100644 --- a/arch/inst/S/sret.yaml +++ b/arch/inst/S/sret.yaml @@ -127,7 +127,7 @@ operation(): | } # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vaadd.vv.yaml b/arch/inst/V/vaadd.vv.yaml index 69faae4185..b38c17ff27 100644 --- a/arch/inst/V/vaadd.vv.yaml +++ b/arch/inst/V/vaadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vaadd.vx.yaml b/arch/inst/V/vaadd.vx.yaml index d06eccb983..648b33a58e 100644 --- a/arch/inst/V/vaadd.vx.yaml +++ b/arch/inst/V/vaadd.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vaaddu.vv.yaml b/arch/inst/V/vaaddu.vv.yaml index df6a12d3c3..3ae5bcdff6 100644 --- a/arch/inst/V/vaaddu.vv.yaml +++ b/arch/inst/V/vaaddu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vaaddu.vx.yaml b/arch/inst/V/vaaddu.vx.yaml index fae01c88e4..f728de75eb 100644 --- a/arch/inst/V/vaaddu.vx.yaml +++ b/arch/inst/V/vaaddu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vadc.vim.yaml b/arch/inst/V/vadc.vim.yaml index 2015681e62..af5343aee8 100644 --- a/arch/inst/V/vadc.vim.yaml +++ b/arch/inst/V/vadc.vim.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vadc.vvm.yaml b/arch/inst/V/vadc.vvm.yaml index e4a0adb247..212046ea71 100644 --- a/arch/inst/V/vadc.vvm.yaml +++ b/arch/inst/V/vadc.vvm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vadc.vxm.yaml b/arch/inst/V/vadc.vxm.yaml index 51335ef3d5..7b8cdf649a 100644 --- a/arch/inst/V/vadc.vxm.yaml +++ b/arch/inst/V/vadc.vxm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vadd.vi.yaml b/arch/inst/V/vadd.vi.yaml index 227223295b..f98856d020 100644 --- a/arch/inst/V/vadd.vi.yaml +++ b/arch/inst/V/vadd.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vadd.vv.yaml b/arch/inst/V/vadd.vv.yaml index d470f37845..686c966c90 100644 --- a/arch/inst/V/vadd.vv.yaml +++ b/arch/inst/V/vadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vadd.vx.yaml b/arch/inst/V/vadd.vx.yaml index 052a37f54b..81a219015f 100644 --- a/arch/inst/V/vadd.vx.yaml +++ b/arch/inst/V/vadd.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vand.vi.yaml b/arch/inst/V/vand.vi.yaml index 712f760a1f..ee4a055a95 100644 --- a/arch/inst/V/vand.vi.yaml +++ b/arch/inst/V/vand.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vand.vv.yaml b/arch/inst/V/vand.vv.yaml index 6b2d934007..a6bfa1ce3f 100644 --- a/arch/inst/V/vand.vv.yaml +++ b/arch/inst/V/vand.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vand.vx.yaml b/arch/inst/V/vand.vx.yaml index 1c68e8e5e2..3702085f3e 100644 --- a/arch/inst/V/vand.vx.yaml +++ b/arch/inst/V/vand.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vasub.vv.yaml b/arch/inst/V/vasub.vv.yaml index f07ad253b2..70d6c2dd54 100644 --- a/arch/inst/V/vasub.vv.yaml +++ b/arch/inst/V/vasub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vasub.vx.yaml b/arch/inst/V/vasub.vx.yaml index a0c2af4876..a52e4e7433 100644 --- a/arch/inst/V/vasub.vx.yaml +++ b/arch/inst/V/vasub.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vasubu.vv.yaml b/arch/inst/V/vasubu.vv.yaml index 9463e05fb3..882e7e78e5 100644 --- a/arch/inst/V/vasubu.vv.yaml +++ b/arch/inst/V/vasubu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vasubu.vx.yaml b/arch/inst/V/vasubu.vx.yaml index 6a456e14bc..32dcee5f69 100644 --- a/arch/inst/V/vasubu.vx.yaml +++ b/arch/inst/V/vasubu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vcompress.vm.yaml b/arch/inst/V/vcompress.vm.yaml index e2a97467c9..0d4d9a3e10 100644 --- a/arch/inst/V/vcompress.vm.yaml +++ b/arch/inst/V/vcompress.vm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vdiv.vv.yaml b/arch/inst/V/vdiv.vv.yaml index f049b456a4..e7fde7f140 100644 --- a/arch/inst/V/vdiv.vv.yaml +++ b/arch/inst/V/vdiv.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vdiv.vx.yaml b/arch/inst/V/vdiv.vx.yaml index 6341330ae1..5dfe20638b 100644 --- a/arch/inst/V/vdiv.vx.yaml +++ b/arch/inst/V/vdiv.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vdivu.vv.yaml b/arch/inst/V/vdivu.vv.yaml index ef5406be4e..93e6c21d64 100644 --- a/arch/inst/V/vdivu.vv.yaml +++ b/arch/inst/V/vdivu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vdivu.vx.yaml b/arch/inst/V/vdivu.vx.yaml index edf79065d7..02151e75e0 100644 --- a/arch/inst/V/vdivu.vx.yaml +++ b/arch/inst/V/vdivu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfadd.vf.yaml b/arch/inst/V/vfadd.vf.yaml index 5ec0f04647..be63167d2e 100644 --- a/arch/inst/V/vfadd.vf.yaml +++ b/arch/inst/V/vfadd.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfadd.vv.yaml b/arch/inst/V/vfadd.vv.yaml index 018da43b89..05dc76c977 100644 --- a/arch/inst/V/vfadd.vv.yaml +++ b/arch/inst/V/vfadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfclass.v.yaml b/arch/inst/V/vfclass.v.yaml index 7f8d344caa..f0daf59371 100644 --- a/arch/inst/V/vfclass.v.yaml +++ b/arch/inst/V/vfclass.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfcvt.f.x.v.yaml b/arch/inst/V/vfcvt.f.x.v.yaml index 62ee7b7437..38e859710e 100644 --- a/arch/inst/V/vfcvt.f.x.v.yaml +++ b/arch/inst/V/vfcvt.f.x.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfcvt.f.xu.v.yaml b/arch/inst/V/vfcvt.f.xu.v.yaml index a70e209289..9165f4e873 100644 --- a/arch/inst/V/vfcvt.f.xu.v.yaml +++ b/arch/inst/V/vfcvt.f.xu.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfcvt.rtz.x.f.v.yaml b/arch/inst/V/vfcvt.rtz.x.f.v.yaml index 396a4397e2..8ea623eeca 100644 --- a/arch/inst/V/vfcvt.rtz.x.f.v.yaml +++ b/arch/inst/V/vfcvt.rtz.x.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfcvt.rtz.xu.f.v.yaml b/arch/inst/V/vfcvt.rtz.xu.f.v.yaml index 1cd3332156..2a95def91a 100644 --- a/arch/inst/V/vfcvt.rtz.xu.f.v.yaml +++ b/arch/inst/V/vfcvt.rtz.xu.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfcvt.x.f.v.yaml b/arch/inst/V/vfcvt.x.f.v.yaml index ba748cf292..3b60282036 100644 --- a/arch/inst/V/vfcvt.x.f.v.yaml +++ b/arch/inst/V/vfcvt.x.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfcvt.xu.f.v.yaml b/arch/inst/V/vfcvt.xu.f.v.yaml index f8fd0ab0d4..6736ef44fe 100644 --- a/arch/inst/V/vfcvt.xu.f.v.yaml +++ b/arch/inst/V/vfcvt.xu.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfdiv.vf.yaml b/arch/inst/V/vfdiv.vf.yaml index ace7439122..ea9b8e6a42 100644 --- a/arch/inst/V/vfdiv.vf.yaml +++ b/arch/inst/V/vfdiv.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfdiv.vv.yaml b/arch/inst/V/vfdiv.vv.yaml index 587dc8c284..6771258fa2 100644 --- a/arch/inst/V/vfdiv.vv.yaml +++ b/arch/inst/V/vfdiv.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfirst.m.yaml b/arch/inst/V/vfirst.m.yaml index 6128438ab1..3dc1e43ddd 100644 --- a/arch/inst/V/vfirst.m.yaml +++ b/arch/inst/V/vfirst.m.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmacc.vf.yaml b/arch/inst/V/vfmacc.vf.yaml index 20bab7f1e0..7216db1a53 100644 --- a/arch/inst/V/vfmacc.vf.yaml +++ b/arch/inst/V/vfmacc.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmacc.vv.yaml b/arch/inst/V/vfmacc.vv.yaml index c46ff97dec..e79d0e6863 100644 --- a/arch/inst/V/vfmacc.vv.yaml +++ b/arch/inst/V/vfmacc.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmadd.vf.yaml b/arch/inst/V/vfmadd.vf.yaml index de0b73e97b..7caa0a4bf5 100644 --- a/arch/inst/V/vfmadd.vf.yaml +++ b/arch/inst/V/vfmadd.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmadd.vv.yaml b/arch/inst/V/vfmadd.vv.yaml index 3a1925ecb1..24fc4e7a15 100644 --- a/arch/inst/V/vfmadd.vv.yaml +++ b/arch/inst/V/vfmadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmax.vf.yaml b/arch/inst/V/vfmax.vf.yaml index a980703d75..72626c62a9 100644 --- a/arch/inst/V/vfmax.vf.yaml +++ b/arch/inst/V/vfmax.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmax.vv.yaml b/arch/inst/V/vfmax.vv.yaml index aef8ac9b0c..61abb9acbf 100644 --- a/arch/inst/V/vfmax.vv.yaml +++ b/arch/inst/V/vfmax.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmerge.vfm.yaml b/arch/inst/V/vfmerge.vfm.yaml index e77f8ac2e2..5050ff00eb 100644 --- a/arch/inst/V/vfmerge.vfm.yaml +++ b/arch/inst/V/vfmerge.vfm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmin.vf.yaml b/arch/inst/V/vfmin.vf.yaml index 46eb79c7a9..f21807534d 100644 --- a/arch/inst/V/vfmin.vf.yaml +++ b/arch/inst/V/vfmin.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmin.vv.yaml b/arch/inst/V/vfmin.vv.yaml index 5f28934d48..23e3c778e6 100644 --- a/arch/inst/V/vfmin.vv.yaml +++ b/arch/inst/V/vfmin.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmsac.vf.yaml b/arch/inst/V/vfmsac.vf.yaml index 595b172618..52ecd18f36 100644 --- a/arch/inst/V/vfmsac.vf.yaml +++ b/arch/inst/V/vfmsac.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmsac.vv.yaml b/arch/inst/V/vfmsac.vv.yaml index 395e399d18..969e0e9d1a 100644 --- a/arch/inst/V/vfmsac.vv.yaml +++ b/arch/inst/V/vfmsac.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmsub.vf.yaml b/arch/inst/V/vfmsub.vf.yaml index 6f841edc78..a656dcd841 100644 --- a/arch/inst/V/vfmsub.vf.yaml +++ b/arch/inst/V/vfmsub.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmsub.vv.yaml b/arch/inst/V/vfmsub.vv.yaml index dea9c421fd..27606a66b9 100644 --- a/arch/inst/V/vfmsub.vv.yaml +++ b/arch/inst/V/vfmsub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmul.vf.yaml b/arch/inst/V/vfmul.vf.yaml index 45b5d7c3e7..25395330a4 100644 --- a/arch/inst/V/vfmul.vf.yaml +++ b/arch/inst/V/vfmul.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmul.vv.yaml b/arch/inst/V/vfmul.vv.yaml index 93e6229dfa..951614194d 100644 --- a/arch/inst/V/vfmul.vv.yaml +++ b/arch/inst/V/vfmul.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmv.f.s.yaml b/arch/inst/V/vfmv.f.s.yaml index 6f95a5a9e7..f0557ee393 100644 --- a/arch/inst/V/vfmv.f.s.yaml +++ b/arch/inst/V/vfmv.f.s.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmv.s.f.yaml b/arch/inst/V/vfmv.s.f.yaml index a3039799f7..83f8568d8d 100644 --- a/arch/inst/V/vfmv.s.f.yaml +++ b/arch/inst/V/vfmv.s.f.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfmv.v.f.yaml b/arch/inst/V/vfmv.v.f.yaml index 9a6f8154f6..549aa62e7a 100644 --- a/arch/inst/V/vfmv.v.f.yaml +++ b/arch/inst/V/vfmv.v.f.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfncvt.f.f.w.yaml b/arch/inst/V/vfncvt.f.f.w.yaml index 528f6a5423..3d1d56a9ca 100644 --- a/arch/inst/V/vfncvt.f.f.w.yaml +++ b/arch/inst/V/vfncvt.f.f.w.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfncvt.f.x.w.yaml b/arch/inst/V/vfncvt.f.x.w.yaml index add96c63fd..ff8d33d315 100644 --- a/arch/inst/V/vfncvt.f.x.w.yaml +++ b/arch/inst/V/vfncvt.f.x.w.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfncvt.f.xu.w.yaml b/arch/inst/V/vfncvt.f.xu.w.yaml index 25b49d8228..73cdab2ef8 100644 --- a/arch/inst/V/vfncvt.f.xu.w.yaml +++ b/arch/inst/V/vfncvt.f.xu.w.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfncvt.rod.f.f.w.yaml b/arch/inst/V/vfncvt.rod.f.f.w.yaml index 6ac2988b4d..829e64d9e7 100644 --- a/arch/inst/V/vfncvt.rod.f.f.w.yaml +++ b/arch/inst/V/vfncvt.rod.f.f.w.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfncvt.rtz.x.f.w.yaml b/arch/inst/V/vfncvt.rtz.x.f.w.yaml index 3ae529d7e1..e9f9d73b2f 100644 --- a/arch/inst/V/vfncvt.rtz.x.f.w.yaml +++ b/arch/inst/V/vfncvt.rtz.x.f.w.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfncvt.rtz.xu.f.w.yaml b/arch/inst/V/vfncvt.rtz.xu.f.w.yaml index a46cfadd29..610be1fe70 100644 --- a/arch/inst/V/vfncvt.rtz.xu.f.w.yaml +++ b/arch/inst/V/vfncvt.rtz.xu.f.w.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfncvt.x.f.w.yaml b/arch/inst/V/vfncvt.x.f.w.yaml index b78f4b16e0..73ab1bf442 100644 --- a/arch/inst/V/vfncvt.x.f.w.yaml +++ b/arch/inst/V/vfncvt.x.f.w.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfncvt.xu.f.w.yaml b/arch/inst/V/vfncvt.xu.f.w.yaml index 146d264969..9cb3308d7c 100644 --- a/arch/inst/V/vfncvt.xu.f.w.yaml +++ b/arch/inst/V/vfncvt.xu.f.w.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfnmacc.vf.yaml b/arch/inst/V/vfnmacc.vf.yaml index 0c5590b505..802fbaf776 100644 --- a/arch/inst/V/vfnmacc.vf.yaml +++ b/arch/inst/V/vfnmacc.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfnmacc.vv.yaml b/arch/inst/V/vfnmacc.vv.yaml index 4a6fbc3957..c6bda346b2 100644 --- a/arch/inst/V/vfnmacc.vv.yaml +++ b/arch/inst/V/vfnmacc.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfnmadd.vf.yaml b/arch/inst/V/vfnmadd.vf.yaml index 3e8ad5dbcf..983f729f52 100644 --- a/arch/inst/V/vfnmadd.vf.yaml +++ b/arch/inst/V/vfnmadd.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfnmadd.vv.yaml b/arch/inst/V/vfnmadd.vv.yaml index 2c11b268c1..d65d08a02a 100644 --- a/arch/inst/V/vfnmadd.vv.yaml +++ b/arch/inst/V/vfnmadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfnmsac.vf.yaml b/arch/inst/V/vfnmsac.vf.yaml index 6c6e5e93d1..4131494794 100644 --- a/arch/inst/V/vfnmsac.vf.yaml +++ b/arch/inst/V/vfnmsac.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfnmsac.vv.yaml b/arch/inst/V/vfnmsac.vv.yaml index e4b2884e08..f94e3653b0 100644 --- a/arch/inst/V/vfnmsac.vv.yaml +++ b/arch/inst/V/vfnmsac.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfnmsub.vf.yaml b/arch/inst/V/vfnmsub.vf.yaml index 1d587f0643..9b781c1959 100644 --- a/arch/inst/V/vfnmsub.vf.yaml +++ b/arch/inst/V/vfnmsub.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfnmsub.vv.yaml b/arch/inst/V/vfnmsub.vv.yaml index 3f48bd9732..ac9f3f838f 100644 --- a/arch/inst/V/vfnmsub.vv.yaml +++ b/arch/inst/V/vfnmsub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfrdiv.vf.yaml b/arch/inst/V/vfrdiv.vf.yaml index 1c639143c6..52b6c9e4bd 100644 --- a/arch/inst/V/vfrdiv.vf.yaml +++ b/arch/inst/V/vfrdiv.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfrec7.v.yaml b/arch/inst/V/vfrec7.v.yaml index aef9a5a037..7e5c7832f7 100644 --- a/arch/inst/V/vfrec7.v.yaml +++ b/arch/inst/V/vfrec7.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfredmax.vs.yaml b/arch/inst/V/vfredmax.vs.yaml index a6d15b39b4..2d4ec9d9e3 100644 --- a/arch/inst/V/vfredmax.vs.yaml +++ b/arch/inst/V/vfredmax.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfredmin.vs.yaml b/arch/inst/V/vfredmin.vs.yaml index 6a4f863a57..d09c0e0c5f 100644 --- a/arch/inst/V/vfredmin.vs.yaml +++ b/arch/inst/V/vfredmin.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfredosum.vs.yaml b/arch/inst/V/vfredosum.vs.yaml index aaf6388629..2b14a6fab4 100644 --- a/arch/inst/V/vfredosum.vs.yaml +++ b/arch/inst/V/vfredosum.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfredusum.vs.yaml b/arch/inst/V/vfredusum.vs.yaml index 674ca86377..df2cd80f59 100644 --- a/arch/inst/V/vfredusum.vs.yaml +++ b/arch/inst/V/vfredusum.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfrsqrt7.v.yaml b/arch/inst/V/vfrsqrt7.v.yaml index 2fcc5f865a..120b7bbfb6 100644 --- a/arch/inst/V/vfrsqrt7.v.yaml +++ b/arch/inst/V/vfrsqrt7.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfrsub.vf.yaml b/arch/inst/V/vfrsub.vf.yaml index c5470e7ca6..39d0e0f152 100644 --- a/arch/inst/V/vfrsub.vf.yaml +++ b/arch/inst/V/vfrsub.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsgnj.vf.yaml b/arch/inst/V/vfsgnj.vf.yaml index a095a325f5..1ea6387392 100644 --- a/arch/inst/V/vfsgnj.vf.yaml +++ b/arch/inst/V/vfsgnj.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsgnj.vv.yaml b/arch/inst/V/vfsgnj.vv.yaml index 367a340055..d1da89dbe5 100644 --- a/arch/inst/V/vfsgnj.vv.yaml +++ b/arch/inst/V/vfsgnj.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsgnjn.vf.yaml b/arch/inst/V/vfsgnjn.vf.yaml index 01ae299dce..254729287c 100644 --- a/arch/inst/V/vfsgnjn.vf.yaml +++ b/arch/inst/V/vfsgnjn.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsgnjn.vv.yaml b/arch/inst/V/vfsgnjn.vv.yaml index b28f4b6b11..1beb2d41ce 100644 --- a/arch/inst/V/vfsgnjn.vv.yaml +++ b/arch/inst/V/vfsgnjn.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsgnjx.vf.yaml b/arch/inst/V/vfsgnjx.vf.yaml index 41e72e9ff0..871ec0db53 100644 --- a/arch/inst/V/vfsgnjx.vf.yaml +++ b/arch/inst/V/vfsgnjx.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsgnjx.vv.yaml b/arch/inst/V/vfsgnjx.vv.yaml index f2792c4af5..429f2f2f06 100644 --- a/arch/inst/V/vfsgnjx.vv.yaml +++ b/arch/inst/V/vfsgnjx.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfslide1down.vf.yaml b/arch/inst/V/vfslide1down.vf.yaml index c99a45a957..69a3ec8a3f 100644 --- a/arch/inst/V/vfslide1down.vf.yaml +++ b/arch/inst/V/vfslide1down.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfslide1up.vf.yaml b/arch/inst/V/vfslide1up.vf.yaml index 2848b90914..e33221539a 100644 --- a/arch/inst/V/vfslide1up.vf.yaml +++ b/arch/inst/V/vfslide1up.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsqrt.v.yaml b/arch/inst/V/vfsqrt.v.yaml index c93dfab430..a88a8c1d95 100644 --- a/arch/inst/V/vfsqrt.v.yaml +++ b/arch/inst/V/vfsqrt.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsub.vf.yaml b/arch/inst/V/vfsub.vf.yaml index 0a7b3c0e6f..952a57748b 100644 --- a/arch/inst/V/vfsub.vf.yaml +++ b/arch/inst/V/vfsub.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfsub.vv.yaml b/arch/inst/V/vfsub.vv.yaml index e6ae1358ba..52f832c10a 100644 --- a/arch/inst/V/vfsub.vv.yaml +++ b/arch/inst/V/vfsub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwadd.vf.yaml b/arch/inst/V/vfwadd.vf.yaml index 355c4408b4..54944797eb 100644 --- a/arch/inst/V/vfwadd.vf.yaml +++ b/arch/inst/V/vfwadd.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwadd.vv.yaml b/arch/inst/V/vfwadd.vv.yaml index 6ceb6d102b..5713b22a07 100644 --- a/arch/inst/V/vfwadd.vv.yaml +++ b/arch/inst/V/vfwadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwadd.wf.yaml b/arch/inst/V/vfwadd.wf.yaml index 3b01ad10a3..1f2ece6b79 100644 --- a/arch/inst/V/vfwadd.wf.yaml +++ b/arch/inst/V/vfwadd.wf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwadd.wv.yaml b/arch/inst/V/vfwadd.wv.yaml index d68c0c268c..0138d73622 100644 --- a/arch/inst/V/vfwadd.wv.yaml +++ b/arch/inst/V/vfwadd.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwcvt.f.f.v.yaml b/arch/inst/V/vfwcvt.f.f.v.yaml index 5faf7250a2..7f1c0ee5b5 100644 --- a/arch/inst/V/vfwcvt.f.f.v.yaml +++ b/arch/inst/V/vfwcvt.f.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwcvt.f.x.v.yaml b/arch/inst/V/vfwcvt.f.x.v.yaml index 96b22d8d92..ac19d60f78 100644 --- a/arch/inst/V/vfwcvt.f.x.v.yaml +++ b/arch/inst/V/vfwcvt.f.x.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwcvt.f.xu.v.yaml b/arch/inst/V/vfwcvt.f.xu.v.yaml index 0f579d65d8..5b10088509 100644 --- a/arch/inst/V/vfwcvt.f.xu.v.yaml +++ b/arch/inst/V/vfwcvt.f.xu.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwcvt.rtz.x.f.v.yaml b/arch/inst/V/vfwcvt.rtz.x.f.v.yaml index 2521cebde3..050efe743d 100644 --- a/arch/inst/V/vfwcvt.rtz.x.f.v.yaml +++ b/arch/inst/V/vfwcvt.rtz.x.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml b/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml index e0adf2e22d..41c60e41cc 100644 --- a/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml +++ b/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwcvt.x.f.v.yaml b/arch/inst/V/vfwcvt.x.f.v.yaml index 2322f10539..4e02c77bb3 100644 --- a/arch/inst/V/vfwcvt.x.f.v.yaml +++ b/arch/inst/V/vfwcvt.x.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwcvt.xu.f.v.yaml b/arch/inst/V/vfwcvt.xu.f.v.yaml index 872ec9ea36..04f3c2f0be 100644 --- a/arch/inst/V/vfwcvt.xu.f.v.yaml +++ b/arch/inst/V/vfwcvt.xu.f.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwmacc.vf.yaml b/arch/inst/V/vfwmacc.vf.yaml index 0b8a35e5ad..ee303cc28d 100644 --- a/arch/inst/V/vfwmacc.vf.yaml +++ b/arch/inst/V/vfwmacc.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwmacc.vv.yaml b/arch/inst/V/vfwmacc.vv.yaml index 7a4defa34b..509dbf7ef4 100644 --- a/arch/inst/V/vfwmacc.vv.yaml +++ b/arch/inst/V/vfwmacc.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwmsac.vf.yaml b/arch/inst/V/vfwmsac.vf.yaml index af4ee19930..0d7282626f 100644 --- a/arch/inst/V/vfwmsac.vf.yaml +++ b/arch/inst/V/vfwmsac.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwmsac.vv.yaml b/arch/inst/V/vfwmsac.vv.yaml index 39b16b2ecb..034b450f80 100644 --- a/arch/inst/V/vfwmsac.vv.yaml +++ b/arch/inst/V/vfwmsac.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwmul.vf.yaml b/arch/inst/V/vfwmul.vf.yaml index cf18b2be55..0fb119d208 100644 --- a/arch/inst/V/vfwmul.vf.yaml +++ b/arch/inst/V/vfwmul.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwmul.vv.yaml b/arch/inst/V/vfwmul.vv.yaml index a23d0868c6..6817bf1beb 100644 --- a/arch/inst/V/vfwmul.vv.yaml +++ b/arch/inst/V/vfwmul.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwnmacc.vf.yaml b/arch/inst/V/vfwnmacc.vf.yaml index 6ea5a04fb6..657ef1934c 100644 --- a/arch/inst/V/vfwnmacc.vf.yaml +++ b/arch/inst/V/vfwnmacc.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwnmacc.vv.yaml b/arch/inst/V/vfwnmacc.vv.yaml index 804aaced47..76cb1548de 100644 --- a/arch/inst/V/vfwnmacc.vv.yaml +++ b/arch/inst/V/vfwnmacc.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwnmsac.vf.yaml b/arch/inst/V/vfwnmsac.vf.yaml index 0c62575e9f..19623c2175 100644 --- a/arch/inst/V/vfwnmsac.vf.yaml +++ b/arch/inst/V/vfwnmsac.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwnmsac.vv.yaml b/arch/inst/V/vfwnmsac.vv.yaml index 6908f6fbfb..fa87fdbb71 100644 --- a/arch/inst/V/vfwnmsac.vv.yaml +++ b/arch/inst/V/vfwnmsac.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwredosum.vs.yaml b/arch/inst/V/vfwredosum.vs.yaml index 61ff9f6309..53951f400a 100644 --- a/arch/inst/V/vfwredosum.vs.yaml +++ b/arch/inst/V/vfwredosum.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwredusum.vs.yaml b/arch/inst/V/vfwredusum.vs.yaml index ef1d433037..db5a56cfcd 100644 --- a/arch/inst/V/vfwredusum.vs.yaml +++ b/arch/inst/V/vfwredusum.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwsub.vf.yaml b/arch/inst/V/vfwsub.vf.yaml index 0d3b89d9ef..341762bedb 100644 --- a/arch/inst/V/vfwsub.vf.yaml +++ b/arch/inst/V/vfwsub.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwsub.vv.yaml b/arch/inst/V/vfwsub.vv.yaml index bee3f307a9..5896615b4b 100644 --- a/arch/inst/V/vfwsub.vv.yaml +++ b/arch/inst/V/vfwsub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwsub.wf.yaml b/arch/inst/V/vfwsub.wf.yaml index 57a8fccbdf..f42b388960 100644 --- a/arch/inst/V/vfwsub.wf.yaml +++ b/arch/inst/V/vfwsub.wf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vfwsub.wv.yaml b/arch/inst/V/vfwsub.wv.yaml index 3087959fd0..2d667b0925 100644 --- a/arch/inst/V/vfwsub.wv.yaml +++ b/arch/inst/V/vfwsub.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vid.v.yaml b/arch/inst/V/vid.v.yaml index bf4a84fd85..cdff22e9fa 100644 --- a/arch/inst/V/vid.v.yaml +++ b/arch/inst/V/vid.v.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/viota.m.yaml b/arch/inst/V/viota.m.yaml index 3786107309..6015f60843 100644 --- a/arch/inst/V/viota.m.yaml +++ b/arch/inst/V/viota.m.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vle16.v.yaml b/arch/inst/V/vle16.v.yaml index 41a1a7d7f7..13f5f7a643 100644 --- a/arch/inst/V/vle16.v.yaml +++ b/arch/inst/V/vle16.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vle16ff.v.yaml b/arch/inst/V/vle16ff.v.yaml index 8a2763f2b5..91a81520fc 100644 --- a/arch/inst/V/vle16ff.v.yaml +++ b/arch/inst/V/vle16ff.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vle32.v.yaml b/arch/inst/V/vle32.v.yaml index 7ce544ce40..6e5157dac7 100644 --- a/arch/inst/V/vle32.v.yaml +++ b/arch/inst/V/vle32.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vle32ff.v.yaml b/arch/inst/V/vle32ff.v.yaml index 31649b5a02..8850dfc0f2 100644 --- a/arch/inst/V/vle32ff.v.yaml +++ b/arch/inst/V/vle32ff.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vle64.v.yaml b/arch/inst/V/vle64.v.yaml index c66865d664..275346c17d 100644 --- a/arch/inst/V/vle64.v.yaml +++ b/arch/inst/V/vle64.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vle64ff.v.yaml b/arch/inst/V/vle64ff.v.yaml index ae0a874c1b..3ebf650a0f 100644 --- a/arch/inst/V/vle64ff.v.yaml +++ b/arch/inst/V/vle64ff.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vle8.v.yaml b/arch/inst/V/vle8.v.yaml index 6e35500174..917dec3947 100644 --- a/arch/inst/V/vle8.v.yaml +++ b/arch/inst/V/vle8.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vle8ff.v.yaml b/arch/inst/V/vle8ff.v.yaml index 3873975cac..633d6b1901 100644 --- a/arch/inst/V/vle8ff.v.yaml +++ b/arch/inst/V/vle8ff.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vlm.v.yaml b/arch/inst/V/vlm.v.yaml index 96bbcaabc6..700c112505 100644 --- a/arch/inst/V/vlm.v.yaml +++ b/arch/inst/V/vlm.v.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vloxei16.v.yaml b/arch/inst/V/vloxei16.v.yaml index 36126b7adb..54d80bd7fd 100644 --- a/arch/inst/V/vloxei16.v.yaml +++ b/arch/inst/V/vloxei16.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vloxei32.v.yaml b/arch/inst/V/vloxei32.v.yaml index 323acc5bb4..afd2a34050 100644 --- a/arch/inst/V/vloxei32.v.yaml +++ b/arch/inst/V/vloxei32.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vloxei64.v.yaml b/arch/inst/V/vloxei64.v.yaml index eb3f9a5321..eb8fb20685 100644 --- a/arch/inst/V/vloxei64.v.yaml +++ b/arch/inst/V/vloxei64.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vloxei8.v.yaml b/arch/inst/V/vloxei8.v.yaml index 92cfed7e1f..da36cc2ccd 100644 --- a/arch/inst/V/vloxei8.v.yaml +++ b/arch/inst/V/vloxei8.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vlse16.v.yaml b/arch/inst/V/vlse16.v.yaml index f62986ace7..fa6846cb02 100644 --- a/arch/inst/V/vlse16.v.yaml +++ b/arch/inst/V/vlse16.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vlse32.v.yaml b/arch/inst/V/vlse32.v.yaml index 8a1ed2a2b2..371913407a 100644 --- a/arch/inst/V/vlse32.v.yaml +++ b/arch/inst/V/vlse32.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vlse64.v.yaml b/arch/inst/V/vlse64.v.yaml index 36ef90e9de..cf5d9b8b16 100644 --- a/arch/inst/V/vlse64.v.yaml +++ b/arch/inst/V/vlse64.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vlse8.v.yaml b/arch/inst/V/vlse8.v.yaml index 5b05d6161f..cf80f8d119 100644 --- a/arch/inst/V/vlse8.v.yaml +++ b/arch/inst/V/vlse8.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vluxei16.v.yaml b/arch/inst/V/vluxei16.v.yaml index d788bf8a6e..85478c2258 100644 --- a/arch/inst/V/vluxei16.v.yaml +++ b/arch/inst/V/vluxei16.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vluxei32.v.yaml b/arch/inst/V/vluxei32.v.yaml index 2bbd6408fa..67e52dac5b 100644 --- a/arch/inst/V/vluxei32.v.yaml +++ b/arch/inst/V/vluxei32.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vluxei64.v.yaml b/arch/inst/V/vluxei64.v.yaml index 645acb4aa0..45d9efd86b 100644 --- a/arch/inst/V/vluxei64.v.yaml +++ b/arch/inst/V/vluxei64.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vluxei8.v.yaml b/arch/inst/V/vluxei8.v.yaml index 23ee4bde23..453cc1c63d 100644 --- a/arch/inst/V/vluxei8.v.yaml +++ b/arch/inst/V/vluxei8.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmacc.vv.yaml b/arch/inst/V/vmacc.vv.yaml index cdaced1037..a2169c17df 100644 --- a/arch/inst/V/vmacc.vv.yaml +++ b/arch/inst/V/vmacc.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmacc.vx.yaml b/arch/inst/V/vmacc.vx.yaml index cd81f3c977..88d0bd0dd9 100644 --- a/arch/inst/V/vmacc.vx.yaml +++ b/arch/inst/V/vmacc.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmadc.vi.yaml b/arch/inst/V/vmadc.vi.yaml index 6908f053e4..4d1455c406 100644 --- a/arch/inst/V/vmadc.vi.yaml +++ b/arch/inst/V/vmadc.vi.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmadc.vim.yaml b/arch/inst/V/vmadc.vim.yaml index 7731f49d00..07cc21f54e 100644 --- a/arch/inst/V/vmadc.vim.yaml +++ b/arch/inst/V/vmadc.vim.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmadc.vv.yaml b/arch/inst/V/vmadc.vv.yaml index d9978f66f2..0c13eab44c 100644 --- a/arch/inst/V/vmadc.vv.yaml +++ b/arch/inst/V/vmadc.vv.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmadc.vvm.yaml b/arch/inst/V/vmadc.vvm.yaml index cbc1562aa5..b4e797366b 100644 --- a/arch/inst/V/vmadc.vvm.yaml +++ b/arch/inst/V/vmadc.vvm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmadc.vx.yaml b/arch/inst/V/vmadc.vx.yaml index ee6f81ab61..f985dff143 100644 --- a/arch/inst/V/vmadc.vx.yaml +++ b/arch/inst/V/vmadc.vx.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmadc.vxm.yaml b/arch/inst/V/vmadc.vxm.yaml index 42d41c9839..60cea1cf20 100644 --- a/arch/inst/V/vmadc.vxm.yaml +++ b/arch/inst/V/vmadc.vxm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmadd.vv.yaml b/arch/inst/V/vmadd.vv.yaml index ecdeac55ac..6295c8a9bc 100644 --- a/arch/inst/V/vmadd.vv.yaml +++ b/arch/inst/V/vmadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmadd.vx.yaml b/arch/inst/V/vmadd.vx.yaml index b835e064c9..d932bae1c0 100644 --- a/arch/inst/V/vmadd.vx.yaml +++ b/arch/inst/V/vmadd.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmand.mm.yaml b/arch/inst/V/vmand.mm.yaml index 421fcd3de9..0a1fd9bc27 100644 --- a/arch/inst/V/vmand.mm.yaml +++ b/arch/inst/V/vmand.mm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmax.vv.yaml b/arch/inst/V/vmax.vv.yaml index 9b14cf0c8e..9043e806cb 100644 --- a/arch/inst/V/vmax.vv.yaml +++ b/arch/inst/V/vmax.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmax.vx.yaml b/arch/inst/V/vmax.vx.yaml index 2ef4f40cd4..859d1060ac 100644 --- a/arch/inst/V/vmax.vx.yaml +++ b/arch/inst/V/vmax.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmaxu.vv.yaml b/arch/inst/V/vmaxu.vv.yaml index cc5707a97e..8fffc23819 100644 --- a/arch/inst/V/vmaxu.vv.yaml +++ b/arch/inst/V/vmaxu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmaxu.vx.yaml b/arch/inst/V/vmaxu.vx.yaml index e1d77afebb..f5908df4f1 100644 --- a/arch/inst/V/vmaxu.vx.yaml +++ b/arch/inst/V/vmaxu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmerge.vim.yaml b/arch/inst/V/vmerge.vim.yaml index 2539c3ae0a..4ff0117f90 100644 --- a/arch/inst/V/vmerge.vim.yaml +++ b/arch/inst/V/vmerge.vim.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmerge.vvm.yaml b/arch/inst/V/vmerge.vvm.yaml index b42b3cddb5..305cf669c6 100644 --- a/arch/inst/V/vmerge.vvm.yaml +++ b/arch/inst/V/vmerge.vvm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmerge.vxm.yaml b/arch/inst/V/vmerge.vxm.yaml index e853fd1b5d..defe9495fc 100644 --- a/arch/inst/V/vmerge.vxm.yaml +++ b/arch/inst/V/vmerge.vxm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmfeq.vf.yaml b/arch/inst/V/vmfeq.vf.yaml index 0d121c6a02..e3b7919046 100644 --- a/arch/inst/V/vmfeq.vf.yaml +++ b/arch/inst/V/vmfeq.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmfeq.vv.yaml b/arch/inst/V/vmfeq.vv.yaml index c45987d998..2580e9b34a 100644 --- a/arch/inst/V/vmfeq.vv.yaml +++ b/arch/inst/V/vmfeq.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmfge.vf.yaml b/arch/inst/V/vmfge.vf.yaml index 26aa90c316..b4b555203b 100644 --- a/arch/inst/V/vmfge.vf.yaml +++ b/arch/inst/V/vmfge.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmfgt.vf.yaml b/arch/inst/V/vmfgt.vf.yaml index fe4c39fad7..3ae11e9c0b 100644 --- a/arch/inst/V/vmfgt.vf.yaml +++ b/arch/inst/V/vmfgt.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmfle.vf.yaml b/arch/inst/V/vmfle.vf.yaml index 8e54532355..a90c274ac1 100644 --- a/arch/inst/V/vmfle.vf.yaml +++ b/arch/inst/V/vmfle.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmfle.vv.yaml b/arch/inst/V/vmfle.vv.yaml index 20274c42e9..4586bf4201 100644 --- a/arch/inst/V/vmfle.vv.yaml +++ b/arch/inst/V/vmfle.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmflt.vf.yaml b/arch/inst/V/vmflt.vf.yaml index 04082d4110..c6f8c6c128 100644 --- a/arch/inst/V/vmflt.vf.yaml +++ b/arch/inst/V/vmflt.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmflt.vv.yaml b/arch/inst/V/vmflt.vv.yaml index ad40300da4..3c4cb984df 100644 --- a/arch/inst/V/vmflt.vv.yaml +++ b/arch/inst/V/vmflt.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmfne.vf.yaml b/arch/inst/V/vmfne.vf.yaml index 2fb76b4ce6..af07e92c31 100644 --- a/arch/inst/V/vmfne.vf.yaml +++ b/arch/inst/V/vmfne.vf.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmfne.vv.yaml b/arch/inst/V/vmfne.vv.yaml index f9bb73e660..35cce9a2bb 100644 --- a/arch/inst/V/vmfne.vv.yaml +++ b/arch/inst/V/vmfne.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmin.vv.yaml b/arch/inst/V/vmin.vv.yaml index f2709e2429..502f174c2a 100644 --- a/arch/inst/V/vmin.vv.yaml +++ b/arch/inst/V/vmin.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmin.vx.yaml b/arch/inst/V/vmin.vx.yaml index bfc7cf279a..ee4abe4b11 100644 --- a/arch/inst/V/vmin.vx.yaml +++ b/arch/inst/V/vmin.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vminu.vv.yaml b/arch/inst/V/vminu.vv.yaml index d8b9148cfa..892005f763 100644 --- a/arch/inst/V/vminu.vv.yaml +++ b/arch/inst/V/vminu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vminu.vx.yaml b/arch/inst/V/vminu.vx.yaml index 6a1ce965b3..d471987e5d 100644 --- a/arch/inst/V/vminu.vx.yaml +++ b/arch/inst/V/vminu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmnand.mm.yaml b/arch/inst/V/vmnand.mm.yaml index 8df2a59730..24cdf40306 100644 --- a/arch/inst/V/vmnand.mm.yaml +++ b/arch/inst/V/vmnand.mm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmnor.mm.yaml b/arch/inst/V/vmnor.mm.yaml index ca418ae3b3..4cb209ea50 100644 --- a/arch/inst/V/vmnor.mm.yaml +++ b/arch/inst/V/vmnor.mm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmor.mm.yaml b/arch/inst/V/vmor.mm.yaml index 02275bf634..5cbde29333 100644 --- a/arch/inst/V/vmor.mm.yaml +++ b/arch/inst/V/vmor.mm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsbc.vv.yaml b/arch/inst/V/vmsbc.vv.yaml index 54353d663b..cd28feec43 100644 --- a/arch/inst/V/vmsbc.vv.yaml +++ b/arch/inst/V/vmsbc.vv.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsbc.vvm.yaml b/arch/inst/V/vmsbc.vvm.yaml index 8b42ab658b..c2dc4c087c 100644 --- a/arch/inst/V/vmsbc.vvm.yaml +++ b/arch/inst/V/vmsbc.vvm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsbc.vx.yaml b/arch/inst/V/vmsbc.vx.yaml index edbef058b9..9ac9264a85 100644 --- a/arch/inst/V/vmsbc.vx.yaml +++ b/arch/inst/V/vmsbc.vx.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsbc.vxm.yaml b/arch/inst/V/vmsbc.vxm.yaml index b890b8eaa3..3015e90ba1 100644 --- a/arch/inst/V/vmsbc.vxm.yaml +++ b/arch/inst/V/vmsbc.vxm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsbf.m.yaml b/arch/inst/V/vmsbf.m.yaml index 89212fa81a..4a39315b88 100644 --- a/arch/inst/V/vmsbf.m.yaml +++ b/arch/inst/V/vmsbf.m.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmseq.vi.yaml b/arch/inst/V/vmseq.vi.yaml index e45b38ebcd..6092057d5a 100644 --- a/arch/inst/V/vmseq.vi.yaml +++ b/arch/inst/V/vmseq.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmseq.vv.yaml b/arch/inst/V/vmseq.vv.yaml index 1aeeb5f98c..e373cea5e7 100644 --- a/arch/inst/V/vmseq.vv.yaml +++ b/arch/inst/V/vmseq.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmseq.vx.yaml b/arch/inst/V/vmseq.vx.yaml index 4790364b77..b5a3067ec4 100644 --- a/arch/inst/V/vmseq.vx.yaml +++ b/arch/inst/V/vmseq.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsgt.vi.yaml b/arch/inst/V/vmsgt.vi.yaml index 30be07420d..35971fc1aa 100644 --- a/arch/inst/V/vmsgt.vi.yaml +++ b/arch/inst/V/vmsgt.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsgt.vx.yaml b/arch/inst/V/vmsgt.vx.yaml index a2db49866e..ffa9295b05 100644 --- a/arch/inst/V/vmsgt.vx.yaml +++ b/arch/inst/V/vmsgt.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsgtu.vi.yaml b/arch/inst/V/vmsgtu.vi.yaml index 9ac3cd5076..ab6e139142 100644 --- a/arch/inst/V/vmsgtu.vi.yaml +++ b/arch/inst/V/vmsgtu.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsgtu.vx.yaml b/arch/inst/V/vmsgtu.vx.yaml index 89ffa9d539..f83f7f75aa 100644 --- a/arch/inst/V/vmsgtu.vx.yaml +++ b/arch/inst/V/vmsgtu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsif.m.yaml b/arch/inst/V/vmsif.m.yaml index 04232b05a7..ae514591f0 100644 --- a/arch/inst/V/vmsif.m.yaml +++ b/arch/inst/V/vmsif.m.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsle.vi.yaml b/arch/inst/V/vmsle.vi.yaml index 6126e93c1a..f27b0521e5 100644 --- a/arch/inst/V/vmsle.vi.yaml +++ b/arch/inst/V/vmsle.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsle.vv.yaml b/arch/inst/V/vmsle.vv.yaml index ca1c3ba9b4..447172484d 100644 --- a/arch/inst/V/vmsle.vv.yaml +++ b/arch/inst/V/vmsle.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsle.vx.yaml b/arch/inst/V/vmsle.vx.yaml index dc5a40ffa0..f649755cb8 100644 --- a/arch/inst/V/vmsle.vx.yaml +++ b/arch/inst/V/vmsle.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsleu.vi.yaml b/arch/inst/V/vmsleu.vi.yaml index 9eaf76a619..0dfb92c7c8 100644 --- a/arch/inst/V/vmsleu.vi.yaml +++ b/arch/inst/V/vmsleu.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsleu.vv.yaml b/arch/inst/V/vmsleu.vv.yaml index 426fcc770a..56817ac419 100644 --- a/arch/inst/V/vmsleu.vv.yaml +++ b/arch/inst/V/vmsleu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsleu.vx.yaml b/arch/inst/V/vmsleu.vx.yaml index 176ed8bd65..ce4c2bf38c 100644 --- a/arch/inst/V/vmsleu.vx.yaml +++ b/arch/inst/V/vmsleu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmslt.vv.yaml b/arch/inst/V/vmslt.vv.yaml index 3216446513..f3d285728a 100644 --- a/arch/inst/V/vmslt.vv.yaml +++ b/arch/inst/V/vmslt.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmslt.vx.yaml b/arch/inst/V/vmslt.vx.yaml index 8891ba2b08..f755d58e5d 100644 --- a/arch/inst/V/vmslt.vx.yaml +++ b/arch/inst/V/vmslt.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsltu.vv.yaml b/arch/inst/V/vmsltu.vv.yaml index b9c9032761..e70301eb02 100644 --- a/arch/inst/V/vmsltu.vv.yaml +++ b/arch/inst/V/vmsltu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsltu.vx.yaml b/arch/inst/V/vmsltu.vx.yaml index 48b473fdda..aec09fb642 100644 --- a/arch/inst/V/vmsltu.vx.yaml +++ b/arch/inst/V/vmsltu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsne.vi.yaml b/arch/inst/V/vmsne.vi.yaml index 369db176eb..fdc7eb40f8 100644 --- a/arch/inst/V/vmsne.vi.yaml +++ b/arch/inst/V/vmsne.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsne.vv.yaml b/arch/inst/V/vmsne.vv.yaml index 3ea05d0c57..9e33b7755f 100644 --- a/arch/inst/V/vmsne.vv.yaml +++ b/arch/inst/V/vmsne.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsne.vx.yaml b/arch/inst/V/vmsne.vx.yaml index 1d4010be10..d1e85b1b3f 100644 --- a/arch/inst/V/vmsne.vx.yaml +++ b/arch/inst/V/vmsne.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmsof.m.yaml b/arch/inst/V/vmsof.m.yaml index ee8a3675eb..267940d953 100644 --- a/arch/inst/V/vmsof.m.yaml +++ b/arch/inst/V/vmsof.m.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmul.vv.yaml b/arch/inst/V/vmul.vv.yaml index 6d3556c6fa..31a9c084f7 100644 --- a/arch/inst/V/vmul.vv.yaml +++ b/arch/inst/V/vmul.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmul.vx.yaml b/arch/inst/V/vmul.vx.yaml index e7fb5b8e25..96a43b6af7 100644 --- a/arch/inst/V/vmul.vx.yaml +++ b/arch/inst/V/vmul.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmulh.vv.yaml b/arch/inst/V/vmulh.vv.yaml index 905d4a2c65..7ee10f4126 100644 --- a/arch/inst/V/vmulh.vv.yaml +++ b/arch/inst/V/vmulh.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmulh.vx.yaml b/arch/inst/V/vmulh.vx.yaml index 6344ef5504..371d9c43ad 100644 --- a/arch/inst/V/vmulh.vx.yaml +++ b/arch/inst/V/vmulh.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmulhsu.vv.yaml b/arch/inst/V/vmulhsu.vv.yaml index d168537849..427c1a44e4 100644 --- a/arch/inst/V/vmulhsu.vv.yaml +++ b/arch/inst/V/vmulhsu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmulhsu.vx.yaml b/arch/inst/V/vmulhsu.vx.yaml index 32b2a7ff75..0424ac8563 100644 --- a/arch/inst/V/vmulhsu.vx.yaml +++ b/arch/inst/V/vmulhsu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmulhu.vv.yaml b/arch/inst/V/vmulhu.vv.yaml index ea8c1440d7..607dd6605c 100644 --- a/arch/inst/V/vmulhu.vv.yaml +++ b/arch/inst/V/vmulhu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmulhu.vx.yaml b/arch/inst/V/vmulhu.vx.yaml index a2a2c6181f..0451f0f7c7 100644 --- a/arch/inst/V/vmulhu.vx.yaml +++ b/arch/inst/V/vmulhu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv.s.x.yaml b/arch/inst/V/vmv.s.x.yaml index c6a0ae4d05..65096be156 100644 --- a/arch/inst/V/vmv.s.x.yaml +++ b/arch/inst/V/vmv.s.x.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv.v.i.yaml b/arch/inst/V/vmv.v.i.yaml index b674898da1..eb8c645b33 100644 --- a/arch/inst/V/vmv.v.i.yaml +++ b/arch/inst/V/vmv.v.i.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv.v.v.yaml b/arch/inst/V/vmv.v.v.yaml index 34e806dcee..458db30bef 100644 --- a/arch/inst/V/vmv.v.v.yaml +++ b/arch/inst/V/vmv.v.v.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv.v.x.yaml b/arch/inst/V/vmv.v.x.yaml index aec2f593d3..120aa20599 100644 --- a/arch/inst/V/vmv.v.x.yaml +++ b/arch/inst/V/vmv.v.x.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv.x.s.yaml b/arch/inst/V/vmv.x.s.yaml index 8f6a1240b8..b5b85f04b0 100644 --- a/arch/inst/V/vmv.x.s.yaml +++ b/arch/inst/V/vmv.x.s.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv1r.v.yaml b/arch/inst/V/vmv1r.v.yaml index 4fd9c9d4c0..20d7c6f7ca 100644 --- a/arch/inst/V/vmv1r.v.yaml +++ b/arch/inst/V/vmv1r.v.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv2r.v.yaml b/arch/inst/V/vmv2r.v.yaml index 7431ef99a7..4ce32fa895 100644 --- a/arch/inst/V/vmv2r.v.yaml +++ b/arch/inst/V/vmv2r.v.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv4r.v.yaml b/arch/inst/V/vmv4r.v.yaml index bf8345cfe4..3b18255511 100644 --- a/arch/inst/V/vmv4r.v.yaml +++ b/arch/inst/V/vmv4r.v.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmv8r.v.yaml b/arch/inst/V/vmv8r.v.yaml index b07fcbc465..e79f0c1019 100644 --- a/arch/inst/V/vmv8r.v.yaml +++ b/arch/inst/V/vmv8r.v.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmxnor.mm.yaml b/arch/inst/V/vmxnor.mm.yaml index 9ba0dd874d..bc3fdb1ec9 100644 --- a/arch/inst/V/vmxnor.mm.yaml +++ b/arch/inst/V/vmxnor.mm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vmxor.mm.yaml b/arch/inst/V/vmxor.mm.yaml index 356b99aa9b..65f12d42e5 100644 --- a/arch/inst/V/vmxor.mm.yaml +++ b/arch/inst/V/vmxor.mm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnclip.wi.yaml b/arch/inst/V/vnclip.wi.yaml index fdacf5691d..25bb55a018 100644 --- a/arch/inst/V/vnclip.wi.yaml +++ b/arch/inst/V/vnclip.wi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnclip.wv.yaml b/arch/inst/V/vnclip.wv.yaml index 7c36cabe2c..4da924de96 100644 --- a/arch/inst/V/vnclip.wv.yaml +++ b/arch/inst/V/vnclip.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnclip.wx.yaml b/arch/inst/V/vnclip.wx.yaml index 0d76a3975c..64b2234dd8 100644 --- a/arch/inst/V/vnclip.wx.yaml +++ b/arch/inst/V/vnclip.wx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnclipu.wi.yaml b/arch/inst/V/vnclipu.wi.yaml index 2fadc261a5..ccc82ea3e1 100644 --- a/arch/inst/V/vnclipu.wi.yaml +++ b/arch/inst/V/vnclipu.wi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnclipu.wv.yaml b/arch/inst/V/vnclipu.wv.yaml index 1d20cbf52d..6806b12acb 100644 --- a/arch/inst/V/vnclipu.wv.yaml +++ b/arch/inst/V/vnclipu.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnclipu.wx.yaml b/arch/inst/V/vnclipu.wx.yaml index 869bb51e9e..46c8fb739f 100644 --- a/arch/inst/V/vnclipu.wx.yaml +++ b/arch/inst/V/vnclipu.wx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnmsac.vv.yaml b/arch/inst/V/vnmsac.vv.yaml index 888ddc1cdb..08a78020ce 100644 --- a/arch/inst/V/vnmsac.vv.yaml +++ b/arch/inst/V/vnmsac.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnmsac.vx.yaml b/arch/inst/V/vnmsac.vx.yaml index e7330688fe..e0a0f7e611 100644 --- a/arch/inst/V/vnmsac.vx.yaml +++ b/arch/inst/V/vnmsac.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnmsub.vv.yaml b/arch/inst/V/vnmsub.vv.yaml index d4428b7cf0..c093ddfa8f 100644 --- a/arch/inst/V/vnmsub.vv.yaml +++ b/arch/inst/V/vnmsub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnmsub.vx.yaml b/arch/inst/V/vnmsub.vx.yaml index 51d198a560..5d5ce46464 100644 --- a/arch/inst/V/vnmsub.vx.yaml +++ b/arch/inst/V/vnmsub.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnsra.wi.yaml b/arch/inst/V/vnsra.wi.yaml index f2fb7ced79..c2a9fb76ce 100644 --- a/arch/inst/V/vnsra.wi.yaml +++ b/arch/inst/V/vnsra.wi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnsra.wv.yaml b/arch/inst/V/vnsra.wv.yaml index 1b0f0d8a9e..d5a0d13a62 100644 --- a/arch/inst/V/vnsra.wv.yaml +++ b/arch/inst/V/vnsra.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnsra.wx.yaml b/arch/inst/V/vnsra.wx.yaml index a0866cf378..e789283c96 100644 --- a/arch/inst/V/vnsra.wx.yaml +++ b/arch/inst/V/vnsra.wx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnsrl.wi.yaml b/arch/inst/V/vnsrl.wi.yaml index 9636d09a6a..47e9a40c3c 100644 --- a/arch/inst/V/vnsrl.wi.yaml +++ b/arch/inst/V/vnsrl.wi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnsrl.wv.yaml b/arch/inst/V/vnsrl.wv.yaml index 87be5cb268..3af21a9229 100644 --- a/arch/inst/V/vnsrl.wv.yaml +++ b/arch/inst/V/vnsrl.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vnsrl.wx.yaml b/arch/inst/V/vnsrl.wx.yaml index 9e87278547..d88fd06a31 100644 --- a/arch/inst/V/vnsrl.wx.yaml +++ b/arch/inst/V/vnsrl.wx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vor.vi.yaml b/arch/inst/V/vor.vi.yaml index 9ff1fcc217..2520e0bd35 100644 --- a/arch/inst/V/vor.vi.yaml +++ b/arch/inst/V/vor.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vor.vv.yaml b/arch/inst/V/vor.vv.yaml index 58bced8ac6..db76ba2b11 100644 --- a/arch/inst/V/vor.vv.yaml +++ b/arch/inst/V/vor.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vor.vx.yaml b/arch/inst/V/vor.vx.yaml index e7542359a8..ab931d745b 100644 --- a/arch/inst/V/vor.vx.yaml +++ b/arch/inst/V/vor.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vredand.vs.yaml b/arch/inst/V/vredand.vs.yaml index 80d897ec5e..6d0e5a474b 100644 --- a/arch/inst/V/vredand.vs.yaml +++ b/arch/inst/V/vredand.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vredmax.vs.yaml b/arch/inst/V/vredmax.vs.yaml index 0c78494550..b02ec701ab 100644 --- a/arch/inst/V/vredmax.vs.yaml +++ b/arch/inst/V/vredmax.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vredmaxu.vs.yaml b/arch/inst/V/vredmaxu.vs.yaml index a7ed31ff07..b892cae660 100644 --- a/arch/inst/V/vredmaxu.vs.yaml +++ b/arch/inst/V/vredmaxu.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vredmin.vs.yaml b/arch/inst/V/vredmin.vs.yaml index b81d122a3c..313d09b704 100644 --- a/arch/inst/V/vredmin.vs.yaml +++ b/arch/inst/V/vredmin.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vredminu.vs.yaml b/arch/inst/V/vredminu.vs.yaml index 0d5cafeb25..7ea693a0dc 100644 --- a/arch/inst/V/vredminu.vs.yaml +++ b/arch/inst/V/vredminu.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vredor.vs.yaml b/arch/inst/V/vredor.vs.yaml index f1d5f5a5ca..176c4155a8 100644 --- a/arch/inst/V/vredor.vs.yaml +++ b/arch/inst/V/vredor.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vredsum.vs.yaml b/arch/inst/V/vredsum.vs.yaml index 3e75edf563..c9a2687764 100644 --- a/arch/inst/V/vredsum.vs.yaml +++ b/arch/inst/V/vredsum.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vredxor.vs.yaml b/arch/inst/V/vredxor.vs.yaml index 365e6239ef..9cb3f697a4 100644 --- a/arch/inst/V/vredxor.vs.yaml +++ b/arch/inst/V/vredxor.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vrem.vv.yaml b/arch/inst/V/vrem.vv.yaml index 8c57d5559a..a4a9531128 100644 --- a/arch/inst/V/vrem.vv.yaml +++ b/arch/inst/V/vrem.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vrem.vx.yaml b/arch/inst/V/vrem.vx.yaml index 361f14be31..10b18bd254 100644 --- a/arch/inst/V/vrem.vx.yaml +++ b/arch/inst/V/vrem.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vremu.vv.yaml b/arch/inst/V/vremu.vv.yaml index f37deefb91..c3847ebed4 100644 --- a/arch/inst/V/vremu.vv.yaml +++ b/arch/inst/V/vremu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vremu.vx.yaml b/arch/inst/V/vremu.vx.yaml index 3b070b708e..5527d99ead 100644 --- a/arch/inst/V/vremu.vx.yaml +++ b/arch/inst/V/vremu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vrgather.vi.yaml b/arch/inst/V/vrgather.vi.yaml index 8e90d12220..262db59720 100644 --- a/arch/inst/V/vrgather.vi.yaml +++ b/arch/inst/V/vrgather.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vrgather.vv.yaml b/arch/inst/V/vrgather.vv.yaml index 2cfad03bda..2d15623900 100644 --- a/arch/inst/V/vrgather.vv.yaml +++ b/arch/inst/V/vrgather.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vrgather.vx.yaml b/arch/inst/V/vrgather.vx.yaml index 384f676ff6..f31ec52fe7 100644 --- a/arch/inst/V/vrgather.vx.yaml +++ b/arch/inst/V/vrgather.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vrgatherei16.vv.yaml b/arch/inst/V/vrgatherei16.vv.yaml index 3fe707028d..549237405f 100644 --- a/arch/inst/V/vrgatherei16.vv.yaml +++ b/arch/inst/V/vrgatherei16.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vrsub.vi.yaml b/arch/inst/V/vrsub.vi.yaml index dc5c7bf3e3..2e28922e80 100644 --- a/arch/inst/V/vrsub.vi.yaml +++ b/arch/inst/V/vrsub.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vrsub.vx.yaml b/arch/inst/V/vrsub.vx.yaml index 6a5a832c62..2132e77fff 100644 --- a/arch/inst/V/vrsub.vx.yaml +++ b/arch/inst/V/vrsub.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsadd.vi.yaml b/arch/inst/V/vsadd.vi.yaml index f00ce7be0c..6d176b6efe 100644 --- a/arch/inst/V/vsadd.vi.yaml +++ b/arch/inst/V/vsadd.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsadd.vv.yaml b/arch/inst/V/vsadd.vv.yaml index 0716e8ae33..f3bda1a717 100644 --- a/arch/inst/V/vsadd.vv.yaml +++ b/arch/inst/V/vsadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsadd.vx.yaml b/arch/inst/V/vsadd.vx.yaml index c23ab241c4..3ad7324f64 100644 --- a/arch/inst/V/vsadd.vx.yaml +++ b/arch/inst/V/vsadd.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsaddu.vi.yaml b/arch/inst/V/vsaddu.vi.yaml index a41939c70c..c5f05a78e5 100644 --- a/arch/inst/V/vsaddu.vi.yaml +++ b/arch/inst/V/vsaddu.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsaddu.vv.yaml b/arch/inst/V/vsaddu.vv.yaml index 995f05d07c..4c13529b47 100644 --- a/arch/inst/V/vsaddu.vv.yaml +++ b/arch/inst/V/vsaddu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsaddu.vx.yaml b/arch/inst/V/vsaddu.vx.yaml index 587d447857..74a4f8a967 100644 --- a/arch/inst/V/vsaddu.vx.yaml +++ b/arch/inst/V/vsaddu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsbc.vvm.yaml b/arch/inst/V/vsbc.vvm.yaml index acf3101185..da62e694d6 100644 --- a/arch/inst/V/vsbc.vvm.yaml +++ b/arch/inst/V/vsbc.vvm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsbc.vxm.yaml b/arch/inst/V/vsbc.vxm.yaml index 8607999e59..a19d16ecf5 100644 --- a/arch/inst/V/vsbc.vxm.yaml +++ b/arch/inst/V/vsbc.vxm.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vse16.v.yaml b/arch/inst/V/vse16.v.yaml index 64d04de8d1..585709d288 100644 --- a/arch/inst/V/vse16.v.yaml +++ b/arch/inst/V/vse16.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vse32.v.yaml b/arch/inst/V/vse32.v.yaml index f1a148f8cd..e9471a577f 100644 --- a/arch/inst/V/vse32.v.yaml +++ b/arch/inst/V/vse32.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vse64.v.yaml b/arch/inst/V/vse64.v.yaml index cd4326ff38..b595dbbfde 100644 --- a/arch/inst/V/vse64.v.yaml +++ b/arch/inst/V/vse64.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vse8.v.yaml b/arch/inst/V/vse8.v.yaml index 0180242b7d..4a58e2027b 100644 --- a/arch/inst/V/vse8.v.yaml +++ b/arch/inst/V/vse8.v.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsetivli.yaml b/arch/inst/V/vsetivli.yaml index 34d3495b5a..18b2198709 100644 --- a/arch/inst/V/vsetivli.yaml +++ b/arch/inst/V/vsetivli.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsetvli.yaml b/arch/inst/V/vsetvli.yaml index 5978b4eaf3..04e14f24e7 100644 --- a/arch/inst/V/vsetvli.yaml +++ b/arch/inst/V/vsetvli.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsext.vf2.yaml b/arch/inst/V/vsext.vf2.yaml index 067548d4e6..623d84d448 100644 --- a/arch/inst/V/vsext.vf2.yaml +++ b/arch/inst/V/vsext.vf2.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsext.vf4.yaml b/arch/inst/V/vsext.vf4.yaml index 9f595d5641..2f5f1819f1 100644 --- a/arch/inst/V/vsext.vf4.yaml +++ b/arch/inst/V/vsext.vf4.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsext.vf8.yaml b/arch/inst/V/vsext.vf8.yaml index e8bf09deab..05b2c3c79a 100644 --- a/arch/inst/V/vsext.vf8.yaml +++ b/arch/inst/V/vsext.vf8.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vslide1down.vx.yaml b/arch/inst/V/vslide1down.vx.yaml index 59959a70c9..196941b4ab 100644 --- a/arch/inst/V/vslide1down.vx.yaml +++ b/arch/inst/V/vslide1down.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vslide1up.vx.yaml b/arch/inst/V/vslide1up.vx.yaml index e5008a8028..81b561f680 100644 --- a/arch/inst/V/vslide1up.vx.yaml +++ b/arch/inst/V/vslide1up.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vslidedown.vi.yaml b/arch/inst/V/vslidedown.vi.yaml index 6c46d6b829..a75223d656 100644 --- a/arch/inst/V/vslidedown.vi.yaml +++ b/arch/inst/V/vslidedown.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vslidedown.vx.yaml b/arch/inst/V/vslidedown.vx.yaml index 686ddcda71..166f4e35e3 100644 --- a/arch/inst/V/vslidedown.vx.yaml +++ b/arch/inst/V/vslidedown.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vslideup.vi.yaml b/arch/inst/V/vslideup.vi.yaml index e9e55df9b8..21fd76ea23 100644 --- a/arch/inst/V/vslideup.vi.yaml +++ b/arch/inst/V/vslideup.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vslideup.vx.yaml b/arch/inst/V/vslideup.vx.yaml index 582b469cbd..2e0726e1e5 100644 --- a/arch/inst/V/vslideup.vx.yaml +++ b/arch/inst/V/vslideup.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsll.vi.yaml b/arch/inst/V/vsll.vi.yaml index 58852fde16..496e0d8e7a 100644 --- a/arch/inst/V/vsll.vi.yaml +++ b/arch/inst/V/vsll.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsll.vv.yaml b/arch/inst/V/vsll.vv.yaml index f22621c5d0..aaad74023b 100644 --- a/arch/inst/V/vsll.vv.yaml +++ b/arch/inst/V/vsll.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsll.vx.yaml b/arch/inst/V/vsll.vx.yaml index fb6114e3ba..96ba918b8b 100644 --- a/arch/inst/V/vsll.vx.yaml +++ b/arch/inst/V/vsll.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsm.v.yaml b/arch/inst/V/vsm.v.yaml index 83e325426c..0bc2b68a3a 100644 --- a/arch/inst/V/vsm.v.yaml +++ b/arch/inst/V/vsm.v.yaml @@ -24,7 +24,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsmul.vv.yaml b/arch/inst/V/vsmul.vv.yaml index 7d77841975..11a0d07d4e 100644 --- a/arch/inst/V/vsmul.vv.yaml +++ b/arch/inst/V/vsmul.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsmul.vx.yaml b/arch/inst/V/vsmul.vx.yaml index 0ce205dcd4..c5a8d99505 100644 --- a/arch/inst/V/vsmul.vx.yaml +++ b/arch/inst/V/vsmul.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsoxei16.v.yaml b/arch/inst/V/vsoxei16.v.yaml index 17613223e2..8515e1c95e 100644 --- a/arch/inst/V/vsoxei16.v.yaml +++ b/arch/inst/V/vsoxei16.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsoxei32.v.yaml b/arch/inst/V/vsoxei32.v.yaml index d2f5991e95..808b90be39 100644 --- a/arch/inst/V/vsoxei32.v.yaml +++ b/arch/inst/V/vsoxei32.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsoxei64.v.yaml b/arch/inst/V/vsoxei64.v.yaml index 8c1caccf9d..7460c180c8 100644 --- a/arch/inst/V/vsoxei64.v.yaml +++ b/arch/inst/V/vsoxei64.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsoxei8.v.yaml b/arch/inst/V/vsoxei8.v.yaml index 6811ae0632..ca5866d825 100644 --- a/arch/inst/V/vsoxei8.v.yaml +++ b/arch/inst/V/vsoxei8.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsra.vi.yaml b/arch/inst/V/vsra.vi.yaml index 7327fa12bc..18882c7653 100644 --- a/arch/inst/V/vsra.vi.yaml +++ b/arch/inst/V/vsra.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsra.vv.yaml b/arch/inst/V/vsra.vv.yaml index 59fe637a21..a1cb50f549 100644 --- a/arch/inst/V/vsra.vv.yaml +++ b/arch/inst/V/vsra.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsra.vx.yaml b/arch/inst/V/vsra.vx.yaml index d2b0f969fd..0277e81663 100644 --- a/arch/inst/V/vsra.vx.yaml +++ b/arch/inst/V/vsra.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsrl.vi.yaml b/arch/inst/V/vsrl.vi.yaml index a6b213bffc..21ef7fbcbd 100644 --- a/arch/inst/V/vsrl.vi.yaml +++ b/arch/inst/V/vsrl.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsrl.vv.yaml b/arch/inst/V/vsrl.vv.yaml index fe5f9e5ab1..28ade8dcc5 100644 --- a/arch/inst/V/vsrl.vv.yaml +++ b/arch/inst/V/vsrl.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsrl.vx.yaml b/arch/inst/V/vsrl.vx.yaml index 8f5b177d2b..07e2552fa2 100644 --- a/arch/inst/V/vsrl.vx.yaml +++ b/arch/inst/V/vsrl.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsse16.v.yaml b/arch/inst/V/vsse16.v.yaml index 307fcb1108..0dde83ae85 100644 --- a/arch/inst/V/vsse16.v.yaml +++ b/arch/inst/V/vsse16.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsse32.v.yaml b/arch/inst/V/vsse32.v.yaml index 72fdfdae9c..7b41aaeccf 100644 --- a/arch/inst/V/vsse32.v.yaml +++ b/arch/inst/V/vsse32.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsse64.v.yaml b/arch/inst/V/vsse64.v.yaml index 32e09b0cce..1672677554 100644 --- a/arch/inst/V/vsse64.v.yaml +++ b/arch/inst/V/vsse64.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsse8.v.yaml b/arch/inst/V/vsse8.v.yaml index c88c72c33d..fb481884c4 100644 --- a/arch/inst/V/vsse8.v.yaml +++ b/arch/inst/V/vsse8.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssra.vi.yaml b/arch/inst/V/vssra.vi.yaml index 8c0e30c6ef..00821dcdd1 100644 --- a/arch/inst/V/vssra.vi.yaml +++ b/arch/inst/V/vssra.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssra.vv.yaml b/arch/inst/V/vssra.vv.yaml index 3521d69f71..c395a8869e 100644 --- a/arch/inst/V/vssra.vv.yaml +++ b/arch/inst/V/vssra.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssra.vx.yaml b/arch/inst/V/vssra.vx.yaml index 3ef571b75e..c606f90fbb 100644 --- a/arch/inst/V/vssra.vx.yaml +++ b/arch/inst/V/vssra.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssrl.vi.yaml b/arch/inst/V/vssrl.vi.yaml index f92d797e96..c5404576af 100644 --- a/arch/inst/V/vssrl.vi.yaml +++ b/arch/inst/V/vssrl.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssrl.vv.yaml b/arch/inst/V/vssrl.vv.yaml index 0a39a407ea..ca040dae73 100644 --- a/arch/inst/V/vssrl.vv.yaml +++ b/arch/inst/V/vssrl.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssrl.vx.yaml b/arch/inst/V/vssrl.vx.yaml index 6700d16045..fa989c42b5 100644 --- a/arch/inst/V/vssrl.vx.yaml +++ b/arch/inst/V/vssrl.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssub.vv.yaml b/arch/inst/V/vssub.vv.yaml index 0f233b9a24..c076a6b558 100644 --- a/arch/inst/V/vssub.vv.yaml +++ b/arch/inst/V/vssub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssub.vx.yaml b/arch/inst/V/vssub.vx.yaml index 4736fa376f..f5a1812489 100644 --- a/arch/inst/V/vssub.vx.yaml +++ b/arch/inst/V/vssub.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssubu.vv.yaml b/arch/inst/V/vssubu.vv.yaml index 8b5eb99c6b..7cae1a9711 100644 --- a/arch/inst/V/vssubu.vv.yaml +++ b/arch/inst/V/vssubu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vssubu.vx.yaml b/arch/inst/V/vssubu.vx.yaml index 20b7de43ee..7b8a8f7943 100644 --- a/arch/inst/V/vssubu.vx.yaml +++ b/arch/inst/V/vssubu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsub.vv.yaml b/arch/inst/V/vsub.vv.yaml index 21f5f0910a..3c84dc7df3 100644 --- a/arch/inst/V/vsub.vv.yaml +++ b/arch/inst/V/vsub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsub.vx.yaml b/arch/inst/V/vsub.vx.yaml index e58674f075..78cedbdcf9 100644 --- a/arch/inst/V/vsub.vx.yaml +++ b/arch/inst/V/vsub.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsuxei16.v.yaml b/arch/inst/V/vsuxei16.v.yaml index 0069dceaf9..5fb6c7b2ba 100644 --- a/arch/inst/V/vsuxei16.v.yaml +++ b/arch/inst/V/vsuxei16.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsuxei32.v.yaml b/arch/inst/V/vsuxei32.v.yaml index 62618a0290..f7642a5c36 100644 --- a/arch/inst/V/vsuxei32.v.yaml +++ b/arch/inst/V/vsuxei32.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsuxei64.v.yaml b/arch/inst/V/vsuxei64.v.yaml index 718443323c..73ee98b06b 100644 --- a/arch/inst/V/vsuxei64.v.yaml +++ b/arch/inst/V/vsuxei64.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vsuxei8.v.yaml b/arch/inst/V/vsuxei8.v.yaml index 2b085f21fe..83903bf39c 100644 --- a/arch/inst/V/vsuxei8.v.yaml +++ b/arch/inst/V/vsuxei8.v.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwadd.vv.yaml b/arch/inst/V/vwadd.vv.yaml index 35753d938d..7b4606106f 100644 --- a/arch/inst/V/vwadd.vv.yaml +++ b/arch/inst/V/vwadd.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwadd.vx.yaml b/arch/inst/V/vwadd.vx.yaml index afec075672..58f01691eb 100644 --- a/arch/inst/V/vwadd.vx.yaml +++ b/arch/inst/V/vwadd.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwadd.wv.yaml b/arch/inst/V/vwadd.wv.yaml index 080cb4f73c..c2ec0fb7f1 100644 --- a/arch/inst/V/vwadd.wv.yaml +++ b/arch/inst/V/vwadd.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwadd.wx.yaml b/arch/inst/V/vwadd.wx.yaml index 40a992d362..d89d68a98c 100644 --- a/arch/inst/V/vwadd.wx.yaml +++ b/arch/inst/V/vwadd.wx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwaddu.vv.yaml b/arch/inst/V/vwaddu.vv.yaml index d86d31cac8..44b94b9aa7 100644 --- a/arch/inst/V/vwaddu.vv.yaml +++ b/arch/inst/V/vwaddu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwaddu.vx.yaml b/arch/inst/V/vwaddu.vx.yaml index db87433e21..794e04fea5 100644 --- a/arch/inst/V/vwaddu.vx.yaml +++ b/arch/inst/V/vwaddu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwaddu.wv.yaml b/arch/inst/V/vwaddu.wv.yaml index 45b35928d3..8ee58a31fd 100644 --- a/arch/inst/V/vwaddu.wv.yaml +++ b/arch/inst/V/vwaddu.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwaddu.wx.yaml b/arch/inst/V/vwaddu.wx.yaml index f120dbb307..50879199a0 100644 --- a/arch/inst/V/vwaddu.wx.yaml +++ b/arch/inst/V/vwaddu.wx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmacc.vv.yaml b/arch/inst/V/vwmacc.vv.yaml index 5bfad075c8..16de150f65 100644 --- a/arch/inst/V/vwmacc.vv.yaml +++ b/arch/inst/V/vwmacc.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmacc.vx.yaml b/arch/inst/V/vwmacc.vx.yaml index 0537888f83..98fed0f414 100644 --- a/arch/inst/V/vwmacc.vx.yaml +++ b/arch/inst/V/vwmacc.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmaccsu.vv.yaml b/arch/inst/V/vwmaccsu.vv.yaml index d44b5b4978..34a35d0c25 100644 --- a/arch/inst/V/vwmaccsu.vv.yaml +++ b/arch/inst/V/vwmaccsu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmaccsu.vx.yaml b/arch/inst/V/vwmaccsu.vx.yaml index b5ab724532..733ec03171 100644 --- a/arch/inst/V/vwmaccsu.vx.yaml +++ b/arch/inst/V/vwmaccsu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmaccu.vv.yaml b/arch/inst/V/vwmaccu.vv.yaml index 9636718e50..441c677e2b 100644 --- a/arch/inst/V/vwmaccu.vv.yaml +++ b/arch/inst/V/vwmaccu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmaccu.vx.yaml b/arch/inst/V/vwmaccu.vx.yaml index 3257edb6f9..7a597d0b4b 100644 --- a/arch/inst/V/vwmaccu.vx.yaml +++ b/arch/inst/V/vwmaccu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmaccus.vx.yaml b/arch/inst/V/vwmaccus.vx.yaml index 5a837117bb..a01547215f 100644 --- a/arch/inst/V/vwmaccus.vx.yaml +++ b/arch/inst/V/vwmaccus.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmul.vv.yaml b/arch/inst/V/vwmul.vv.yaml index bfafaa8fdf..ae40b6770a 100644 --- a/arch/inst/V/vwmul.vv.yaml +++ b/arch/inst/V/vwmul.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmul.vx.yaml b/arch/inst/V/vwmul.vx.yaml index d58c73043d..b45ca13580 100644 --- a/arch/inst/V/vwmul.vx.yaml +++ b/arch/inst/V/vwmul.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmulsu.vv.yaml b/arch/inst/V/vwmulsu.vv.yaml index 97b05d18a2..39031de353 100644 --- a/arch/inst/V/vwmulsu.vv.yaml +++ b/arch/inst/V/vwmulsu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmulsu.vx.yaml b/arch/inst/V/vwmulsu.vx.yaml index 4e376030c1..c94b439703 100644 --- a/arch/inst/V/vwmulsu.vx.yaml +++ b/arch/inst/V/vwmulsu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmulu.vv.yaml b/arch/inst/V/vwmulu.vv.yaml index fbdd856bff..105c653e1f 100644 --- a/arch/inst/V/vwmulu.vv.yaml +++ b/arch/inst/V/vwmulu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwmulu.vx.yaml b/arch/inst/V/vwmulu.vx.yaml index ca48edb30f..c0c6201f25 100644 --- a/arch/inst/V/vwmulu.vx.yaml +++ b/arch/inst/V/vwmulu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwredsum.vs.yaml b/arch/inst/V/vwredsum.vs.yaml index f395e5c568..8184f7f742 100644 --- a/arch/inst/V/vwredsum.vs.yaml +++ b/arch/inst/V/vwredsum.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwredsumu.vs.yaml b/arch/inst/V/vwredsumu.vs.yaml index de177fc6f8..49e22c3fe6 100644 --- a/arch/inst/V/vwredsumu.vs.yaml +++ b/arch/inst/V/vwredsumu.vs.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwsub.vv.yaml b/arch/inst/V/vwsub.vv.yaml index ab974a9537..bd912d8a42 100644 --- a/arch/inst/V/vwsub.vv.yaml +++ b/arch/inst/V/vwsub.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwsub.vx.yaml b/arch/inst/V/vwsub.vx.yaml index 0a309c99b9..99bdaac7ea 100644 --- a/arch/inst/V/vwsub.vx.yaml +++ b/arch/inst/V/vwsub.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwsub.wv.yaml b/arch/inst/V/vwsub.wv.yaml index bc500b4a92..f1825c4dd1 100644 --- a/arch/inst/V/vwsub.wv.yaml +++ b/arch/inst/V/vwsub.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwsub.wx.yaml b/arch/inst/V/vwsub.wx.yaml index a677199930..00fc49ba80 100644 --- a/arch/inst/V/vwsub.wx.yaml +++ b/arch/inst/V/vwsub.wx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwsubu.vv.yaml b/arch/inst/V/vwsubu.vv.yaml index 2a33178b80..9f6c2815b0 100644 --- a/arch/inst/V/vwsubu.vv.yaml +++ b/arch/inst/V/vwsubu.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwsubu.vx.yaml b/arch/inst/V/vwsubu.vx.yaml index eabce4d919..9d38972ea1 100644 --- a/arch/inst/V/vwsubu.vx.yaml +++ b/arch/inst/V/vwsubu.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwsubu.wv.yaml b/arch/inst/V/vwsubu.wv.yaml index 61189a1641..1f9d0cb495 100644 --- a/arch/inst/V/vwsubu.wv.yaml +++ b/arch/inst/V/vwsubu.wv.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vwsubu.wx.yaml b/arch/inst/V/vwsubu.wx.yaml index 9633cc6093..4511174ca0 100644 --- a/arch/inst/V/vwsubu.wx.yaml +++ b/arch/inst/V/vwsubu.wx.yaml @@ -28,7 +28,7 @@ data_independent_timing: true operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vxor.vi.yaml b/arch/inst/V/vxor.vi.yaml index dd3ce72a51..d7f6556edf 100644 --- a/arch/inst/V/vxor.vi.yaml +++ b/arch/inst/V/vxor.vi.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vxor.vv.yaml b/arch/inst/V/vxor.vv.yaml index 161024d430..3043dadea6 100644 --- a/arch/inst/V/vxor.vv.yaml +++ b/arch/inst/V/vxor.vv.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vxor.vx.yaml b/arch/inst/V/vxor.vx.yaml index e28f01ada8..5f625db19d 100644 --- a/arch/inst/V/vxor.vx.yaml +++ b/arch/inst/V/vxor.vx.yaml @@ -28,7 +28,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vzext.vf2.yaml b/arch/inst/V/vzext.vf2.yaml index 9ebf12212e..edd6a3857d 100644 --- a/arch/inst/V/vzext.vf2.yaml +++ b/arch/inst/V/vzext.vf2.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vzext.vf4.yaml b/arch/inst/V/vzext.vf4.yaml index db0b04742a..039912da79 100644 --- a/arch/inst/V/vzext.vf4.yaml +++ b/arch/inst/V/vzext.vf4.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/V/vzext.vf8.yaml b/arch/inst/V/vzext.vf8.yaml index 18f568563c..ac1363c9d1 100644 --- a/arch/inst/V/vzext.vf8.yaml +++ b/arch/inst/V/vzext.vf8.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoadd.b.yaml b/arch/inst/Zabha/amoadd.b.yaml index 8abf81f365..088efaa7cb 100644 --- a/arch/inst/Zabha/amoadd.b.yaml +++ b/arch/inst/Zabha/amoadd.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoadd.h.yaml b/arch/inst/Zabha/amoadd.h.yaml index 4d718dce1b..f709160212 100644 --- a/arch/inst/Zabha/amoadd.h.yaml +++ b/arch/inst/Zabha/amoadd.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoand.b.yaml b/arch/inst/Zabha/amoand.b.yaml index 8566474275..69f0bfe454 100644 --- a/arch/inst/Zabha/amoand.b.yaml +++ b/arch/inst/Zabha/amoand.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoand.h.yaml b/arch/inst/Zabha/amoand.h.yaml index c8f33d3786..1373e63975 100644 --- a/arch/inst/Zabha/amoand.h.yaml +++ b/arch/inst/Zabha/amoand.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amomax.b.yaml b/arch/inst/Zabha/amomax.b.yaml index 45c6facfc1..fe7bc26d27 100644 --- a/arch/inst/Zabha/amomax.b.yaml +++ b/arch/inst/Zabha/amomax.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amomax.h.yaml b/arch/inst/Zabha/amomax.h.yaml index 47bfa68ee5..cf989093d5 100644 --- a/arch/inst/Zabha/amomax.h.yaml +++ b/arch/inst/Zabha/amomax.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amomaxu.b.yaml b/arch/inst/Zabha/amomaxu.b.yaml index 2bbc822e4c..3b78f8db5f 100644 --- a/arch/inst/Zabha/amomaxu.b.yaml +++ b/arch/inst/Zabha/amomaxu.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amomaxu.h.yaml b/arch/inst/Zabha/amomaxu.h.yaml index 9061aea95b..3d61d0f9ca 100644 --- a/arch/inst/Zabha/amomaxu.h.yaml +++ b/arch/inst/Zabha/amomaxu.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amomin.b.yaml b/arch/inst/Zabha/amomin.b.yaml index bd28531d70..0e6ed0f1ad 100644 --- a/arch/inst/Zabha/amomin.b.yaml +++ b/arch/inst/Zabha/amomin.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amomin.h.yaml b/arch/inst/Zabha/amomin.h.yaml index e94e61032e..914f0a72cd 100644 --- a/arch/inst/Zabha/amomin.h.yaml +++ b/arch/inst/Zabha/amomin.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amominu.b.yaml b/arch/inst/Zabha/amominu.b.yaml index 28a528947d..a1fb196aa3 100644 --- a/arch/inst/Zabha/amominu.b.yaml +++ b/arch/inst/Zabha/amominu.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amominu.h.yaml b/arch/inst/Zabha/amominu.h.yaml index c6a1d1f60f..cf38aea512 100644 --- a/arch/inst/Zabha/amominu.h.yaml +++ b/arch/inst/Zabha/amominu.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoor.b.yaml b/arch/inst/Zabha/amoor.b.yaml index 456162d216..12eb2f9119 100644 --- a/arch/inst/Zabha/amoor.b.yaml +++ b/arch/inst/Zabha/amoor.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoor.h.yaml b/arch/inst/Zabha/amoor.h.yaml index 1a6cd51117..55842132f2 100644 --- a/arch/inst/Zabha/amoor.h.yaml +++ b/arch/inst/Zabha/amoor.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoswap.b.yaml b/arch/inst/Zabha/amoswap.b.yaml index d9f3f4c27e..c65547546c 100644 --- a/arch/inst/Zabha/amoswap.b.yaml +++ b/arch/inst/Zabha/amoswap.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoswap.h.yaml b/arch/inst/Zabha/amoswap.h.yaml index 3be9b573a7..626c1999dc 100644 --- a/arch/inst/Zabha/amoswap.h.yaml +++ b/arch/inst/Zabha/amoswap.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoxor.b.yaml b/arch/inst/Zabha/amoxor.b.yaml index 73e6801d0d..877da660a0 100644 --- a/arch/inst/Zabha/amoxor.b.yaml +++ b/arch/inst/Zabha/amoxor.b.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zabha/amoxor.h.yaml b/arch/inst/Zabha/amoxor.h.yaml index 53882a1afa..ad33b40154 100644 --- a/arch/inst/Zabha/amoxor.h.yaml +++ b/arch/inst/Zabha/amoxor.h.yaml @@ -30,7 +30,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zalasr/lb.aq.yaml b/arch/inst/Zalasr/lb.aq.yaml index 23305e6271..84b6c2fbb3 100644 --- a/arch/inst/Zalasr/lb.aq.yaml +++ b/arch/inst/Zalasr/lb.aq.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zalasr/ld.aq.yaml b/arch/inst/Zalasr/ld.aq.yaml index d4a95822b6..91f4d052f5 100644 --- a/arch/inst/Zalasr/ld.aq.yaml +++ b/arch/inst/Zalasr/ld.aq.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zalasr/lh.aq.yaml b/arch/inst/Zalasr/lh.aq.yaml index 5a7fbba463..4c87299b0e 100644 --- a/arch/inst/Zalasr/lh.aq.yaml +++ b/arch/inst/Zalasr/lh.aq.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zalasr/lw.aq.yaml b/arch/inst/Zalasr/lw.aq.yaml index dd2bd1819a..ad5a2c49d0 100644 --- a/arch/inst/Zalasr/lw.aq.yaml +++ b/arch/inst/Zalasr/lw.aq.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zalasr/sb.rl.yaml b/arch/inst/Zalasr/sb.rl.yaml index 4bb8b3ca6d..498f6846a0 100644 --- a/arch/inst/Zalasr/sb.rl.yaml +++ b/arch/inst/Zalasr/sb.rl.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zalasr/sd.rl.yaml b/arch/inst/Zalasr/sd.rl.yaml index 1134c6e6d7..20db4637cb 100644 --- a/arch/inst/Zalasr/sd.rl.yaml +++ b/arch/inst/Zalasr/sd.rl.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zalasr/sh.rl.yaml b/arch/inst/Zalasr/sh.rl.yaml index e3995423c6..791d698b20 100644 --- a/arch/inst/Zalasr/sh.rl.yaml +++ b/arch/inst/Zalasr/sh.rl.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zalasr/sw.rl.yaml b/arch/inst/Zalasr/sw.rl.yaml index f98575e381..671717424d 100644 --- a/arch/inst/Zalasr/sw.rl.yaml +++ b/arch/inst/Zalasr/sw.rl.yaml @@ -26,7 +26,7 @@ data_independent_timing: false operation(): | # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zbkb/brev8.yaml b/arch/inst/Zbkb/brev8.yaml index d330bac7e2..e9a17d0a5e 100644 --- a/arch/inst/Zbkb/brev8.yaml +++ b/arch/inst/Zbkb/brev8.yaml @@ -34,7 +34,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | result : xlenbits = EXTZ(0b0); diff --git a/arch/inst/Zbkb/unzip.yaml b/arch/inst/Zbkb/unzip.yaml index 95a367d01b..c88e956d62 100644 --- a/arch/inst/Zbkb/unzip.yaml +++ b/arch/inst/Zbkb/unzip.yaml @@ -36,7 +36,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | foreach (i from 0 to xlen/2-1) { diff --git a/arch/inst/Zbkb/zip.yaml b/arch/inst/Zbkb/zip.yaml index 485bb78bda..5206d44297 100644 --- a/arch/inst/Zbkb/zip.yaml +++ b/arch/inst/Zbkb/zip.yaml @@ -36,7 +36,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | foreach (i from 0 to xlen/2-1) { diff --git a/arch/inst/Zbkx/xperm4.yaml b/arch/inst/Zbkx/xperm4.yaml index e472e7b0da..d2a787e22b 100644 --- a/arch/inst/Zbkx/xperm4.yaml +++ b/arch/inst/Zbkx/xperm4.yaml @@ -40,7 +40,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | val xperm4_lookup : (bits(4), xlenbits) -> bits(4) diff --git a/arch/inst/Zbkx/xperm8.yaml b/arch/inst/Zbkx/xperm8.yaml index 3bf8fc174c..f05a1b39b2 100644 --- a/arch/inst/Zbkx/xperm8.yaml +++ b/arch/inst/Zbkx/xperm8.yaml @@ -40,7 +40,7 @@ operation(): | X[rd] = output; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | val xperm8_lookup : (bits(8), xlenbits) -> bits(8) diff --git a/arch/inst/Zcb/c.lbu.yaml b/arch/inst/Zcb/c.lbu.yaml index 0f94a548be..57099dc7d8 100644 --- a/arch/inst/Zcb/c.lbu.yaml +++ b/arch/inst/Zcb/c.lbu.yaml @@ -37,7 +37,7 @@ operation(): | X[creg2reg(rd)] = read_memory<8>(virtual_address, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.lh.yaml b/arch/inst/Zcb/c.lh.yaml index 1cb375b692..5b9f87e872 100644 --- a/arch/inst/Zcb/c.lh.yaml +++ b/arch/inst/Zcb/c.lh.yaml @@ -38,7 +38,7 @@ operation(): | X[creg2reg(rd)] = sext(read_memory<16>(virtual_address, $encoding), 16); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.lhu.yaml b/arch/inst/Zcb/c.lhu.yaml index 040bac6c82..175d182f11 100644 --- a/arch/inst/Zcb/c.lhu.yaml +++ b/arch/inst/Zcb/c.lhu.yaml @@ -38,7 +38,7 @@ operation(): | X[creg2reg(rd)] = read_memory<16>(virtual_address, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.mul.yaml b/arch/inst/Zcb/c.mul.yaml index 6e47f8cf75..4545bfad7b 100644 --- a/arch/inst/Zcb/c.mul.yaml +++ b/arch/inst/Zcb/c.mul.yaml @@ -37,7 +37,7 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)] * X[creg2reg(rs2)]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.not.yaml b/arch/inst/Zcb/c.not.yaml index 9c8862ba65..0e299c5a63 100644 --- a/arch/inst/Zcb/c.not.yaml +++ b/arch/inst/Zcb/c.not.yaml @@ -32,7 +32,7 @@ operation(): | X[creg2reg(rd)] = ~X[creg2reg(rd)]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.sext.b.yaml b/arch/inst/Zcb/c.sext.b.yaml index f0f484feea..ef21927b79 100644 --- a/arch/inst/Zcb/c.sext.b.yaml +++ b/arch/inst/Zcb/c.sext.b.yaml @@ -37,7 +37,7 @@ operation(): | X[creg2reg(rd)] = $signed(X[creg2reg(rd)][7:0]); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.sext.h.yaml b/arch/inst/Zcb/c.sext.h.yaml index e76c9e4f9e..a26e90a374 100644 --- a/arch/inst/Zcb/c.sext.h.yaml +++ b/arch/inst/Zcb/c.sext.h.yaml @@ -37,7 +37,7 @@ operation(): | X[creg2reg(rd)] = $signed(X[creg2reg(rd)][15:0]); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.zext.b.yaml b/arch/inst/Zcb/c.zext.b.yaml index 348a58a3dc..ff2383a962 100644 --- a/arch/inst/Zcb/c.zext.b.yaml +++ b/arch/inst/Zcb/c.zext.b.yaml @@ -37,7 +37,7 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)][7:0]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.zext.h.yaml b/arch/inst/Zcb/c.zext.h.yaml index 606547b9bc..e22c7e604a 100644 --- a/arch/inst/Zcb/c.zext.h.yaml +++ b/arch/inst/Zcb/c.zext.h.yaml @@ -37,7 +37,7 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)][15:0]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zcb/c.zext.w.yaml b/arch/inst/Zcb/c.zext.w.yaml index 216ed799b4..980cad9605 100644 --- a/arch/inst/Zcb/c.zext.w.yaml +++ b/arch/inst/Zcb/c.zext.w.yaml @@ -37,7 +37,7 @@ operation(): | X[creg2reg(rd)] = X[creg2reg(rd)][31:0]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zfh/fcvt.h.s.yaml b/arch/inst/Zfh/fcvt.h.s.yaml index 2282bb1b45..409cd8916e 100644 --- a/arch/inst/Zfh/fcvt.h.s.yaml +++ b/arch/inst/Zfh/fcvt.h.s.yaml @@ -66,7 +66,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zfh/fcvt.s.h.yaml b/arch/inst/Zfh/fcvt.s.h.yaml index 661f4fc759..7705f78f68 100644 --- a/arch/inst/Zfh/fcvt.s.h.yaml +++ b/arch/inst/Zfh/fcvt.s.h.yaml @@ -63,7 +63,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zfh/flh.yaml b/arch/inst/Zfh/flh.yaml index 2851bb22c3..ef06fcc25b 100644 --- a/arch/inst/Zfh/flh.yaml +++ b/arch/inst/Zfh/flh.yaml @@ -40,7 +40,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zfh/fmv.h.x.yaml b/arch/inst/Zfh/fmv.h.x.yaml index 8b61047cfb..cd36ba56d2 100644 --- a/arch/inst/Zfh/fmv.h.x.yaml +++ b/arch/inst/Zfh/fmv.h.x.yaml @@ -33,7 +33,7 @@ operation(): | mark_f_state_dirty(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zfh/fmv.x.h.yaml b/arch/inst/Zfh/fmv.x.h.yaml index 6212b2e1fb..57038f7c25 100644 --- a/arch/inst/Zfh/fmv.x.h.yaml +++ b/arch/inst/Zfh/fmv.x.h.yaml @@ -34,7 +34,7 @@ operation(): | X[rd] = sext(f[fs1][15:0], 16); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zfh/fsh.yaml b/arch/inst/Zfh/fsh.yaml index 2403878fea..404fc4b01a 100644 --- a/arch/inst/Zfh/fsh.yaml +++ b/arch/inst/Zfh/fsh.yaml @@ -41,7 +41,7 @@ operation(): | write_memory<16>(virtual_address, hp_value, $encoding); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zicond/czero.eqz.yaml b/arch/inst/Zicond/czero.eqz.yaml index 56ab00d39f..76aac8692f 100644 --- a/arch/inst/Zicond/czero.eqz.yaml +++ b/arch/inst/Zicond/czero.eqz.yaml @@ -30,7 +30,7 @@ operation(): | X[rd] = (X[rs2] == 0) ? 0 : X[rs1]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zicond/czero.nez.yaml b/arch/inst/Zicond/czero.nez.yaml index 6a23e16770..799934e036 100644 --- a/arch/inst/Zicond/czero.nez.yaml +++ b/arch/inst/Zicond/czero.nez.yaml @@ -30,7 +30,7 @@ operation(): | X[rd] = (X[rs2] != 0) ? 0 : X[rs1]; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zicsr/csrrs.yaml b/arch/inst/Zicsr/csrrs.yaml index b14d6c3987..21ba889a76 100644 --- a/arch/inst/Zicsr/csrrs.yaml +++ b/arch/inst/Zicsr/csrrs.yaml @@ -45,7 +45,7 @@ operation(): | X[rd] = initial_csr_value; # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zicsr/csrrw.yaml b/arch/inst/Zicsr/csrrw.yaml index 59fae84022..386ef7d51f 100644 --- a/arch/inst/Zicsr/csrrw.yaml +++ b/arch/inst/Zicsr/csrrw.yaml @@ -42,7 +42,7 @@ operation(): | CSR[csr].sw_write(initial_value); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zicsr/csrrwi.yaml b/arch/inst/Zicsr/csrrwi.yaml index 8d0570fc56..4e25154658 100644 --- a/arch/inst/Zicsr/csrrwi.yaml +++ b/arch/inst/Zicsr/csrrwi.yaml @@ -40,7 +40,7 @@ operation(): | CSR[csr].sw_write({{XLEN-5{1'b0}}, imm}); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { diff --git a/arch/inst/Zifencei/fence.i.yaml b/arch/inst/Zifencei/fence.i.yaml index 167b4f4a03..2ce3afe1d0 100644 --- a/arch/inst/Zifencei/fence.i.yaml +++ b/arch/inst/Zifencei/fence.i.yaml @@ -52,7 +52,7 @@ operation(): | ifence(); # SPDX-SnippetBegin -# SPDX-SnippetCopyrightText: FIXME: Sail copyright holders +# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model # SPDX-License-Identifier: BSD-2-Clause sail(): | { /* __barrier(Barrier_RISCV_i); */ RETIRE_SUCCESS } From f9ac10e98b3e5864cae992e179eb2334dc67a263 Mon Sep 17 00:00:00 2001 From: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Date: Mon, 31 Mar 2025 20:57:39 -0400 Subject: [PATCH 010/207] Display rv32/rv64 encodings without tabs in HTML view (#574) --- backends/cfg_html_doc/templates/inst.adoc.erb | 1 - 1 file changed, 1 deletion(-) diff --git a/backends/cfg_html_doc/templates/inst.adoc.erb b/backends/cfg_html_doc/templates/inst.adoc.erb index 7e0ac3f67b..bd319dd3e1 100644 --- a/backends/cfg_html_doc/templates/inst.adoc.erb +++ b/backends/cfg_html_doc/templates/inst.adoc.erb @@ -15,7 +15,6 @@ This instruction is defined by: [NOTE] This instruction has different encodings in RV32 and RV64. -[tabs] ==== RV32:: + From 779db26f044a8cd4c1f9d96ad5e1cf3ac76fd5dc Mon Sep 17 00:00:00 2001 From: Usman Akinyemi Date: Tue, 1 Apr 2025 23:33:20 +0530 Subject: [PATCH 011/207] arch/inst: fix pre-commit EOF newline complaints Mentored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Mentored-by: Paul A. Clarke Signed-off-by: Usman Akinyemi --- arch/inst/A/amoadd.d.yaml | 2 +- arch/inst/A/amoadd.w.yaml | 2 +- arch/inst/A/amoand.d.yaml | 2 +- arch/inst/A/amoand.w.yaml | 2 +- arch/inst/A/amomax.d.yaml | 2 +- arch/inst/A/amomax.w.yaml | 2 +- arch/inst/A/amomaxu.d.yaml | 2 +- arch/inst/A/amomaxu.w.yaml | 2 +- arch/inst/A/amomin.d.yaml | 2 +- arch/inst/A/amomin.w.yaml | 2 +- arch/inst/A/amominu.d.yaml | 2 +- arch/inst/A/amominu.w.yaml | 2 +- arch/inst/A/amoor.d.yaml | 2 +- arch/inst/A/amoor.w.yaml | 2 +- arch/inst/A/amoswap.d.yaml | 2 +- arch/inst/A/amoswap.w.yaml | 2 +- arch/inst/A/amoxor.d.yaml | 2 +- arch/inst/A/amoxor.w.yaml | 2 +- arch/inst/A/lr.d.yaml | 2 +- arch/inst/A/lr.w.yaml | 2 +- arch/inst/A/sc.d.yaml | 2 +- arch/inst/A/sc.w.yaml | 2 +- arch/inst/B/add.uw.yaml | 2 +- arch/inst/B/andn.yaml | 2 +- arch/inst/B/bclr.yaml | 2 +- arch/inst/B/bclri.yaml | 2 +- arch/inst/B/bext.yaml | 2 +- arch/inst/B/bexti.yaml | 2 +- arch/inst/B/binv.yaml | 2 +- arch/inst/B/binvi.yaml | 2 +- arch/inst/B/bset.yaml | 2 +- arch/inst/B/bseti.yaml | 2 +- arch/inst/B/clmul.yaml | 2 +- arch/inst/B/clmulh.yaml | 2 +- arch/inst/B/clmulr.yaml | 2 +- arch/inst/B/clz.yaml | 2 +- arch/inst/B/clzw.yaml | 2 +- arch/inst/B/cpop.yaml | 2 +- arch/inst/B/cpopw.yaml | 2 +- arch/inst/B/ctz.yaml | 2 +- arch/inst/B/ctzw.yaml | 2 +- arch/inst/B/max.yaml | 2 +- arch/inst/B/maxu.yaml | 2 +- arch/inst/B/min.yaml | 2 +- arch/inst/B/minu.yaml | 2 +- arch/inst/B/orc.b.yaml | 2 +- arch/inst/B/orn.yaml | 2 +- arch/inst/B/rev8.yaml | 2 +- arch/inst/B/rol.yaml | 2 +- arch/inst/B/rolw.yaml | 2 +- arch/inst/B/ror.yaml | 2 +- arch/inst/B/rori.yaml | 2 +- arch/inst/B/roriw.yaml | 2 +- arch/inst/B/rorw.yaml | 2 +- arch/inst/B/sext.b.yaml | 2 +- arch/inst/B/sext.h.yaml | 2 +- arch/inst/B/sh1add.uw.yaml | 2 +- arch/inst/B/sh1add.yaml | 2 +- arch/inst/B/sh2add.uw.yaml | 2 +- arch/inst/B/sh2add.yaml | 2 +- arch/inst/B/sh3add.uw.yaml | 2 +- arch/inst/B/sh3add.yaml | 2 +- arch/inst/B/slli.uw.yaml | 2 +- arch/inst/B/xnor.yaml | 2 +- arch/inst/B/zext.h.yaml | 2 +- arch/inst/C/c.add.yaml | 2 +- arch/inst/C/c.addw.yaml | 2 +- arch/inst/C/c.and.yaml | 2 +- arch/inst/C/c.andi.yaml | 2 +- arch/inst/C/c.beqz.yaml | 2 +- arch/inst/C/c.bnez.yaml | 2 +- arch/inst/C/c.ebreak.yaml | 2 +- arch/inst/C/c.ld.yaml | 2 +- arch/inst/C/c.lw.yaml | 2 +- arch/inst/C/c.mv.yaml | 2 +- arch/inst/C/c.or.yaml | 2 +- arch/inst/C/c.slli.yaml | 2 +- arch/inst/C/c.srai.yaml | 2 +- arch/inst/C/c.srli.yaml | 2 +- arch/inst/C/c.sub.yaml | 2 +- arch/inst/C/c.subw.yaml | 2 +- arch/inst/C/c.xor.yaml | 2 +- arch/inst/F/fadd.s.yaml | 2 +- arch/inst/F/fclass.s.yaml | 2 +- arch/inst/F/fcvt.l.s.yaml | 2 +- arch/inst/F/fcvt.lu.s.yaml | 2 +- arch/inst/F/fcvt.s.l.yaml | 2 +- arch/inst/F/fcvt.s.lu.yaml | 2 +- arch/inst/F/fcvt.s.w.yaml | 2 +- arch/inst/F/fcvt.s.wu.yaml | 2 +- arch/inst/F/fcvt.w.s.yaml | 2 +- arch/inst/F/fcvt.wu.s.yaml | 2 +- arch/inst/F/fdiv.s.yaml | 2 +- arch/inst/F/feq.s.yaml | 2 +- arch/inst/F/fle.s.yaml | 2 +- arch/inst/F/fleq.s.yaml | 2 +- arch/inst/F/fli.s.yaml | 2 +- arch/inst/F/flt.s.yaml | 2 +- arch/inst/F/fltq.s.yaml | 2 +- arch/inst/F/flw.yaml | 2 +- arch/inst/F/fmadd.s.yaml | 2 +- arch/inst/F/fmax.s.yaml | 2 +- arch/inst/F/fmaxm.s.yaml | 2 +- arch/inst/F/fmin.s.yaml | 2 +- arch/inst/F/fminm.s.yaml | 2 +- arch/inst/F/fmsub.s.yaml | 2 +- arch/inst/F/fmul.s.yaml | 2 +- arch/inst/F/fmv.w.x.yaml | 2 +- arch/inst/F/fmv.x.w.yaml | 2 +- arch/inst/F/fnmadd.s.yaml | 2 +- arch/inst/F/fnmsub.s.yaml | 2 +- arch/inst/F/fround.s.yaml | 2 +- arch/inst/F/froundnx.s.yaml | 2 +- arch/inst/F/fsgnj.s.yaml | 2 +- arch/inst/F/fsgnjn.s.yaml | 2 +- arch/inst/F/fsgnjx.s.yaml | 2 +- arch/inst/F/fsqrt.s.yaml | 2 +- arch/inst/F/fsub.s.yaml | 2 +- arch/inst/F/fsw.yaml | 2 +- arch/inst/I/add.yaml | 2 +- arch/inst/I/addi.yaml | 2 +- arch/inst/I/addiw.yaml | 2 +- arch/inst/I/addw.yaml | 2 +- arch/inst/I/and.yaml | 2 +- arch/inst/I/andi.yaml | 2 +- arch/inst/I/auipc.yaml | 2 +- arch/inst/I/beq.yaml | 2 +- arch/inst/I/bge.yaml | 2 +- arch/inst/I/bgeu.yaml | 2 +- arch/inst/I/blt.yaml | 2 +- arch/inst/I/bltu.yaml | 2 +- arch/inst/I/bne.yaml | 2 +- arch/inst/I/ebreak.yaml | 2 +- arch/inst/I/ecall.yaml | 2 +- arch/inst/I/fence.yaml | 2 +- arch/inst/I/jal.yaml | 2 +- arch/inst/I/jalr.yaml | 2 +- arch/inst/I/lb.yaml | 2 +- arch/inst/I/lbu.yaml | 2 +- arch/inst/I/ld.yaml | 2 +- arch/inst/I/lh.yaml | 2 +- arch/inst/I/lhu.yaml | 2 +- arch/inst/I/lui.yaml | 2 +- arch/inst/I/lw.yaml | 2 +- arch/inst/I/lwu.yaml | 2 +- arch/inst/I/mret.yaml | 2 +- arch/inst/I/or.yaml | 2 +- arch/inst/I/ori.yaml | 2 +- arch/inst/I/sb.yaml | 2 +- arch/inst/I/sd.yaml | 2 +- arch/inst/I/sh.yaml | 2 +- arch/inst/I/sll.yaml | 2 +- arch/inst/I/slli.yaml | 2 +- arch/inst/I/slliw.yaml | 2 +- arch/inst/I/sllw.yaml | 2 +- arch/inst/I/slt.yaml | 2 +- arch/inst/I/slti.yaml | 2 +- arch/inst/I/sltiu.yaml | 2 +- arch/inst/I/sltu.yaml | 2 +- arch/inst/I/sra.yaml | 2 +- arch/inst/I/srai.yaml | 2 +- arch/inst/I/sraiw.yaml | 2 +- arch/inst/I/sraw.yaml | 2 +- arch/inst/I/srl.yaml | 2 +- arch/inst/I/srli.yaml | 2 +- arch/inst/I/srliw.yaml | 2 +- arch/inst/I/srlw.yaml | 2 +- arch/inst/I/sub.yaml | 2 +- arch/inst/I/subw.yaml | 2 +- arch/inst/I/sw.yaml | 2 +- arch/inst/I/wfi.yaml | 2 +- arch/inst/I/xor.yaml | 2 +- arch/inst/I/xori.yaml | 2 +- arch/inst/M/div.yaml | 2 +- arch/inst/M/divu.yaml | 2 +- arch/inst/M/divuw.yaml | 2 +- arch/inst/M/divw.yaml | 2 +- arch/inst/M/mul.yaml | 2 +- arch/inst/M/mulh.yaml | 2 +- arch/inst/M/mulhsu.yaml | 2 +- arch/inst/M/mulhu.yaml | 2 +- arch/inst/M/mulw.yaml | 2 +- arch/inst/M/rem.yaml | 2 +- arch/inst/M/remu.yaml | 2 +- arch/inst/M/remuw.yaml | 2 +- arch/inst/M/remw.yaml | 2 +- arch/inst/S/sfence.vma.yaml | 2 +- arch/inst/S/sret.yaml | 2 +- arch/inst/V/vaadd.vv.yaml | 2 +- arch/inst/V/vaadd.vx.yaml | 2 +- arch/inst/V/vaaddu.vv.yaml | 2 +- arch/inst/V/vaaddu.vx.yaml | 2 +- arch/inst/V/vadc.vim.yaml | 2 +- arch/inst/V/vadc.vvm.yaml | 2 +- arch/inst/V/vadc.vxm.yaml | 2 +- arch/inst/V/vadd.vi.yaml | 2 +- arch/inst/V/vadd.vv.yaml | 2 +- arch/inst/V/vadd.vx.yaml | 2 +- arch/inst/V/vand.vi.yaml | 2 +- arch/inst/V/vand.vv.yaml | 2 +- arch/inst/V/vand.vx.yaml | 2 +- arch/inst/V/vasub.vv.yaml | 2 +- arch/inst/V/vasub.vx.yaml | 2 +- arch/inst/V/vasubu.vv.yaml | 2 +- arch/inst/V/vasubu.vx.yaml | 2 +- arch/inst/V/vcompress.vm.yaml | 2 +- arch/inst/V/vdiv.vv.yaml | 2 +- arch/inst/V/vdiv.vx.yaml | 2 +- arch/inst/V/vdivu.vv.yaml | 2 +- arch/inst/V/vdivu.vx.yaml | 2 +- arch/inst/V/vfadd.vf.yaml | 2 +- arch/inst/V/vfadd.vv.yaml | 2 +- arch/inst/V/vfclass.v.yaml | 2 +- arch/inst/V/vfcvt.f.x.v.yaml | 2 +- arch/inst/V/vfcvt.f.xu.v.yaml | 2 +- arch/inst/V/vfcvt.rtz.x.f.v.yaml | 2 +- arch/inst/V/vfcvt.rtz.xu.f.v.yaml | 2 +- arch/inst/V/vfcvt.x.f.v.yaml | 2 +- arch/inst/V/vfcvt.xu.f.v.yaml | 2 +- arch/inst/V/vfdiv.vf.yaml | 2 +- arch/inst/V/vfdiv.vv.yaml | 2 +- arch/inst/V/vfirst.m.yaml | 2 +- arch/inst/V/vfmacc.vf.yaml | 2 +- arch/inst/V/vfmacc.vv.yaml | 2 +- arch/inst/V/vfmadd.vf.yaml | 2 +- arch/inst/V/vfmadd.vv.yaml | 2 +- arch/inst/V/vfmax.vf.yaml | 2 +- arch/inst/V/vfmax.vv.yaml | 2 +- arch/inst/V/vfmerge.vfm.yaml | 2 +- arch/inst/V/vfmin.vf.yaml | 2 +- arch/inst/V/vfmin.vv.yaml | 2 +- arch/inst/V/vfmsac.vf.yaml | 2 +- arch/inst/V/vfmsac.vv.yaml | 2 +- arch/inst/V/vfmsub.vf.yaml | 2 +- arch/inst/V/vfmsub.vv.yaml | 2 +- arch/inst/V/vfmul.vf.yaml | 2 +- arch/inst/V/vfmul.vv.yaml | 2 +- arch/inst/V/vfmv.f.s.yaml | 2 +- arch/inst/V/vfmv.s.f.yaml | 2 +- arch/inst/V/vfmv.v.f.yaml | 2 +- arch/inst/V/vfncvt.f.f.w.yaml | 2 +- arch/inst/V/vfncvt.f.x.w.yaml | 2 +- arch/inst/V/vfncvt.f.xu.w.yaml | 2 +- arch/inst/V/vfncvt.rod.f.f.w.yaml | 2 +- arch/inst/V/vfncvt.rtz.x.f.w.yaml | 2 +- arch/inst/V/vfncvt.rtz.xu.f.w.yaml | 2 +- arch/inst/V/vfncvt.x.f.w.yaml | 2 +- arch/inst/V/vfncvt.xu.f.w.yaml | 2 +- arch/inst/V/vfnmacc.vf.yaml | 2 +- arch/inst/V/vfnmacc.vv.yaml | 2 +- arch/inst/V/vfnmadd.vf.yaml | 2 +- arch/inst/V/vfnmadd.vv.yaml | 2 +- arch/inst/V/vfnmsac.vf.yaml | 2 +- arch/inst/V/vfnmsac.vv.yaml | 2 +- arch/inst/V/vfnmsub.vf.yaml | 2 +- arch/inst/V/vfnmsub.vv.yaml | 2 +- arch/inst/V/vfrdiv.vf.yaml | 2 +- arch/inst/V/vfrec7.v.yaml | 2 +- arch/inst/V/vfredmax.vs.yaml | 2 +- arch/inst/V/vfredmin.vs.yaml | 2 +- arch/inst/V/vfredosum.vs.yaml | 2 +- arch/inst/V/vfredusum.vs.yaml | 2 +- arch/inst/V/vfrsqrt7.v.yaml | 2 +- arch/inst/V/vfrsub.vf.yaml | 2 +- arch/inst/V/vfsgnj.vf.yaml | 2 +- arch/inst/V/vfsgnj.vv.yaml | 2 +- arch/inst/V/vfsgnjn.vf.yaml | 2 +- arch/inst/V/vfsgnjn.vv.yaml | 2 +- arch/inst/V/vfsgnjx.vf.yaml | 2 +- arch/inst/V/vfsgnjx.vv.yaml | 2 +- arch/inst/V/vfslide1down.vf.yaml | 2 +- arch/inst/V/vfslide1up.vf.yaml | 2 +- arch/inst/V/vfsqrt.v.yaml | 2 +- arch/inst/V/vfsub.vf.yaml | 2 +- arch/inst/V/vfsub.vv.yaml | 2 +- arch/inst/V/vfwadd.vf.yaml | 2 +- arch/inst/V/vfwadd.vv.yaml | 2 +- arch/inst/V/vfwadd.wf.yaml | 2 +- arch/inst/V/vfwadd.wv.yaml | 2 +- arch/inst/V/vfwcvt.f.f.v.yaml | 2 +- arch/inst/V/vfwcvt.f.x.v.yaml | 2 +- arch/inst/V/vfwcvt.f.xu.v.yaml | 2 +- arch/inst/V/vfwcvt.rtz.x.f.v.yaml | 2 +- arch/inst/V/vfwcvt.rtz.xu.f.v.yaml | 2 +- arch/inst/V/vfwcvt.x.f.v.yaml | 2 +- arch/inst/V/vfwcvt.xu.f.v.yaml | 2 +- arch/inst/V/vfwmacc.vf.yaml | 2 +- arch/inst/V/vfwmacc.vv.yaml | 2 +- arch/inst/V/vfwmsac.vf.yaml | 2 +- arch/inst/V/vfwmsac.vv.yaml | 2 +- arch/inst/V/vfwmul.vf.yaml | 2 +- arch/inst/V/vfwmul.vv.yaml | 2 +- arch/inst/V/vfwnmacc.vf.yaml | 2 +- arch/inst/V/vfwnmacc.vv.yaml | 2 +- arch/inst/V/vfwnmsac.vf.yaml | 2 +- arch/inst/V/vfwnmsac.vv.yaml | 2 +- arch/inst/V/vfwredosum.vs.yaml | 2 +- arch/inst/V/vfwredusum.vs.yaml | 2 +- arch/inst/V/vfwsub.vf.yaml | 2 +- arch/inst/V/vfwsub.vv.yaml | 2 +- arch/inst/V/vfwsub.wf.yaml | 2 +- arch/inst/V/vfwsub.wv.yaml | 2 +- arch/inst/V/vid.v.yaml | 2 +- arch/inst/V/viota.m.yaml | 2 +- arch/inst/V/vle16.v.yaml | 2 +- arch/inst/V/vle16ff.v.yaml | 2 +- arch/inst/V/vle32.v.yaml | 2 +- arch/inst/V/vle32ff.v.yaml | 2 +- arch/inst/V/vle64.v.yaml | 2 +- arch/inst/V/vle64ff.v.yaml | 2 +- arch/inst/V/vle8.v.yaml | 2 +- arch/inst/V/vle8ff.v.yaml | 2 +- arch/inst/V/vlm.v.yaml | 2 +- arch/inst/V/vloxei16.v.yaml | 2 +- arch/inst/V/vloxei32.v.yaml | 2 +- arch/inst/V/vloxei64.v.yaml | 2 +- arch/inst/V/vloxei8.v.yaml | 2 +- arch/inst/V/vlse16.v.yaml | 2 +- arch/inst/V/vlse32.v.yaml | 2 +- arch/inst/V/vlse64.v.yaml | 2 +- arch/inst/V/vlse8.v.yaml | 2 +- arch/inst/V/vluxei16.v.yaml | 2 +- arch/inst/V/vluxei32.v.yaml | 2 +- arch/inst/V/vluxei64.v.yaml | 2 +- arch/inst/V/vluxei8.v.yaml | 2 +- arch/inst/V/vmacc.vv.yaml | 2 +- arch/inst/V/vmacc.vx.yaml | 2 +- arch/inst/V/vmadc.vi.yaml | 2 +- arch/inst/V/vmadc.vim.yaml | 2 +- arch/inst/V/vmadc.vv.yaml | 2 +- arch/inst/V/vmadc.vvm.yaml | 2 +- arch/inst/V/vmadc.vx.yaml | 2 +- arch/inst/V/vmadc.vxm.yaml | 2 +- arch/inst/V/vmadd.vv.yaml | 2 +- arch/inst/V/vmadd.vx.yaml | 2 +- arch/inst/V/vmand.mm.yaml | 2 +- arch/inst/V/vmax.vv.yaml | 2 +- arch/inst/V/vmax.vx.yaml | 2 +- arch/inst/V/vmaxu.vv.yaml | 2 +- arch/inst/V/vmaxu.vx.yaml | 2 +- arch/inst/V/vmerge.vim.yaml | 2 +- arch/inst/V/vmerge.vvm.yaml | 2 +- arch/inst/V/vmerge.vxm.yaml | 2 +- arch/inst/V/vmfeq.vf.yaml | 2 +- arch/inst/V/vmfeq.vv.yaml | 2 +- arch/inst/V/vmfge.vf.yaml | 2 +- arch/inst/V/vmfgt.vf.yaml | 2 +- arch/inst/V/vmfle.vf.yaml | 2 +- arch/inst/V/vmfle.vv.yaml | 2 +- arch/inst/V/vmflt.vf.yaml | 2 +- arch/inst/V/vmflt.vv.yaml | 2 +- arch/inst/V/vmfne.vf.yaml | 2 +- arch/inst/V/vmfne.vv.yaml | 2 +- arch/inst/V/vmin.vv.yaml | 2 +- arch/inst/V/vmin.vx.yaml | 2 +- arch/inst/V/vminu.vv.yaml | 2 +- arch/inst/V/vminu.vx.yaml | 2 +- arch/inst/V/vmnand.mm.yaml | 2 +- arch/inst/V/vmnor.mm.yaml | 2 +- arch/inst/V/vmor.mm.yaml | 2 +- arch/inst/V/vmsbc.vv.yaml | 2 +- arch/inst/V/vmsbc.vvm.yaml | 2 +- arch/inst/V/vmsbc.vx.yaml | 2 +- arch/inst/V/vmsbc.vxm.yaml | 2 +- arch/inst/V/vmsbf.m.yaml | 2 +- arch/inst/V/vmseq.vi.yaml | 2 +- arch/inst/V/vmseq.vv.yaml | 2 +- arch/inst/V/vmseq.vx.yaml | 2 +- arch/inst/V/vmsgt.vi.yaml | 2 +- arch/inst/V/vmsgt.vx.yaml | 2 +- arch/inst/V/vmsgtu.vi.yaml | 2 +- arch/inst/V/vmsgtu.vx.yaml | 2 +- arch/inst/V/vmsif.m.yaml | 2 +- arch/inst/V/vmsle.vi.yaml | 2 +- arch/inst/V/vmsle.vv.yaml | 2 +- arch/inst/V/vmsle.vx.yaml | 2 +- arch/inst/V/vmsleu.vi.yaml | 2 +- arch/inst/V/vmsleu.vv.yaml | 2 +- arch/inst/V/vmsleu.vx.yaml | 2 +- arch/inst/V/vmslt.vv.yaml | 2 +- arch/inst/V/vmslt.vx.yaml | 2 +- arch/inst/V/vmsltu.vv.yaml | 2 +- arch/inst/V/vmsltu.vx.yaml | 2 +- arch/inst/V/vmsne.vi.yaml | 2 +- arch/inst/V/vmsne.vv.yaml | 2 +- arch/inst/V/vmsne.vx.yaml | 2 +- arch/inst/V/vmsof.m.yaml | 2 +- arch/inst/V/vmul.vv.yaml | 2 +- arch/inst/V/vmul.vx.yaml | 2 +- arch/inst/V/vmulh.vv.yaml | 2 +- arch/inst/V/vmulh.vx.yaml | 2 +- arch/inst/V/vmulhsu.vv.yaml | 2 +- arch/inst/V/vmulhsu.vx.yaml | 2 +- arch/inst/V/vmulhu.vv.yaml | 2 +- arch/inst/V/vmulhu.vx.yaml | 2 +- arch/inst/V/vmv.s.x.yaml | 2 +- arch/inst/V/vmv.v.i.yaml | 2 +- arch/inst/V/vmv.v.v.yaml | 2 +- arch/inst/V/vmv.v.x.yaml | 2 +- arch/inst/V/vmv.x.s.yaml | 2 +- arch/inst/V/vmv1r.v.yaml | 2 +- arch/inst/V/vmv2r.v.yaml | 2 +- arch/inst/V/vmv4r.v.yaml | 2 +- arch/inst/V/vmv8r.v.yaml | 2 +- arch/inst/V/vmxnor.mm.yaml | 2 +- arch/inst/V/vmxor.mm.yaml | 2 +- arch/inst/V/vnclip.wi.yaml | 2 +- arch/inst/V/vnclip.wv.yaml | 2 +- arch/inst/V/vnclip.wx.yaml | 2 +- arch/inst/V/vnclipu.wi.yaml | 2 +- arch/inst/V/vnclipu.wv.yaml | 2 +- arch/inst/V/vnclipu.wx.yaml | 2 +- arch/inst/V/vnmsac.vv.yaml | 2 +- arch/inst/V/vnmsac.vx.yaml | 2 +- arch/inst/V/vnmsub.vv.yaml | 2 +- arch/inst/V/vnmsub.vx.yaml | 2 +- arch/inst/V/vnsra.wi.yaml | 2 +- arch/inst/V/vnsra.wv.yaml | 2 +- arch/inst/V/vnsra.wx.yaml | 2 +- arch/inst/V/vnsrl.wi.yaml | 2 +- arch/inst/V/vnsrl.wv.yaml | 2 +- arch/inst/V/vnsrl.wx.yaml | 2 +- arch/inst/V/vor.vi.yaml | 2 +- arch/inst/V/vor.vv.yaml | 2 +- arch/inst/V/vor.vx.yaml | 2 +- arch/inst/V/vredand.vs.yaml | 2 +- arch/inst/V/vredmax.vs.yaml | 2 +- arch/inst/V/vredmaxu.vs.yaml | 2 +- arch/inst/V/vredmin.vs.yaml | 2 +- arch/inst/V/vredminu.vs.yaml | 2 +- arch/inst/V/vredor.vs.yaml | 2 +- arch/inst/V/vredsum.vs.yaml | 2 +- arch/inst/V/vredxor.vs.yaml | 2 +- arch/inst/V/vrem.vv.yaml | 2 +- arch/inst/V/vrem.vx.yaml | 2 +- arch/inst/V/vremu.vv.yaml | 2 +- arch/inst/V/vremu.vx.yaml | 2 +- arch/inst/V/vrgather.vi.yaml | 2 +- arch/inst/V/vrgather.vv.yaml | 2 +- arch/inst/V/vrgather.vx.yaml | 2 +- arch/inst/V/vrgatherei16.vv.yaml | 2 +- arch/inst/V/vrsub.vi.yaml | 2 +- arch/inst/V/vrsub.vx.yaml | 2 +- arch/inst/V/vsadd.vi.yaml | 2 +- arch/inst/V/vsadd.vv.yaml | 2 +- arch/inst/V/vsadd.vx.yaml | 2 +- arch/inst/V/vsaddu.vi.yaml | 2 +- arch/inst/V/vsaddu.vv.yaml | 2 +- arch/inst/V/vsaddu.vx.yaml | 2 +- arch/inst/V/vsbc.vvm.yaml | 2 +- arch/inst/V/vsbc.vxm.yaml | 2 +- arch/inst/V/vse16.v.yaml | 2 +- arch/inst/V/vse32.v.yaml | 2 +- arch/inst/V/vse64.v.yaml | 2 +- arch/inst/V/vse8.v.yaml | 2 +- arch/inst/V/vsetivli.yaml | 2 +- arch/inst/V/vsetvli.yaml | 2 +- arch/inst/V/vsext.vf2.yaml | 2 +- arch/inst/V/vsext.vf4.yaml | 2 +- arch/inst/V/vsext.vf8.yaml | 2 +- arch/inst/V/vslide1down.vx.yaml | 2 +- arch/inst/V/vslide1up.vx.yaml | 2 +- arch/inst/V/vslidedown.vi.yaml | 2 +- arch/inst/V/vslidedown.vx.yaml | 2 +- arch/inst/V/vslideup.vi.yaml | 2 +- arch/inst/V/vslideup.vx.yaml | 2 +- arch/inst/V/vsll.vi.yaml | 2 +- arch/inst/V/vsll.vv.yaml | 2 +- arch/inst/V/vsll.vx.yaml | 2 +- arch/inst/V/vsm.v.yaml | 2 +- arch/inst/V/vsmul.vv.yaml | 2 +- arch/inst/V/vsmul.vx.yaml | 2 +- arch/inst/V/vsoxei16.v.yaml | 2 +- arch/inst/V/vsoxei32.v.yaml | 2 +- arch/inst/V/vsoxei64.v.yaml | 2 +- arch/inst/V/vsoxei8.v.yaml | 2 +- arch/inst/V/vsra.vi.yaml | 2 +- arch/inst/V/vsra.vv.yaml | 2 +- arch/inst/V/vsra.vx.yaml | 2 +- arch/inst/V/vsrl.vi.yaml | 2 +- arch/inst/V/vsrl.vv.yaml | 2 +- arch/inst/V/vsrl.vx.yaml | 2 +- arch/inst/V/vsse16.v.yaml | 2 +- arch/inst/V/vsse32.v.yaml | 2 +- arch/inst/V/vsse64.v.yaml | 2 +- arch/inst/V/vsse8.v.yaml | 2 +- arch/inst/V/vssra.vi.yaml | 2 +- arch/inst/V/vssra.vv.yaml | 2 +- arch/inst/V/vssra.vx.yaml | 2 +- arch/inst/V/vssrl.vi.yaml | 2 +- arch/inst/V/vssrl.vv.yaml | 2 +- arch/inst/V/vssrl.vx.yaml | 2 +- arch/inst/V/vssub.vv.yaml | 2 +- arch/inst/V/vssub.vx.yaml | 2 +- arch/inst/V/vssubu.vv.yaml | 2 +- arch/inst/V/vssubu.vx.yaml | 2 +- arch/inst/V/vsub.vv.yaml | 2 +- arch/inst/V/vsub.vx.yaml | 2 +- arch/inst/V/vsuxei16.v.yaml | 2 +- arch/inst/V/vsuxei32.v.yaml | 2 +- arch/inst/V/vsuxei64.v.yaml | 2 +- arch/inst/V/vsuxei8.v.yaml | 2 +- arch/inst/V/vwadd.vv.yaml | 2 +- arch/inst/V/vwadd.vx.yaml | 2 +- arch/inst/V/vwadd.wv.yaml | 2 +- arch/inst/V/vwadd.wx.yaml | 2 +- arch/inst/V/vwaddu.vv.yaml | 2 +- arch/inst/V/vwaddu.vx.yaml | 2 +- arch/inst/V/vwaddu.wv.yaml | 2 +- arch/inst/V/vwaddu.wx.yaml | 2 +- arch/inst/V/vwmacc.vv.yaml | 2 +- arch/inst/V/vwmacc.vx.yaml | 2 +- arch/inst/V/vwmaccsu.vv.yaml | 2 +- arch/inst/V/vwmaccsu.vx.yaml | 2 +- arch/inst/V/vwmaccu.vv.yaml | 2 +- arch/inst/V/vwmaccu.vx.yaml | 2 +- arch/inst/V/vwmaccus.vx.yaml | 2 +- arch/inst/V/vwmul.vv.yaml | 2 +- arch/inst/V/vwmul.vx.yaml | 2 +- arch/inst/V/vwmulsu.vv.yaml | 2 +- arch/inst/V/vwmulsu.vx.yaml | 2 +- arch/inst/V/vwmulu.vv.yaml | 2 +- arch/inst/V/vwmulu.vx.yaml | 2 +- arch/inst/V/vwredsum.vs.yaml | 2 +- arch/inst/V/vwredsumu.vs.yaml | 2 +- arch/inst/V/vwsub.vv.yaml | 2 +- arch/inst/V/vwsub.vx.yaml | 2 +- arch/inst/V/vwsub.wv.yaml | 2 +- arch/inst/V/vwsub.wx.yaml | 2 +- arch/inst/V/vwsubu.vv.yaml | 2 +- arch/inst/V/vwsubu.vx.yaml | 2 +- arch/inst/V/vwsubu.wv.yaml | 2 +- arch/inst/V/vwsubu.wx.yaml | 2 +- arch/inst/V/vxor.vi.yaml | 2 +- arch/inst/V/vxor.vv.yaml | 2 +- arch/inst/V/vxor.vx.yaml | 2 +- arch/inst/V/vzext.vf2.yaml | 2 +- arch/inst/V/vzext.vf4.yaml | 2 +- arch/inst/V/vzext.vf8.yaml | 2 +- arch/inst/Zabha/amoadd.b.yaml | 2 +- arch/inst/Zabha/amoadd.h.yaml | 2 +- arch/inst/Zabha/amoand.b.yaml | 2 +- arch/inst/Zabha/amoand.h.yaml | 2 +- arch/inst/Zabha/amomax.b.yaml | 2 +- arch/inst/Zabha/amomax.h.yaml | 2 +- arch/inst/Zabha/amomaxu.b.yaml | 2 +- arch/inst/Zabha/amomaxu.h.yaml | 2 +- arch/inst/Zabha/amomin.b.yaml | 2 +- arch/inst/Zabha/amomin.h.yaml | 2 +- arch/inst/Zabha/amominu.b.yaml | 2 +- arch/inst/Zabha/amominu.h.yaml | 2 +- arch/inst/Zabha/amoor.b.yaml | 2 +- arch/inst/Zabha/amoor.h.yaml | 2 +- arch/inst/Zabha/amoswap.b.yaml | 2 +- arch/inst/Zabha/amoswap.h.yaml | 2 +- arch/inst/Zabha/amoxor.b.yaml | 2 +- arch/inst/Zabha/amoxor.h.yaml | 2 +- arch/inst/Zalasr/lb.aq.yaml | 2 +- arch/inst/Zalasr/ld.aq.yaml | 2 +- arch/inst/Zalasr/lh.aq.yaml | 2 +- arch/inst/Zalasr/lw.aq.yaml | 2 +- arch/inst/Zalasr/sb.rl.yaml | 2 +- arch/inst/Zalasr/sd.rl.yaml | 2 +- arch/inst/Zalasr/sh.rl.yaml | 2 +- arch/inst/Zalasr/sw.rl.yaml | 2 +- arch/inst/Zbkb/brev8.yaml | 2 +- arch/inst/Zbkb/unzip.yaml | 2 +- arch/inst/Zbkb/zip.yaml | 2 +- arch/inst/Zbkx/xperm4.yaml | 2 +- arch/inst/Zbkx/xperm8.yaml | 2 +- arch/inst/Zcb/c.lbu.yaml | 2 +- arch/inst/Zcb/c.lh.yaml | 2 +- arch/inst/Zcb/c.lhu.yaml | 2 +- arch/inst/Zcb/c.mul.yaml | 2 +- arch/inst/Zcb/c.not.yaml | 2 +- arch/inst/Zcb/c.sext.b.yaml | 2 +- arch/inst/Zcb/c.sext.h.yaml | 2 +- arch/inst/Zcb/c.zext.b.yaml | 2 +- arch/inst/Zcb/c.zext.h.yaml | 2 +- arch/inst/Zcb/c.zext.w.yaml | 2 +- arch/inst/Zfh/fcvt.h.s.yaml | 2 +- arch/inst/Zfh/fcvt.s.h.yaml | 2 +- arch/inst/Zfh/flh.yaml | 2 +- arch/inst/Zfh/fmv.h.x.yaml | 2 +- arch/inst/Zfh/fmv.x.h.yaml | 2 +- arch/inst/Zfh/fsh.yaml | 2 +- arch/inst/Zicond/czero.eqz.yaml | 2 +- arch/inst/Zicond/czero.nez.yaml | 2 +- arch/inst/Zicsr/csrrs.yaml | 2 +- arch/inst/Zicsr/csrrw.yaml | 2 +- arch/inst/Zicsr/csrrwi.yaml | 2 +- arch/inst/Zifencei/fence.i.yaml | 2 +- 592 files changed, 592 insertions(+), 592 deletions(-) diff --git a/arch/inst/A/amoadd.d.yaml b/arch/inst/A/amoadd.d.yaml index c5cc213a45..9f80e32b30 100644 --- a/arch/inst/A/amoadd.d.yaml +++ b/arch/inst/A/amoadd.d.yaml @@ -138,4 +138,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoadd.w.yaml b/arch/inst/A/amoadd.w.yaml index 117b0815e9..c78119aaef 100644 --- a/arch/inst/A/amoadd.w.yaml +++ b/arch/inst/A/amoadd.w.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoand.d.yaml b/arch/inst/A/amoand.d.yaml index d6481cf2f2..a620c98443 100644 --- a/arch/inst/A/amoand.d.yaml +++ b/arch/inst/A/amoand.d.yaml @@ -138,4 +138,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoand.w.yaml b/arch/inst/A/amoand.w.yaml index 0cc1ba973d..9fcfb1c408 100644 --- a/arch/inst/A/amoand.w.yaml +++ b/arch/inst/A/amoand.w.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amomax.d.yaml b/arch/inst/A/amomax.d.yaml index bd637bf63b..1810b7709d 100644 --- a/arch/inst/A/amomax.d.yaml +++ b/arch/inst/A/amomax.d.yaml @@ -138,4 +138,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amomax.w.yaml b/arch/inst/A/amomax.w.yaml index 6b245fc799..e1816abc6d 100644 --- a/arch/inst/A/amomax.w.yaml +++ b/arch/inst/A/amomax.w.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amomaxu.d.yaml b/arch/inst/A/amomaxu.d.yaml index ae20087b12..405b32c005 100644 --- a/arch/inst/A/amomaxu.d.yaml +++ b/arch/inst/A/amomaxu.d.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amomaxu.w.yaml b/arch/inst/A/amomaxu.w.yaml index 5633a8deed..525c3ace6f 100644 --- a/arch/inst/A/amomaxu.w.yaml +++ b/arch/inst/A/amomaxu.w.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amomin.d.yaml b/arch/inst/A/amomin.d.yaml index d622de64ae..ab944ba93f 100644 --- a/arch/inst/A/amomin.d.yaml +++ b/arch/inst/A/amomin.d.yaml @@ -138,4 +138,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amomin.w.yaml b/arch/inst/A/amomin.w.yaml index 58ec13ac32..0265ca2701 100644 --- a/arch/inst/A/amomin.w.yaml +++ b/arch/inst/A/amomin.w.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amominu.d.yaml b/arch/inst/A/amominu.d.yaml index 90b79d7d83..126d7e7b3a 100644 --- a/arch/inst/A/amominu.d.yaml +++ b/arch/inst/A/amominu.d.yaml @@ -138,4 +138,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amominu.w.yaml b/arch/inst/A/amominu.w.yaml index 11d1c64c15..07da0f3b41 100644 --- a/arch/inst/A/amominu.w.yaml +++ b/arch/inst/A/amominu.w.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoor.d.yaml b/arch/inst/A/amoor.d.yaml index d4bcdf4262..ae08f92550 100644 --- a/arch/inst/A/amoor.d.yaml +++ b/arch/inst/A/amoor.d.yaml @@ -138,4 +138,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoor.w.yaml b/arch/inst/A/amoor.w.yaml index 98a093680b..61e168d7fe 100644 --- a/arch/inst/A/amoor.w.yaml +++ b/arch/inst/A/amoor.w.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoswap.d.yaml b/arch/inst/A/amoswap.d.yaml index 0323a3593f..2870a1def0 100644 --- a/arch/inst/A/amoswap.d.yaml +++ b/arch/inst/A/amoswap.d.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoswap.w.yaml b/arch/inst/A/amoswap.w.yaml index ea11004c0c..aa65fe46ad 100644 --- a/arch/inst/A/amoswap.w.yaml +++ b/arch/inst/A/amoswap.w.yaml @@ -136,4 +136,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoxor.d.yaml b/arch/inst/A/amoxor.d.yaml index dfa80cb933..33c913edc3 100644 --- a/arch/inst/A/amoxor.d.yaml +++ b/arch/inst/A/amoxor.d.yaml @@ -138,4 +138,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/amoxor.w.yaml b/arch/inst/A/amoxor.w.yaml index 3d954cd875..a1cf2fe6d6 100644 --- a/arch/inst/A/amoxor.w.yaml +++ b/arch/inst/A/amoxor.w.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/lr.d.yaml b/arch/inst/A/lr.d.yaml index daf0601236..cbfa86455f 100644 --- a/arch/inst/A/lr.d.yaml +++ b/arch/inst/A/lr.d.yaml @@ -137,4 +137,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/lr.w.yaml b/arch/inst/A/lr.w.yaml index 8850f725f8..3619988b8c 100644 --- a/arch/inst/A/lr.w.yaml +++ b/arch/inst/A/lr.w.yaml @@ -146,4 +146,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/sc.d.yaml b/arch/inst/A/sc.d.yaml index 42a6882920..1816673511 100644 --- a/arch/inst/A/sc.d.yaml +++ b/arch/inst/A/sc.d.yaml @@ -231,4 +231,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/A/sc.w.yaml b/arch/inst/A/sc.w.yaml index dd2f01b071..3fe348c4ab 100644 --- a/arch/inst/A/sc.w.yaml +++ b/arch/inst/A/sc.w.yaml @@ -236,4 +236,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/add.uw.yaml b/arch/inst/B/add.uw.yaml index 9bf9f6fe86..280009ffc0 100644 --- a/arch/inst/B/add.uw.yaml +++ b/arch/inst/B/add.uw.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/andn.yaml b/arch/inst/B/andn.yaml index 297b6e064f..1d2828ddbe 100644 --- a/arch/inst/B/andn.yaml +++ b/arch/inst/B/andn.yaml @@ -58,4 +58,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/bclr.yaml b/arch/inst/B/bclr.yaml index 3177c323a2..b8565583c9 100644 --- a/arch/inst/B/bclr.yaml +++ b/arch/inst/B/bclr.yaml @@ -52,4 +52,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/bclri.yaml b/arch/inst/B/bclri.yaml index 9147465b78..ec66a8cebc 100644 --- a/arch/inst/B/bclri.yaml +++ b/arch/inst/B/bclri.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/bext.yaml b/arch/inst/B/bext.yaml index 70b0f66aed..7b69ce0f73 100644 --- a/arch/inst/B/bext.yaml +++ b/arch/inst/B/bext.yaml @@ -52,4 +52,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/bexti.yaml b/arch/inst/B/bexti.yaml index 032845b767..1f1a898bab 100644 --- a/arch/inst/B/bexti.yaml +++ b/arch/inst/B/bexti.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/binv.yaml b/arch/inst/B/binv.yaml index 4c2e4de0fb..d7022ebd04 100644 --- a/arch/inst/B/binv.yaml +++ b/arch/inst/B/binv.yaml @@ -52,4 +52,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/binvi.yaml b/arch/inst/B/binvi.yaml index c2c6f07660..58c3def7ff 100644 --- a/arch/inst/B/binvi.yaml +++ b/arch/inst/B/binvi.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/bset.yaml b/arch/inst/B/bset.yaml index 409645d1db..0e840376d7 100644 --- a/arch/inst/B/bset.yaml +++ b/arch/inst/B/bset.yaml @@ -52,4 +52,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/bseti.yaml b/arch/inst/B/bseti.yaml index 8a3aef7791..7359dcd673 100644 --- a/arch/inst/B/bseti.yaml +++ b/arch/inst/B/bseti.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/clmul.yaml b/arch/inst/B/clmul.yaml index 22b0f740f9..81d46380f7 100644 --- a/arch/inst/B/clmul.yaml +++ b/arch/inst/B/clmul.yaml @@ -55,4 +55,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/clmulh.yaml b/arch/inst/B/clmulh.yaml index a08c6cc213..7e98366e5f 100644 --- a/arch/inst/B/clmulh.yaml +++ b/arch/inst/B/clmulh.yaml @@ -55,4 +55,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/clmulr.yaml b/arch/inst/B/clmulr.yaml index 640b4b5e07..c02ebaeb4a 100644 --- a/arch/inst/B/clmulr.yaml +++ b/arch/inst/B/clmulr.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/clz.yaml b/arch/inst/B/clz.yaml index 10fa785cb4..1918c58ef2 100644 --- a/arch/inst/B/clz.yaml +++ b/arch/inst/B/clz.yaml @@ -47,4 +47,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/clzw.yaml b/arch/inst/B/clzw.yaml index d05e5a4760..4e981b498b 100644 --- a/arch/inst/B/clzw.yaml +++ b/arch/inst/B/clzw.yaml @@ -47,4 +47,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/cpop.yaml b/arch/inst/B/cpop.yaml index 25719c66bc..ce2cddcfc2 100644 --- a/arch/inst/B/cpop.yaml +++ b/arch/inst/B/cpop.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/cpopw.yaml b/arch/inst/B/cpopw.yaml index 2dcf6d19f8..8c4a4a876f 100644 --- a/arch/inst/B/cpopw.yaml +++ b/arch/inst/B/cpopw.yaml @@ -63,4 +63,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/ctz.yaml b/arch/inst/B/ctz.yaml index e30df8632d..94acf5e6ae 100644 --- a/arch/inst/B/ctz.yaml +++ b/arch/inst/B/ctz.yaml @@ -52,4 +52,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/ctzw.yaml b/arch/inst/B/ctzw.yaml index 91317b67f7..7671c70399 100644 --- a/arch/inst/B/ctzw.yaml +++ b/arch/inst/B/ctzw.yaml @@ -49,4 +49,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/max.yaml b/arch/inst/B/max.yaml index c82246c7a3..cc64f2ea63 100644 --- a/arch/inst/B/max.yaml +++ b/arch/inst/B/max.yaml @@ -64,4 +64,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/maxu.yaml b/arch/inst/B/maxu.yaml index 9dda171ae4..c7659e253e 100644 --- a/arch/inst/B/maxu.yaml +++ b/arch/inst/B/maxu.yaml @@ -56,4 +56,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/min.yaml b/arch/inst/B/min.yaml index 56e9118ab9..b9c0dc07c2 100644 --- a/arch/inst/B/min.yaml +++ b/arch/inst/B/min.yaml @@ -56,4 +56,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/minu.yaml b/arch/inst/B/minu.yaml index a1994cd768..8803843877 100644 --- a/arch/inst/B/minu.yaml +++ b/arch/inst/B/minu.yaml @@ -56,4 +56,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/orc.b.yaml b/arch/inst/B/orc.b.yaml index 0a75af6ab1..f1f93539ee 100644 --- a/arch/inst/B/orc.b.yaml +++ b/arch/inst/B/orc.b.yaml @@ -52,4 +52,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/orn.yaml b/arch/inst/B/orn.yaml index 4e428befc7..f320161e2f 100644 --- a/arch/inst/B/orn.yaml +++ b/arch/inst/B/orn.yaml @@ -57,4 +57,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/rev8.yaml b/arch/inst/B/rev8.yaml index 5793fc6525..2cf78d88a6 100644 --- a/arch/inst/B/rev8.yaml +++ b/arch/inst/B/rev8.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/rol.yaml b/arch/inst/B/rol.yaml index f47688045f..9c4ebd2fb9 100644 --- a/arch/inst/B/rol.yaml +++ b/arch/inst/B/rol.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/rolw.yaml b/arch/inst/B/rolw.yaml index df8363fb72..3e97c78b18 100644 --- a/arch/inst/B/rolw.yaml +++ b/arch/inst/B/rolw.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/ror.yaml b/arch/inst/B/ror.yaml index 53d3f0748b..d11401788c 100644 --- a/arch/inst/B/ror.yaml +++ b/arch/inst/B/ror.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/rori.yaml b/arch/inst/B/rori.yaml index b4322bbf0e..93b1fc00fd 100644 --- a/arch/inst/B/rori.yaml +++ b/arch/inst/B/rori.yaml @@ -57,4 +57,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/roriw.yaml b/arch/inst/B/roriw.yaml index c2b22f3478..345036599c 100644 --- a/arch/inst/B/roriw.yaml +++ b/arch/inst/B/roriw.yaml @@ -48,4 +48,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/rorw.yaml b/arch/inst/B/rorw.yaml index 6fdd07f1a6..90d60811d0 100644 --- a/arch/inst/B/rorw.yaml +++ b/arch/inst/B/rorw.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/sext.b.yaml b/arch/inst/B/sext.b.yaml index fc34ada145..7b75c57a25 100644 --- a/arch/inst/B/sext.b.yaml +++ b/arch/inst/B/sext.b.yaml @@ -48,4 +48,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/sext.h.yaml b/arch/inst/B/sext.h.yaml index 528220b788..fb35680f9e 100644 --- a/arch/inst/B/sext.h.yaml +++ b/arch/inst/B/sext.h.yaml @@ -48,4 +48,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/sh1add.uw.yaml b/arch/inst/B/sh1add.uw.yaml index effe842e80..9904ec0d84 100644 --- a/arch/inst/B/sh1add.uw.yaml +++ b/arch/inst/B/sh1add.uw.yaml @@ -51,4 +51,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/sh1add.yaml b/arch/inst/B/sh1add.yaml index 78d9602757..4e7c7c0918 100644 --- a/arch/inst/B/sh1add.yaml +++ b/arch/inst/B/sh1add.yaml @@ -47,4 +47,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/sh2add.uw.yaml b/arch/inst/B/sh2add.uw.yaml index d69ce4b17c..f50b38d660 100644 --- a/arch/inst/B/sh2add.uw.yaml +++ b/arch/inst/B/sh2add.uw.yaml @@ -51,4 +51,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/sh2add.yaml b/arch/inst/B/sh2add.yaml index fb99b7c845..bd27c41858 100644 --- a/arch/inst/B/sh2add.yaml +++ b/arch/inst/B/sh2add.yaml @@ -47,4 +47,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/sh3add.uw.yaml b/arch/inst/B/sh3add.uw.yaml index 74d093109b..6299b8c202 100644 --- a/arch/inst/B/sh3add.uw.yaml +++ b/arch/inst/B/sh3add.uw.yaml @@ -51,4 +51,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/sh3add.yaml b/arch/inst/B/sh3add.yaml index 37336d9afb..c4a67e1aa6 100644 --- a/arch/inst/B/sh3add.yaml +++ b/arch/inst/B/sh3add.yaml @@ -47,4 +47,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/slli.uw.yaml b/arch/inst/B/slli.uw.yaml index 7b4f9d385e..330294c336 100644 --- a/arch/inst/B/slli.uw.yaml +++ b/arch/inst/B/slli.uw.yaml @@ -46,4 +46,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/xnor.yaml b/arch/inst/B/xnor.yaml index ad4f8a16c5..c826537417 100644 --- a/arch/inst/B/xnor.yaml +++ b/arch/inst/B/xnor.yaml @@ -57,4 +57,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/B/zext.h.yaml b/arch/inst/B/zext.h.yaml index 948ba016ff..083639854a 100644 --- a/arch/inst/B/zext.h.yaml +++ b/arch/inst/B/zext.h.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.add.yaml b/arch/inst/C/c.add.yaml index 42105c4b5a..95390c7471 100644 --- a/arch/inst/C/c.add.yaml +++ b/arch/inst/C/c.add.yaml @@ -42,4 +42,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.addw.yaml b/arch/inst/C/c.addw.yaml index 4ed39d483b..56b7f9febd 100644 --- a/arch/inst/C/c.addw.yaml +++ b/arch/inst/C/c.addw.yaml @@ -49,4 +49,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.and.yaml b/arch/inst/C/c.and.yaml index 50e37d78b8..51346904c3 100644 --- a/arch/inst/C/c.and.yaml +++ b/arch/inst/C/c.and.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.andi.yaml b/arch/inst/C/c.andi.yaml index 15369fb360..9368514f1f 100644 --- a/arch/inst/C/c.andi.yaml +++ b/arch/inst/C/c.andi.yaml @@ -48,4 +48,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.beqz.yaml b/arch/inst/C/c.beqz.yaml index 445308c0ac..6fe2107155 100644 --- a/arch/inst/C/c.beqz.yaml +++ b/arch/inst/C/c.beqz.yaml @@ -69,4 +69,4 @@ sail(): | } else RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.bnez.yaml b/arch/inst/C/c.bnez.yaml index b15367e052..1a7b3ee171 100644 --- a/arch/inst/C/c.bnez.yaml +++ b/arch/inst/C/c.bnez.yaml @@ -69,4 +69,4 @@ sail(): | } else RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.ebreak.yaml b/arch/inst/C/c.ebreak.yaml index d710c5f325..81794d400f 100644 --- a/arch/inst/C/c.ebreak.yaml +++ b/arch/inst/C/c.ebreak.yaml @@ -48,4 +48,4 @@ sail(): | RETIRE_FAIL } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.ld.yaml b/arch/inst/C/c.ld.yaml index d5905dadb7..911001a23d 100644 --- a/arch/inst/C/c.ld.yaml +++ b/arch/inst/C/c.ld.yaml @@ -70,4 +70,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.lw.yaml b/arch/inst/C/c.lw.yaml index 56ec82d38f..1a1d7a0870 100644 --- a/arch/inst/C/c.lw.yaml +++ b/arch/inst/C/c.lw.yaml @@ -69,4 +69,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.mv.yaml b/arch/inst/C/c.mv.yaml index 3b41e3f1ad..ecd2c09c95 100644 --- a/arch/inst/C/c.mv.yaml +++ b/arch/inst/C/c.mv.yaml @@ -43,4 +43,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.or.yaml b/arch/inst/C/c.or.yaml index 784f0e046a..4d651007e8 100644 --- a/arch/inst/C/c.or.yaml +++ b/arch/inst/C/c.or.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.slli.yaml b/arch/inst/C/c.slli.yaml index 9b234f1827..91250b2161 100644 --- a/arch/inst/C/c.slli.yaml +++ b/arch/inst/C/c.slli.yaml @@ -60,4 +60,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.srai.yaml b/arch/inst/C/c.srai.yaml index 48252e85d6..5b0ae995f8 100644 --- a/arch/inst/C/c.srai.yaml +++ b/arch/inst/C/c.srai.yaml @@ -61,4 +61,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.srli.yaml b/arch/inst/C/c.srli.yaml index ad019a57c6..9b2c96b17b 100644 --- a/arch/inst/C/c.srli.yaml +++ b/arch/inst/C/c.srli.yaml @@ -61,4 +61,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.sub.yaml b/arch/inst/C/c.sub.yaml index 7266e9d406..f9b911f9f8 100644 --- a/arch/inst/C/c.sub.yaml +++ b/arch/inst/C/c.sub.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.subw.yaml b/arch/inst/C/c.subw.yaml index 047975e111..846202b6cd 100644 --- a/arch/inst/C/c.subw.yaml +++ b/arch/inst/C/c.subw.yaml @@ -49,4 +49,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/C/c.xor.yaml b/arch/inst/C/c.xor.yaml index d81396f41f..36e2f85971 100644 --- a/arch/inst/C/c.xor.yaml +++ b/arch/inst/C/c.xor.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fadd.s.yaml b/arch/inst/F/fadd.s.yaml index 248361938b..842c4eaf0c 100644 --- a/arch/inst/F/fadd.s.yaml +++ b/arch/inst/F/fadd.s.yaml @@ -55,4 +55,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fclass.s.yaml b/arch/inst/F/fclass.s.yaml index a731554d5b..ff8c2994fe 100644 --- a/arch/inst/F/fclass.s.yaml +++ b/arch/inst/F/fclass.s.yaml @@ -85,4 +85,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fcvt.l.s.yaml b/arch/inst/F/fcvt.l.s.yaml index e29dfb38d1..4c626333cb 100644 --- a/arch/inst/F/fcvt.l.s.yaml +++ b/arch/inst/F/fcvt.l.s.yaml @@ -46,4 +46,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fcvt.lu.s.yaml b/arch/inst/F/fcvt.lu.s.yaml index 644572e16e..7ba8808dde 100644 --- a/arch/inst/F/fcvt.lu.s.yaml +++ b/arch/inst/F/fcvt.lu.s.yaml @@ -46,4 +46,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fcvt.s.l.yaml b/arch/inst/F/fcvt.s.l.yaml index e949c18b5a..dc29171f32 100644 --- a/arch/inst/F/fcvt.s.l.yaml +++ b/arch/inst/F/fcvt.s.l.yaml @@ -46,4 +46,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fcvt.s.lu.yaml b/arch/inst/F/fcvt.s.lu.yaml index 0e665e9ec9..d4c53f9463 100644 --- a/arch/inst/F/fcvt.s.lu.yaml +++ b/arch/inst/F/fcvt.s.lu.yaml @@ -46,4 +46,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fcvt.s.w.yaml b/arch/inst/F/fcvt.s.w.yaml index 2482ad3995..d6f8086ac5 100644 --- a/arch/inst/F/fcvt.s.w.yaml +++ b/arch/inst/F/fcvt.s.w.yaml @@ -58,4 +58,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fcvt.s.wu.yaml b/arch/inst/F/fcvt.s.wu.yaml index d97857d12d..5c0f4a487f 100644 --- a/arch/inst/F/fcvt.s.wu.yaml +++ b/arch/inst/F/fcvt.s.wu.yaml @@ -57,4 +57,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fcvt.w.s.yaml b/arch/inst/F/fcvt.w.s.yaml index 9e98f1b79b..55435c81a5 100644 --- a/arch/inst/F/fcvt.w.s.yaml +++ b/arch/inst/F/fcvt.w.s.yaml @@ -99,4 +99,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fcvt.wu.s.yaml b/arch/inst/F/fcvt.wu.s.yaml index 4cfdf3a9fc..09b9623497 100644 --- a/arch/inst/F/fcvt.wu.s.yaml +++ b/arch/inst/F/fcvt.wu.s.yaml @@ -45,4 +45,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fdiv.s.yaml b/arch/inst/F/fdiv.s.yaml index 9805287a73..3d1a1b2c2e 100644 --- a/arch/inst/F/fdiv.s.yaml +++ b/arch/inst/F/fdiv.s.yaml @@ -51,4 +51,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/feq.s.yaml b/arch/inst/F/feq.s.yaml index dd3ef04f5f..ecedde66b5 100644 --- a/arch/inst/F/feq.s.yaml +++ b/arch/inst/F/feq.s.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fle.s.yaml b/arch/inst/F/fle.s.yaml index 3a58888894..14ff093c2e 100644 --- a/arch/inst/F/fle.s.yaml +++ b/arch/inst/F/fle.s.yaml @@ -63,4 +63,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fleq.s.yaml b/arch/inst/F/fleq.s.yaml index a5ad1664eb..23001b6e18 100644 --- a/arch/inst/F/fleq.s.yaml +++ b/arch/inst/F/fleq.s.yaml @@ -41,4 +41,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fli.s.yaml b/arch/inst/F/fli.s.yaml index 696bd62619..11872cfa48 100644 --- a/arch/inst/F/fli.s.yaml +++ b/arch/inst/F/fli.s.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/flt.s.yaml b/arch/inst/F/flt.s.yaml index 84c83970ea..ab5cfe843f 100644 --- a/arch/inst/F/flt.s.yaml +++ b/arch/inst/F/flt.s.yaml @@ -63,4 +63,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fltq.s.yaml b/arch/inst/F/fltq.s.yaml index 8c09000442..fd84e73416 100644 --- a/arch/inst/F/fltq.s.yaml +++ b/arch/inst/F/fltq.s.yaml @@ -41,4 +41,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/flw.yaml b/arch/inst/F/flw.yaml index bf83598c40..8cc89272ab 100644 --- a/arch/inst/F/flw.yaml +++ b/arch/inst/F/flw.yaml @@ -73,4 +73,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fmadd.s.yaml b/arch/inst/F/fmadd.s.yaml index b9ecb03e8b..f1230cc310 100644 --- a/arch/inst/F/fmadd.s.yaml +++ b/arch/inst/F/fmadd.s.yaml @@ -55,4 +55,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fmax.s.yaml b/arch/inst/F/fmax.s.yaml index 1c5d5f70ca..b4e9c09d85 100644 --- a/arch/inst/F/fmax.s.yaml +++ b/arch/inst/F/fmax.s.yaml @@ -41,4 +41,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fmaxm.s.yaml b/arch/inst/F/fmaxm.s.yaml index 02526deb71..a59e7499d9 100644 --- a/arch/inst/F/fmaxm.s.yaml +++ b/arch/inst/F/fmaxm.s.yaml @@ -47,4 +47,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fmin.s.yaml b/arch/inst/F/fmin.s.yaml index 7f165d771e..831a4fc37e 100644 --- a/arch/inst/F/fmin.s.yaml +++ b/arch/inst/F/fmin.s.yaml @@ -41,4 +41,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fminm.s.yaml b/arch/inst/F/fminm.s.yaml index ede85e20c7..ba89dba9ae 100644 --- a/arch/inst/F/fminm.s.yaml +++ b/arch/inst/F/fminm.s.yaml @@ -47,4 +47,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fmsub.s.yaml b/arch/inst/F/fmsub.s.yaml index f926ca5208..530084c92c 100644 --- a/arch/inst/F/fmsub.s.yaml +++ b/arch/inst/F/fmsub.s.yaml @@ -55,4 +55,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fmul.s.yaml b/arch/inst/F/fmul.s.yaml index ca411c8331..1e00ccccd3 100644 --- a/arch/inst/F/fmul.s.yaml +++ b/arch/inst/F/fmul.s.yaml @@ -51,4 +51,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fmv.w.x.yaml b/arch/inst/F/fmv.w.x.yaml index 7165b13a31..e987e4b579 100644 --- a/arch/inst/F/fmv.w.x.yaml +++ b/arch/inst/F/fmv.w.x.yaml @@ -48,4 +48,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fmv.x.w.yaml b/arch/inst/F/fmv.x.w.yaml index 187a65d737..d80bde8668 100644 --- a/arch/inst/F/fmv.x.w.yaml +++ b/arch/inst/F/fmv.x.w.yaml @@ -42,4 +42,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fnmadd.s.yaml b/arch/inst/F/fnmadd.s.yaml index 7e329cda22..658ff6cfc0 100644 --- a/arch/inst/F/fnmadd.s.yaml +++ b/arch/inst/F/fnmadd.s.yaml @@ -55,4 +55,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fnmsub.s.yaml b/arch/inst/F/fnmsub.s.yaml index c72d10908a..554f3b9ad7 100644 --- a/arch/inst/F/fnmsub.s.yaml +++ b/arch/inst/F/fnmsub.s.yaml @@ -55,4 +55,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fround.s.yaml b/arch/inst/F/fround.s.yaml index 9c37236e49..202377bc4c 100644 --- a/arch/inst/F/fround.s.yaml +++ b/arch/inst/F/fround.s.yaml @@ -45,4 +45,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/froundnx.s.yaml b/arch/inst/F/froundnx.s.yaml index dfbbe88d5b..df15b8f018 100644 --- a/arch/inst/F/froundnx.s.yaml +++ b/arch/inst/F/froundnx.s.yaml @@ -45,4 +45,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fsgnj.s.yaml b/arch/inst/F/fsgnj.s.yaml index 72eaca3f0d..2c5cd8927a 100644 --- a/arch/inst/F/fsgnj.s.yaml +++ b/arch/inst/F/fsgnj.s.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fsgnjn.s.yaml b/arch/inst/F/fsgnjn.s.yaml index 5e341ea3f7..8403ad99d7 100644 --- a/arch/inst/F/fsgnjn.s.yaml +++ b/arch/inst/F/fsgnjn.s.yaml @@ -58,4 +58,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fsgnjx.s.yaml b/arch/inst/F/fsgnjx.s.yaml index 2ad6d29b15..5b6f804b23 100644 --- a/arch/inst/F/fsgnjx.s.yaml +++ b/arch/inst/F/fsgnjx.s.yaml @@ -57,4 +57,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fsqrt.s.yaml b/arch/inst/F/fsqrt.s.yaml index 77181ad921..b3cad2e558 100644 --- a/arch/inst/F/fsqrt.s.yaml +++ b/arch/inst/F/fsqrt.s.yaml @@ -45,4 +45,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fsub.s.yaml b/arch/inst/F/fsub.s.yaml index 93ebeacfbc..06abe8f7bd 100644 --- a/arch/inst/F/fsub.s.yaml +++ b/arch/inst/F/fsub.s.yaml @@ -54,4 +54,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/F/fsw.yaml b/arch/inst/F/fsw.yaml index ab4f4064c0..37dbb9ddee 100644 --- a/arch/inst/F/fsw.yaml +++ b/arch/inst/F/fsw.yaml @@ -75,4 +75,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/add.yaml b/arch/inst/I/add.yaml index fd6dc4acb2..361372298a 100644 --- a/arch/inst/I/add.yaml +++ b/arch/inst/I/add.yaml @@ -55,4 +55,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/addi.yaml b/arch/inst/I/addi.yaml index df75b568f0..877d9b2c84 100644 --- a/arch/inst/I/addi.yaml +++ b/arch/inst/I/addi.yaml @@ -43,4 +43,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/addiw.yaml b/arch/inst/I/addiw.yaml index 7fcb775dc5..e90d820d25 100644 --- a/arch/inst/I/addiw.yaml +++ b/arch/inst/I/addiw.yaml @@ -37,4 +37,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/addw.yaml b/arch/inst/I/addw.yaml index da0a416a10..57f8a396ef 100644 --- a/arch/inst/I/addw.yaml +++ b/arch/inst/I/addw.yaml @@ -48,4 +48,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/and.yaml b/arch/inst/I/and.yaml index e60bd348ac..d0da4e9ba0 100644 --- a/arch/inst/I/and.yaml +++ b/arch/inst/I/and.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/andi.yaml b/arch/inst/I/andi.yaml index eab318095d..0a2ae71ca4 100644 --- a/arch/inst/I/andi.yaml +++ b/arch/inst/I/andi.yaml @@ -43,4 +43,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/auipc.yaml b/arch/inst/I/auipc.yaml index c87163fe53..f4e30f5e94 100644 --- a/arch/inst/I/auipc.yaml +++ b/arch/inst/I/auipc.yaml @@ -39,4 +39,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/beq.yaml b/arch/inst/I/beq.yaml index 5a45fd449a..b13ef7bea6 100644 --- a/arch/inst/I/beq.yaml +++ b/arch/inst/I/beq.yaml @@ -70,4 +70,4 @@ sail(): | } else RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/bge.yaml b/arch/inst/I/bge.yaml index 6fd9a38ab8..dd13a84623 100644 --- a/arch/inst/I/bge.yaml +++ b/arch/inst/I/bge.yaml @@ -70,4 +70,4 @@ sail(): | } else RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/bgeu.yaml b/arch/inst/I/bgeu.yaml index c10b17fcc9..f08290226f 100644 --- a/arch/inst/I/bgeu.yaml +++ b/arch/inst/I/bgeu.yaml @@ -70,4 +70,4 @@ sail(): | } else RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/blt.yaml b/arch/inst/I/blt.yaml index 7f7f182903..d8558e2599 100644 --- a/arch/inst/I/blt.yaml +++ b/arch/inst/I/blt.yaml @@ -70,4 +70,4 @@ sail(): | } else RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/bltu.yaml b/arch/inst/I/bltu.yaml index c49048136c..406fa3d6bd 100644 --- a/arch/inst/I/bltu.yaml +++ b/arch/inst/I/bltu.yaml @@ -70,4 +70,4 @@ sail(): | } else RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/bne.yaml b/arch/inst/I/bne.yaml index 03d2acc7b5..e48ed35d7b 100644 --- a/arch/inst/I/bne.yaml +++ b/arch/inst/I/bne.yaml @@ -70,4 +70,4 @@ sail(): | } else RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/ebreak.yaml b/arch/inst/I/ebreak.yaml index 86880b6f42..cae652d8db 100644 --- a/arch/inst/I/ebreak.yaml +++ b/arch/inst/I/ebreak.yaml @@ -42,4 +42,4 @@ sail(): | RETIRE_FAIL } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/ecall.yaml b/arch/inst/I/ecall.yaml index 24bd67ae78..a0cd61e6f0 100644 --- a/arch/inst/I/ecall.yaml +++ b/arch/inst/I/ecall.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_FAIL } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/fence.yaml b/arch/inst/I/fence.yaml index 5323f41026..7d77592fcc 100644 --- a/arch/inst/I/fence.yaml +++ b/arch/inst/I/fence.yaml @@ -238,4 +238,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/jal.yaml b/arch/inst/I/jal.yaml index a642fdf076..86ce90b83d 100644 --- a/arch/inst/I/jal.yaml +++ b/arch/inst/I/jal.yaml @@ -56,4 +56,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/jalr.yaml b/arch/inst/I/jalr.yaml index a9872b7bbf..f5f2f84595 100644 --- a/arch/inst/I/jalr.yaml +++ b/arch/inst/I/jalr.yaml @@ -64,4 +64,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/lb.yaml b/arch/inst/I/lb.yaml index 65dfc1fa31..73fb738c27 100644 --- a/arch/inst/I/lb.yaml +++ b/arch/inst/I/lb.yaml @@ -60,4 +60,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/lbu.yaml b/arch/inst/I/lbu.yaml index 0770ed2bc5..6911ef23cf 100644 --- a/arch/inst/I/lbu.yaml +++ b/arch/inst/I/lbu.yaml @@ -60,4 +60,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/ld.yaml b/arch/inst/I/ld.yaml index 38ca62db6a..5d3096d5cf 100644 --- a/arch/inst/I/ld.yaml +++ b/arch/inst/I/ld.yaml @@ -60,4 +60,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/lh.yaml b/arch/inst/I/lh.yaml index 6b136a4d59..30b87f4eaa 100644 --- a/arch/inst/I/lh.yaml +++ b/arch/inst/I/lh.yaml @@ -60,4 +60,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/lhu.yaml b/arch/inst/I/lhu.yaml index b43bd48557..ca57c716f7 100644 --- a/arch/inst/I/lhu.yaml +++ b/arch/inst/I/lhu.yaml @@ -60,4 +60,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/lui.yaml b/arch/inst/I/lui.yaml index c1fc095edb..bdd842c918 100644 --- a/arch/inst/I/lui.yaml +++ b/arch/inst/I/lui.yaml @@ -37,4 +37,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/lw.yaml b/arch/inst/I/lw.yaml index ed7ec9814d..2add7fdacc 100644 --- a/arch/inst/I/lw.yaml +++ b/arch/inst/I/lw.yaml @@ -60,4 +60,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/lwu.yaml b/arch/inst/I/lwu.yaml index a0650a7422..6459d9c988 100644 --- a/arch/inst/I/lwu.yaml +++ b/arch/inst/I/lwu.yaml @@ -61,4 +61,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/mret.yaml b/arch/inst/I/mret.yaml index ac79686f80..6792a0dd30 100644 --- a/arch/inst/I/mret.yaml +++ b/arch/inst/I/mret.yaml @@ -44,4 +44,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/or.yaml b/arch/inst/I/or.yaml index 0bf79361ce..f27ac9437a 100644 --- a/arch/inst/I/or.yaml +++ b/arch/inst/I/or.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/ori.yaml b/arch/inst/I/ori.yaml index 6352fe874d..bf3fd2a0cb 100644 --- a/arch/inst/I/ori.yaml +++ b/arch/inst/I/ori.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sb.yaml b/arch/inst/I/sb.yaml index 4b4a779a19..2d8144bcfa 100644 --- a/arch/inst/I/sb.yaml +++ b/arch/inst/I/sb.yaml @@ -74,4 +74,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sd.yaml b/arch/inst/I/sd.yaml index 4ec4839a1e..4fb2fc33e7 100644 --- a/arch/inst/I/sd.yaml +++ b/arch/inst/I/sd.yaml @@ -76,4 +76,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sh.yaml b/arch/inst/I/sh.yaml index a19839b8e0..9953a4ba47 100644 --- a/arch/inst/I/sh.yaml +++ b/arch/inst/I/sh.yaml @@ -74,4 +74,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sll.yaml b/arch/inst/I/sll.yaml index fba5ce5166..09dd7c1e1e 100644 --- a/arch/inst/I/sll.yaml +++ b/arch/inst/I/sll.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/slli.yaml b/arch/inst/I/slli.yaml index 5531210bf8..bc87276366 100644 --- a/arch/inst/I/slli.yaml +++ b/arch/inst/I/slli.yaml @@ -58,4 +58,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/slliw.yaml b/arch/inst/I/slliw.yaml index 3efe5ccd11..96ff371380 100644 --- a/arch/inst/I/slliw.yaml +++ b/arch/inst/I/slliw.yaml @@ -42,4 +42,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sllw.yaml b/arch/inst/I/sllw.yaml index 66adeb9251..04d0a7ebd1 100644 --- a/arch/inst/I/sllw.yaml +++ b/arch/inst/I/sllw.yaml @@ -44,4 +44,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/slt.yaml b/arch/inst/I/slt.yaml index 714e2f3123..574bc1c72a 100644 --- a/arch/inst/I/slt.yaml +++ b/arch/inst/I/slt.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/slti.yaml b/arch/inst/I/slti.yaml index 16ce8f1090..a6ee3909d7 100644 --- a/arch/inst/I/slti.yaml +++ b/arch/inst/I/slti.yaml @@ -46,4 +46,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sltiu.yaml b/arch/inst/I/sltiu.yaml index f9ac79dc6c..f259dc5346 100644 --- a/arch/inst/I/sltiu.yaml +++ b/arch/inst/I/sltiu.yaml @@ -51,4 +51,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sltu.yaml b/arch/inst/I/sltu.yaml index ffa45f91e7..f054d625f5 100644 --- a/arch/inst/I/sltu.yaml +++ b/arch/inst/I/sltu.yaml @@ -56,4 +56,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sra.yaml b/arch/inst/I/sra.yaml index d8d2cfdc7b..0c97279d49 100644 --- a/arch/inst/I/sra.yaml +++ b/arch/inst/I/sra.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/srai.yaml b/arch/inst/I/srai.yaml index a2144ca7c5..2500ffd883 100644 --- a/arch/inst/I/srai.yaml +++ b/arch/inst/I/srai.yaml @@ -60,4 +60,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sraiw.yaml b/arch/inst/I/sraiw.yaml index e8a9aeaee6..a39c7a1a52 100644 --- a/arch/inst/I/sraiw.yaml +++ b/arch/inst/I/sraiw.yaml @@ -45,4 +45,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sraw.yaml b/arch/inst/I/sraw.yaml index 226c9f26e0..da6c32a6eb 100644 --- a/arch/inst/I/sraw.yaml +++ b/arch/inst/I/sraw.yaml @@ -47,4 +47,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/srl.yaml b/arch/inst/I/srl.yaml index afa1c82bd3..67eddcc4b8 100644 --- a/arch/inst/I/srl.yaml +++ b/arch/inst/I/srl.yaml @@ -59,4 +59,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/srli.yaml b/arch/inst/I/srli.yaml index c682b1f9ca..d4918d02ef 100644 --- a/arch/inst/I/srli.yaml +++ b/arch/inst/I/srli.yaml @@ -57,4 +57,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/srliw.yaml b/arch/inst/I/srliw.yaml index f3f9fd3e12..52ea8049af 100644 --- a/arch/inst/I/srliw.yaml +++ b/arch/inst/I/srliw.yaml @@ -44,4 +44,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/srlw.yaml b/arch/inst/I/srlw.yaml index 1b4272fd76..216348e0a0 100644 --- a/arch/inst/I/srlw.yaml +++ b/arch/inst/I/srlw.yaml @@ -44,4 +44,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sub.yaml b/arch/inst/I/sub.yaml index 24f7b6d564..27d1f977c1 100644 --- a/arch/inst/I/sub.yaml +++ b/arch/inst/I/sub.yaml @@ -56,4 +56,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/subw.yaml b/arch/inst/I/subw.yaml index b05757f5cf..7e92744bd0 100644 --- a/arch/inst/I/subw.yaml +++ b/arch/inst/I/subw.yaml @@ -46,4 +46,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/sw.yaml b/arch/inst/I/sw.yaml index b3e143f79f..6ec9ee28fb 100644 --- a/arch/inst/I/sw.yaml +++ b/arch/inst/I/sw.yaml @@ -74,4 +74,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/wfi.yaml b/arch/inst/I/wfi.yaml index 2b85aa1fec..f4715eb840 100644 --- a/arch/inst/I/wfi.yaml +++ b/arch/inst/I/wfi.yaml @@ -123,4 +123,4 @@ sail(): | User => { handle_illegal(); RETIRE_FAIL } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/xor.yaml b/arch/inst/I/xor.yaml index 3192de9830..0cdf3aef5f 100644 --- a/arch/inst/I/xor.yaml +++ b/arch/inst/I/xor.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/I/xori.yaml b/arch/inst/I/xori.yaml index 650d61a9d8..02e637c58d 100644 --- a/arch/inst/I/xori.yaml +++ b/arch/inst/I/xori.yaml @@ -43,4 +43,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/div.yaml b/arch/inst/M/div.yaml index 054454ffb8..cfb74ea019 100644 --- a/arch/inst/M/div.yaml +++ b/arch/inst/M/div.yaml @@ -74,4 +74,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/divu.yaml b/arch/inst/M/divu.yaml index b66756d1a6..2fe57617d6 100644 --- a/arch/inst/M/divu.yaml +++ b/arch/inst/M/divu.yaml @@ -63,4 +63,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/divuw.yaml b/arch/inst/M/divuw.yaml index 430a7dd338..730c8ed2f5 100644 --- a/arch/inst/M/divuw.yaml +++ b/arch/inst/M/divuw.yaml @@ -69,4 +69,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/divw.yaml b/arch/inst/M/divw.yaml index 0890f1aeb2..5a6cbec961 100644 --- a/arch/inst/M/divw.yaml +++ b/arch/inst/M/divw.yaml @@ -78,4 +78,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/mul.yaml b/arch/inst/M/mul.yaml index 730b494b7b..9bcc8b85a6 100644 --- a/arch/inst/M/mul.yaml +++ b/arch/inst/M/mul.yaml @@ -67,4 +67,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/mulh.yaml b/arch/inst/M/mulh.yaml index 842552e5d7..9486ec85b0 100644 --- a/arch/inst/M/mulh.yaml +++ b/arch/inst/M/mulh.yaml @@ -71,4 +71,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/mulhsu.yaml b/arch/inst/M/mulhsu.yaml index b95dd409f9..d5bffc8508 100644 --- a/arch/inst/M/mulhsu.yaml +++ b/arch/inst/M/mulhsu.yaml @@ -68,4 +68,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/mulhu.yaml b/arch/inst/M/mulhu.yaml index e85617c51e..0179ff5237 100644 --- a/arch/inst/M/mulhu.yaml +++ b/arch/inst/M/mulhu.yaml @@ -67,4 +67,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/mulw.yaml b/arch/inst/M/mulw.yaml index 92288aa454..60e5267970 100644 --- a/arch/inst/M/mulw.yaml +++ b/arch/inst/M/mulw.yaml @@ -69,4 +69,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/rem.yaml b/arch/inst/M/rem.yaml index 349dfd7ff8..2c4bff4ed5 100644 --- a/arch/inst/M/rem.yaml +++ b/arch/inst/M/rem.yaml @@ -68,4 +68,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/remu.yaml b/arch/inst/M/remu.yaml index 952c698642..1f07248d96 100644 --- a/arch/inst/M/remu.yaml +++ b/arch/inst/M/remu.yaml @@ -58,4 +58,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/remuw.yaml b/arch/inst/M/remuw.yaml index 817ad495bd..858fb98f97 100644 --- a/arch/inst/M/remuw.yaml +++ b/arch/inst/M/remuw.yaml @@ -70,4 +70,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/M/remw.yaml b/arch/inst/M/remw.yaml index 66a8878c5b..33886bc878 100644 --- a/arch/inst/M/remw.yaml +++ b/arch/inst/M/remw.yaml @@ -75,4 +75,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/S/sfence.vma.yaml b/arch/inst/S/sfence.vma.yaml index 328a67a8ca..c9a0f18f28 100644 --- a/arch/inst/S/sfence.vma.yaml +++ b/arch/inst/S/sfence.vma.yaml @@ -323,4 +323,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/S/sret.yaml b/arch/inst/S/sret.yaml index f021c147e9..1e8bed5f5c 100644 --- a/arch/inst/S/sret.yaml +++ b/arch/inst/S/sret.yaml @@ -146,4 +146,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vaadd.vv.yaml b/arch/inst/V/vaadd.vv.yaml index b38c17ff27..d7f76771dc 100644 --- a/arch/inst/V/vaadd.vv.yaml +++ b/arch/inst/V/vaadd.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vaadd.vx.yaml b/arch/inst/V/vaadd.vx.yaml index 648b33a58e..cd7ad64c8c 100644 --- a/arch/inst/V/vaadd.vx.yaml +++ b/arch/inst/V/vaadd.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vaaddu.vv.yaml b/arch/inst/V/vaaddu.vv.yaml index 3ae5bcdff6..fd41b68f4b 100644 --- a/arch/inst/V/vaaddu.vv.yaml +++ b/arch/inst/V/vaaddu.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vaaddu.vx.yaml b/arch/inst/V/vaaddu.vx.yaml index f728de75eb..a41c954e29 100644 --- a/arch/inst/V/vaaddu.vx.yaml +++ b/arch/inst/V/vaaddu.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vadc.vim.yaml b/arch/inst/V/vadc.vim.yaml index af5343aee8..ff4e4944ae 100644 --- a/arch/inst/V/vadc.vim.yaml +++ b/arch/inst/V/vadc.vim.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vadc.vvm.yaml b/arch/inst/V/vadc.vvm.yaml index 212046ea71..ba0e00b12b 100644 --- a/arch/inst/V/vadc.vvm.yaml +++ b/arch/inst/V/vadc.vvm.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vadc.vxm.yaml b/arch/inst/V/vadc.vxm.yaml index 7b8cdf649a..15761404ff 100644 --- a/arch/inst/V/vadc.vxm.yaml +++ b/arch/inst/V/vadc.vxm.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vadd.vi.yaml b/arch/inst/V/vadd.vi.yaml index f98856d020..6a3adf88fb 100644 --- a/arch/inst/V/vadd.vi.yaml +++ b/arch/inst/V/vadd.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vadd.vv.yaml b/arch/inst/V/vadd.vv.yaml index 686c966c90..ff96ab7210 100644 --- a/arch/inst/V/vadd.vv.yaml +++ b/arch/inst/V/vadd.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vadd.vx.yaml b/arch/inst/V/vadd.vx.yaml index 81a219015f..899247a057 100644 --- a/arch/inst/V/vadd.vx.yaml +++ b/arch/inst/V/vadd.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vand.vi.yaml b/arch/inst/V/vand.vi.yaml index ee4a055a95..ab3ee0ccb4 100644 --- a/arch/inst/V/vand.vi.yaml +++ b/arch/inst/V/vand.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vand.vv.yaml b/arch/inst/V/vand.vv.yaml index a6bfa1ce3f..490aead786 100644 --- a/arch/inst/V/vand.vv.yaml +++ b/arch/inst/V/vand.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vand.vx.yaml b/arch/inst/V/vand.vx.yaml index 3702085f3e..0d897a7e7d 100644 --- a/arch/inst/V/vand.vx.yaml +++ b/arch/inst/V/vand.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vasub.vv.yaml b/arch/inst/V/vasub.vv.yaml index 70d6c2dd54..36d11de864 100644 --- a/arch/inst/V/vasub.vv.yaml +++ b/arch/inst/V/vasub.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vasub.vx.yaml b/arch/inst/V/vasub.vx.yaml index a52e4e7433..5a192902d8 100644 --- a/arch/inst/V/vasub.vx.yaml +++ b/arch/inst/V/vasub.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vasubu.vv.yaml b/arch/inst/V/vasubu.vv.yaml index 882e7e78e5..dcb4d927e8 100644 --- a/arch/inst/V/vasubu.vv.yaml +++ b/arch/inst/V/vasubu.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vasubu.vx.yaml b/arch/inst/V/vasubu.vx.yaml index 32dcee5f69..bb2b50205e 100644 --- a/arch/inst/V/vasubu.vx.yaml +++ b/arch/inst/V/vasubu.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vcompress.vm.yaml b/arch/inst/V/vcompress.vm.yaml index 0d4d9a3e10..15560c6f69 100644 --- a/arch/inst/V/vcompress.vm.yaml +++ b/arch/inst/V/vcompress.vm.yaml @@ -77,4 +77,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vdiv.vv.yaml b/arch/inst/V/vdiv.vv.yaml index e7fde7f140..162f2c2d30 100644 --- a/arch/inst/V/vdiv.vv.yaml +++ b/arch/inst/V/vdiv.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vdiv.vx.yaml b/arch/inst/V/vdiv.vx.yaml index 5dfe20638b..f15a18b3a8 100644 --- a/arch/inst/V/vdiv.vx.yaml +++ b/arch/inst/V/vdiv.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vdivu.vv.yaml b/arch/inst/V/vdivu.vv.yaml index 93e6c21d64..6660cb8ccf 100644 --- a/arch/inst/V/vdivu.vv.yaml +++ b/arch/inst/V/vdivu.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vdivu.vx.yaml b/arch/inst/V/vdivu.vx.yaml index 02151e75e0..176dff94fc 100644 --- a/arch/inst/V/vdivu.vx.yaml +++ b/arch/inst/V/vdivu.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfadd.vf.yaml b/arch/inst/V/vfadd.vf.yaml index be63167d2e..5cd29c8cf3 100644 --- a/arch/inst/V/vfadd.vf.yaml +++ b/arch/inst/V/vfadd.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfadd.vv.yaml b/arch/inst/V/vfadd.vv.yaml index 05dc76c977..30b247979a 100644 --- a/arch/inst/V/vfadd.vv.yaml +++ b/arch/inst/V/vfadd.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfclass.v.yaml b/arch/inst/V/vfclass.v.yaml index f0daf59371..1ff7896e5c 100644 --- a/arch/inst/V/vfclass.v.yaml +++ b/arch/inst/V/vfclass.v.yaml @@ -89,4 +89,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfcvt.f.x.v.yaml b/arch/inst/V/vfcvt.f.x.v.yaml index 38e859710e..d2bba54f2b 100644 --- a/arch/inst/V/vfcvt.f.x.v.yaml +++ b/arch/inst/V/vfcvt.f.x.v.yaml @@ -114,4 +114,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfcvt.f.xu.v.yaml b/arch/inst/V/vfcvt.f.xu.v.yaml index 9165f4e873..f6b55ea006 100644 --- a/arch/inst/V/vfcvt.f.xu.v.yaml +++ b/arch/inst/V/vfcvt.f.xu.v.yaml @@ -114,4 +114,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfcvt.rtz.x.f.v.yaml b/arch/inst/V/vfcvt.rtz.x.f.v.yaml index 8ea623eeca..1ffb4dce52 100644 --- a/arch/inst/V/vfcvt.rtz.x.f.v.yaml +++ b/arch/inst/V/vfcvt.rtz.x.f.v.yaml @@ -114,4 +114,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfcvt.rtz.xu.f.v.yaml b/arch/inst/V/vfcvt.rtz.xu.f.v.yaml index 2a95def91a..8c29594e7a 100644 --- a/arch/inst/V/vfcvt.rtz.xu.f.v.yaml +++ b/arch/inst/V/vfcvt.rtz.xu.f.v.yaml @@ -114,4 +114,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfcvt.x.f.v.yaml b/arch/inst/V/vfcvt.x.f.v.yaml index 3b60282036..40c677b64d 100644 --- a/arch/inst/V/vfcvt.x.f.v.yaml +++ b/arch/inst/V/vfcvt.x.f.v.yaml @@ -114,4 +114,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfcvt.xu.f.v.yaml b/arch/inst/V/vfcvt.xu.f.v.yaml index 6736ef44fe..341c0ceb4a 100644 --- a/arch/inst/V/vfcvt.xu.f.v.yaml +++ b/arch/inst/V/vfcvt.xu.f.v.yaml @@ -114,4 +114,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfdiv.vf.yaml b/arch/inst/V/vfdiv.vf.yaml index ea9b8e6a42..11aa4d3c51 100644 --- a/arch/inst/V/vfdiv.vf.yaml +++ b/arch/inst/V/vfdiv.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfdiv.vv.yaml b/arch/inst/V/vfdiv.vv.yaml index 6771258fa2..afb45991ae 100644 --- a/arch/inst/V/vfdiv.vv.yaml +++ b/arch/inst/V/vfdiv.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfirst.m.yaml b/arch/inst/V/vfirst.m.yaml index 3dc1e43ddd..4d36d2e0cf 100644 --- a/arch/inst/V/vfirst.m.yaml +++ b/arch/inst/V/vfirst.m.yaml @@ -58,4 +58,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmacc.vf.yaml b/arch/inst/V/vfmacc.vf.yaml index 7216db1a53..def478364d 100644 --- a/arch/inst/V/vfmacc.vf.yaml +++ b/arch/inst/V/vfmacc.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmacc.vv.yaml b/arch/inst/V/vfmacc.vv.yaml index e79d0e6863..885c761f20 100644 --- a/arch/inst/V/vfmacc.vv.yaml +++ b/arch/inst/V/vfmacc.vv.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmadd.vf.yaml b/arch/inst/V/vfmadd.vf.yaml index 7caa0a4bf5..be0b57a0b4 100644 --- a/arch/inst/V/vfmadd.vf.yaml +++ b/arch/inst/V/vfmadd.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmadd.vv.yaml b/arch/inst/V/vfmadd.vv.yaml index 24fc4e7a15..3937cb1e52 100644 --- a/arch/inst/V/vfmadd.vv.yaml +++ b/arch/inst/V/vfmadd.vv.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmax.vf.yaml b/arch/inst/V/vfmax.vf.yaml index 72626c62a9..3c8e9413e2 100644 --- a/arch/inst/V/vfmax.vf.yaml +++ b/arch/inst/V/vfmax.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmax.vv.yaml b/arch/inst/V/vfmax.vv.yaml index 61abb9acbf..6748961af5 100644 --- a/arch/inst/V/vfmax.vv.yaml +++ b/arch/inst/V/vfmax.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmerge.vfm.yaml b/arch/inst/V/vfmerge.vfm.yaml index 5050ff00eb..fde4c33428 100644 --- a/arch/inst/V/vfmerge.vfm.yaml +++ b/arch/inst/V/vfmerge.vfm.yaml @@ -70,4 +70,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmin.vf.yaml b/arch/inst/V/vfmin.vf.yaml index f21807534d..74f9fe0999 100644 --- a/arch/inst/V/vfmin.vf.yaml +++ b/arch/inst/V/vfmin.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmin.vv.yaml b/arch/inst/V/vfmin.vv.yaml index 23e3c778e6..f0155d7eb1 100644 --- a/arch/inst/V/vfmin.vv.yaml +++ b/arch/inst/V/vfmin.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmsac.vf.yaml b/arch/inst/V/vfmsac.vf.yaml index 52ecd18f36..085af366ed 100644 --- a/arch/inst/V/vfmsac.vf.yaml +++ b/arch/inst/V/vfmsac.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmsac.vv.yaml b/arch/inst/V/vfmsac.vv.yaml index 969e0e9d1a..205a31dbdc 100644 --- a/arch/inst/V/vfmsac.vv.yaml +++ b/arch/inst/V/vfmsac.vv.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmsub.vf.yaml b/arch/inst/V/vfmsub.vf.yaml index a656dcd841..ef3c1a4c80 100644 --- a/arch/inst/V/vfmsub.vf.yaml +++ b/arch/inst/V/vfmsub.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmsub.vv.yaml b/arch/inst/V/vfmsub.vv.yaml index 27606a66b9..0cab17bdd4 100644 --- a/arch/inst/V/vfmsub.vv.yaml +++ b/arch/inst/V/vfmsub.vv.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmul.vf.yaml b/arch/inst/V/vfmul.vf.yaml index 25395330a4..db4cb5f79a 100644 --- a/arch/inst/V/vfmul.vf.yaml +++ b/arch/inst/V/vfmul.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmul.vv.yaml b/arch/inst/V/vfmul.vv.yaml index 951614194d..67d1ffeadd 100644 --- a/arch/inst/V/vfmul.vv.yaml +++ b/arch/inst/V/vfmul.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmv.f.s.yaml b/arch/inst/V/vfmv.f.s.yaml index f0557ee393..242bd4989e 100644 --- a/arch/inst/V/vfmv.f.s.yaml +++ b/arch/inst/V/vfmv.f.s.yaml @@ -50,4 +50,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmv.s.f.yaml b/arch/inst/V/vfmv.s.f.yaml index 83f8568d8d..840a7c775b 100644 --- a/arch/inst/V/vfmv.s.f.yaml +++ b/arch/inst/V/vfmv.s.f.yaml @@ -63,4 +63,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfmv.v.f.yaml b/arch/inst/V/vfmv.v.f.yaml index 549aa62e7a..ee8270c1bb 100644 --- a/arch/inst/V/vfmv.v.f.yaml +++ b/arch/inst/V/vfmv.v.f.yaml @@ -56,4 +56,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfncvt.f.f.w.yaml b/arch/inst/V/vfncvt.f.f.w.yaml index 3d1d56a9ca..979edcc903 100644 --- a/arch/inst/V/vfncvt.f.f.w.yaml +++ b/arch/inst/V/vfncvt.f.f.w.yaml @@ -137,4 +137,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfncvt.f.x.w.yaml b/arch/inst/V/vfncvt.f.x.w.yaml index ff8d33d315..4ca271df2e 100644 --- a/arch/inst/V/vfncvt.f.x.w.yaml +++ b/arch/inst/V/vfncvt.f.x.w.yaml @@ -137,4 +137,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfncvt.f.xu.w.yaml b/arch/inst/V/vfncvt.f.xu.w.yaml index 73cdab2ef8..00f3709fc3 100644 --- a/arch/inst/V/vfncvt.f.xu.w.yaml +++ b/arch/inst/V/vfncvt.f.xu.w.yaml @@ -137,4 +137,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfncvt.rod.f.f.w.yaml b/arch/inst/V/vfncvt.rod.f.f.w.yaml index 829e64d9e7..d3822e30d1 100644 --- a/arch/inst/V/vfncvt.rod.f.f.w.yaml +++ b/arch/inst/V/vfncvt.rod.f.f.w.yaml @@ -137,4 +137,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfncvt.rtz.x.f.w.yaml b/arch/inst/V/vfncvt.rtz.x.f.w.yaml index e9f9d73b2f..a8244f0e03 100644 --- a/arch/inst/V/vfncvt.rtz.x.f.w.yaml +++ b/arch/inst/V/vfncvt.rtz.x.f.w.yaml @@ -137,4 +137,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfncvt.rtz.xu.f.w.yaml b/arch/inst/V/vfncvt.rtz.xu.f.w.yaml index 610be1fe70..481b7dca75 100644 --- a/arch/inst/V/vfncvt.rtz.xu.f.w.yaml +++ b/arch/inst/V/vfncvt.rtz.xu.f.w.yaml @@ -137,4 +137,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfncvt.x.f.w.yaml b/arch/inst/V/vfncvt.x.f.w.yaml index 73ab1bf442..a74a8d3af0 100644 --- a/arch/inst/V/vfncvt.x.f.w.yaml +++ b/arch/inst/V/vfncvt.x.f.w.yaml @@ -137,4 +137,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfncvt.xu.f.w.yaml b/arch/inst/V/vfncvt.xu.f.w.yaml index 9cb3308d7c..c27a5549e2 100644 --- a/arch/inst/V/vfncvt.xu.f.w.yaml +++ b/arch/inst/V/vfncvt.xu.f.w.yaml @@ -137,4 +137,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfnmacc.vf.yaml b/arch/inst/V/vfnmacc.vf.yaml index 802fbaf776..ef2dde0c37 100644 --- a/arch/inst/V/vfnmacc.vf.yaml +++ b/arch/inst/V/vfnmacc.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfnmacc.vv.yaml b/arch/inst/V/vfnmacc.vv.yaml index c6bda346b2..d80d3075da 100644 --- a/arch/inst/V/vfnmacc.vv.yaml +++ b/arch/inst/V/vfnmacc.vv.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfnmadd.vf.yaml b/arch/inst/V/vfnmadd.vf.yaml index 983f729f52..fab801d562 100644 --- a/arch/inst/V/vfnmadd.vf.yaml +++ b/arch/inst/V/vfnmadd.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfnmadd.vv.yaml b/arch/inst/V/vfnmadd.vv.yaml index d65d08a02a..b608296735 100644 --- a/arch/inst/V/vfnmadd.vv.yaml +++ b/arch/inst/V/vfnmadd.vv.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfnmsac.vf.yaml b/arch/inst/V/vfnmsac.vf.yaml index 4131494794..496968c4ee 100644 --- a/arch/inst/V/vfnmsac.vf.yaml +++ b/arch/inst/V/vfnmsac.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfnmsac.vv.yaml b/arch/inst/V/vfnmsac.vv.yaml index f94e3653b0..40a2c0a7ff 100644 --- a/arch/inst/V/vfnmsac.vv.yaml +++ b/arch/inst/V/vfnmsac.vv.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfnmsub.vf.yaml b/arch/inst/V/vfnmsub.vf.yaml index 9b781c1959..19b2ba306d 100644 --- a/arch/inst/V/vfnmsub.vf.yaml +++ b/arch/inst/V/vfnmsub.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfnmsub.vv.yaml b/arch/inst/V/vfnmsub.vv.yaml index ac9f3f838f..08ef0f105d 100644 --- a/arch/inst/V/vfnmsub.vv.yaml +++ b/arch/inst/V/vfnmsub.vv.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfrdiv.vf.yaml b/arch/inst/V/vfrdiv.vf.yaml index 52b6c9e4bd..ae6c72835f 100644 --- a/arch/inst/V/vfrdiv.vf.yaml +++ b/arch/inst/V/vfrdiv.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfrec7.v.yaml b/arch/inst/V/vfrec7.v.yaml index 7e5c7832f7..28ce674834 100644 --- a/arch/inst/V/vfrec7.v.yaml +++ b/arch/inst/V/vfrec7.v.yaml @@ -89,4 +89,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfredmax.vs.yaml b/arch/inst/V/vfredmax.vs.yaml index 2d4ec9d9e3..d9f9c3457c 100644 --- a/arch/inst/V/vfredmax.vs.yaml +++ b/arch/inst/V/vfredmax.vs.yaml @@ -42,4 +42,4 @@ sail(): | process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfredmin.vs.yaml b/arch/inst/V/vfredmin.vs.yaml index d09c0e0c5f..c692348eee 100644 --- a/arch/inst/V/vfredmin.vs.yaml +++ b/arch/inst/V/vfredmin.vs.yaml @@ -42,4 +42,4 @@ sail(): | process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfredosum.vs.yaml b/arch/inst/V/vfredosum.vs.yaml index 2b14a6fab4..20f6622b0c 100644 --- a/arch/inst/V/vfredosum.vs.yaml +++ b/arch/inst/V/vfredosum.vs.yaml @@ -42,4 +42,4 @@ sail(): | process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfredusum.vs.yaml b/arch/inst/V/vfredusum.vs.yaml index df2cd80f59..0a1ca564d1 100644 --- a/arch/inst/V/vfredusum.vs.yaml +++ b/arch/inst/V/vfredusum.vs.yaml @@ -42,4 +42,4 @@ sail(): | process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfrsqrt7.v.yaml b/arch/inst/V/vfrsqrt7.v.yaml index 120b7bbfb6..3e0e0eac81 100644 --- a/arch/inst/V/vfrsqrt7.v.yaml +++ b/arch/inst/V/vfrsqrt7.v.yaml @@ -89,4 +89,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfrsub.vf.yaml b/arch/inst/V/vfrsub.vf.yaml index 39d0e0f152..c620f7c0b2 100644 --- a/arch/inst/V/vfrsub.vf.yaml +++ b/arch/inst/V/vfrsub.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsgnj.vf.yaml b/arch/inst/V/vfsgnj.vf.yaml index 1ea6387392..f8edad670f 100644 --- a/arch/inst/V/vfsgnj.vf.yaml +++ b/arch/inst/V/vfsgnj.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsgnj.vv.yaml b/arch/inst/V/vfsgnj.vv.yaml index d1da89dbe5..b404cb0d33 100644 --- a/arch/inst/V/vfsgnj.vv.yaml +++ b/arch/inst/V/vfsgnj.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsgnjn.vf.yaml b/arch/inst/V/vfsgnjn.vf.yaml index 254729287c..70022f7a9a 100644 --- a/arch/inst/V/vfsgnjn.vf.yaml +++ b/arch/inst/V/vfsgnjn.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsgnjn.vv.yaml b/arch/inst/V/vfsgnjn.vv.yaml index 1beb2d41ce..df8802ef58 100644 --- a/arch/inst/V/vfsgnjn.vv.yaml +++ b/arch/inst/V/vfsgnjn.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsgnjx.vf.yaml b/arch/inst/V/vfsgnjx.vf.yaml index 871ec0db53..d05542404d 100644 --- a/arch/inst/V/vfsgnjx.vf.yaml +++ b/arch/inst/V/vfsgnjx.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsgnjx.vv.yaml b/arch/inst/V/vfsgnjx.vv.yaml index 429f2f2f06..163550d683 100644 --- a/arch/inst/V/vfsgnjx.vv.yaml +++ b/arch/inst/V/vfsgnjx.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfslide1down.vf.yaml b/arch/inst/V/vfslide1down.vf.yaml index 69a3ec8a3f..1723396163 100644 --- a/arch/inst/V/vfslide1down.vf.yaml +++ b/arch/inst/V/vfslide1down.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfslide1up.vf.yaml b/arch/inst/V/vfslide1up.vf.yaml index e33221539a..f23ddb8549 100644 --- a/arch/inst/V/vfslide1up.vf.yaml +++ b/arch/inst/V/vfslide1up.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsqrt.v.yaml b/arch/inst/V/vfsqrt.v.yaml index a88a8c1d95..5584fc6cff 100644 --- a/arch/inst/V/vfsqrt.v.yaml +++ b/arch/inst/V/vfsqrt.v.yaml @@ -89,4 +89,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsub.vf.yaml b/arch/inst/V/vfsub.vf.yaml index 952a57748b..be6d0b0bb6 100644 --- a/arch/inst/V/vfsub.vf.yaml +++ b/arch/inst/V/vfsub.vf.yaml @@ -84,4 +84,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfsub.vv.yaml b/arch/inst/V/vfsub.vv.yaml index 52f832c10a..cc65938b04 100644 --- a/arch/inst/V/vfsub.vv.yaml +++ b/arch/inst/V/vfsub.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwadd.vf.yaml b/arch/inst/V/vfwadd.vf.yaml index 54944797eb..e990530caa 100644 --- a/arch/inst/V/vfwadd.vf.yaml +++ b/arch/inst/V/vfwadd.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwadd.vv.yaml b/arch/inst/V/vfwadd.vv.yaml index 5713b22a07..02ef26f51f 100644 --- a/arch/inst/V/vfwadd.vv.yaml +++ b/arch/inst/V/vfwadd.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwadd.wf.yaml b/arch/inst/V/vfwadd.wf.yaml index 1f2ece6b79..a341ffba57 100644 --- a/arch/inst/V/vfwadd.wf.yaml +++ b/arch/inst/V/vfwadd.wf.yaml @@ -70,4 +70,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwadd.wv.yaml b/arch/inst/V/vfwadd.wv.yaml index 0138d73622..51f9bc46d3 100644 --- a/arch/inst/V/vfwadd.wv.yaml +++ b/arch/inst/V/vfwadd.wv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwcvt.f.f.v.yaml b/arch/inst/V/vfwcvt.f.f.v.yaml index 7f1c0ee5b5..9dc5f55eda 100644 --- a/arch/inst/V/vfwcvt.f.f.v.yaml +++ b/arch/inst/V/vfwcvt.f.f.v.yaml @@ -129,4 +129,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwcvt.f.x.v.yaml b/arch/inst/V/vfwcvt.f.x.v.yaml index ac19d60f78..32fa183f2d 100644 --- a/arch/inst/V/vfwcvt.f.x.v.yaml +++ b/arch/inst/V/vfwcvt.f.x.v.yaml @@ -129,4 +129,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwcvt.f.xu.v.yaml b/arch/inst/V/vfwcvt.f.xu.v.yaml index 5b10088509..7c01131896 100644 --- a/arch/inst/V/vfwcvt.f.xu.v.yaml +++ b/arch/inst/V/vfwcvt.f.xu.v.yaml @@ -129,4 +129,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwcvt.rtz.x.f.v.yaml b/arch/inst/V/vfwcvt.rtz.x.f.v.yaml index 050efe743d..197fc16794 100644 --- a/arch/inst/V/vfwcvt.rtz.x.f.v.yaml +++ b/arch/inst/V/vfwcvt.rtz.x.f.v.yaml @@ -129,4 +129,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml b/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml index 41c60e41cc..5799e71590 100644 --- a/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml +++ b/arch/inst/V/vfwcvt.rtz.xu.f.v.yaml @@ -129,4 +129,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwcvt.x.f.v.yaml b/arch/inst/V/vfwcvt.x.f.v.yaml index 4e02c77bb3..1b30665622 100644 --- a/arch/inst/V/vfwcvt.x.f.v.yaml +++ b/arch/inst/V/vfwcvt.x.f.v.yaml @@ -129,4 +129,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwcvt.xu.f.v.yaml b/arch/inst/V/vfwcvt.xu.f.v.yaml index 04f3c2f0be..7ba2742f49 100644 --- a/arch/inst/V/vfwcvt.xu.f.v.yaml +++ b/arch/inst/V/vfwcvt.xu.f.v.yaml @@ -129,4 +129,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwmacc.vf.yaml b/arch/inst/V/vfwmacc.vf.yaml index ee303cc28d..b4cba307f2 100644 --- a/arch/inst/V/vfwmacc.vf.yaml +++ b/arch/inst/V/vfwmacc.vf.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwmacc.vv.yaml b/arch/inst/V/vfwmacc.vv.yaml index 509dbf7ef4..3892d361a6 100644 --- a/arch/inst/V/vfwmacc.vv.yaml +++ b/arch/inst/V/vfwmacc.vv.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwmsac.vf.yaml b/arch/inst/V/vfwmsac.vf.yaml index 0d7282626f..d41475727b 100644 --- a/arch/inst/V/vfwmsac.vf.yaml +++ b/arch/inst/V/vfwmsac.vf.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwmsac.vv.yaml b/arch/inst/V/vfwmsac.vv.yaml index 034b450f80..bec4f6f570 100644 --- a/arch/inst/V/vfwmsac.vv.yaml +++ b/arch/inst/V/vfwmsac.vv.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwmul.vf.yaml b/arch/inst/V/vfwmul.vf.yaml index 0fb119d208..38daa1df33 100644 --- a/arch/inst/V/vfwmul.vf.yaml +++ b/arch/inst/V/vfwmul.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwmul.vv.yaml b/arch/inst/V/vfwmul.vv.yaml index 6817bf1beb..038cc64292 100644 --- a/arch/inst/V/vfwmul.vv.yaml +++ b/arch/inst/V/vfwmul.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwnmacc.vf.yaml b/arch/inst/V/vfwnmacc.vf.yaml index 657ef1934c..96c1bcceb0 100644 --- a/arch/inst/V/vfwnmacc.vf.yaml +++ b/arch/inst/V/vfwnmacc.vf.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwnmacc.vv.yaml b/arch/inst/V/vfwnmacc.vv.yaml index 76cb1548de..c19e51bee6 100644 --- a/arch/inst/V/vfwnmacc.vv.yaml +++ b/arch/inst/V/vfwnmacc.vv.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwnmsac.vf.yaml b/arch/inst/V/vfwnmsac.vf.yaml index 19623c2175..e52d701384 100644 --- a/arch/inst/V/vfwnmsac.vf.yaml +++ b/arch/inst/V/vfwnmsac.vf.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwnmsac.vv.yaml b/arch/inst/V/vfwnmsac.vv.yaml index fa87fdbb71..b9115b5b62 100644 --- a/arch/inst/V/vfwnmsac.vv.yaml +++ b/arch/inst/V/vfwnmsac.vv.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwredosum.vs.yaml b/arch/inst/V/vfwredosum.vs.yaml index 53951f400a..8b61cf92c7 100644 --- a/arch/inst/V/vfwredosum.vs.yaml +++ b/arch/inst/V/vfwredosum.vs.yaml @@ -42,4 +42,4 @@ sail(): | process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwredusum.vs.yaml b/arch/inst/V/vfwredusum.vs.yaml index db5a56cfcd..c513e7bf88 100644 --- a/arch/inst/V/vfwredusum.vs.yaml +++ b/arch/inst/V/vfwredusum.vs.yaml @@ -42,4 +42,4 @@ sail(): | process_rfvv_single(funct6, vm, vs2, vs1, vd, num_elem_vs, SEW, LMUL_pow) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwsub.vf.yaml b/arch/inst/V/vfwsub.vf.yaml index 341762bedb..917850617e 100644 --- a/arch/inst/V/vfwsub.vf.yaml +++ b/arch/inst/V/vfwsub.vf.yaml @@ -72,4 +72,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwsub.vv.yaml b/arch/inst/V/vfwsub.vv.yaml index 5896615b4b..71c805ccb7 100644 --- a/arch/inst/V/vfwsub.vv.yaml +++ b/arch/inst/V/vfwsub.vv.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwsub.wf.yaml b/arch/inst/V/vfwsub.wf.yaml index f42b388960..96f4bce4b9 100644 --- a/arch/inst/V/vfwsub.wf.yaml +++ b/arch/inst/V/vfwsub.wf.yaml @@ -70,4 +70,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vfwsub.wv.yaml b/arch/inst/V/vfwsub.wv.yaml index 2d667b0925..2b6dc50d1f 100644 --- a/arch/inst/V/vfwsub.wv.yaml +++ b/arch/inst/V/vfwsub.wv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vid.v.yaml b/arch/inst/V/vid.v.yaml index cdff22e9fa..eeb25481bc 100644 --- a/arch/inst/V/vid.v.yaml +++ b/arch/inst/V/vid.v.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/viota.m.yaml b/arch/inst/V/viota.m.yaml index 6015f60843..5867b76392 100644 --- a/arch/inst/V/viota.m.yaml +++ b/arch/inst/V/viota.m.yaml @@ -61,4 +61,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vle16.v.yaml b/arch/inst/V/vle16.v.yaml index 13f5f7a643..88c53aa865 100644 --- a/arch/inst/V/vle16.v.yaml +++ b/arch/inst/V/vle16.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vlseg(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vle16ff.v.yaml b/arch/inst/V/vle16ff.v.yaml index 91a81520fc..0f2148e40b 100644 --- a/arch/inst/V/vle16ff.v.yaml +++ b/arch/inst/V/vle16ff.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vlsegff(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vle32.v.yaml b/arch/inst/V/vle32.v.yaml index 6e5157dac7..7780d20328 100644 --- a/arch/inst/V/vle32.v.yaml +++ b/arch/inst/V/vle32.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vlseg(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vle32ff.v.yaml b/arch/inst/V/vle32ff.v.yaml index 8850dfc0f2..5336a2a994 100644 --- a/arch/inst/V/vle32ff.v.yaml +++ b/arch/inst/V/vle32ff.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vlsegff(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vle64.v.yaml b/arch/inst/V/vle64.v.yaml index 275346c17d..51d6d3556f 100644 --- a/arch/inst/V/vle64.v.yaml +++ b/arch/inst/V/vle64.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vlseg(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vle64ff.v.yaml b/arch/inst/V/vle64ff.v.yaml index 3ebf650a0f..68fddc9cd2 100644 --- a/arch/inst/V/vle64ff.v.yaml +++ b/arch/inst/V/vle64ff.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vlsegff(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vle8.v.yaml b/arch/inst/V/vle8.v.yaml index 917dec3947..df173594df 100644 --- a/arch/inst/V/vle8.v.yaml +++ b/arch/inst/V/vle8.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vlseg(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vle8ff.v.yaml b/arch/inst/V/vle8ff.v.yaml index 633d6b1901..a69c56b022 100644 --- a/arch/inst/V/vle8ff.v.yaml +++ b/arch/inst/V/vle8ff.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vlsegff(nf_int, vm, vd, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vlm.v.yaml b/arch/inst/V/vlm.v.yaml index 700c112505..6a3005f24b 100644 --- a/arch/inst/V/vlm.v.yaml +++ b/arch/inst/V/vlm.v.yaml @@ -40,4 +40,4 @@ sail(): | process_vm(vd_or_vs3, rs1, num_elem, evl, op) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vloxei16.v.yaml b/arch/inst/V/vloxei16.v.yaml index 54d80bd7fd..9a535b35ff 100644 --- a/arch/inst/V/vloxei16.v.yaml +++ b/arch/inst/V/vloxei16.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 3) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vloxei32.v.yaml b/arch/inst/V/vloxei32.v.yaml index afd2a34050..78d9f423a2 100644 --- a/arch/inst/V/vloxei32.v.yaml +++ b/arch/inst/V/vloxei32.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 3) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vloxei64.v.yaml b/arch/inst/V/vloxei64.v.yaml index eb8fb20685..f9bdf1d08f 100644 --- a/arch/inst/V/vloxei64.v.yaml +++ b/arch/inst/V/vloxei64.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 3) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vloxei8.v.yaml b/arch/inst/V/vloxei8.v.yaml index da36cc2ccd..9898b3101c 100644 --- a/arch/inst/V/vloxei8.v.yaml +++ b/arch/inst/V/vloxei8.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 3) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vlse16.v.yaml b/arch/inst/V/vlse16.v.yaml index fa6846cb02..9fed679a48 100644 --- a/arch/inst/V/vlse16.v.yaml +++ b/arch/inst/V/vlse16.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlsseg(nf_int, vm, vd, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vlse32.v.yaml b/arch/inst/V/vlse32.v.yaml index 371913407a..ffd20b5fb0 100644 --- a/arch/inst/V/vlse32.v.yaml +++ b/arch/inst/V/vlse32.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlsseg(nf_int, vm, vd, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vlse64.v.yaml b/arch/inst/V/vlse64.v.yaml index cf5d9b8b16..c28979699a 100644 --- a/arch/inst/V/vlse64.v.yaml +++ b/arch/inst/V/vlse64.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlsseg(nf_int, vm, vd, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vlse8.v.yaml b/arch/inst/V/vlse8.v.yaml index cf80f8d119..5db1061857 100644 --- a/arch/inst/V/vlse8.v.yaml +++ b/arch/inst/V/vlse8.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlsseg(nf_int, vm, vd, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vluxei16.v.yaml b/arch/inst/V/vluxei16.v.yaml index 85478c2258..17b484977d 100644 --- a/arch/inst/V/vluxei16.v.yaml +++ b/arch/inst/V/vluxei16.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vluxei32.v.yaml b/arch/inst/V/vluxei32.v.yaml index 67e52dac5b..f7054e629c 100644 --- a/arch/inst/V/vluxei32.v.yaml +++ b/arch/inst/V/vluxei32.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vluxei64.v.yaml b/arch/inst/V/vluxei64.v.yaml index 45d9efd86b..afc5ce596c 100644 --- a/arch/inst/V/vluxei64.v.yaml +++ b/arch/inst/V/vluxei64.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vluxei8.v.yaml b/arch/inst/V/vluxei8.v.yaml index 453cc1c63d..bbdf201652 100644 --- a/arch/inst/V/vluxei8.v.yaml +++ b/arch/inst/V/vluxei8.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vlxseg(nf_int, vm, vd, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmacc.vv.yaml b/arch/inst/V/vmacc.vv.yaml index a2169c17df..1bf3973924 100644 --- a/arch/inst/V/vmacc.vv.yaml +++ b/arch/inst/V/vmacc.vv.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmacc.vx.yaml b/arch/inst/V/vmacc.vx.yaml index 88d0bd0dd9..e00c6b99ed 100644 --- a/arch/inst/V/vmacc.vx.yaml +++ b/arch/inst/V/vmacc.vx.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmadc.vi.yaml b/arch/inst/V/vmadc.vi.yaml index 4d1455c406..82ce4e33da 100644 --- a/arch/inst/V/vmadc.vi.yaml +++ b/arch/inst/V/vmadc.vi.yaml @@ -61,4 +61,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmadc.vim.yaml b/arch/inst/V/vmadc.vim.yaml index 07cc21f54e..7e4c5199b8 100644 --- a/arch/inst/V/vmadc.vim.yaml +++ b/arch/inst/V/vmadc.vim.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmadc.vv.yaml b/arch/inst/V/vmadc.vv.yaml index 0c13eab44c..6034c79d0b 100644 --- a/arch/inst/V/vmadc.vv.yaml +++ b/arch/inst/V/vmadc.vv.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmadc.vvm.yaml b/arch/inst/V/vmadc.vvm.yaml index b4e797366b..da6f0ccbc9 100644 --- a/arch/inst/V/vmadc.vvm.yaml +++ b/arch/inst/V/vmadc.vvm.yaml @@ -63,4 +63,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmadc.vx.yaml b/arch/inst/V/vmadc.vx.yaml index f985dff143..87ce0bfdaf 100644 --- a/arch/inst/V/vmadc.vx.yaml +++ b/arch/inst/V/vmadc.vx.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmadc.vxm.yaml b/arch/inst/V/vmadc.vxm.yaml index 60cea1cf20..71438e17a1 100644 --- a/arch/inst/V/vmadc.vxm.yaml +++ b/arch/inst/V/vmadc.vxm.yaml @@ -63,4 +63,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmadd.vv.yaml b/arch/inst/V/vmadd.vv.yaml index 6295c8a9bc..367d2d8a08 100644 --- a/arch/inst/V/vmadd.vv.yaml +++ b/arch/inst/V/vmadd.vv.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmadd.vx.yaml b/arch/inst/V/vmadd.vx.yaml index d932bae1c0..a16fc17bf5 100644 --- a/arch/inst/V/vmadd.vx.yaml +++ b/arch/inst/V/vmadd.vx.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmand.mm.yaml b/arch/inst/V/vmand.mm.yaml index 0a1fd9bc27..22eae551b7 100644 --- a/arch/inst/V/vmand.mm.yaml +++ b/arch/inst/V/vmand.mm.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmax.vv.yaml b/arch/inst/V/vmax.vv.yaml index 9043e806cb..a8d60e8d6e 100644 --- a/arch/inst/V/vmax.vv.yaml +++ b/arch/inst/V/vmax.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmax.vx.yaml b/arch/inst/V/vmax.vx.yaml index 859d1060ac..cdd402f735 100644 --- a/arch/inst/V/vmax.vx.yaml +++ b/arch/inst/V/vmax.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmaxu.vv.yaml b/arch/inst/V/vmaxu.vv.yaml index 8fffc23819..ff48762a0c 100644 --- a/arch/inst/V/vmaxu.vv.yaml +++ b/arch/inst/V/vmaxu.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmaxu.vx.yaml b/arch/inst/V/vmaxu.vx.yaml index f5908df4f1..be7a9a745b 100644 --- a/arch/inst/V/vmaxu.vx.yaml +++ b/arch/inst/V/vmaxu.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmerge.vim.yaml b/arch/inst/V/vmerge.vim.yaml index 4ff0117f90..2a5d57214c 100644 --- a/arch/inst/V/vmerge.vim.yaml +++ b/arch/inst/V/vmerge.vim.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmerge.vvm.yaml b/arch/inst/V/vmerge.vvm.yaml index 305cf669c6..e3fabb3fe7 100644 --- a/arch/inst/V/vmerge.vvm.yaml +++ b/arch/inst/V/vmerge.vvm.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmerge.vxm.yaml b/arch/inst/V/vmerge.vxm.yaml index defe9495fc..0d3e8975db 100644 --- a/arch/inst/V/vmerge.vxm.yaml +++ b/arch/inst/V/vmerge.vxm.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmfeq.vf.yaml b/arch/inst/V/vmfeq.vf.yaml index e3b7919046..3dfc46ae38 100644 --- a/arch/inst/V/vmfeq.vf.yaml +++ b/arch/inst/V/vmfeq.vf.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmfeq.vv.yaml b/arch/inst/V/vmfeq.vv.yaml index 2580e9b34a..3752cb4173 100644 --- a/arch/inst/V/vmfeq.vv.yaml +++ b/arch/inst/V/vmfeq.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmfge.vf.yaml b/arch/inst/V/vmfge.vf.yaml index b4b555203b..585c76f3b9 100644 --- a/arch/inst/V/vmfge.vf.yaml +++ b/arch/inst/V/vmfge.vf.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmfgt.vf.yaml b/arch/inst/V/vmfgt.vf.yaml index 3ae11e9c0b..40a7a39080 100644 --- a/arch/inst/V/vmfgt.vf.yaml +++ b/arch/inst/V/vmfgt.vf.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmfle.vf.yaml b/arch/inst/V/vmfle.vf.yaml index a90c274ac1..6db768692a 100644 --- a/arch/inst/V/vmfle.vf.yaml +++ b/arch/inst/V/vmfle.vf.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmfle.vv.yaml b/arch/inst/V/vmfle.vv.yaml index 4586bf4201..b0f4e1f8d7 100644 --- a/arch/inst/V/vmfle.vv.yaml +++ b/arch/inst/V/vmfle.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmflt.vf.yaml b/arch/inst/V/vmflt.vf.yaml index c6f8c6c128..5f507f538b 100644 --- a/arch/inst/V/vmflt.vf.yaml +++ b/arch/inst/V/vmflt.vf.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmflt.vv.yaml b/arch/inst/V/vmflt.vv.yaml index 3c4cb984df..35f01dce3f 100644 --- a/arch/inst/V/vmflt.vv.yaml +++ b/arch/inst/V/vmflt.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmfne.vf.yaml b/arch/inst/V/vmfne.vf.yaml index af07e92c31..6d833b5e99 100644 --- a/arch/inst/V/vmfne.vf.yaml +++ b/arch/inst/V/vmfne.vf.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmfne.vv.yaml b/arch/inst/V/vmfne.vv.yaml index 35cce9a2bb..ad768c2be5 100644 --- a/arch/inst/V/vmfne.vv.yaml +++ b/arch/inst/V/vmfne.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmin.vv.yaml b/arch/inst/V/vmin.vv.yaml index 502f174c2a..418a3d81b1 100644 --- a/arch/inst/V/vmin.vv.yaml +++ b/arch/inst/V/vmin.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmin.vx.yaml b/arch/inst/V/vmin.vx.yaml index ee4abe4b11..b95be1de50 100644 --- a/arch/inst/V/vmin.vx.yaml +++ b/arch/inst/V/vmin.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vminu.vv.yaml b/arch/inst/V/vminu.vv.yaml index 892005f763..62ac813285 100644 --- a/arch/inst/V/vminu.vv.yaml +++ b/arch/inst/V/vminu.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vminu.vx.yaml b/arch/inst/V/vminu.vx.yaml index d471987e5d..fd1dfb974f 100644 --- a/arch/inst/V/vminu.vx.yaml +++ b/arch/inst/V/vminu.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmnand.mm.yaml b/arch/inst/V/vmnand.mm.yaml index 24cdf40306..9d10ea608b 100644 --- a/arch/inst/V/vmnand.mm.yaml +++ b/arch/inst/V/vmnand.mm.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmnor.mm.yaml b/arch/inst/V/vmnor.mm.yaml index 4cb209ea50..9999ec20cb 100644 --- a/arch/inst/V/vmnor.mm.yaml +++ b/arch/inst/V/vmnor.mm.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmor.mm.yaml b/arch/inst/V/vmor.mm.yaml index 5cbde29333..ff7b02bbdb 100644 --- a/arch/inst/V/vmor.mm.yaml +++ b/arch/inst/V/vmor.mm.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsbc.vv.yaml b/arch/inst/V/vmsbc.vv.yaml index cd28feec43..39fdac9c56 100644 --- a/arch/inst/V/vmsbc.vv.yaml +++ b/arch/inst/V/vmsbc.vv.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsbc.vvm.yaml b/arch/inst/V/vmsbc.vvm.yaml index c2dc4c087c..33fba75dca 100644 --- a/arch/inst/V/vmsbc.vvm.yaml +++ b/arch/inst/V/vmsbc.vvm.yaml @@ -63,4 +63,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsbc.vx.yaml b/arch/inst/V/vmsbc.vx.yaml index 9ac9264a85..e3a3ceb00c 100644 --- a/arch/inst/V/vmsbc.vx.yaml +++ b/arch/inst/V/vmsbc.vx.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsbc.vxm.yaml b/arch/inst/V/vmsbc.vxm.yaml index 3015e90ba1..a46e119317 100644 --- a/arch/inst/V/vmsbc.vxm.yaml +++ b/arch/inst/V/vmsbc.vxm.yaml @@ -63,4 +63,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsbf.m.yaml b/arch/inst/V/vmsbf.m.yaml index 4a39315b88..7289f9c41e 100644 --- a/arch/inst/V/vmsbf.m.yaml +++ b/arch/inst/V/vmsbf.m.yaml @@ -61,4 +61,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmseq.vi.yaml b/arch/inst/V/vmseq.vi.yaml index 6092057d5a..df4262e141 100644 --- a/arch/inst/V/vmseq.vi.yaml +++ b/arch/inst/V/vmseq.vi.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmseq.vv.yaml b/arch/inst/V/vmseq.vv.yaml index e373cea5e7..008ac77cee 100644 --- a/arch/inst/V/vmseq.vv.yaml +++ b/arch/inst/V/vmseq.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmseq.vx.yaml b/arch/inst/V/vmseq.vx.yaml index b5a3067ec4..507a5bb29b 100644 --- a/arch/inst/V/vmseq.vx.yaml +++ b/arch/inst/V/vmseq.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsgt.vi.yaml b/arch/inst/V/vmsgt.vi.yaml index 35971fc1aa..0f1f90a5b4 100644 --- a/arch/inst/V/vmsgt.vi.yaml +++ b/arch/inst/V/vmsgt.vi.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsgt.vx.yaml b/arch/inst/V/vmsgt.vx.yaml index ffa9295b05..b9db9110bd 100644 --- a/arch/inst/V/vmsgt.vx.yaml +++ b/arch/inst/V/vmsgt.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsgtu.vi.yaml b/arch/inst/V/vmsgtu.vi.yaml index ab6e139142..cc879660cf 100644 --- a/arch/inst/V/vmsgtu.vi.yaml +++ b/arch/inst/V/vmsgtu.vi.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsgtu.vx.yaml b/arch/inst/V/vmsgtu.vx.yaml index f83f7f75aa..f5f3ecbcfc 100644 --- a/arch/inst/V/vmsgtu.vx.yaml +++ b/arch/inst/V/vmsgtu.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsif.m.yaml b/arch/inst/V/vmsif.m.yaml index ae514591f0..77a712a532 100644 --- a/arch/inst/V/vmsif.m.yaml +++ b/arch/inst/V/vmsif.m.yaml @@ -61,4 +61,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsle.vi.yaml b/arch/inst/V/vmsle.vi.yaml index f27b0521e5..9fd57a240f 100644 --- a/arch/inst/V/vmsle.vi.yaml +++ b/arch/inst/V/vmsle.vi.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsle.vv.yaml b/arch/inst/V/vmsle.vv.yaml index 447172484d..4c93d53315 100644 --- a/arch/inst/V/vmsle.vv.yaml +++ b/arch/inst/V/vmsle.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsle.vx.yaml b/arch/inst/V/vmsle.vx.yaml index f649755cb8..f46b6e73ac 100644 --- a/arch/inst/V/vmsle.vx.yaml +++ b/arch/inst/V/vmsle.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsleu.vi.yaml b/arch/inst/V/vmsleu.vi.yaml index 0dfb92c7c8..7d4c60181d 100644 --- a/arch/inst/V/vmsleu.vi.yaml +++ b/arch/inst/V/vmsleu.vi.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsleu.vv.yaml b/arch/inst/V/vmsleu.vv.yaml index 56817ac419..18ed550488 100644 --- a/arch/inst/V/vmsleu.vv.yaml +++ b/arch/inst/V/vmsleu.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsleu.vx.yaml b/arch/inst/V/vmsleu.vx.yaml index ce4c2bf38c..600107dcac 100644 --- a/arch/inst/V/vmsleu.vx.yaml +++ b/arch/inst/V/vmsleu.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmslt.vv.yaml b/arch/inst/V/vmslt.vv.yaml index f3d285728a..1e591ee687 100644 --- a/arch/inst/V/vmslt.vv.yaml +++ b/arch/inst/V/vmslt.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmslt.vx.yaml b/arch/inst/V/vmslt.vx.yaml index f755d58e5d..e6ee8e43d6 100644 --- a/arch/inst/V/vmslt.vx.yaml +++ b/arch/inst/V/vmslt.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsltu.vv.yaml b/arch/inst/V/vmsltu.vv.yaml index e70301eb02..bee80892db 100644 --- a/arch/inst/V/vmsltu.vv.yaml +++ b/arch/inst/V/vmsltu.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsltu.vx.yaml b/arch/inst/V/vmsltu.vx.yaml index aec09fb642..b90cc074df 100644 --- a/arch/inst/V/vmsltu.vx.yaml +++ b/arch/inst/V/vmsltu.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsne.vi.yaml b/arch/inst/V/vmsne.vi.yaml index fdc7eb40f8..857d1509b6 100644 --- a/arch/inst/V/vmsne.vi.yaml +++ b/arch/inst/V/vmsne.vi.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsne.vv.yaml b/arch/inst/V/vmsne.vv.yaml index 9e33b7755f..df7d318af1 100644 --- a/arch/inst/V/vmsne.vv.yaml +++ b/arch/inst/V/vmsne.vv.yaml @@ -69,4 +69,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsne.vx.yaml b/arch/inst/V/vmsne.vx.yaml index d1e85b1b3f..db8ca450f3 100644 --- a/arch/inst/V/vmsne.vx.yaml +++ b/arch/inst/V/vmsne.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmsof.m.yaml b/arch/inst/V/vmsof.m.yaml index 267940d953..5540d75af7 100644 --- a/arch/inst/V/vmsof.m.yaml +++ b/arch/inst/V/vmsof.m.yaml @@ -65,4 +65,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmul.vv.yaml b/arch/inst/V/vmul.vv.yaml index 31a9c084f7..734218faed 100644 --- a/arch/inst/V/vmul.vv.yaml +++ b/arch/inst/V/vmul.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmul.vx.yaml b/arch/inst/V/vmul.vx.yaml index 96a43b6af7..2e6cbf5292 100644 --- a/arch/inst/V/vmul.vx.yaml +++ b/arch/inst/V/vmul.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmulh.vv.yaml b/arch/inst/V/vmulh.vv.yaml index 7ee10f4126..5683a5dae0 100644 --- a/arch/inst/V/vmulh.vv.yaml +++ b/arch/inst/V/vmulh.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmulh.vx.yaml b/arch/inst/V/vmulh.vx.yaml index 371d9c43ad..1879f6751d 100644 --- a/arch/inst/V/vmulh.vx.yaml +++ b/arch/inst/V/vmulh.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmulhsu.vv.yaml b/arch/inst/V/vmulhsu.vv.yaml index 427c1a44e4..fd91ce3005 100644 --- a/arch/inst/V/vmulhsu.vv.yaml +++ b/arch/inst/V/vmulhsu.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmulhsu.vx.yaml b/arch/inst/V/vmulhsu.vx.yaml index 0424ac8563..579e7eee04 100644 --- a/arch/inst/V/vmulhsu.vx.yaml +++ b/arch/inst/V/vmulhsu.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmulhu.vv.yaml b/arch/inst/V/vmulhu.vv.yaml index 607dd6605c..dac10e9bba 100644 --- a/arch/inst/V/vmulhu.vv.yaml +++ b/arch/inst/V/vmulhu.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmulhu.vx.yaml b/arch/inst/V/vmulhu.vx.yaml index 0451f0f7c7..a367c3e317 100644 --- a/arch/inst/V/vmulhu.vx.yaml +++ b/arch/inst/V/vmulhu.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv.s.x.yaml b/arch/inst/V/vmv.s.x.yaml index 65096be156..70b6233f6a 100644 --- a/arch/inst/V/vmv.s.x.yaml +++ b/arch/inst/V/vmv.s.x.yaml @@ -62,4 +62,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv.v.i.yaml b/arch/inst/V/vmv.v.i.yaml index eb8c645b33..1dbdff7b41 100644 --- a/arch/inst/V/vmv.v.i.yaml +++ b/arch/inst/V/vmv.v.i.yaml @@ -54,4 +54,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv.v.v.yaml b/arch/inst/V/vmv.v.v.yaml index 458db30bef..0f434713fe 100644 --- a/arch/inst/V/vmv.v.v.yaml +++ b/arch/inst/V/vmv.v.v.yaml @@ -54,4 +54,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv.v.x.yaml b/arch/inst/V/vmv.v.x.yaml index 120aa20599..168955613a 100644 --- a/arch/inst/V/vmv.v.x.yaml +++ b/arch/inst/V/vmv.v.x.yaml @@ -54,4 +54,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv.x.s.yaml b/arch/inst/V/vmv.x.s.yaml index b5b85f04b0..2cea63ae71 100644 --- a/arch/inst/V/vmv.x.s.yaml +++ b/arch/inst/V/vmv.x.s.yaml @@ -46,4 +46,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv1r.v.yaml b/arch/inst/V/vmv1r.v.yaml index 20d7c6f7ca..6a8b63348a 100644 --- a/arch/inst/V/vmv1r.v.yaml +++ b/arch/inst/V/vmv1r.v.yaml @@ -54,4 +54,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv2r.v.yaml b/arch/inst/V/vmv2r.v.yaml index 4ce32fa895..f172644fca 100644 --- a/arch/inst/V/vmv2r.v.yaml +++ b/arch/inst/V/vmv2r.v.yaml @@ -54,4 +54,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv4r.v.yaml b/arch/inst/V/vmv4r.v.yaml index 3b18255511..138eda5f4c 100644 --- a/arch/inst/V/vmv4r.v.yaml +++ b/arch/inst/V/vmv4r.v.yaml @@ -54,4 +54,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmv8r.v.yaml b/arch/inst/V/vmv8r.v.yaml index e79f0c1019..d1b16ef58a 100644 --- a/arch/inst/V/vmv8r.v.yaml +++ b/arch/inst/V/vmv8r.v.yaml @@ -54,4 +54,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmxnor.mm.yaml b/arch/inst/V/vmxnor.mm.yaml index bc3fdb1ec9..7811ffbdd2 100644 --- a/arch/inst/V/vmxnor.mm.yaml +++ b/arch/inst/V/vmxnor.mm.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vmxor.mm.yaml b/arch/inst/V/vmxor.mm.yaml index 65f12d42e5..3fa94ec826 100644 --- a/arch/inst/V/vmxor.mm.yaml +++ b/arch/inst/V/vmxor.mm.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnclip.wi.yaml b/arch/inst/V/vnclip.wi.yaml index 25bb55a018..8930bb72dc 100644 --- a/arch/inst/V/vnclip.wi.yaml +++ b/arch/inst/V/vnclip.wi.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnclip.wv.yaml b/arch/inst/V/vnclip.wv.yaml index 4da924de96..d3c34f141e 100644 --- a/arch/inst/V/vnclip.wv.yaml +++ b/arch/inst/V/vnclip.wv.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnclip.wx.yaml b/arch/inst/V/vnclip.wx.yaml index 64b2234dd8..f32b3dcbbe 100644 --- a/arch/inst/V/vnclip.wx.yaml +++ b/arch/inst/V/vnclip.wx.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnclipu.wi.yaml b/arch/inst/V/vnclipu.wi.yaml index ccc82ea3e1..551d93ed38 100644 --- a/arch/inst/V/vnclipu.wi.yaml +++ b/arch/inst/V/vnclipu.wi.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnclipu.wv.yaml b/arch/inst/V/vnclipu.wv.yaml index 6806b12acb..f393c96b0f 100644 --- a/arch/inst/V/vnclipu.wv.yaml +++ b/arch/inst/V/vnclipu.wv.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnclipu.wx.yaml b/arch/inst/V/vnclipu.wx.yaml index 46c8fb739f..db31e51787 100644 --- a/arch/inst/V/vnclipu.wx.yaml +++ b/arch/inst/V/vnclipu.wx.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnmsac.vv.yaml b/arch/inst/V/vnmsac.vv.yaml index 08a78020ce..266003561e 100644 --- a/arch/inst/V/vnmsac.vv.yaml +++ b/arch/inst/V/vnmsac.vv.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnmsac.vx.yaml b/arch/inst/V/vnmsac.vx.yaml index e0a0f7e611..0fceca1d07 100644 --- a/arch/inst/V/vnmsac.vx.yaml +++ b/arch/inst/V/vnmsac.vx.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnmsub.vv.yaml b/arch/inst/V/vnmsub.vv.yaml index c093ddfa8f..a5fd526dcf 100644 --- a/arch/inst/V/vnmsub.vv.yaml +++ b/arch/inst/V/vnmsub.vv.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnmsub.vx.yaml b/arch/inst/V/vnmsub.vx.yaml index 5d5ce46464..5129207908 100644 --- a/arch/inst/V/vnmsub.vx.yaml +++ b/arch/inst/V/vnmsub.vx.yaml @@ -66,4 +66,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnsra.wi.yaml b/arch/inst/V/vnsra.wi.yaml index c2a9fb76ce..476fd1dea2 100644 --- a/arch/inst/V/vnsra.wi.yaml +++ b/arch/inst/V/vnsra.wi.yaml @@ -78,4 +78,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnsra.wv.yaml b/arch/inst/V/vnsra.wv.yaml index d5a0d13a62..551e93c0bd 100644 --- a/arch/inst/V/vnsra.wv.yaml +++ b/arch/inst/V/vnsra.wv.yaml @@ -78,4 +78,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnsra.wx.yaml b/arch/inst/V/vnsra.wx.yaml index e789283c96..81c9f9f1ff 100644 --- a/arch/inst/V/vnsra.wx.yaml +++ b/arch/inst/V/vnsra.wx.yaml @@ -78,4 +78,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnsrl.wi.yaml b/arch/inst/V/vnsrl.wi.yaml index 47e9a40c3c..e5aecf6185 100644 --- a/arch/inst/V/vnsrl.wi.yaml +++ b/arch/inst/V/vnsrl.wi.yaml @@ -78,4 +78,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnsrl.wv.yaml b/arch/inst/V/vnsrl.wv.yaml index 3af21a9229..629fb09a62 100644 --- a/arch/inst/V/vnsrl.wv.yaml +++ b/arch/inst/V/vnsrl.wv.yaml @@ -78,4 +78,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vnsrl.wx.yaml b/arch/inst/V/vnsrl.wx.yaml index d88fd06a31..082dfe8eb2 100644 --- a/arch/inst/V/vnsrl.wx.yaml +++ b/arch/inst/V/vnsrl.wx.yaml @@ -78,4 +78,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vor.vi.yaml b/arch/inst/V/vor.vi.yaml index 2520e0bd35..5bf4c97152 100644 --- a/arch/inst/V/vor.vi.yaml +++ b/arch/inst/V/vor.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vor.vv.yaml b/arch/inst/V/vor.vv.yaml index db76ba2b11..1a51c9c3b2 100644 --- a/arch/inst/V/vor.vv.yaml +++ b/arch/inst/V/vor.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vor.vx.yaml b/arch/inst/V/vor.vx.yaml index ab931d745b..98f293e912 100644 --- a/arch/inst/V/vor.vx.yaml +++ b/arch/inst/V/vor.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vredand.vs.yaml b/arch/inst/V/vredand.vs.yaml index 6d0e5a474b..247e67ce2f 100644 --- a/arch/inst/V/vredand.vs.yaml +++ b/arch/inst/V/vredand.vs.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vredmax.vs.yaml b/arch/inst/V/vredmax.vs.yaml index b02ec701ab..63e6284a68 100644 --- a/arch/inst/V/vredmax.vs.yaml +++ b/arch/inst/V/vredmax.vs.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vredmaxu.vs.yaml b/arch/inst/V/vredmaxu.vs.yaml index b892cae660..811dc0671c 100644 --- a/arch/inst/V/vredmaxu.vs.yaml +++ b/arch/inst/V/vredmaxu.vs.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vredmin.vs.yaml b/arch/inst/V/vredmin.vs.yaml index 313d09b704..29aacfaf4a 100644 --- a/arch/inst/V/vredmin.vs.yaml +++ b/arch/inst/V/vredmin.vs.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vredminu.vs.yaml b/arch/inst/V/vredminu.vs.yaml index 7ea693a0dc..5900310495 100644 --- a/arch/inst/V/vredminu.vs.yaml +++ b/arch/inst/V/vredminu.vs.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vredor.vs.yaml b/arch/inst/V/vredor.vs.yaml index 176c4155a8..f8da6673ed 100644 --- a/arch/inst/V/vredor.vs.yaml +++ b/arch/inst/V/vredor.vs.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vredsum.vs.yaml b/arch/inst/V/vredsum.vs.yaml index c9a2687764..dfcfc16a88 100644 --- a/arch/inst/V/vredsum.vs.yaml +++ b/arch/inst/V/vredsum.vs.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vredxor.vs.yaml b/arch/inst/V/vredxor.vs.yaml index 9cb3f697a4..ca1c4f4bbe 100644 --- a/arch/inst/V/vredxor.vs.yaml +++ b/arch/inst/V/vredxor.vs.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vrem.vv.yaml b/arch/inst/V/vrem.vv.yaml index a4a9531128..85f4608209 100644 --- a/arch/inst/V/vrem.vv.yaml +++ b/arch/inst/V/vrem.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vrem.vx.yaml b/arch/inst/V/vrem.vx.yaml index 10b18bd254..9db0499a43 100644 --- a/arch/inst/V/vrem.vx.yaml +++ b/arch/inst/V/vrem.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vremu.vv.yaml b/arch/inst/V/vremu.vv.yaml index c3847ebed4..6a44b7d5a2 100644 --- a/arch/inst/V/vremu.vv.yaml +++ b/arch/inst/V/vremu.vv.yaml @@ -108,4 +108,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vremu.vx.yaml b/arch/inst/V/vremu.vx.yaml index 5527d99ead..0e7a591420 100644 --- a/arch/inst/V/vremu.vx.yaml +++ b/arch/inst/V/vremu.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vrgather.vi.yaml b/arch/inst/V/vrgather.vi.yaml index 262db59720..b7744ab6d4 100644 --- a/arch/inst/V/vrgather.vi.yaml +++ b/arch/inst/V/vrgather.vi.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vrgather.vv.yaml b/arch/inst/V/vrgather.vv.yaml index 2d15623900..4ccb16e5fa 100644 --- a/arch/inst/V/vrgather.vv.yaml +++ b/arch/inst/V/vrgather.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vrgather.vx.yaml b/arch/inst/V/vrgather.vx.yaml index f31ec52fe7..9308f2396f 100644 --- a/arch/inst/V/vrgather.vx.yaml +++ b/arch/inst/V/vrgather.vx.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vrgatherei16.vv.yaml b/arch/inst/V/vrgatherei16.vv.yaml index 549237405f..b13bdc3697 100644 --- a/arch/inst/V/vrgatherei16.vv.yaml +++ b/arch/inst/V/vrgatherei16.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vrsub.vi.yaml b/arch/inst/V/vrsub.vi.yaml index 2e28922e80..e95ae38550 100644 --- a/arch/inst/V/vrsub.vi.yaml +++ b/arch/inst/V/vrsub.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vrsub.vx.yaml b/arch/inst/V/vrsub.vx.yaml index 2132e77fff..c17d195525 100644 --- a/arch/inst/V/vrsub.vx.yaml +++ b/arch/inst/V/vrsub.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsadd.vi.yaml b/arch/inst/V/vsadd.vi.yaml index 6d176b6efe..dfda14896f 100644 --- a/arch/inst/V/vsadd.vi.yaml +++ b/arch/inst/V/vsadd.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsadd.vv.yaml b/arch/inst/V/vsadd.vv.yaml index f3bda1a717..f07d2c37a2 100644 --- a/arch/inst/V/vsadd.vv.yaml +++ b/arch/inst/V/vsadd.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsadd.vx.yaml b/arch/inst/V/vsadd.vx.yaml index 3ad7324f64..21b75111e0 100644 --- a/arch/inst/V/vsadd.vx.yaml +++ b/arch/inst/V/vsadd.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsaddu.vi.yaml b/arch/inst/V/vsaddu.vi.yaml index c5f05a78e5..c1cbbcd260 100644 --- a/arch/inst/V/vsaddu.vi.yaml +++ b/arch/inst/V/vsaddu.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsaddu.vv.yaml b/arch/inst/V/vsaddu.vv.yaml index 4c13529b47..cfea80e830 100644 --- a/arch/inst/V/vsaddu.vv.yaml +++ b/arch/inst/V/vsaddu.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsaddu.vx.yaml b/arch/inst/V/vsaddu.vx.yaml index 74a4f8a967..7fdb15d4a5 100644 --- a/arch/inst/V/vsaddu.vx.yaml +++ b/arch/inst/V/vsaddu.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsbc.vvm.yaml b/arch/inst/V/vsbc.vvm.yaml index da62e694d6..98fbf0e471 100644 --- a/arch/inst/V/vsbc.vvm.yaml +++ b/arch/inst/V/vsbc.vvm.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsbc.vxm.yaml b/arch/inst/V/vsbc.vxm.yaml index a19d16ecf5..b6830d63c0 100644 --- a/arch/inst/V/vsbc.vxm.yaml +++ b/arch/inst/V/vsbc.vxm.yaml @@ -68,4 +68,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vse16.v.yaml b/arch/inst/V/vse16.v.yaml index 585709d288..c5e82b918f 100644 --- a/arch/inst/V/vse16.v.yaml +++ b/arch/inst/V/vse16.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vsseg(nf_int, vm, vs3, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vse32.v.yaml b/arch/inst/V/vse32.v.yaml index e9471a577f..7b4cadcc30 100644 --- a/arch/inst/V/vse32.v.yaml +++ b/arch/inst/V/vse32.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vsseg(nf_int, vm, vs3, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vse64.v.yaml b/arch/inst/V/vse64.v.yaml index b595dbbfde..90de036ad2 100644 --- a/arch/inst/V/vse64.v.yaml +++ b/arch/inst/V/vse64.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vsseg(nf_int, vm, vs3, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vse8.v.yaml b/arch/inst/V/vse8.v.yaml index 4a58e2027b..986f39df83 100644 --- a/arch/inst/V/vse8.v.yaml +++ b/arch/inst/V/vse8.v.yaml @@ -44,4 +44,4 @@ sail(): | process_vsseg(nf_int, vm, vs3, load_width_bytes, rs1, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsetivli.yaml b/arch/inst/V/vsetivli.yaml index 18b2198709..b8e7cb5b87 100644 --- a/arch/inst/V/vsetivli.yaml +++ b/arch/inst/V/vsetivli.yaml @@ -73,4 +73,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsetvli.yaml b/arch/inst/V/vsetvli.yaml index 04e14f24e7..7819a28896 100644 --- a/arch/inst/V/vsetvli.yaml +++ b/arch/inst/V/vsetvli.yaml @@ -98,4 +98,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsext.vf2.yaml b/arch/inst/V/vsext.vf2.yaml index 623d84d448..2909546d34 100644 --- a/arch/inst/V/vsext.vf2.yaml +++ b/arch/inst/V/vsext.vf2.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsext.vf4.yaml b/arch/inst/V/vsext.vf4.yaml index 2f5f1819f1..a4d87c6e97 100644 --- a/arch/inst/V/vsext.vf4.yaml +++ b/arch/inst/V/vsext.vf4.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsext.vf8.yaml b/arch/inst/V/vsext.vf8.yaml index 05b2c3c79a..7c866cb4f5 100644 --- a/arch/inst/V/vsext.vf8.yaml +++ b/arch/inst/V/vsext.vf8.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vslide1down.vx.yaml b/arch/inst/V/vslide1down.vx.yaml index 196941b4ab..deaaf4b501 100644 --- a/arch/inst/V/vslide1down.vx.yaml +++ b/arch/inst/V/vslide1down.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vslide1up.vx.yaml b/arch/inst/V/vslide1up.vx.yaml index 81b561f680..58cea02256 100644 --- a/arch/inst/V/vslide1up.vx.yaml +++ b/arch/inst/V/vslide1up.vx.yaml @@ -117,4 +117,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vslidedown.vi.yaml b/arch/inst/V/vslidedown.vi.yaml index a75223d656..177a0ea31b 100644 --- a/arch/inst/V/vslidedown.vi.yaml +++ b/arch/inst/V/vslidedown.vi.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vslidedown.vx.yaml b/arch/inst/V/vslidedown.vx.yaml index 166f4e35e3..ddf46d09c8 100644 --- a/arch/inst/V/vslidedown.vx.yaml +++ b/arch/inst/V/vslidedown.vx.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vslideup.vi.yaml b/arch/inst/V/vslideup.vi.yaml index 21fd76ea23..4733924272 100644 --- a/arch/inst/V/vslideup.vi.yaml +++ b/arch/inst/V/vslideup.vi.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vslideup.vx.yaml b/arch/inst/V/vslideup.vx.yaml index 2e0726e1e5..d09f3e4c77 100644 --- a/arch/inst/V/vslideup.vx.yaml +++ b/arch/inst/V/vslideup.vx.yaml @@ -79,4 +79,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsll.vi.yaml b/arch/inst/V/vsll.vi.yaml index 496e0d8e7a..031914f77b 100644 --- a/arch/inst/V/vsll.vi.yaml +++ b/arch/inst/V/vsll.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsll.vv.yaml b/arch/inst/V/vsll.vv.yaml index aaad74023b..9fd5428b0b 100644 --- a/arch/inst/V/vsll.vv.yaml +++ b/arch/inst/V/vsll.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsll.vx.yaml b/arch/inst/V/vsll.vx.yaml index 96ba918b8b..ccba1081af 100644 --- a/arch/inst/V/vsll.vx.yaml +++ b/arch/inst/V/vsll.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsm.v.yaml b/arch/inst/V/vsm.v.yaml index 0bc2b68a3a..77a7b3b5a4 100644 --- a/arch/inst/V/vsm.v.yaml +++ b/arch/inst/V/vsm.v.yaml @@ -40,4 +40,4 @@ sail(): | process_vm(vd_or_vs3, rs1, num_elem, evl, op) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsmul.vv.yaml b/arch/inst/V/vsmul.vv.yaml index 11a0d07d4e..442d7d2a3b 100644 --- a/arch/inst/V/vsmul.vv.yaml +++ b/arch/inst/V/vsmul.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsmul.vx.yaml b/arch/inst/V/vsmul.vx.yaml index c5a8d99505..1b939df06b 100644 --- a/arch/inst/V/vsmul.vx.yaml +++ b/arch/inst/V/vsmul.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsoxei16.v.yaml b/arch/inst/V/vsoxei16.v.yaml index 8515e1c95e..998968b0ea 100644 --- a/arch/inst/V/vsoxei16.v.yaml +++ b/arch/inst/V/vsoxei16.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsoxei32.v.yaml b/arch/inst/V/vsoxei32.v.yaml index 808b90be39..50936f509c 100644 --- a/arch/inst/V/vsoxei32.v.yaml +++ b/arch/inst/V/vsoxei32.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsoxei64.v.yaml b/arch/inst/V/vsoxei64.v.yaml index 7460c180c8..5f195ad8fe 100644 --- a/arch/inst/V/vsoxei64.v.yaml +++ b/arch/inst/V/vsoxei64.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsoxei8.v.yaml b/arch/inst/V/vsoxei8.v.yaml index ca5866d825..4cb7708565 100644 --- a/arch/inst/V/vsoxei8.v.yaml +++ b/arch/inst/V/vsoxei8.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsra.vi.yaml b/arch/inst/V/vsra.vi.yaml index 18882c7653..df504cdc4d 100644 --- a/arch/inst/V/vsra.vi.yaml +++ b/arch/inst/V/vsra.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsra.vv.yaml b/arch/inst/V/vsra.vv.yaml index a1cb50f549..1c0faff3fc 100644 --- a/arch/inst/V/vsra.vv.yaml +++ b/arch/inst/V/vsra.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsra.vx.yaml b/arch/inst/V/vsra.vx.yaml index 0277e81663..6ff756f0e3 100644 --- a/arch/inst/V/vsra.vx.yaml +++ b/arch/inst/V/vsra.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsrl.vi.yaml b/arch/inst/V/vsrl.vi.yaml index 21ef7fbcbd..6c8abf547e 100644 --- a/arch/inst/V/vsrl.vi.yaml +++ b/arch/inst/V/vsrl.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsrl.vv.yaml b/arch/inst/V/vsrl.vv.yaml index 28ade8dcc5..82fb8c4ff3 100644 --- a/arch/inst/V/vsrl.vv.yaml +++ b/arch/inst/V/vsrl.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsrl.vx.yaml b/arch/inst/V/vsrl.vx.yaml index 07e2552fa2..c97591c1ff 100644 --- a/arch/inst/V/vsrl.vx.yaml +++ b/arch/inst/V/vsrl.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsse16.v.yaml b/arch/inst/V/vsse16.v.yaml index 0dde83ae85..e60cb594bd 100644 --- a/arch/inst/V/vsse16.v.yaml +++ b/arch/inst/V/vsse16.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vssseg(nf_int, vm, vs3, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsse32.v.yaml b/arch/inst/V/vsse32.v.yaml index 7b41aaeccf..af953006a6 100644 --- a/arch/inst/V/vsse32.v.yaml +++ b/arch/inst/V/vsse32.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vssseg(nf_int, vm, vs3, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsse64.v.yaml b/arch/inst/V/vsse64.v.yaml index 1672677554..a3892bb04c 100644 --- a/arch/inst/V/vsse64.v.yaml +++ b/arch/inst/V/vsse64.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vssseg(nf_int, vm, vs3, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsse8.v.yaml b/arch/inst/V/vsse8.v.yaml index fb481884c4..9993ec1244 100644 --- a/arch/inst/V/vsse8.v.yaml +++ b/arch/inst/V/vsse8.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vssseg(nf_int, vm, vs3, load_width_bytes, rs1, rs2, EMUL_pow, num_elem) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssra.vi.yaml b/arch/inst/V/vssra.vi.yaml index 00821dcdd1..31942d4fb8 100644 --- a/arch/inst/V/vssra.vi.yaml +++ b/arch/inst/V/vssra.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssra.vv.yaml b/arch/inst/V/vssra.vv.yaml index c395a8869e..068bbc413c 100644 --- a/arch/inst/V/vssra.vv.yaml +++ b/arch/inst/V/vssra.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssra.vx.yaml b/arch/inst/V/vssra.vx.yaml index c606f90fbb..4cc9d95d8c 100644 --- a/arch/inst/V/vssra.vx.yaml +++ b/arch/inst/V/vssra.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssrl.vi.yaml b/arch/inst/V/vssrl.vi.yaml index c5404576af..83b876c0b0 100644 --- a/arch/inst/V/vssrl.vi.yaml +++ b/arch/inst/V/vssrl.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssrl.vv.yaml b/arch/inst/V/vssrl.vv.yaml index ca040dae73..e20ff53036 100644 --- a/arch/inst/V/vssrl.vv.yaml +++ b/arch/inst/V/vssrl.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssrl.vx.yaml b/arch/inst/V/vssrl.vx.yaml index fa989c42b5..22d3ff34fb 100644 --- a/arch/inst/V/vssrl.vx.yaml +++ b/arch/inst/V/vssrl.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssub.vv.yaml b/arch/inst/V/vssub.vv.yaml index c076a6b558..9bcbe41015 100644 --- a/arch/inst/V/vssub.vv.yaml +++ b/arch/inst/V/vssub.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssub.vx.yaml b/arch/inst/V/vssub.vx.yaml index f5a1812489..1df0eec573 100644 --- a/arch/inst/V/vssub.vx.yaml +++ b/arch/inst/V/vssub.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssubu.vv.yaml b/arch/inst/V/vssubu.vv.yaml index 7cae1a9711..9f3bdb2dbf 100644 --- a/arch/inst/V/vssubu.vv.yaml +++ b/arch/inst/V/vssubu.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vssubu.vx.yaml b/arch/inst/V/vssubu.vx.yaml index 7b8a8f7943..edabcd0ec3 100644 --- a/arch/inst/V/vssubu.vx.yaml +++ b/arch/inst/V/vssubu.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsub.vv.yaml b/arch/inst/V/vsub.vv.yaml index 3c84dc7df3..cf87c4e611 100644 --- a/arch/inst/V/vsub.vv.yaml +++ b/arch/inst/V/vsub.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsub.vx.yaml b/arch/inst/V/vsub.vx.yaml index 78cedbdcf9..7a9454b253 100644 --- a/arch/inst/V/vsub.vx.yaml +++ b/arch/inst/V/vsub.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsuxei16.v.yaml b/arch/inst/V/vsuxei16.v.yaml index 5fb6c7b2ba..a1e9165125 100644 --- a/arch/inst/V/vsuxei16.v.yaml +++ b/arch/inst/V/vsuxei16.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsuxei32.v.yaml b/arch/inst/V/vsuxei32.v.yaml index f7642a5c36..5d6a50c1dd 100644 --- a/arch/inst/V/vsuxei32.v.yaml +++ b/arch/inst/V/vsuxei32.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsuxei64.v.yaml b/arch/inst/V/vsuxei64.v.yaml index 73ee98b06b..c3483cfb8e 100644 --- a/arch/inst/V/vsuxei64.v.yaml +++ b/arch/inst/V/vsuxei64.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vsuxei8.v.yaml b/arch/inst/V/vsuxei8.v.yaml index 83903bf39c..5ce6c8010c 100644 --- a/arch/inst/V/vsuxei8.v.yaml +++ b/arch/inst/V/vsuxei8.v.yaml @@ -46,4 +46,4 @@ sail(): | process_vsxseg(nf_int, vm, vs3, EEW_index_bytes, EEW_data_bytes, EMUL_index_pow, EMUL_data_pow, rs1, vs2, num_elem, 1) } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwadd.vv.yaml b/arch/inst/V/vwadd.vv.yaml index 7b4606106f..a518dfe1e3 100644 --- a/arch/inst/V/vwadd.vv.yaml +++ b/arch/inst/V/vwadd.vv.yaml @@ -75,4 +75,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwadd.vx.yaml b/arch/inst/V/vwadd.vx.yaml index 58f01691eb..4815d6bd49 100644 --- a/arch/inst/V/vwadd.vx.yaml +++ b/arch/inst/V/vwadd.vx.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwadd.wv.yaml b/arch/inst/V/vwadd.wv.yaml index c2ec0fb7f1..fe2d12905d 100644 --- a/arch/inst/V/vwadd.wv.yaml +++ b/arch/inst/V/vwadd.wv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwadd.wx.yaml b/arch/inst/V/vwadd.wx.yaml index d89d68a98c..80ca180937 100644 --- a/arch/inst/V/vwadd.wx.yaml +++ b/arch/inst/V/vwadd.wx.yaml @@ -70,4 +70,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwaddu.vv.yaml b/arch/inst/V/vwaddu.vv.yaml index 44b94b9aa7..f8a3647424 100644 --- a/arch/inst/V/vwaddu.vv.yaml +++ b/arch/inst/V/vwaddu.vv.yaml @@ -75,4 +75,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwaddu.vx.yaml b/arch/inst/V/vwaddu.vx.yaml index 794e04fea5..b440581b9b 100644 --- a/arch/inst/V/vwaddu.vx.yaml +++ b/arch/inst/V/vwaddu.vx.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwaddu.wv.yaml b/arch/inst/V/vwaddu.wv.yaml index 8ee58a31fd..5802035b03 100644 --- a/arch/inst/V/vwaddu.wv.yaml +++ b/arch/inst/V/vwaddu.wv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwaddu.wx.yaml b/arch/inst/V/vwaddu.wx.yaml index 50879199a0..4b60b7a358 100644 --- a/arch/inst/V/vwaddu.wx.yaml +++ b/arch/inst/V/vwaddu.wx.yaml @@ -70,4 +70,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmacc.vv.yaml b/arch/inst/V/vwmacc.vv.yaml index 16de150f65..dde63bb025 100644 --- a/arch/inst/V/vwmacc.vv.yaml +++ b/arch/inst/V/vwmacc.vv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmacc.vx.yaml b/arch/inst/V/vwmacc.vx.yaml index 98fed0f414..7d2934dd07 100644 --- a/arch/inst/V/vwmacc.vx.yaml +++ b/arch/inst/V/vwmacc.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmaccsu.vv.yaml b/arch/inst/V/vwmaccsu.vv.yaml index 34a35d0c25..2d11ccbe2f 100644 --- a/arch/inst/V/vwmaccsu.vv.yaml +++ b/arch/inst/V/vwmaccsu.vv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmaccsu.vx.yaml b/arch/inst/V/vwmaccsu.vx.yaml index 733ec03171..9e9e14d1e3 100644 --- a/arch/inst/V/vwmaccsu.vx.yaml +++ b/arch/inst/V/vwmaccsu.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmaccu.vv.yaml b/arch/inst/V/vwmaccu.vv.yaml index 441c677e2b..4b483b666d 100644 --- a/arch/inst/V/vwmaccu.vv.yaml +++ b/arch/inst/V/vwmaccu.vv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmaccu.vx.yaml b/arch/inst/V/vwmaccu.vx.yaml index 7a597d0b4b..0907f3d04b 100644 --- a/arch/inst/V/vwmaccu.vx.yaml +++ b/arch/inst/V/vwmaccu.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmaccus.vx.yaml b/arch/inst/V/vwmaccus.vx.yaml index a01547215f..a92c90b8ad 100644 --- a/arch/inst/V/vwmaccus.vx.yaml +++ b/arch/inst/V/vwmaccus.vx.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmul.vv.yaml b/arch/inst/V/vwmul.vv.yaml index ae40b6770a..6828bc51a7 100644 --- a/arch/inst/V/vwmul.vv.yaml +++ b/arch/inst/V/vwmul.vv.yaml @@ -75,4 +75,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmul.vx.yaml b/arch/inst/V/vwmul.vx.yaml index b45ca13580..e5f6221af9 100644 --- a/arch/inst/V/vwmul.vx.yaml +++ b/arch/inst/V/vwmul.vx.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmulsu.vv.yaml b/arch/inst/V/vwmulsu.vv.yaml index 39031de353..f61d2e1d4e 100644 --- a/arch/inst/V/vwmulsu.vv.yaml +++ b/arch/inst/V/vwmulsu.vv.yaml @@ -75,4 +75,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmulsu.vx.yaml b/arch/inst/V/vwmulsu.vx.yaml index c94b439703..7610755d71 100644 --- a/arch/inst/V/vwmulsu.vx.yaml +++ b/arch/inst/V/vwmulsu.vx.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmulu.vv.yaml b/arch/inst/V/vwmulu.vv.yaml index 105c653e1f..29a46553cd 100644 --- a/arch/inst/V/vwmulu.vv.yaml +++ b/arch/inst/V/vwmulu.vv.yaml @@ -75,4 +75,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwmulu.vx.yaml b/arch/inst/V/vwmulu.vx.yaml index c0c6201f25..198325d6a0 100644 --- a/arch/inst/V/vwmulu.vx.yaml +++ b/arch/inst/V/vwmulu.vx.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwredsum.vs.yaml b/arch/inst/V/vwredsum.vs.yaml index 8184f7f742..ebdc168511 100644 --- a/arch/inst/V/vwredsum.vs.yaml +++ b/arch/inst/V/vwredsum.vs.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwredsumu.vs.yaml b/arch/inst/V/vwredsumu.vs.yaml index 49e22c3fe6..2b71945e79 100644 --- a/arch/inst/V/vwredsumu.vs.yaml +++ b/arch/inst/V/vwredsumu.vs.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwsub.vv.yaml b/arch/inst/V/vwsub.vv.yaml index bd912d8a42..cf7364a716 100644 --- a/arch/inst/V/vwsub.vv.yaml +++ b/arch/inst/V/vwsub.vv.yaml @@ -75,4 +75,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwsub.vx.yaml b/arch/inst/V/vwsub.vx.yaml index 99bdaac7ea..fc68b2df60 100644 --- a/arch/inst/V/vwsub.vx.yaml +++ b/arch/inst/V/vwsub.vx.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwsub.wv.yaml b/arch/inst/V/vwsub.wv.yaml index f1825c4dd1..85dff15b9b 100644 --- a/arch/inst/V/vwsub.wv.yaml +++ b/arch/inst/V/vwsub.wv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwsub.wx.yaml b/arch/inst/V/vwsub.wx.yaml index 00fc49ba80..084fefe82c 100644 --- a/arch/inst/V/vwsub.wx.yaml +++ b/arch/inst/V/vwsub.wx.yaml @@ -70,4 +70,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwsubu.vv.yaml b/arch/inst/V/vwsubu.vv.yaml index 9f6c2815b0..94dfdd8e7b 100644 --- a/arch/inst/V/vwsubu.vv.yaml +++ b/arch/inst/V/vwsubu.vv.yaml @@ -75,4 +75,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwsubu.vx.yaml b/arch/inst/V/vwsubu.vx.yaml index 9d38972ea1..b268cb5a68 100644 --- a/arch/inst/V/vwsubu.vx.yaml +++ b/arch/inst/V/vwsubu.vx.yaml @@ -74,4 +74,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwsubu.wv.yaml b/arch/inst/V/vwsubu.wv.yaml index 1f9d0cb495..88483fed81 100644 --- a/arch/inst/V/vwsubu.wv.yaml +++ b/arch/inst/V/vwsubu.wv.yaml @@ -71,4 +71,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vwsubu.wx.yaml b/arch/inst/V/vwsubu.wx.yaml index 4511174ca0..fa837883df 100644 --- a/arch/inst/V/vwsubu.wx.yaml +++ b/arch/inst/V/vwsubu.wx.yaml @@ -70,4 +70,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vxor.vi.yaml b/arch/inst/V/vxor.vi.yaml index d7f6556edf..dd652d0c3b 100644 --- a/arch/inst/V/vxor.vi.yaml +++ b/arch/inst/V/vxor.vi.yaml @@ -93,4 +93,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vxor.vv.yaml b/arch/inst/V/vxor.vv.yaml index 3043dadea6..9238fb0b82 100644 --- a/arch/inst/V/vxor.vv.yaml +++ b/arch/inst/V/vxor.vv.yaml @@ -126,4 +126,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vxor.vx.yaml b/arch/inst/V/vxor.vx.yaml index 5f625db19d..cdf6d0251f 100644 --- a/arch/inst/V/vxor.vx.yaml +++ b/arch/inst/V/vxor.vx.yaml @@ -109,4 +109,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vzext.vf2.yaml b/arch/inst/V/vzext.vf2.yaml index edd6a3857d..03cd4a14d1 100644 --- a/arch/inst/V/vzext.vf2.yaml +++ b/arch/inst/V/vzext.vf2.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vzext.vf4.yaml b/arch/inst/V/vzext.vf4.yaml index 039912da79..1c07f1850f 100644 --- a/arch/inst/V/vzext.vf4.yaml +++ b/arch/inst/V/vzext.vf4.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/V/vzext.vf8.yaml b/arch/inst/V/vzext.vf8.yaml index ac1363c9d1..b67e8f8d4e 100644 --- a/arch/inst/V/vzext.vf8.yaml +++ b/arch/inst/V/vzext.vf8.yaml @@ -67,4 +67,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoadd.b.yaml b/arch/inst/Zabha/amoadd.b.yaml index 088efaa7cb..84beae9b7b 100644 --- a/arch/inst/Zabha/amoadd.b.yaml +++ b/arch/inst/Zabha/amoadd.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoadd.h.yaml b/arch/inst/Zabha/amoadd.h.yaml index f709160212..fad9591f9b 100644 --- a/arch/inst/Zabha/amoadd.h.yaml +++ b/arch/inst/Zabha/amoadd.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoand.b.yaml b/arch/inst/Zabha/amoand.b.yaml index 69f0bfe454..31592f4ac2 100644 --- a/arch/inst/Zabha/amoand.b.yaml +++ b/arch/inst/Zabha/amoand.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoand.h.yaml b/arch/inst/Zabha/amoand.h.yaml index 1373e63975..7317b3f16c 100644 --- a/arch/inst/Zabha/amoand.h.yaml +++ b/arch/inst/Zabha/amoand.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amomax.b.yaml b/arch/inst/Zabha/amomax.b.yaml index fe7bc26d27..478036840f 100644 --- a/arch/inst/Zabha/amomax.b.yaml +++ b/arch/inst/Zabha/amomax.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amomax.h.yaml b/arch/inst/Zabha/amomax.h.yaml index cf989093d5..0d54a461a2 100644 --- a/arch/inst/Zabha/amomax.h.yaml +++ b/arch/inst/Zabha/amomax.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amomaxu.b.yaml b/arch/inst/Zabha/amomaxu.b.yaml index 3b78f8db5f..695c3eaaff 100644 --- a/arch/inst/Zabha/amomaxu.b.yaml +++ b/arch/inst/Zabha/amomaxu.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amomaxu.h.yaml b/arch/inst/Zabha/amomaxu.h.yaml index 3d61d0f9ca..7ed5e015bf 100644 --- a/arch/inst/Zabha/amomaxu.h.yaml +++ b/arch/inst/Zabha/amomaxu.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amomin.b.yaml b/arch/inst/Zabha/amomin.b.yaml index 0e6ed0f1ad..bf6e0e5e0b 100644 --- a/arch/inst/Zabha/amomin.b.yaml +++ b/arch/inst/Zabha/amomin.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amomin.h.yaml b/arch/inst/Zabha/amomin.h.yaml index 914f0a72cd..391d50e333 100644 --- a/arch/inst/Zabha/amomin.h.yaml +++ b/arch/inst/Zabha/amomin.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amominu.b.yaml b/arch/inst/Zabha/amominu.b.yaml index a1fb196aa3..5565c3f63a 100644 --- a/arch/inst/Zabha/amominu.b.yaml +++ b/arch/inst/Zabha/amominu.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amominu.h.yaml b/arch/inst/Zabha/amominu.h.yaml index cf38aea512..4dbe241e6f 100644 --- a/arch/inst/Zabha/amominu.h.yaml +++ b/arch/inst/Zabha/amominu.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoor.b.yaml b/arch/inst/Zabha/amoor.b.yaml index 12eb2f9119..452e99a04d 100644 --- a/arch/inst/Zabha/amoor.b.yaml +++ b/arch/inst/Zabha/amoor.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoor.h.yaml b/arch/inst/Zabha/amoor.h.yaml index 55842132f2..9caacff857 100644 --- a/arch/inst/Zabha/amoor.h.yaml +++ b/arch/inst/Zabha/amoor.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoswap.b.yaml b/arch/inst/Zabha/amoswap.b.yaml index c65547546c..078f6ea154 100644 --- a/arch/inst/Zabha/amoswap.b.yaml +++ b/arch/inst/Zabha/amoswap.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoswap.h.yaml b/arch/inst/Zabha/amoswap.h.yaml index 626c1999dc..8a78a12ad9 100644 --- a/arch/inst/Zabha/amoswap.h.yaml +++ b/arch/inst/Zabha/amoswap.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoxor.b.yaml b/arch/inst/Zabha/amoxor.b.yaml index 877da660a0..a394fb2b14 100644 --- a/arch/inst/Zabha/amoxor.b.yaml +++ b/arch/inst/Zabha/amoxor.b.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zabha/amoxor.h.yaml b/arch/inst/Zabha/amoxor.h.yaml index ad33b40154..a3990d474e 100644 --- a/arch/inst/Zabha/amoxor.h.yaml +++ b/arch/inst/Zabha/amoxor.h.yaml @@ -123,4 +123,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zalasr/lb.aq.yaml b/arch/inst/Zalasr/lb.aq.yaml index 84b6c2fbb3..7c17676aab 100644 --- a/arch/inst/Zalasr/lb.aq.yaml +++ b/arch/inst/Zalasr/lb.aq.yaml @@ -56,4 +56,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zalasr/ld.aq.yaml b/arch/inst/Zalasr/ld.aq.yaml index 91f4d052f5..31d656dd26 100644 --- a/arch/inst/Zalasr/ld.aq.yaml +++ b/arch/inst/Zalasr/ld.aq.yaml @@ -56,4 +56,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zalasr/lh.aq.yaml b/arch/inst/Zalasr/lh.aq.yaml index 4c87299b0e..9b11dd03c1 100644 --- a/arch/inst/Zalasr/lh.aq.yaml +++ b/arch/inst/Zalasr/lh.aq.yaml @@ -56,4 +56,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zalasr/lw.aq.yaml b/arch/inst/Zalasr/lw.aq.yaml index ad5a2c49d0..9de963fad1 100644 --- a/arch/inst/Zalasr/lw.aq.yaml +++ b/arch/inst/Zalasr/lw.aq.yaml @@ -56,4 +56,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zalasr/sb.rl.yaml b/arch/inst/Zalasr/sb.rl.yaml index 498f6846a0..641ed61822 100644 --- a/arch/inst/Zalasr/sb.rl.yaml +++ b/arch/inst/Zalasr/sb.rl.yaml @@ -71,4 +71,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zalasr/sd.rl.yaml b/arch/inst/Zalasr/sd.rl.yaml index 20db4637cb..acfccfbd99 100644 --- a/arch/inst/Zalasr/sd.rl.yaml +++ b/arch/inst/Zalasr/sd.rl.yaml @@ -71,4 +71,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zalasr/sh.rl.yaml b/arch/inst/Zalasr/sh.rl.yaml index 791d698b20..c37819c4a0 100644 --- a/arch/inst/Zalasr/sh.rl.yaml +++ b/arch/inst/Zalasr/sh.rl.yaml @@ -71,4 +71,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zalasr/sw.rl.yaml b/arch/inst/Zalasr/sw.rl.yaml index 671717424d..384b178400 100644 --- a/arch/inst/Zalasr/sw.rl.yaml +++ b/arch/inst/Zalasr/sw.rl.yaml @@ -71,4 +71,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zbkb/brev8.yaml b/arch/inst/Zbkb/brev8.yaml index e9a17d0a5e..5349926620 100644 --- a/arch/inst/Zbkb/brev8.yaml +++ b/arch/inst/Zbkb/brev8.yaml @@ -43,4 +43,4 @@ sail(): | }; X(rd) = result; -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zbkb/unzip.yaml b/arch/inst/Zbkb/unzip.yaml index c88e956d62..8027c7f437 100644 --- a/arch/inst/Zbkb/unzip.yaml +++ b/arch/inst/Zbkb/unzip.yaml @@ -44,4 +44,4 @@ sail(): | X(rd)[i+xlen/2] = X(rs1)[2*i+1]; } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zbkb/zip.yaml b/arch/inst/Zbkb/zip.yaml index 5206d44297..e6fc45d70f 100644 --- a/arch/inst/Zbkb/zip.yaml +++ b/arch/inst/Zbkb/zip.yaml @@ -44,4 +44,4 @@ sail(): | X(rd)[2*i+1] = X(rs1)[i+xlen/2]; } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zbkx/xperm4.yaml b/arch/inst/Zbkx/xperm4.yaml index d2a787e22b..d89d8fe7b9 100644 --- a/arch/inst/Zbkx/xperm4.yaml +++ b/arch/inst/Zbkx/xperm4.yaml @@ -56,4 +56,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zbkx/xperm8.yaml b/arch/inst/Zbkx/xperm8.yaml index f05a1b39b2..e5db46b73c 100644 --- a/arch/inst/Zbkx/xperm8.yaml +++ b/arch/inst/Zbkx/xperm8.yaml @@ -56,4 +56,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.lbu.yaml b/arch/inst/Zcb/c.lbu.yaml index 57099dc7d8..ce92a8cb23 100644 --- a/arch/inst/Zcb/c.lbu.yaml +++ b/arch/inst/Zcb/c.lbu.yaml @@ -67,4 +67,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.lh.yaml b/arch/inst/Zcb/c.lh.yaml index 5b9f87e872..c4bc2a899b 100644 --- a/arch/inst/Zcb/c.lh.yaml +++ b/arch/inst/Zcb/c.lh.yaml @@ -68,4 +68,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.lhu.yaml b/arch/inst/Zcb/c.lhu.yaml index 175d182f11..b25497193b 100644 --- a/arch/inst/Zcb/c.lhu.yaml +++ b/arch/inst/Zcb/c.lhu.yaml @@ -68,4 +68,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.mul.yaml b/arch/inst/Zcb/c.mul.yaml index 4545bfad7b..5016ef7d17 100644 --- a/arch/inst/Zcb/c.mul.yaml +++ b/arch/inst/Zcb/c.mul.yaml @@ -46,4 +46,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.not.yaml b/arch/inst/Zcb/c.not.yaml index 0e299c5a63..681112800b 100644 --- a/arch/inst/Zcb/c.not.yaml +++ b/arch/inst/Zcb/c.not.yaml @@ -40,4 +40,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.sext.b.yaml b/arch/inst/Zcb/c.sext.b.yaml index ef21927b79..2c863ac885 100644 --- a/arch/inst/Zcb/c.sext.b.yaml +++ b/arch/inst/Zcb/c.sext.b.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.sext.h.yaml b/arch/inst/Zcb/c.sext.h.yaml index a26e90a374..48264bbed9 100644 --- a/arch/inst/Zcb/c.sext.h.yaml +++ b/arch/inst/Zcb/c.sext.h.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.zext.b.yaml b/arch/inst/Zcb/c.zext.b.yaml index ff2383a962..e1a49bb29b 100644 --- a/arch/inst/Zcb/c.zext.b.yaml +++ b/arch/inst/Zcb/c.zext.b.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.zext.h.yaml b/arch/inst/Zcb/c.zext.h.yaml index e22c7e604a..1602f992c9 100644 --- a/arch/inst/Zcb/c.zext.h.yaml +++ b/arch/inst/Zcb/c.zext.h.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zcb/c.zext.w.yaml b/arch/inst/Zcb/c.zext.w.yaml index 980cad9605..d394b2cb11 100644 --- a/arch/inst/Zcb/c.zext.w.yaml +++ b/arch/inst/Zcb/c.zext.w.yaml @@ -53,4 +53,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zfh/fcvt.h.s.yaml b/arch/inst/Zfh/fcvt.h.s.yaml index 409cd8916e..a53670ae72 100644 --- a/arch/inst/Zfh/fcvt.h.s.yaml +++ b/arch/inst/Zfh/fcvt.h.s.yaml @@ -85,4 +85,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zfh/fcvt.s.h.yaml b/arch/inst/Zfh/fcvt.s.h.yaml index 7705f78f68..6469a04604 100644 --- a/arch/inst/Zfh/fcvt.s.h.yaml +++ b/arch/inst/Zfh/fcvt.s.h.yaml @@ -82,4 +82,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zfh/flh.yaml b/arch/inst/Zfh/flh.yaml index ef06fcc25b..3c04510b41 100644 --- a/arch/inst/Zfh/flh.yaml +++ b/arch/inst/Zfh/flh.yaml @@ -71,4 +71,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zfh/fmv.h.x.yaml b/arch/inst/Zfh/fmv.h.x.yaml index cd36ba56d2..0fdefca5ae 100644 --- a/arch/inst/Zfh/fmv.h.x.yaml +++ b/arch/inst/Zfh/fmv.h.x.yaml @@ -43,4 +43,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zfh/fmv.x.h.yaml b/arch/inst/Zfh/fmv.x.h.yaml index 57038f7c25..cd11bd00ba 100644 --- a/arch/inst/Zfh/fmv.x.h.yaml +++ b/arch/inst/Zfh/fmv.x.h.yaml @@ -44,4 +44,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zfh/fsh.yaml b/arch/inst/Zfh/fsh.yaml index 404fc4b01a..057597610b 100644 --- a/arch/inst/Zfh/fsh.yaml +++ b/arch/inst/Zfh/fsh.yaml @@ -82,4 +82,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zicond/czero.eqz.yaml b/arch/inst/Zicond/czero.eqz.yaml index 76aac8692f..2502df7da0 100644 --- a/arch/inst/Zicond/czero.eqz.yaml +++ b/arch/inst/Zicond/czero.eqz.yaml @@ -42,4 +42,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zicond/czero.nez.yaml b/arch/inst/Zicond/czero.nez.yaml index 799934e036..e83dcdb3b6 100644 --- a/arch/inst/Zicond/czero.nez.yaml +++ b/arch/inst/Zicond/czero.nez.yaml @@ -42,4 +42,4 @@ sail(): | RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zicsr/csrrs.yaml b/arch/inst/Zicsr/csrrs.yaml index 21ba889a76..e5171f141e 100644 --- a/arch/inst/Zicsr/csrrs.yaml +++ b/arch/inst/Zicsr/csrrs.yaml @@ -73,4 +73,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zicsr/csrrw.yaml b/arch/inst/Zicsr/csrrw.yaml index 386ef7d51f..c379a802a8 100644 --- a/arch/inst/Zicsr/csrrw.yaml +++ b/arch/inst/Zicsr/csrrw.yaml @@ -70,4 +70,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zicsr/csrrwi.yaml b/arch/inst/Zicsr/csrrwi.yaml index 4e25154658..f3290fd3c0 100644 --- a/arch/inst/Zicsr/csrrwi.yaml +++ b/arch/inst/Zicsr/csrrwi.yaml @@ -68,4 +68,4 @@ sail(): | } } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd diff --git a/arch/inst/Zifencei/fence.i.yaml b/arch/inst/Zifencei/fence.i.yaml index 2ce3afe1d0..3035d1843a 100644 --- a/arch/inst/Zifencei/fence.i.yaml +++ b/arch/inst/Zifencei/fence.i.yaml @@ -57,4 +57,4 @@ operation(): | sail(): | { /* __barrier(Barrier_RISCV_i); */ RETIRE_SUCCESS } -# SPDX-SnippetEnd \ No newline at end of file +# SPDX-SnippetEnd From d51cb121bc2c1ba502d13869b7a36ba710998db1 Mon Sep 17 00:00:00 2001 From: Kevin Broch <86068473+kbroch-rivosinc@users.noreply.github.com> Date: Tue, 1 Apr 2025 16:45:02 -0700 Subject: [PATCH 012/207] task: update pre-commit hook repo versions (#586) Also ran `pre-commit run --all-files` and new version of clang-fmt changed one file --- .pre-commit-config.yaml | 4 ++-- backends/cpp_hart_gen/cpp/include/udb/bits.hpp | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 95da7e8c85..cb92d46317 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -30,7 +30,7 @@ repos: exclude: schemas/json-schema-draft-07.json - repo: https://github.com/python-jsonschema/check-jsonschema - rev: 0.31.3 + rev: 0.32.1 hooks: - id: check-jsonschema alias: check-jsonschema-inst @@ -59,7 +59,7 @@ repos: # args: ["--schemafile", "schemas/manual_version_schema.json"] - repo: https://github.com/pre-commit/mirrors-clang-format - rev: "v18.1.3" + rev: "v20.1.0" hooks: - id: clang-format types_or: [c++, c] diff --git a/backends/cpp_hart_gen/cpp/include/udb/bits.hpp b/backends/cpp_hart_gen/cpp/include/udb/bits.hpp index 3cfebbbd4b..330a8dfaab 100644 --- a/backends/cpp_hart_gen/cpp/include/udb/bits.hpp +++ b/backends/cpp_hart_gen/cpp/include/udb/bits.hpp @@ -641,11 +641,11 @@ namespace udb { constexpr _Bits::value, Signed && _Signed> operator op( \ const _Bits &o) const { \ if constexpr (M > N) { \ - return _Bits < constmax::value, \ - Signed && _Signed > {_Bits{get()}.get() op o.get()}; \ + return _Bits::value, Signed && _Signed>{ \ + _Bits{get()}.get() op o.get()}; \ } else { \ - return _Bits < constmax::value, \ - Signed && _Signed > {get() op _Bits{o.get()}.get()}; \ + return _Bits::value, Signed && _Signed>{ \ + get() op _Bits{o.get()}.get()}; \ } \ } \ \ @@ -1135,8 +1135,8 @@ struct fmt::formatter> { } template - auto format(const udb::_Bits &c, - FormatContext &ctx) -> decltype(ctx.out()) { + auto format(const udb::_Bits &c, FormatContext &ctx) + -> decltype(ctx.out()) { fmt::detail::handle_dynamic_spec( specs_.width, specs_.width_ref, ctx); int base = 10; From e41d0014ddd958b7ae730d5cbd3fa4ad0bfc1494 Mon Sep 17 00:00:00 2001 From: ayosher Date: Thu, 3 Apr 2025 20:52:20 +0200 Subject: [PATCH 013/207] Xqci Extension v0.9 (#582) * Xqci(Xqcibm,Xqcicli,Xqcilo) extensions: fix sext() IDL function calls for several instructions: qc.e.lb,qc.e.lh,qc.ext,qc.extd,qc.extdpr,qc.extdprh,qc.extdr,qc.lieq Signed-off-by: Albert Yosher * Xqci (Xqcibm) extension: Fix IDL code and description increasing shift to 6 bit for all dual-register bitfield extraction instructions, where shift and width of bitfield are in register Signed-off-by: Albert Yosher * Xqci (Xqcia) extension: fix wrong mantissa bit selection for qc.norm, qc.normu and qc.normeu instructions Signed-off-by: Albert Yosher * Xqci (Xqcia) extension: fix wrong exponent calculation for qc.normeu instructions Signed-off-by: Albert Yosher * Xqci (Xqcilsm) extension: Fix IDL code and description of qc.setwm instruction to state that number of words written 0..31. Signed-off-by: Albert Yosher * Xqci (Xqciint) extension: Fix IDL code for Smdbltrp and Smrnmi spec compatibility for qc.c.mret and qc.c.mnret instructions Signed-off-by: Albert Yosher --------- Signed-off-by: Albert Yosher --- arch_overlay/qc_iu/ext/Xqci.yaml | 44 +++++++++++++++++++ arch_overlay/qc_iu/ext/Xqcia.yaml | 13 ++++++ arch_overlay/qc_iu/ext/Xqcibm.yaml | 17 +++++++ arch_overlay/qc_iu/ext/Xqcicli.yaml | 12 +++++ arch_overlay/qc_iu/ext/Xqciint.yaml | 13 ++++++ arch_overlay/qc_iu/ext/Xqcilo.yaml | 12 +++++ arch_overlay/qc_iu/ext/Xqcilsm.yaml | 12 +++++ arch_overlay/qc_iu/inst/Xqci/qc.c.mnret.yaml | 6 +++ arch_overlay/qc_iu/inst/Xqci/qc.c.mret.yaml | 7 ++- arch_overlay/qc_iu/inst/Xqci/qc.e.lb.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.e.lh.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.ext.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml | 6 +-- arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml | 6 +-- arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml | 6 +-- arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml | 4 +- arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml | 4 +- arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml | 4 +- arch_overlay/qc_iu/inst/Xqci/qc.lieq.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.norm.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.normeu.yaml | 4 +- arch_overlay/qc_iu/inst/Xqci/qc.normu.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.setwm.yaml | 4 +- 24 files changed, 161 insertions(+), 27 deletions(-) diff --git a/arch_overlay/qc_iu/ext/Xqci.yaml b/arch_overlay/qc_iu/ext/Xqci.yaml index ffcc9df08b..782ca84f13 100644 --- a/arch_overlay/qc_iu/ext/Xqci.yaml +++ b/arch_overlay/qc_iu/ext/Xqci.yaml @@ -268,6 +268,50 @@ versions: requires: name: Zca version: ">= 1.0.0" +- version: "0.9.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix IDL code sign extension logic for qc.e.lb and qc.e.lh instructions + - Fix IDL code sign extension logic for qc.ext and qc.extd instructions + - Fix IDL code sign extension logic for qc.extdpr, qc.extdprh and qc.extdr instructions + - Fix IDL code and description increasing shift to 6 bit for qc.extdr and qc.extdur instructions + - Fix IDL code and description increasing shift to 6 bit for qc.extdpr and qc.extdprh instructions + - Fix IDL code and description increasing shift to 6 bit for qc.extdupr and qc.extduprh instructions + - Fix IDL code sign extension logic for qc.lieq instruction + - Fix wrong mantissa bit selection in qc.norm, qc.normu and qc.normeu instructions + - Fix wrong exponent calculation in qc.normeu instruction + - Fix IDL code and description of qc.setwm instruction to state that number of words written 0..31. + - Fix IDL code for Smdbltrp and Smrnmi spec compatibility for qc.c.mret and qc.c.mnret instructions + implies: + - { name: Xqcia, version: "0.6.0" } + - { name: Xqciac, version: "0.3.0" } + - { name: Xqcibi, version: "0.2.0" } + - { name: Xqcibm, version: "0.7.0" } + - { name: Xqcicli, version: "0.3.0" } + - { name: Xqcicm, version: "0.2.0" } + - { name: Xqcics, version: "0.2.0" } + - { name: Xqcicsr, version: "0.3.0" } + - { name: Xqciint, version: "0.6.0" } + - { name: Xqciio, version: "0.1.0" } + - { name: Xqcilb, version: "0.2.0" } + - { name: Xqcili, version: "0.2.0" } + - { name: Xqcilia, version: "0.2.0" } + - { name: Xqcilo, version: "0.3.0" } + - { name: Xqcilsm, version: "0.5.0" } + - { name: Xqcisim, version: "0.2.0" } + - { name: Xqcisls, version: "0.2.0" } + - { name: Xqcisync, version: "0.2.0" } + requires: + name: Zca + version: ">= 1.0.0" description: | The Xqci extension includes a set of instructions that improve RISC-V code density and performance in microontrollers. It fills several gaps: diff --git a/arch_overlay/qc_iu/ext/Xqcia.yaml b/arch_overlay/qc_iu/ext/Xqcia.yaml index 13d4315cae..685999a672 100644 --- a/arch_overlay/qc_iu/ext/Xqcia.yaml +++ b/arch_overlay/qc_iu/ext/Xqcia.yaml @@ -67,6 +67,19 @@ versions: - Fix typos in description of qc.shlsat and qc.shlusat instructions - Fix bug in qc.shlsat that caused wrong IDL code result - Fix clobbering of saturation results in [add|addu|sub]sat instructions +- version: "0.6.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix wrong mantissa bit selection in qc.norm, qc.normu and qc.normeu instructions + - Fix wrong exponent calculation in qc.normeu instruction description: | The Xqcia extension includes eleven instructions to perform integer arithmetic. diff --git a/arch_overlay/qc_iu/ext/Xqcibm.yaml b/arch_overlay/qc_iu/ext/Xqcibm.yaml index 115525e8cf..364a61d0ac 100644 --- a/arch_overlay/qc_iu/ext/Xqcibm.yaml +++ b/arch_overlay/qc_iu/ext/Xqcibm.yaml @@ -88,6 +88,23 @@ versions: - Fix IDL code and description to look correct in PDF for qc.insbhr and qc.insbh instructions - Fix IDL code to to match description for qc.insbr instruction requires: { name: Zca, version: ">= 1.0.0" } +- version: "0.7.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix IDL code sign extension logic for qc.ext and qc.extd instructions + - Fix IDL code sign extension logic for qc.extdpr, qc.extdprh and qc.extdr instructions + - Fix IDL code and description increasing shift to 6 bit for qc.extdr and qc.extdur instructions + - Fix IDL code and description increasing shift to 6 bit for qc.extdpr and qc.extdprh instructions + - Fix IDL code and description increasing shift to 6 bit for qc.extdupr and qc.extduprh instructions + requires: { name: Zca, version: ">= 1.0.0" } description: | The Xqcibm extension includes thirty eight instructions that perform bit manipulation, include insertion and extraction. diff --git a/arch_overlay/qc_iu/ext/Xqcicli.yaml b/arch_overlay/qc_iu/ext/Xqcicli.yaml index 51e965dc4c..792aa5b135 100644 --- a/arch_overlay/qc_iu/ext/Xqcicli.yaml +++ b/arch_overlay/qc_iu/ext/Xqcicli.yaml @@ -28,6 +28,18 @@ versions: email: dhower@qti.qualcomm.com changes: - Add information about instruction formats of each instruction +- version: "0.3.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix IDL code sign extension logic for qc.lieq instruction description: | The Xqcicli extension includes twelve instructions that conditionally load an immediate value. diff --git a/arch_overlay/qc_iu/ext/Xqciint.yaml b/arch_overlay/qc_iu/ext/Xqciint.yaml index a5bddfc06e..4cc76c2a00 100644 --- a/arch_overlay/qc_iu/ext/Xqciint.yaml +++ b/arch_overlay/qc_iu/ext/Xqciint.yaml @@ -80,6 +80,19 @@ versions: changes: - Add stack checks to qc.c.mienter, qc.c.mienter.nest, qc.c.mileaveret requires: { name: Zca, version: ">= 1.0.0" } +- version: "0.6.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix IDL code for Smdbltrp and Smrnmi spec compatibility for qc.c.mret and qc.c.mnret instructions + requires: { name: Zca, version: ">= 1.0.0" } description: | The Xqciint extension includes eleven instructions to accelerate interrupt servicing by performing common actions during ISR prologue/epilogue. diff --git a/arch_overlay/qc_iu/ext/Xqcilo.yaml b/arch_overlay/qc_iu/ext/Xqcilo.yaml index 7a7c8c957c..f368762509 100644 --- a/arch_overlay/qc_iu/ext/Xqcilo.yaml +++ b/arch_overlay/qc_iu/ext/Xqcilo.yaml @@ -29,6 +29,18 @@ versions: changes: - Add information about instruction formats of each instruction requires: { name: Zca, version: ">= 1.0.0" } +- version: "0.3.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix IDL code sign extension logic for qc.e.lb and qc.e.lh instructions description: | The Xqcilo extension includes eight 48-bit load/stores instructions that use an offset larger than can be found in the base RISC-V ISA. diff --git a/arch_overlay/qc_iu/ext/Xqcilsm.yaml b/arch_overlay/qc_iu/ext/Xqcilsm.yaml index 5347c9e7ea..bffdc6549e 100644 --- a/arch_overlay/qc_iu/ext/Xqcilsm.yaml +++ b/arch_overlay/qc_iu/ext/Xqcilsm.yaml @@ -52,6 +52,18 @@ versions: email: dhower@qti.qualcomm.com changes: - Fix encoding of qc.swmi +- version: "0.5.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix IDL code and description of qc.setwm instruction to state that number of words written 0..31. description: | The Xqcilsm extension includes six instructions that transfer multiple values between registers and memory. diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.c.mnret.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.c.mnret.yaml index 818c662f6e..526b86bb4c 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.c.mnret.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.c.mnret.yaml @@ -30,6 +30,12 @@ operation(): | CSR[qc.mcause].sw_write(qc_mcause_val_masked | (1<<28) | (mnpie_val<<26) | (1<<30) | (mnpil_val << 12) | (0xF << 20)); + if (CSR[mnstatus].MNPP != 2'b11) { + CSR[mstatus].MPRV = 0; + if (implemented?(ExtensionName::Smdbltrp)) { + CSR[mstatush].MDT = 1'b0; + } + } if (CSR[mnstatus].MNPP == 2'b00) { set_mode(PrivilegeMode::U); } else if (CSR[mnstatus].MNPP == 2'b01) { diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.c.mret.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.c.mret.yaml index 355a1700d3..67558d13c3 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.c.mret.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.c.mret.yaml @@ -28,11 +28,16 @@ operation(): | Bits<4> mpil_val = (qc_mcause_val >> 16) & 0xF; CSR[mstatus].MIE = mpie_val; CSR[mstatus].MPIE = 1'b1; - CSR[mstatush].MDT = mpdt_val; + if (implemented?(ExtensionName::Smdbltrp)) { + CSR[mstatush].MDT = mpdt_val; + } CSR[qc.mcause].sw_write(qc_mcause_val_masked | (1<<27) | (mpie_val<<26) | (0<<29) | (mpil_val << 12) | (0xF << 16)); if (mpdt_val == 1'b0) { + if (CSR[mstatus].MPP != 2'b11) { + CSR[mstatus].MPRV = 0; + } if (CSR[mstatus].MPP == 2'b00) { set_mode(PrivilegeMode::U); } else if (CSR[mstatus].MPP == 2'b01) { diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.e.lb.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.e.lb.yaml index 68d42dbd57..628262be35 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.e.lb.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.e.lb.yaml @@ -31,4 +31,4 @@ access: vu: always operation(): | XReg virtual_address = X[rs1] + imm; - X[rd] = sext(read_memory<8>(virtual_address, $encoding), 7); + X[rd] = sext(read_memory<8>(virtual_address, $encoding), 8); diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.e.lh.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.e.lh.yaml index 08cb7cc4ed..33e7e10c31 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.e.lh.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.e.lh.yaml @@ -31,4 +31,4 @@ access: vu: always operation(): | XReg virtual_address = X[rs1] + imm; - X[rd] = sext(read_memory<16>(virtual_address, $encoding), 15); + X[rd] = sext(read_memory<16>(virtual_address, $encoding), 16); diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.ext.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.ext.yaml index ed6679dd3e..e453f05cc7 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.ext.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.ext.yaml @@ -36,4 +36,4 @@ access: operation(): | XReg width = width_minus1 + 1; XReg unsigned_extraction = (X[rs1] >> shamt) & ((1 << width) - 1); - X[rd] = sext(unsigned_extraction, width_minus1); + X[rd] = sext(unsigned_extraction, width); diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml index 8a87f5119b..482cc7f7ab 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml @@ -36,4 +36,4 @@ access: operation(): | Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width = width_minus1 + 1; - X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width_minus1); + X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width); diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml index 9137471e06..3f4d12acfd 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml @@ -7,7 +7,7 @@ long_name: Extract bits from pair signed, packed descriptor (Register) description: | Extract a subset of bits from the register pair [`rs1`, `rs1`+1] into `rd`, and sign extend the result. The width of the subset is determined by `rs2` bits [13:8] (0..32), - and the offset of the subset is determined by `rs2` bits [4:0]. + and the offset of the subset is determined by `rs2` bits [5:0] (0..63). In case when `rs2` bit [13] == 1 width is enforced to 32. In case when width == 0, to the destination register written 0. Instruction encoded in R instruction format. @@ -38,9 +38,9 @@ operation(): | Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][13:8]; XReg width = (width_bits > 32) ? 32 : width_bits; - XReg shamt = X[rs2][4:0]; + XReg shamt = X[rs2][5:0]; if (width > 0) { - X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width - 1); + X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width); } else { X[rd] = 0; } diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml index 7b105c3108..b39d2ab909 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml @@ -7,7 +7,7 @@ long_name: Extract bits from pair signed, packed descriptor high part (Register) description: | Extract a subset of bits from the register pair [`rs1`, `rs1`+1] into `rd`, and sign extend the result. The width of the subset is determined by `rs2` bits [29:24] (0..32), - and the offset of the subset is determined by `rs2` bits [20:16]. + and the offset of the subset is determined by `rs2` bits [21:16] (0..63). In case when `rs2` bit [29] == 1 width is enforced to 32. In case when width == 0, to the destination register written 0. Instruction encoded in R instruction format. @@ -38,9 +38,9 @@ operation(): | Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][29:24]; XReg width = (width_bits > 32) ? 32 : width_bits; - XReg shamt = X[rs2][20:16]; + XReg shamt = X[rs2][21:16]; if (width > 0) { - X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width - 1); + X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width); } else { X[rd] = 0; } diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml index 1e510665e8..10ac24f771 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml @@ -7,7 +7,7 @@ long_name: Extract bits from pair signed (Register) description: | Extract a subset of bits from the register pair [`rs1`, `rs1`+1] into `rd`, and sign extend the result. The width of the subset is determined by `rs2` bits [21:16] (0..32), - and the offset of the subset is determined by `rs2` bits [4:0]. + and the offset of the subset is determined by `rs2` bits [5:0] (0..63). In case when `rs2` bit [21] == 1 width is enforced to 32. In case when width == 0, to the destination register written 0. Instruction encoded in R instruction format. @@ -38,9 +38,9 @@ operation(): | Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][21:16]; XReg width = (width_bits > 32) ? 32 : width_bits; - XReg shamt = X[rs2][4:0]; + XReg shamt = X[rs2][5:0]; if (width > 0) { - X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width - 1); + X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width); } else { X[rd] = 0; } diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml index 5ff7acd6ee..410899c716 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml @@ -7,7 +7,7 @@ long_name: Extract bits from pair unsigned, packed descriptor (Register) description: | Extract a subset of bits from the register pair [`rs1`, `rs1`+1] into `rd`. The width of the subset is determined by `rs2` bits [13:8] (0..32), - and the offset of the subset is determined by `rs2` bits [4:0]. + and the offset of the subset is determined by `rs2` bits [5:0] (0..63). In case when `rs2` bit [13] == 1 width is enforced to 32. In case when width == 0, to the destination register written 0. Instruction encoded in R instruction format. @@ -38,7 +38,7 @@ operation(): | Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][13:8]; XReg width = (width_bits > 32) ? 32 : width_bits; - XReg shamt = X[rs2][4:0]; + XReg shamt = X[rs2][5:0]; if (width > 0) { X[rd] = (pair >> shamt) & ((1 << width) - 1); } else { diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml index 74d875bd63..691b126cc7 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml @@ -7,7 +7,7 @@ long_name: Extract bits from pair unsigned, packed descriptor high part (Registe description: | Extract a subset of bits from the register pair [`rs1`, `rs1`+1] into `rd`. The width of the subset is determined by `rs2` bits [29:24] (0..32), - and the offset of the subset is determined by `rs2` bits [20:16]. + and the offset of the subset is determined by `rs2` bits [21:16] (0..63). In case when `rs2` bit [29] == 1 width is enforced to 32. In case when width == 0, to the destination register written 0. Instruction encoded in R instruction format. @@ -38,7 +38,7 @@ operation(): | Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][29:24]; XReg width = (width_bits > 32) ? 32 : width_bits; - XReg shamt = X[rs2][20:16]; + XReg shamt = X[rs2][21:16]; if (width > 0) { X[rd] = (pair >> shamt) & ((1 << width) - 1); } else { diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml index a63092396f..1ff7dbb423 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml @@ -7,7 +7,7 @@ long_name: Extract bits from pair unsigned (Register) description: | Extract a subset of bits from the register pair [`rs1`, `rs1`+1] into `rd`. The width of the subset is determined by `rs2` bits [21:16] (0..32), - and the offset of the subset is determined by `rs2` bits [4:0]. + and the offset of the subset is determined by `rs2` bits [5:0] (0..63). In case when `rs2` bit [21] == 1 width is enforced to 32. In case when width == 0, to the destination register written 0. Instruction encoded in R instruction format. @@ -38,7 +38,7 @@ operation(): | Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][21:16]; XReg width = (width_bits > 32) ? 32 : width_bits; - XReg shamt = X[rs2][4:0]; + XReg shamt = X[rs2][5:0]; if (width > 0) { X[rd] = (pair >> shamt) & ((1 << width) - 1); } else { diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.lieq.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.lieq.yaml index 53335507d0..fc031f786a 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.lieq.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.lieq.yaml @@ -34,5 +34,5 @@ access: vu: always operation(): | if (X[rs1] == X[rs2]) { - X[rd] = sext(simm, 20); + X[rd] = sext(simm, 5); } diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.norm.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.norm.yaml index 8d25c140eb..cc7722e3be 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.norm.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.norm.yaml @@ -35,4 +35,4 @@ operation(): | XReg clo = (xlen() - 1) - $signed(highest_set_bit(~X[rs1])); XReg mnt = (X[rs1][31] == 1) ? (X[rs1] << (clo - 1)) : (X[rs1] << (clz - 1)); XReg exp = (X[rs1][31] == 1) ? (-(clo - 1)) : (-(clz - 1)); - X[rd] = {mnt[23:0],exp[7:0]}; + X[rd] = {mnt[31:8],exp[7:0]}; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.normeu.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.normeu.yaml index aed59d633a..2da4870479 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.normeu.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.normeu.yaml @@ -33,5 +33,5 @@ access: operation(): | XReg clz = ((xlen() - 1) - $signed(highest_set_bit(X[rs1]))) & ~1; XReg mnt = (X[rs1] << (clz & ~1)); - XReg exp = ((-clz) & ~1); - X[rd] = {mnt[23:0],exp[7:0]}; + XReg exp = (-(clz & ~1)); + X[rd] = {mnt[31:8],exp[7:0]}; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.normu.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.normu.yaml index 18e5ef70c9..4875f98a7d 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.normu.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.normu.yaml @@ -34,4 +34,4 @@ operation(): | XReg clz = (xlen() - 1) - $signed(highest_set_bit(X[rs1])); XReg mnt = (X[rs1] << clz); XReg exp = (-clz); - X[rd] = {mnt[23:0],exp[7:0]}; + X[rd] = {mnt[31:8],exp[7:0]}; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.setwm.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.setwm.yaml index 7b6dec12f5..eab30d6eaa 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.setwm.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.setwm.yaml @@ -6,7 +6,7 @@ name: qc.setwm long_name: Set word multiple (Register) description: | Stores the value of `rs3` multiple times into the address starting at (`rs1` + `imm`). - The number of writes is in `rs2`. + The number of writes is in `rs2` bits [4:0] (0..31). Instruction encoded in R instruction format. definedBy: anyOf: @@ -35,7 +35,7 @@ access: operation(): | XReg vaddr = X[rs1] + imm; Bits<32> write_value = X[rs3][31:0]; - XReg num_words = X[rs2]; + XReg num_words = X[rs2][4:0]; for (U32 i = 0; i < num_words; i++) { write_memory<32>(vaddr, write_value, $encoding); vaddr = vaddr + 4; From f716423476a0d25f8eceb2524793b9a84379cda5 Mon Sep 17 00:00:00 2001 From: Kevin Broch <86068473+kbroch-rivosinc@users.noreply.github.com> Date: Thu, 3 Apr 2025 11:56:30 -0700 Subject: [PATCH 014/207] task: sort apt pkgs (#587) * task: sort apt pkgs * fix: add missing pkgs to docker container --- .devcontainer/Dockerfile | 50 +++++++++++++++++++++--------------- bin/.container-tag | 2 +- container.def | 55 +++++++++++++++++++++------------------- 3 files changed, 59 insertions(+), 48 deletions(-) diff --git a/.devcontainer/Dockerfile b/.devcontainer/Dockerfile index 55106b2693..484fffe5f5 100644 --- a/.devcontainer/Dockerfile +++ b/.devcontainer/Dockerfile @@ -6,27 +6,35 @@ WORKDIR /workspace RUN export DEBIAN_FRONTEND=noninteractive RUN apt-get update -RUN apt-get install -y --no-install-recommends git \ - gh \ - less \ - python3 \ - python3.12-venv \ - python3-pip \ - build-essential \ - ruby \ - ruby-dev \ - bundler \ - nodejs \ - npm \ - ditaa \ - libyaml-dev \ - cmake \ - g++ \ - clang-format \ - clang-tidy \ - libelf-dev \ - gcc-riscv64-unknown-elf \ - shellcheck + +# please keep pkgs sorted +RUN apt-get install -y --no-install-recommends \ + build-essential \ + bundler \ + clang-format \ + clang-tidy \ + cmake \ + ditaa \ + g++ \ + gcc-riscv64-linux-gnu \ + gcc-riscv64-unknown-elf \ + gdb \ + gh \ + git \ + less \ + libc6-dev-riscv64-cross \ + libelf-dev \ + libgmp-dev \ + libyaml-dev \ + nodejs \ + npm \ + python3 \ + python3-pip \ + python3.12-venv \ + ruby \ + ruby-dev \ + shellcheck + RUN apt-get clean autoclean RUN apt-get autoremove -y RUN rm -rf /var/lib/{apt,dpkg,cache,log}/* diff --git a/bin/.container-tag b/bin/.container-tag index 5a2a5806df..eb49d7c7fd 100644 --- a/bin/.container-tag +++ b/bin/.container-tag @@ -1 +1 @@ -0.6 +0.7 diff --git a/container.def b/container.def index ce1030f0d9..6e77f80c0e 100644 --- a/container.def +++ b/container.def @@ -11,32 +11,35 @@ From: ubuntu:24.04 apt-get update - apt-get install -y --no-install-recommends git \ - gh \ - less \ - python3 \ - python3.12-venv \ - python3-pip \ - build-essential \ - ruby \ - ruby-dev \ - libyaml-dev \ - bundler \ - nodejs \ - npm \ - ditaa \ - cmake \ - g++ \ - gdb \ - libgmp-dev \ - clang-format \ - clang-tidy \ - libelf-dev \ - gcc-riscv64-linux-gnu \ - gcc-riscv64-unknown-elf \ - libc6-dev-riscv64-cross \ - shellcheck - # cleanup + # please keep pkgs sorted + apt-get install -y --no-install-recommends \ + build-essential \ + bundler \ + clang-format \ + clang-tidy \ + cmake \ + ditaa \ + g++ \ + gcc-riscv64-linux-gnu \ + gcc-riscv64-unknown-elf \ + gdb \ + gh \ + git \ + less \ + libc6-dev-riscv64-cross \ + libelf-dev \ + libgmp-dev \ + libyaml-dev \ + nodejs \ + npm \ + python3 \ + python3-pip \ + python3.12-venv \ + ruby \ + ruby-dev \ + shellcheck + +# cleanup apt-get clean autoclean apt-get autoremove -y rm -rf /var/lib/{apt, dpkg, cache, log} From dbaf530eed7ed3fe819f35fdbcab0674df1b32ad Mon Sep 17 00:00:00 2001 From: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Date: Fri, 4 Apr 2025 08:28:05 -0400 Subject: [PATCH 015/207] ci(nightly): fix call to regress task (#591) Nightly builds are failing because the 'test:nightly' task tries to call 'regress'. It should be 'test:regress'. Signed-off-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> --- Rakefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Rakefile b/Rakefile index ccda666883..46a4361fd2 100755 --- a/Rakefile +++ b/Rakefile @@ -447,7 +447,7 @@ namespace :test do Generally, this tries to build all artifacts DESC task :nightly do - Rake::Task["regress"].invoke + Rake::Task["test:regress"].invoke Rake::Task["portfolios"].invoke puts puts "Nightly regression test PASSED" From 2d33a6d14b9e0492c42ba1ef1337906cdfeb4710 Mon Sep 17 00:00:00 2001 From: ayosher Date: Tue, 8 Apr 2025 15:59:38 +0200 Subject: [PATCH 016/207] Fix mret and mnret instructions (#588) * Fix mret and mnret instructions to support correctly Smdbltrp (MDT bit) and MPRV bit Before his fix IDL code reset mstatus.MPRV bit only in case if S mode is implemented for both mret and mnret. This seems wrong, since spec states that MPRV should be reset by both mret and mnret for case when mode processor is returning is different from Machine mode (2b'11). As well, Smdbltrp spec requires that such case (returning to non-machine mode), the mnret instruction should reset MDT bit. According to the spec mnret instruction should set mnstatus.NMIE=1. Also, mnret should use mnstatus.MNPP bit field for previous mode storage. Signed-off-by: Albert Yosher * MNRET instruction: improving long name and description to match Smrnmi and Smdbltrp extensions documentation Signed-off-by: Albert Yosher --------- Signed-off-by: Albert Yosher Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> --- arch/inst/I/mret.yaml | 9 ++++++++- arch/inst/Smrnmi/mnret.yaml | 18 +++++++++++++++--- 2 files changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/inst/I/mret.yaml b/arch/inst/I/mret.yaml index 6792a0dd30..34d490017e 100644 --- a/arch/inst/I/mret.yaml +++ b/arch/inst/I/mret.yaml @@ -14,9 +14,16 @@ access: encoding: match: "00110000001000000000000001110011" operation(): | - if (implemented?(ExtensionName::S) && CSR[mstatus].MPP != 2'b11) { + if (CSR[mstatus].MPP != 2'b11) { CSR[mstatus].MPRV = 0; } + if (implemented?(ExtensionName::Smdbltrp)) { + if (xlen() == 64) { + CSR[mstatus].MDT = 1'b0; + } else { + CSR[mstatush].MDT = 1'b0; + } + } CSR[mstatus].MIE = CSR[mstatus].MPIE; CSR[mstatus].MPIE = 1; if (CSR[mstatus].MPP == 2'b00) { diff --git a/arch/inst/Smrnmi/mnret.yaml b/arch/inst/Smrnmi/mnret.yaml index bd314fc499..da4c94c0cc 100644 --- a/arch/inst/Smrnmi/mnret.yaml +++ b/arch/inst/Smrnmi/mnret.yaml @@ -3,9 +3,13 @@ $schema: inst_schema.json# kind: instruction name: mnret -long_name: No synopsis available. +long_name: Machine mode resume from the RNMI or Double Trap handler. description: | - No description available. + MNRET is an M-mode-only instruction that uses the values in mnepc and mnstatus to return to the + program counter, privilege mode, and virtualization mode of the interrupted context. This instruction + also sets mnstatus.NMIE. If MNRET changes the privilege mode to a mode less privileged than M, it + also sets mstatus.MPRV to 0. If the Zicfilp extension is implemented, then if the new privileged mode is + y, MNRET sets ELP to the logical AND of yLPE (see Section 22.1.1) and mnstatus.MNPELP. definedBy: Smrnmi assembly: mnret encoding: @@ -18,9 +22,17 @@ access: vu: always data_independent_timing: false operation(): | - if (implemented?(ExtensionName::S) && CSR[mstatus].MPP != 2'b11) { + if (CSR[mnstatus].MNPP != 2'b11) { CSR[mstatus].MPRV = 0; + if (implemented?(ExtensionName::Smdbltrp)) { + if (xlen() == 64) { + CSR[mstatus].MDT = 1'b0; + } else { + CSR[mstatush].MDT = 1'b0; + } + } } + CSR[mnstatus].NMIE = 1'b1; if (CSR[mnstatus].MNPP == 2'b00) { set_mode(PrivilegeMode::U); } else if (CSR[mnstatus].MNPP == 2'b01) { From d0f01f864f40db5f1cab79af452e31991d1ba895 Mon Sep 17 00:00:00 2001 From: Jennifer Dupaquier <11723765+jmawet@users.noreply.github.com> Date: Tue, 8 Apr 2025 11:58:35 -0700 Subject: [PATCH 017/207] Update Zimop instructions (#455) Signed-off-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> --- arch/inst/Zimop/mop.r.n.yaml | 84 +++++++++++++++++------------------ arch/inst/Zimop/mop.rr.n.yaml | 37 +++++++-------- 2 files changed, 60 insertions(+), 61 deletions(-) diff --git a/arch/inst/Zimop/mop.r.n.yaml b/arch/inst/Zimop/mop.r.n.yaml index cbca8d2dfb..82b454c4b1 100644 --- a/arch/inst/Zimop/mop.r.n.yaml +++ b/arch/inst/Zimop/mop.r.n.yaml @@ -3,23 +3,20 @@ $schema: "inst_schema.json#" kind: instruction name: mop.r.n -long_name: No synopsis available. +long_name: May-be-operation (1 source register). description: | - No description available. + Unless redefined by another extension, this instructions simply writes 0 to X[xd]. + The encoding allows future extensions to define them to read X[xs1], as well as write X[xd]. definedBy: Zimop -assembly: mop_r_t_30, mop_r_t_27_26, mop_r_t_21_20, xd, xs1 +assembly: xd, xs1 encoding: match: 1-00--0111-------100-----1110011 variables: - - name: mop_r_t_30 - location: 30-30 - - name: mop_r_t_27_26 - location: 27-26 - - name: mop_r_t_21_20 - location: 21-20 - - name: rs1 + - name: n + location: 30|27-26|21-20 + - name: xs1 location: 19-15 - - name: rd + - name: xd location: 11-7 access: s: always @@ -32,68 +29,69 @@ hints: - { $ref: inst/Zicfilp/sspopchk.x5.yaml# } - { $ref: inst/Zicfilp/ssrdp.yaml# } pseudoinstructions: - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x0) && (mop_r_t_27_26 == 0x0) + - when: n == 0 to: mop.r.0 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x1) && (mop_r_t_27_26 == 0x0) + - when: n == 1 to: mop.r.1 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x2) && (mop_r_t_27_26 == 0x0) + - when: n == 2 to: mop.r.2 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x3) && (mop_r_t_27_26 == 0x0) + - when: n == 3 to: mop.r.3 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x0) && (mop_r_t_27_26 == 0x1) + - when: n == 4 to: mop.r.4 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x1) && (mop_r_t_27_26 == 0x1) + - when: n == 5 to: mop.r.5 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x2) && (mop_r_t_27_26 == 0x1) + - when: n == 6 to: mop.r.6 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x3) && (mop_r_t_27_26 == 0x1) + - when: n == 7 to: mop.r.7 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x0) && (mop_r_t_27_26 == 0x2) + - when: n == 8 to: mop.r.8 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x1) && (mop_r_t_27_26 == 0x2) + - when: n == 9 to: mop.r.9 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x2) && (mop_r_t_27_26 == 0x2) + - when: n == 10 to: mop.r.10 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x3) && (mop_r_t_27_26 == 0x2) + - when: n == 11 to: mop.r.11 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x0) && (mop_r_t_27_26 == 0x3) + - when: n == 12 to: mop.r.12 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x1) && (mop_r_t_27_26 == 0x3) + - when: n == 13 to: mop.r.13 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x2) && (mop_r_t_27_26 == 0x3) + - when: n == 14 to: mop.r.14 - - when: (mop_r_t_30 == 0x0) && (mop_r_t_21_20 == 0x3) && (mop_r_t_27_26 == 0x3) + - when: n == 15 to: mop.r.15 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x0) && (mop_r_t_27_26 == 0x0) + - when: n == 16 to: mop.r.16 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x1) && (mop_r_t_27_26 == 0x0) + - when: n == 17 to: mop.r.17 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x2) && (mop_r_t_27_26 == 0x0) + - when: n == 18 to: mop.r.18 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x3) && (mop_r_t_27_26 == 0x0) + - when: n == 19 to: mop.r.19 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x0) && (mop_r_t_27_26 == 0x1) + - when: n == 20 to: mop.r.20 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x1) && (mop_r_t_27_26 == 0x1) + - when: n == 21 to: mop.r.21 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x2) && (mop_r_t_27_26 == 0x1) + - when: n == 22 to: mop.r.22 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x3) && (mop_r_t_27_26 == 0x1) + - when: n == 23 to: mop.r.23 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x0) && (mop_r_t_27_26 == 0x2) + - when: n == 24 to: mop.r.24 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x1) && (mop_r_t_27_26 == 0x2) + - when: n == 25 to: mop.r.25 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x2) && (mop_r_t_27_26 == 0x2) + - when: n == 26 to: mop.r.26 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x3) && (mop_r_t_27_26 == 0x2) + - when: n == 27 to: mop.r.27 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x0) && (mop_r_t_27_26 == 0x3) + - when: n == 28 to: mop.r.28 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x1) && (mop_r_t_27_26 == 0x3) + - when: n == 29 to: mop.r.29 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x2) && (mop_r_t_27_26 == 0x3) + - when: n == 30 to: mop.r.30 - - when: (mop_r_t_30 == 0x1) && (mop_r_t_21_20 == 0x3) && (mop_r_t_27_26 == 0x3) + - when: n == 31 to: mop.r.31 operation(): | + X[xd] = 0; diff --git a/arch/inst/Zimop/mop.rr.n.yaml b/arch/inst/Zimop/mop.rr.n.yaml index 6c80c31b90..904aff999e 100644 --- a/arch/inst/Zimop/mop.rr.n.yaml +++ b/arch/inst/Zimop/mop.rr.n.yaml @@ -3,23 +3,23 @@ $schema: "inst_schema.json#" kind: instruction name: mop.rr.n -long_name: No synopsis available. +long_name: May-be-operation (2 source registers). description: | - No description available. + The Zimop extension defines 8 MOP instructions named MOP.RR.n, where n is an integer between 0 + and 7, inclusive. Unless redefined by another extension, these instructions simply write 0 to X[xd]. + Their encoding allows future extensions to define them to read X[xs1] and X[xs2], as well as write X[xd]. definedBy: Zimop -assembly: mop_rr_t_30, mop_rr_t_27_26, xd, xs1, xs2 +assembly: xd, xs1, xs2 encoding: match: 1-00--1----------100-----1110011 variables: - - name: mop_rr_t_30 - location: 30-30 - - name: mop_rr_t_27_26 - location: 27-26 - - name: rs2 + - name: n + location: 30|27-26 + - name: xs2 location: 24-20 - - name: rs1 + - name: xs1 location: 19-15 - - name: rd + - name: xd location: 11-7 access: s: always @@ -31,20 +31,21 @@ hints: - { $ref: inst/Zicfilp/sspush.x1.yaml# } - { $ref: inst/Zicfilp/sspush.x5.yaml# } pseudoinstructions: - - when: (mop_rr_t_30 == 0x0) && (mop_rr_t_27_26 == 0x0) + - when: n == 0 to: mop.rr.0 - - when: (mop_rr_t_30 == 0x0) && (mop_rr_t_27_26 == 0x1) + - when: n == 1 to: mop.rr.1 - - when: (mop_rr_t_30 == 0x0) && (mop_rr_t_27_26 == 0x2) + - when: n == 2 to: mop.rr.2 - - when: (mop_rr_t_30 == 0x0) && (mop_rr_t_27_26 == 0x3) + - when: n == 3 to: mop.rr.3 - - when: (mop_rr_t_30 == 0x1) && (mop_rr_t_27_26 == 0x0) + - when: n == 4 to: mop.rr.4 - - when: (mop_rr_t_30 == 0x1) && (mop_rr_t_27_26 == 0x1) + - when: n == 5 to: mop.rr.5 - - when: (mop_rr_t_30 == 0x1) && (mop_rr_t_27_26 == 0x2) + - when: n == 6 to: mop.rr.6 - - when: (mop_rr_t_30 == 0x1) && (mop_rr_t_27_26 == 0x3) + - when: n == 7 to: mop.rr.7 operation(): | + X[xd] = 0; From d2cf93832c5f96a7bfb57452bc60ec8a0b6f1c7d Mon Sep 17 00:00:00 2001 From: Syed Owais Ali Shah <113125582+syedowaisalishah@users.noreply.github.com> Date: Wed, 9 Apr 2025 00:09:00 +0500 Subject: [PATCH 018/207] Add synopsis and description for Zacas (Atomic CAS) extension (#516) (#518) * Add synopses and descriptions for Zacas instructions * Add synopses and descriptions for Zacas instructions * Add synopses and descriptions for Zacas instruction * Add synopses and descriptions for Zacas instructions. * Add synopses and descriptions for Zacas instructions --------- Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> --- arch/inst/Zacas/amocas.d.yaml | 84 +++++++++++++++++++++++++++++------ arch/inst/Zacas/amocas.q.yaml | 40 ++++++++++++++++- arch/inst/Zacas/amocas.w.yaml | 38 +++++++++++++++- 3 files changed, 144 insertions(+), 18 deletions(-) diff --git a/arch/inst/Zacas/amocas.d.yaml b/arch/inst/Zacas/amocas.d.yaml index 3a73672d24..3338d68a25 100644 --- a/arch/inst/Zacas/amocas.d.yaml +++ b/arch/inst/Zacas/amocas.d.yaml @@ -1,26 +1,82 @@ +--- # yaml-language-server: $schema=../../../schemas/inst_schema.json $schema: "inst_schema.json#" kind: instruction name: amocas.d -long_name: No synopsis available. +long_name: Atomic Compare-and-Swap Doubleword description: | - No description available. + For RV32, AMOCAS.D atomically loads 64-bits of a data value from address in + rs1, compares the loaded value to a 64-bit value held in a register pair + consisting of rd and rd+1, and if the comparison is bitwise equal, then + stores the 64-bit value held in the register pair rs2 and rs2+1 to the + original address in rs1. The value loaded from memory is placed into the + register pair rd and rd+1. The instruction requires the first register in + the pair to be even numbered; encodings with odd-numbered registers + specified in rs2 and rd are reserved. When the first register of a source + register pair is x0, then both halves of the pair read as zero. When the + first register of a destination register pair is x0, then the entire + register result is discarded and neither destination register is written. + + For RV64, AMOCAS.D atomically loads 64-bits of a data value from address in + rs1, compares the loaded value to a 64-bit value held in rd, and if the + comparison is bitwise equal, then stores the 64-bit value held in rs2 to the + original address in rs1. The value loaded from memory is placed into + register rd. + + Just as for AMOs in the A extension, AMOCAS.D requires that the address held + in rs1 be naturally aligned to the size of the operand (i.e., eight-byte + aligned for doublewords). And the same exception options apply if the + address is not naturally aligned. + + Just as for AMOs in the A extension, the AMOCAS.D optionally provides release + consistency semantics, using the aq and rl bits, to help implement + multiprocessor synchronization. The memory operation performed by an + AMOCAS.D, when successful, has acquire semantics if aq bit is 1 and has + release semantics if rl bit is 1. The memory operation performed by an + AMOCAS.W/D/Q, when not successful, has acquire semantics if aq bit is 1 but + does not have release semantics, regardless of rl. + + A FENCE instruction may be used to order the memory read access and, if + produced, the memory write access by an AMOCAS.D instruction. + + [Note] An unsuccessful AMOCAS.D may either not perform a memory write or may + write back the old value loaded from memory. The memory write, if produced, + does not have release semantics, regardless of rl. + + An AMOCAS.D instruction always requires write permissions. + definedBy: Zacas assembly: xd, xs1, xs2, aq, rl encoding: - match: 00101------------011-----0101111 - variables: - - name: aq - location: 26-26 - - name: rl - location: 25-25 - - name: rs2 - location: 24-20 - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 + RV32: + match: 00101------------011-----0101111 + variables: + - name: aq + location: 26-26 + - name: rl + location: 25-25 + - name: rs2 + location: 24-20 + not: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31] + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + not: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31] + RV64: + match: 00101------------011-----0101111 + variables: + - name: aq + location: 26-26 + - name: rl + location: 25-25 + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 access: s: always u: always diff --git a/arch/inst/Zacas/amocas.q.yaml b/arch/inst/Zacas/amocas.q.yaml index 1e5a3b8fc2..b84c0af975 100644 --- a/arch/inst/Zacas/amocas.q.yaml +++ b/arch/inst/Zacas/amocas.q.yaml @@ -1,11 +1,45 @@ +--- # yaml-language-server: $schema=../../../schemas/inst_schema.json $schema: "inst_schema.json#" kind: instruction name: amocas.q -long_name: No synopsis available. +long_name: Atomic Compare-and-Swap Quadword description: | - No description available. + For RV64, AMOCAS.Q atomically loads 128-bits of a data value from address + in rs1, compares the loaded value to a 128-bit value held in a register + pair consisting of rd and rd+1, and if the comparison is bitwise equal, + then stores the 128-bit value held in the register pair rs2 and rs2+1 to + the original address in rs1. The value loaded from memory is placed into + the register pair rd and rd+1. The instruction requires the first register + in the pair to be even numbered; encodings with odd-numbered registers + specified in rs2 and rd are reserved. When the first register of a source + register pair is x0, then both halves of the pair read as zero. When the + first register of a destination register pair is x0, then the entire + register result is discarded and neither destination register is written. + + Just as for AMOs in the A extension, AMOCAS.Q requires that the address held + in rs1 be naturally aligned to the size of the operand (i.e., sixteen-byte + aligned for quadwords). And the same exception options apply if the + address is not naturally aligned. + + Just as for AMOs in the A extension, the AMOCAS.Q optionally provides release + consistency semantics, using the aq and rl bits, to help implement + multiprocessor synchronization. The memory operation performed by an + AMOCAS.Q, when successful, has acquire semantics if aq bit is 1 and has + release semantics if rl bit is 1. The memory operation performed by an + AMOCAS.W/D/Q, when not successful, has acquire semantics if aq bit is 1 but + does not have release semantics, regardless of rl. + + A FENCE instruction may be used to order the memory read access and, if + produced, the memory write access by an AMOCAS.Q instruction. + + [Note] An unsuccessful AMOCAS.Q may either not perform a memory write or + may write back the old value loaded from memory. The memory write, if + produced, does not have release semantics, regardless of rl. + + An AMOCAS.Q instruction always requires write permissions. + definedBy: Zacas base: 64 assembly: xd, xs1, xs2, aq, rl @@ -18,10 +52,12 @@ encoding: location: 25-25 - name: rs2 location: 24-20 + not: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31] - name: rs1 location: 19-15 - name: rd location: 11-7 + not: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31] access: s: always u: always diff --git a/arch/inst/Zacas/amocas.w.yaml b/arch/inst/Zacas/amocas.w.yaml index 0f4d9fd2a8..a5c53f2aa5 100644 --- a/arch/inst/Zacas/amocas.w.yaml +++ b/arch/inst/Zacas/amocas.w.yaml @@ -1,11 +1,45 @@ +--- # yaml-language-server: $schema=../../../schemas/inst_schema.json $schema: "inst_schema.json#" kind: instruction name: amocas.w -long_name: No synopsis available. +long_name: Atomic Compare-and-Swap Word description: | - No description available. + For RV32, AMOCAS.W atomically loads a 32-bit data value from address in rs1, + compares the loaded value to the 32-bit value held in rd, and if the + comparison is bitwise equal, then stores the 32-bit value held in rs2 to the + original address in rs1. The value loaded from memory is placed into + register rd. + + For RV64, AMOCAS.W atomically loads a 32-bit data value from address in rs1, + compares the loaded value to the lower 32 bits of the value held in rd, and + if the comparison is bitwise equal, then stores the lower 32 bits of the + value held in rs2 to the original address in rs1. The 32-bit value loaded + from memory is sign-extended and is placed into register rd. + + Just as for AMOs in the A extension, AMOCAS.W requires that the address held + in rs1 be naturally aligned to the size of the operand (i.e., four-byte + aligned for words). And the same exception options apply if the address is + not naturally aligned. + + Just as for AMOs in the A extension, the AMOCAS.W optionally provides release + consistency semantics, using the aq and rl bits, to help implement + multiprocessor synchronization. The memory operation performed by an + AMOCAS.W, when successful, has acquire semantics if aq bit is 1 and has + release semantics if rl bit is 1. The memory operation performed by an + AMOCAS.W/D/Q, when not successful, has acquire semantics if aq bit is 1 but + does not have release semantics, regardless of rl. + + A FENCE instruction may be used to order the memory read access and, if + produced, the memory write access by an AMOCAS.W instruction. + + [Note] An unsuccessful AMOCAS.W may either not perform a memory write or may + write back the old value loaded from memory. The memory write, if produced, + does not have release semantics, regardless of rl. + + An AMOCAS.W instruction always requires write permissions. + definedBy: Zacas assembly: xd, xs1, xs2, aq, rl encoding: From 815394fb44ac56dbc8bde56593e78114d511dac3 Mon Sep 17 00:00:00 2001 From: Katherine Hsu <67767297+neverlandiz@users.noreply.github.com> Date: Tue, 8 Apr 2025 15:09:00 -0400 Subject: [PATCH 019/207] Added XLEN as a length type for CSRs (#534) * Added XLEN as a length type for CSRs * More updates to Ruby CSR object + description for CSR schema * More fixes for Ruby CSR object * More fixes to Ruby CSR object --------- Signed-off-by: Katherine Hsu <67767297+neverlandiz@users.noreply.github.com> --- arch/csr/schema.adoc | 4 +-- lib/arch_obj_models/csr.rb | 55 +++++++++++++++++++++++++++++++++++++- schemas/csr_schema.json | 4 +-- 3 files changed, 58 insertions(+), 5 deletions(-) diff --git a/arch/csr/schema.adoc b/arch/csr/schema.adoc index acdb74bd34..c285a284a9 100644 --- a/arch/csr/schema.adoc +++ b/arch/csr/schema.adoc @@ -59,8 +59,8 @@ Length:: |=== | *key* | length -| *value type* | one of [32, 64, "MXLEN", "SXLEN", "VSXLEN"] -| *description* | Length, in bits, of the CSR. Can either be a 32, 64 or MXLEN, SXLEN, VSXLEN to indicate that is is equal to the effective XLEN for a given mode +| *value type* | one of [32, 64, "MXLEN", "SXLEN", "VSXLEN", "XLEN"] +| *description* | Length, in bits, of the CSR. Can either be a 32, 64 or MXLEN, SXLEN, VSXLEN, XLEN to indicate that is is equal to the effective XLEN for a given mode |=== Indirect:: diff --git a/lib/arch_obj_models/csr.rb b/lib/arch_obj_models/csr.rb index ff1639856b..6c3ee9c1c4 100644 --- a/lib/arch_obj_models/csr.rb +++ b/lib/arch_obj_models/csr.rb @@ -112,6 +112,15 @@ def dynamic_length? when "VSXLEN" # dynamic if either we don't know VSXLEN or VSXLEN is explicitly mutable [nil, 3264].include?(cfg_arch.param_values["VSXLEN"]) + when "XLEN" + # must always have M-mode + # SXLEN condition applies if S-mode is possible + # VSXLEN condition applies if VS-mode is possible + (cfg_arch.mxlen.nil?) || \ + (cfg_arch.possible_extensions.map(&:name).include?("S") && \ + [nil, 3264].include(cfg_arch.param_values["SXLEN"])) || \ + (cfg_arch.possible_extensions.map(&:name).include?("H") && \ + [nil, 3264].include?(cfg_arch.param_values["VSXLEN"])) else raise "Unexpected length" end @@ -121,7 +130,7 @@ def dynamic_length? # @return [Integer] Smallest length of the CSR in any mode def min_length case @data["length"] - when "MXLEN", "SXLEN", "VSXLEN" + when "MXLEN", "SXLEN", "VSXLEN", "XLEN" @cfg_arch.possible_xlens.min when Integer @data["length"] @@ -173,6 +182,8 @@ def length(effective_xlen = nil) # don't know VSXLEN effective_xlen end + when "XLEN" + effective_xlen when Integer @data["length"] else @@ -207,6 +218,42 @@ def max_length else 64 end + when "XLEN" + if cfg_arch.possible_extensions.map(&:name).include?("M") + cfg_arch.mxlen || 64 + elsif cfg_arch.possible_extensions.map(&:name).include?("S") + if cfg_arch.param_values.key?("SXLEN") + if cfg_arch.param_values["SXLEN"] == 3264 + 64 + else + cfg_arch.param_values["SXLEN"] + end + else + # SXLEN can never be greater than MXLEN + cfg_arch.mxlen || 64 + end + elsif cfg_arch.possible_extensions.map(&:name).include?("H") + if cfg_arch.param_values.key?("VSXLEN") + if cfg_arch.param_values["VSXLEN"] == 3264 + 64 + else + cfg_arch.param_values["VSXLEN"] + end + else + # VSXLEN can never be greater than MXLEN or SXLEN + if cfg_arch.param_values.key?("SXLEN") + if cfg_arch.param_values["SXLEN"] == 3264 + 64 + else + cfg_arch.param_values["SXLEN"] + end + else + cfg_arch.mxlen || 64 + end + end + else + raise "Unexpected" + end when Integer @data["length"] else @@ -223,6 +270,8 @@ def length_cond32 "CSR[mstatus].SXL == 0" when "VSXLEN" "CSR[hstatus].VSXL == 0" + when "XLEN" + "(priv_mode() == PrivilegeMode::M && CSR[misa].MXL == 0) || (priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == 0) || (priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == 0)" else raise "Unexpected length #{@data['length']} for #{name}" end @@ -237,6 +286,8 @@ def length_cond64 "CSR[mstatus].SXL == 1" when "VSXLEN" "CSR[hstatus].VSXL == 1" + when "XLEN" + "(priv_mode() == PrivilegeMode::M && CSR[misa].MXL == 1) || (priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == 1) || (priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == 1)" else raise "Unexpected length" end @@ -254,6 +305,8 @@ def length_pretty(effective_xlen=nil) "CSR[mstatus].SXL == %%" when "VSXLEN" "CSR[hstatus].VSXL == %%" + when "XLEN" + "(priv_mode() == PrivilegeMode::M && CSR[misa].MXL == %%) || (priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == %%) || (priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == %%)" else raise "Unexpected length '#{@data['length']}'" end diff --git a/schemas/csr_schema.json b/schemas/csr_schema.json index 6ef1790a77..c18e398ee0 100644 --- a/schemas/csr_schema.json +++ b/schemas/csr_schema.json @@ -245,8 +245,8 @@ "enum": ["M", "S", "U", "VS"] }, "length": { - "description": "Length, in bits, of the CSR. Can either be a 32, 64 or MXLEN, SXLEN, VSXLEN to indicate that is is dependent on the effective XLEN for a given mode", - "enum": [32, 64, "MXLEN", "SXLEN", "VSXLEN"] + "description": "Length, in bits, of the CSR. Can either be a 32, 64 or MXLEN, SXLEN, VSXLEN to indicate that it is dependent on the effective XLEN for a given mode. XLEN here refers to the effective XLEN in the current execution mode.", + "enum": [32, 64, "MXLEN", "SXLEN", "VSXLEN", "XLEN"] }, "requires": { "type": "string", From 39f8aa46bd6ef6a700ac5276e524b34690063cf0 Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Tue, 8 Apr 2025 21:22:02 +0100 Subject: [PATCH 020/207] Instructions ISA manual Appendix (#490) * Adding phase 1 index Signed-off-by: Afonso Oliveira * Adding phase 1 index to ./do Signed-off-by: Afonso Oliveira * Adding phase 1 index: instructions_index object Signed-off-by: Afonso Oliveira * Generate appendix through UDB. * Changes names and paths file structure Signed-off-by: Afonso Oliveira * Update template to ensure correct output. Signed-off-by: Afonso Oliveira * Remove outdated file. Signed-off-by: Afonso Oliveira * Add appendix generation to regression test. Signed-off-by: Afonso Oliveira * Set up hexa numbers to input wavedrom diagram. Makes the 0s and 1s be in each own cell Signed-off-by: Afonso Oliveira --------- Signed-off-by: Afonso Oliveira Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com> --- .github/workflows/regress.yml | 28 +++ .pre-commit-config.yaml | 0 backends/instructions_appendix/tasks.rake | 65 +++++++ .../templates/instructions.adoc.erb | 160 ++++++++++++++++++ lib/arch_obj_models/instructions_appendix.rb | 36 ++++ 5 files changed, 289 insertions(+) mode change 100644 => 100755 .pre-commit-config.yaml create mode 100755 backends/instructions_appendix/tasks.rake create mode 100755 backends/instructions_appendix/templates/instructions.adoc.erb create mode 100755 lib/arch_obj_models/instructions_appendix.rb diff --git a/.github/workflows/regress.yml b/.github/workflows/regress.yml index fc11643df1..26f92815f7 100644 --- a/.github/workflows/regress.yml +++ b/.github/workflows/regress.yml @@ -76,6 +76,34 @@ jobs: run: ./bin/build_container - name: Generate HTML ISA manual run: ./do gen:html_manual + regress-gen-instruction-appendix: + runs-on: ubuntu-latest + env: + SINGULARITY: 1 + steps: + - name: Clone Github Repo Action + uses: actions/checkout@v4 + - name: Setup apptainer + uses: eWaterCycle/setup-apptainer@v2.0.0 + - name: Get container from cache + id: cache-sif + uses: actions/cache@v4 + with: + path: .singularity/image.sif + key: ${{ hashFiles('container.def', 'bin/.container-tag') }} + - name: Get gems and node files from cache + id: cache-bundle-npm + uses: actions/cache@v4 + with: + path: | + .home/.gems + node_modules + key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} + - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} + name: Build container + run: ./bin/build_container + - name: Generate instruction appendix + run: ./do gen:instruction_appendix regress-cfg-manual: runs-on: ubuntu-latest env: diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml old mode 100644 new mode 100755 diff --git a/backends/instructions_appendix/tasks.rake b/backends/instructions_appendix/tasks.rake new file mode 100755 index 0000000000..8252e026e8 --- /dev/null +++ b/backends/instructions_appendix/tasks.rake @@ -0,0 +1,65 @@ +# frozen_string_literal: true + +require_relative "../../lib/arch_obj_models/instructions_appendix.rb" + +# Define the instructions manual generation directory constant. +INST_MANUAL_GEN_DIR = $root / "gen" / "instructions_appendix" + +# Define the path to the merged instructions output. +MERGED_INSTRUCTIONS_FILE = INST_MANUAL_GEN_DIR / "all_instructions.adoc" + +# Define the path to the ERB template that renders the merged instructions. +TEMPLATE_FILE = $root / "backends" / "instructions_appendix" / "templates" / "instructions.adoc.erb" + +# Declare a file task for the template so Rake knows it exists. +file TEMPLATE_FILE.to_s do + # Nothing to do—this file is assumed to be up-to-date. +end + +# File task that generates the merged instructions adoc. +file MERGED_INSTRUCTIONS_FILE.to_s => [__FILE__, TEMPLATE_FILE.to_s] do |t| + cfg_arch = cfg_arch_for("_") + # Use the InstructionIndex helper to aggregate instructions from the entire architecture. + instruction_index = InstructionIndex.new(cfg_arch) + instructions = instruction_index.instructions + + # Load and process the template (which renders both an index and details). + erb = ERB.new(File.read(TEMPLATE_FILE), trim_mode: "-") + erb.filename = TEMPLATE_FILE.to_s + + FileUtils.mkdir_p(File.dirname(t.name)) + File.write( + t.name, + AntoraUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + ) +end + +# Define the path to the output PDF file. +MERGED_INSTRUCTIONS_PDF = INST_MANUAL_GEN_DIR / "instructions_appendix.pdf" + +# File task to generate the PDF from the merged adoc. +file MERGED_INSTRUCTIONS_PDF.to_s => [MERGED_INSTRUCTIONS_FILE.to_s] do |t| + sh [ + "asciidoctor-pdf", + "-a toc", + "-a pdf-theme=#{ENV['THEME'] || "#{$root}/ext/docs-resources/themes/riscv-pdf.yml"}", + "-a pdf-fontsdir=#{$root}/ext/docs-resources/fonts", + "-a imagesdir=#{$root}/ext/docs-resources/images", + "-r asciidoctor-diagram", + "-o #{t.name}", + MERGED_INSTRUCTIONS_FILE.to_s + ].join(" ") + + puts "SUCCESS: PDF generated at #{t.name}" +end + +namespace :gen do + desc "Generate instruction appendix (merged instructions adoc and PDF)" + task :instruction_appendix do + # Generate the merged instructions adoc. + Rake::Task[MERGED_INSTRUCTIONS_FILE.to_s].invoke + # Then generate the PDF. + Rake::Task[MERGED_INSTRUCTIONS_PDF.to_s].invoke + puts "SUCCESS: Instruction appendix generated at '#{MERGED_INSTRUCTIONS_FILE}' and PDF at '#{MERGED_INSTRUCTIONS_PDF}'" + end +end diff --git a/backends/instructions_appendix/templates/instructions.adoc.erb b/backends/instructions_appendix/templates/instructions.adoc.erb new file mode 100755 index 0000000000..5be9c281ca --- /dev/null +++ b/backends/instructions_appendix/templates/instructions.adoc.erb @@ -0,0 +1,160 @@ +<% +# Helper to substitute problematic entity strings with proper Unicode characters. +def fix_entities(text) + text.to_s.gsub("≠", "≠") + .gsub("±", "±") + .gsub("-∞", "−∞") + .gsub("+∞", "+∞") +end + +# Custom JSON converter for wavedrom that handles hexadecimal literals +def json_dump_with_hex_literals(data) + # First convert to standard JSON + json_string = JSON.dump(data) + + # Replace string hex values with actual hex literals + json_string.gsub(/"0x([0-9a-fA-F]+)"/) do |match| + # Remove the quotes, leaving just the hex literal + "0x#{$1}" + end.gsub(/"name":/, '"name": ') # Add space after colon for name field +end + +# Helper to process wavedrom data +def process_wavedrom(json_data) + result = json_data.dup + + # Process reg array if it exists + if result["reg"].is_a?(Array) + result["reg"].each do |item| + # For fields that are likely opcodes or immediates (type 2) + if item["type"] == 2 + # Convert to number first (if it's a string) + if item["name"].is_a?(String) + if item["name"].start_with?("0x") + # Already hexadecimal + numeric_value = item["name"].to_i(16) + elsif item["name"] =~ /^[01]+$/ + # Binary string without prefix + numeric_value = item["name"].to_i(2) + elsif item["name"] =~ /^\d+$/ + # Decimal + numeric_value = item["name"].to_i + else + # Not a number, leave it alone + next + end + else + # Already a number + numeric_value = item["name"] + end + + # Convert to hexadecimal string + hex_str = numeric_value.to_s(16).downcase + + # Set the name to a specially formatted string that will be converted + # to a hex literal in our custom JSON converter + item["name"] = "0x" + hex_str + end + + # Ensure bits is a number + if item["bits"].is_a?(String) && item["bits"] =~ /^\d+$/ + item["bits"] = item["bits"].to_i + end + end + end + + result +end +%> += Instruction Appendix +:doctype: book +:wavedrom: <%= $root %>/node_modules/.bin/wavedrom-cli +// Now the document header is complete and the wavedrom attribute is active. + +<% instructions.sort_by(&:name).each do |inst| %> +<%= anchor_for_inst(inst.name) %> +== <%= inst.name %> + +Synopsis:: +<%= inst.long_name %> + +Encoding:: +<%- if inst.multi_encoding? -%> +[NOTE] +This instruction has different encodings in RV32 and RV64 + +RV32:: +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= fix_entities(json_dump_with_hex_literals(process_wavedrom(inst.wavedrom_desc(32)))) %> +.... + +RV64:: +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= fix_entities(json_dump_with_hex_literals(process_wavedrom(inst.wavedrom_desc(64)))) %> +.... +<%- else -%> +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= fix_entities(json_dump_with_hex_literals(process_wavedrom(inst.wavedrom_desc(inst.base.nil? ? 64 : inst.base)))) %> +.... +<%- end -%> + +Description:: +<%= fix_entities(inst.description) %> + +Decode Variables:: +<%- if inst.multi_encoding? ? (inst.decode_variables(32).empty? && inst.decode_variables(64).empty?) : inst.decode_variables(inst.base.nil? ? 64 : inst.base).empty? -%> +<%= inst.name %> has no decode variables. +<%- else -%> +<%- if inst.multi_encoding? -%> +<%- unless inst.decode_variables(32).empty? -%> +*RV32:* + +[width="100%", cols="1,2", options="header"] +|=== +|Variable Name |Location +<%- inst.decode_variables(32).each do |d| -%> +|<%= d.name %> |<%= d.extract %> +<%- end -%> +|=== +<%- end -%> +<%- unless inst.decode_variables(64).empty? -%> + +*RV64:* + +[width="100%", cols="1,2", options="header"] +|=== +|Variable Name |Location +<%- inst.decode_variables(64).each do |d| -%> +|<%= d.name %> |<%= d.extract %> +<%- end -%> +|=== +<%- end -%> +<%- else -%> +[width="100%", cols="1,2", options="header"] +|=== +|Variable Name |Location +<%- inst.decode_variables(inst.base.nil? ? 64 : inst.base).each do |d| -%> +|<%= d.name %> |<%= d.extract %> +<%- end -%> +|=== +<%- end -%> +<%- end -%> + +Included in:: +<%- if inst.defined_by_condition.flat? -%> +[options="autowrap,autowidth"] +|=== +| Extension | Version +<% inst.defined_by_condition.flat_versions.each do |r| %> +| *<%= r.name %>* | <%= fix_entities(r.requirement_specs_to_s) %> +<% end %> +|=== +<%- else -%> +<%= fix_entities(inst.defined_by_condition.to_asciidoc) %> +<%- end -%> + +<<< +<% end %> diff --git a/lib/arch_obj_models/instructions_appendix.rb b/lib/arch_obj_models/instructions_appendix.rb new file mode 100755 index 0000000000..f4baa7bb71 --- /dev/null +++ b/lib/arch_obj_models/instructions_appendix.rb @@ -0,0 +1,36 @@ +# frozen_string_literal: true + +require_relative "obj" # Adjust this require if your obj.rb is in the same folder. + +# The InstructionIndex class aggregates instructions from the architecture. +# It merges instructions available directly from the architecture (if any) +# with those from each extension. +class InstructionIndex + def initialize(cfg_arch) + @cfg_arch = cfg_arch + end + + def instructions + @instructions ||= begin + merged = [] + # If the architecture responds to :instructions, add them. + if @cfg_arch.respond_to?(:instructions) + merged.concat(@cfg_arch.instructions) + end + # Also, add instructions from each extension. + if @cfg_arch.respond_to?(:extensions) + @cfg_arch.extensions.each do |ext| + ext_obj = @cfg_arch.extension(ext.name) + if ext_obj && ext_obj.respond_to?(:instructions) + merged.concat(ext_obj.instructions) + end + end + end + merged.uniq { |inst| inst.name }.sort_by { |inst| inst.name } + end + end + + def find_instruction(name) + instructions.find { |inst| inst.name == name } + end +end From 92cd4721108d95aa602cc5b00fec832637cbbe5b Mon Sep 17 00:00:00 2001 From: Shehroz Kashif <131602772+Shehrozkashif@users.noreply.github.com> Date: Wed, 9 Apr 2025 19:48:04 +0500 Subject: [PATCH 021/207] Implement Zcmop Compressed MOP Instructions (#530) This commit adds support for the Zcmop extension by defining the 16-bit compressed C.MOP.n instructions. These instructions use a fixed encoding pattern with a variable field (mop_n_field) to select one of eight instructions (for odd n values from 1 to 15). By default, they do not write to any registers, which allows them to safely act as no-ops when the extension is not active. This change lays the foundation for future extensions that may redefine these instructions. Co-authored-by: Afonso Oliveira --- arch/inst/Zcmop/c.mop.n.yaml | 38 ++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 arch/inst/Zcmop/c.mop.n.yaml diff --git a/arch/inst/Zcmop/c.mop.n.yaml b/arch/inst/Zcmop/c.mop.n.yaml new file mode 100644 index 0000000000..27484f8992 --- /dev/null +++ b/arch/inst/Zcmop/c.mop.n.yaml @@ -0,0 +1,38 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +$schema: inst_schema.json# +kind: instruction +name: c.mop.n +long_name: Compressed May-Be-Operation +description: C.MOP.n is encoded in the reserved encoding space corresponding to C.LUI xn, 0. Unlike the MOPs defined in the Zimop extension, the C.MOP.n instructions are defined to not write any register. Their encoding allows future extensions to define them to read register x[n]. +definedBy: Zcmop +assembly: "" +encoding: + match: 01100---10000001 + variables: + - name: n + location: 10-8 +access: + s: always + u: always + vs: always + vu: always +data_independent_timing: false +pseudoinstructions: + - when: (n == 0) + to: c.mop.1 + - when: (n == 1) + to: c.mop.3 + - when: (n == 2) + to: c.mop.5 + - when: (n == 3) + to: c.mop.7 + - when: (n == 4) + to: c.mop.9 + - when: (n == 5) + to: c.mop.11 + - when: (n == 6) + to: c.mop.13 + - when: (n == 7) + to: c.mop.15 +operation(): "" #do nothing From 688bd7b415fbd4cb9f0db9078b24abb2e93a0202 Mon Sep 17 00:00:00 2001 From: Kevin Broch <86068473+kbroch-rivosinc@users.noreply.github.com> Date: Wed, 9 Apr 2025 11:36:28 -0700 Subject: [PATCH 022/207] refactor(ci): use composite action to dedup singularity setup (#602) fixes #603 --- .github/actions/singularity-setup/action.yml | 28 +++ .github/workflows/nightly.yml | 23 +-- .github/workflows/pages.yml | 23 +-- .github/workflows/regress.yml | 190 +++---------------- 4 files changed, 58 insertions(+), 206 deletions(-) create mode 100644 .github/actions/singularity-setup/action.yml diff --git a/.github/actions/singularity-setup/action.yml b/.github/actions/singularity-setup/action.yml new file mode 100644 index 0000000000..40f2d8ce52 --- /dev/null +++ b/.github/actions/singularity-setup/action.yml @@ -0,0 +1,28 @@ +name: Singularity Setup +description: All steps to use/build Singularity container +runs: + using: composite + steps: + - name: Setup apptainer + uses: eWaterCycle/setup-apptainer@v2.0.0 + - name: Get container from cache + id: cache-sif + uses: actions/cache@v4 + with: + path: .singularity/image.sif + key: ${{ hashFiles('container.def', 'bin/.container-tag') }} + - name: Get gems and node files from cache + id: cache-bundle-npm + uses: actions/cache@v4 + with: + path: | + .home/.gems + node_modules + key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} + - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} + name: Build container + run: ./bin/build_container + shell: bash + - name: Setup project + run: ./bin/setup + shell: bash diff --git a/.github/workflows/nightly.yml b/.github/workflows/nightly.yml index 23e3c72ac1..d222c5c8fc 100644 --- a/.github/workflows/nightly.yml +++ b/.github/workflows/nightly.yml @@ -31,26 +31,7 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container - - name: Setup project - run: ./bin/setup + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Run regression run: ./do test:nightly diff --git a/.github/workflows/pages.yml b/.github/workflows/pages.yml index 2f8b77ec6a..97bb586f78 100644 --- a/.github/workflows/pages.yml +++ b/.github/workflows/pages.yml @@ -22,27 +22,8 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container - - name: Setup project - run: ./bin/setup + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Create deploy dir run: /bin/bash lib/deploy.sh - name: Setup Pages diff --git a/.github/workflows/regress.yml b/.github/workflows/regress.yml index 26f92815f7..5313265a2a 100644 --- a/.github/workflows/regress.yml +++ b/.github/workflows/regress.yml @@ -3,8 +3,8 @@ on: push: branches: - main - merge_group: # this is a new line - types: [checks_requested] # this is a new line + merge_group: + types: [checks_requested] pull_request: branches: - main @@ -23,27 +23,8 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container - - name: Setup project - run: ./bin/setup + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Run smoke run: ./do test:smoke regress-gen-isa-manual: @@ -55,55 +36,21 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Generate HTML ISA manual run: ./do gen:html_manual regress-gen-instruction-appendix: - runs-on: ubuntu-latest - env: - SINGULARITY: 1 - steps: - - name: Clone Github Repo Action - uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container - - name: Generate instruction appendix - run: ./do gen:instruction_appendix + runs-on: ubuntu-latest + env: + SINGULARITY: 1 + steps: + - name: Clone Github Repo Action + uses: actions/checkout@v4 + - name: singularity setup + uses: ./.github/actions/singularity-setup + - name: Generate instruction appendix + run: ./do gen:instruction_appendix regress-cfg-manual: runs-on: ubuntu-latest env: @@ -111,25 +58,8 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Generate HTML ISA manual run: ./do gen:html[example_rv64_with_overlay] regress-gen-ext-pdf: @@ -142,25 +72,8 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Generate extension PDF run: ./do gen:ext_pdf regress-gen-certificate: @@ -170,25 +83,8 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Generate extension PDF run: ./do gen:cert_model_pdf[MockCertificateModel] regress-gen-profile: @@ -198,25 +94,8 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Generate extension PDF run: ./do gen:profile[MockProfileRelease] regress-gen-go: @@ -226,24 +105,7 @@ jobs: steps: - name: Clone Github Repo Action uses: actions/checkout@v4 - - name: Setup apptainer - uses: eWaterCycle/setup-apptainer@v2.0.0 - - name: Get container from cache - id: cache-sif - uses: actions/cache@v4 - with: - path: .singularity/image.sif - key: ${{ hashFiles('container.def', 'bin/.container-tag') }} - - name: Get gems and node files from cache - id: cache-bundle-npm - uses: actions/cache@v4 - with: - path: | - .home/.gems - node_modules - key: ${{ hashFiles('Gemfile.lock') }}-${{ hashFiles('package-lock.json') }} - - if: ${{ steps.cache-sif.outputs.cache-hit != 'true' }} - name: Build container - run: ./bin/build_container + - name: singularity setup + uses: ./.github/actions/singularity-setup - name: Generate Go code run: ./do gen:go From 5cb2bd9f6d4a20fc7d537f7697358fc6e382ecea Mon Sep 17 00:00:00 2001 From: Shehroz Kashif <131602772+Shehrozkashif@users.noreply.github.com> Date: Fri, 11 Apr 2025 03:39:40 +0500 Subject: [PATCH 023/207] =?UTF-8?q?This=20commit=20adds=20the=20Zilsd=20ex?= =?UTF-8?q?tension,=20which=20improves=20code=20size=20and=20pe=E2=80=A6?= =?UTF-8?q?=20(#542)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Add Zilsd extension YAML Add support for the Zilsd extension, which introduces load/store pair instructions for RV32. These instructions allow efficient 64-bit memory operations using register pairs. Ensure proper alignment rules, trap handling, and atomicity requirements. Improve memory efficiency and reduce instruction count for doubleword operations. * add Zilsd instructions --- arch/ext/Zilsd.yaml | 13 +++++++++++++ arch/inst/Zilsd/ld.yaml | 36 ++++++++++++++++++++++++++++++++++++ arch/inst/Zilsd/sd.yaml | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 86 insertions(+) create mode 100644 arch/ext/Zilsd.yaml create mode 100644 arch/inst/Zilsd/ld.yaml create mode 100644 arch/inst/Zilsd/sd.yaml diff --git a/arch/ext/Zilsd.yaml b/arch/ext/Zilsd.yaml new file mode 100644 index 0000000000..694d457fff --- /dev/null +++ b/arch/ext/Zilsd.yaml @@ -0,0 +1,13 @@ +$schema: "ext_schema.json#" +kind: extension +name: Zilsd +long_name: Load/Store Pair for RV32 +description: | + This specification adds load and store instructions using register pairs. It does so by reusing existing instruction encodings which are RV64-only. The specification defines 32-bit encodings. + Load and store instructions will use the same definition of even-odd pairs as defined by the Zdinx extension. + The extension improves static code density, by replacing two separate load or store instructions with a single one. In addition, it can provide a performance improvement for implementations that can make use of a wider than XLEN memory interface. +type: unprivileged +versions: + - version: "1.0" + state: ratified + ratification_date: "2025-02" diff --git a/arch/inst/Zilsd/ld.yaml b/arch/inst/Zilsd/ld.yaml new file mode 100644 index 0000000000..acb5734ebd --- /dev/null +++ b/arch/inst/Zilsd/ld.yaml @@ -0,0 +1,36 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +$schema: "inst_schema.json#" +kind: instruction +name: ld +long_name: Load doubleword to even/odd register pair +description: | + Loads a 64-bit value into registers rd and rd+1. The effective address is obtained by adding + register rs1 to the sign-extended 12-bit offset. +definedBy: Zilsd +assembly: rd, offset(rs1) +encoding: + match: -----------------011-----0000011 + variables: + - name: rd + location: 11-7 + not: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31] + - name: rs1 + location: 19-15 + - name: imm + location: 31-20 +access: + s: always + u: always + vs: always + vu: always +operation(): | + Bits base = X[rs1]; + Bits offset = $signed(imm); + Bits eff_addr = base + offset; + + Bits<64> data = read_memory<64>(eff_addr, $encoding); + + X[rd] = data[31:0]; + X[rd+1] = data[63:32]; +sail(): "" #not implemented in the sail model yet diff --git a/arch/inst/Zilsd/sd.yaml b/arch/inst/Zilsd/sd.yaml new file mode 100644 index 0000000000..56935f60ab --- /dev/null +++ b/arch/inst/Zilsd/sd.yaml @@ -0,0 +1,37 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +$schema: "inst_schema.json#" +kind: instruction +name: sd +long_name: Store doubleword from even/odd register pair +description: | + Stores a 64-bit value from registers rs2 and rs2+1. The effective address is obtained by adding + register rs1 to the sign-extended 12-bit offset. +definedBy: Zilsd +assembly: rs2, offset(rs1) +encoding: + match: -----------------011-----0100011 + variables: + - name: rs1 + location: 19-15 + - name: rs2 + not: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31] + location: 24-20 + - name: imm + location: 31-25|11-7 +access: + s: always + u: always + vs: always + vu: always +operation(): | + Bits base = X[rs1]; + Bits offset = $signed(imm); + Bits eff_addr = base + offset; + + Bits<32> lower_word = X[rs2]; + Bits<32> upper_word = X[rs2 + 1]; + Bits<64> store_data = {upper_word, lower_word}; + + write_memory<64>(eff_addr, store_data, $encoding); +sail(): "" #not implemented in the sail model yet From df8d9def7aa99231e9eba587a636d5e0f8a89f7c Mon Sep 17 00:00:00 2001 From: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Date: Tue, 15 Apr 2025 12:59:39 -0400 Subject: [PATCH 024/207] schema: add array form of description (#598) * schema: add array form of description Adds an array form of "description" fields that enables tagged statements. In this first cut, statements can be tagged as: - normative or non-normative. - conditional, using an IDL function to evaluate the condition * schema: add id field to array form of descriptions IDs should never change, even if the underlying text changes --- arch/csr/hstatus.yaml | 251 +++++++++++++++++-------------- arch/csr/mie.yaml | 3 +- lib/arch_obj_models/csr_field.rb | 8 + lib/arch_obj_models/obj.rb | 127 +++++++++++++--- lib/idl/ast.rb | 11 +- schemas/csr_schema.json | 25 +-- schemas/schema_defs.json | 36 +++++ 7 files changed, 307 insertions(+), 154 deletions(-) diff --git a/arch/csr/hstatus.yaml b/arch/csr/hstatus.yaml index a19aa4bc8f..5081d899d0 100644 --- a/arch/csr/hstatus.yaml +++ b/arch/csr/hstatus.yaml @@ -15,30 +15,33 @@ description: | definedBy: H fields: VSXL: + long_name: VS-mode XLen location: 33-32 base: 64 - description: | - *VS-mode XLen* - - [when,"VSXLEN == 3264"] - -- - Determines the effective XLEN in VS-mode. Valid values are: - - [separator="!"] - !=== - ! Value ! VSXLEN - - ! 0 ! 32 - ! 1 ! 64 - !=== - - -- - - [when,"VSXLEN = 32"] - Because the implementation only supports a single VSXLEN == 32, this field is read-only-0. - - [when,"VSXLEN = 64"] - Because the implementation only supports a single VSXLEN == 64, this field is read-only-1. + description: + - id: csr-hstatus-vsxl-values + normative: false + text: | + Determines the effective XLEN in VS-mode. Valid values are: + + [separator="!"] + !=== + ! Value ! VSXLEN + + ! 0 ! 32 + ! 1 ! 64 + !=== + when(): return VSXLEN == 3264; + - id: csr-hstatus-vsxl-rv32 + normative: false + text: | + Because the implementation only supports a single VSXLEN == 32, this field is read-only-0. + when(): return VSXLEN == 32; + - id: csr-hstatus-vsxl-rv64 + normative: false + text: | + Because the implementation only supports a single VSXLEN == 64, this field is read-only-1. + when(): return VSXLEN == 64; type(): | if ((VSXLEN == 32) || (VSXLEN == 64)) { @@ -69,69 +72,77 @@ fields: } VTSR: location: 22 - description: | - *Virtual Trap SRET* - - When `hstatus.VTSR` is set, executing the `sret` instruction in VS-mode - raises a `Virtual Instruction` exception. - - When `hstatus.VTSR` is clear, an `sret` instruction in VS-mode returns control - to the mode stored in `vsstatus.SPP`. + long_name: Virtual Trap SRET + description: + - id: csr-hstatus-vtsr-behavior + normative: false + text: | + When `hstatus.VTSR` is set, executing the `sret` instruction in VS-mode + raises a `Virtual Instruction` exception. + + When `hstatus.VTSR` is clear, an `sret` instruction in VS-mode returns control + to the mode stored in `vsstatus.SPP`. type: RW reset_value: UNDEFINED_LEGAL VTW: location: 21 - description: | - *Virtual Trap WFI* - - When `hstatus.VTW` is set, a `wfi` instruction executed in VS-mode raises - a `Virtual Instruction` exception after waiting an implementation-defined - amount of time (which can be 0). - - When both `hstatus.VTW` and `mstatus.TW` are clear, a `wfi` instruction - executes in VS-mode without a timeout period. - - The `wfi` instruction is also affected by `mstatus.TW`, as shown below: - - [separator="!",%autowidth,%footer] - !=== - .2+! [.rotate]#`mstatus.TW`# .2+! [.rotate]#`hstatus.VTW`# 4+^.>! `wfi` behavior - h! HS-mode h! U-mode h! VS-mode h! VU-mode - - ! 0 ! 0 ! Wait ! Trap (I) ! Wait ! Trap (V) - ! 0 ! 1 ! Wait ! Trap (I) ! Trap (V) ! Trap (V) - ! 1 ! - ! Trap (I) ! Trap (I) ! Trap (I) ! Trap (I) - - 6+! Trap (I) - Trap with `Illegal Instruction` code + - Trap (V) - Trap with `Virtual Instruction` code - !=== + long_name: Virtual Trap WFI + description: + - id: csr-hstatus-vtw-behavior + normative: false + text: | + When `hstatus.VTW` is set, a `wfi` instruction executed in VS-mode raises + a `Virtual Instruction` exception after waiting an implementation-defined + amount of time (which can be 0). + + When both `hstatus.VTW` and `mstatus.TW` are clear, a `wfi` instruction + executes in VS-mode without a timeout period. + + The `wfi` instruction is also affected by `mstatus.TW`, as shown below: + + [separator="!",%autowidth,%footer] + !=== + .2+! [.rotate]#`mstatus.TW`# .2+! [.rotate]#`hstatus.VTW`# 4+^.>! `wfi` behavior + h! HS-mode h! U-mode h! VS-mode h! VU-mode + + ! 0 ! 0 ! Wait ! Trap (I) ! Wait ! Trap (V) + ! 0 ! 1 ! Wait ! Trap (I) ! Trap (V) ! Trap (V) + ! 1 ! - ! Trap (I) ! Trap (I) ! Trap (I) ! Trap (I) + + 6+! Trap (I) - Trap with `Illegal Instruction` code + + Trap (V) - Trap with `Virtual Instruction` code + !=== type: RW reset_value: UNDEFINED_LEGAL VTVM: location: 20 - description: | - *Virtual Trap Virtual Memory* - - When set, a 'Virtual Instruction` trap occurs when executing an `sfence.vma`, `sinval.vma`, - or an explicit CSR access of the `satp` (really `vsatp`) register when in VS-mode. + long_name: Virtual Trap Virtual Memory + description: + - id: csr-hstatus-vtvm-behavior + normative: false + text: | + When set, a 'Virtual Instruction` trap occurs when executing an `sfence.vma`, `sinval.vma`, + or an explicit CSR access of the `satp` (really `vsatp`) register when in VS-mode. - When clear, the instructions execute as normal in VS-mode. + When clear, the instructions execute as normal in VS-mode. - Notably, `hstatus.VTVM` does *not* cause `hfence.vvma`, `sfence.w.inval`, or `sfence.inval.ir` to trap. + Notably, `hstatus.VTVM` does *not* cause `hfence.vvma`, `sfence.w.inval`, or `sfence.inval.ir` to trap. - `mstatus.TVM` does not affect the VS-mode instructions controlled by `hstatus.TVTM`. + `mstatus.TVM` does not affect the VS-mode instructions controlled by `hstatus.TVTM`. type: RW reset_value: UNDEFINED_LEGAL VGEIN: location: 17-12 - description: | - *Virtual Guest External Interrupt Number* + long_name: Virtual Guest External Interrupt Number + description: + - id: csr-hstatus-vgein-behavior + normative: false + text: | + Selects the guest external interrupt source for VS-level external interrupts. - Selects the guest external interrupt source for VS-level external interrupts. + When `hstatus.VGEIN` == 0, no external interrupt source is selected. - When `hstatus.VGEIN` == 0, no external interrupt source is selected. - - When `hstatus.VGEIN` != 0, it selects which bit of `hgeip` is currently active in VS-mode. + When `hstatus.VGEIN` != 0, it selects which bit of `hgeip` is currently active in VS-mode. type(): | # if NUM_EXTERNAL_GUEST_INTERRUPTS+1 is 63 (because indexing in `hgeip` starts at 1), @@ -153,77 +164,93 @@ fields: } HU: location: 9 - description: | - *Hypervisor in U-mode* - - When set, the hypervisor load/store instructions (`hlv`, `hlvx`, and `hsv`) can be - executed in U-mode. - - When clear, the hypervisor load/store instructions cause an `Illegal Instruction` trap. + long_name: Hypervisor in U-mode + description: + - id: csr-hstatus-hu-behavior + normative: false + text: | + When set, the hypervisor load/store instructions (`hlv`, `hlvx`, and `hsv`) can be + executed in U-mode. + + When clear, the hypervisor load/store instructions cause an `Illegal Instruction` trap. type: RW reset_value: UNDEFINED_LEGAL SPVP: location: 8 - description: | - *Supervisor Previous Virtual Privilege* + long_name: Supervisor Previous Virtual Privilege + description: + - id: csr-hstatus-spvp-behavior + normative: false + text: | + Written by hardware: - Written by hardware: + * When taking a trap into HS-mode from VS-mode or VU-mode, `hstatus.SPVP` is written with the nominal privilege mode - * When taking a trap into HS-mode from VS-mode or VU-mode, `hstatus.SPVP` is written with the nominal privilege mode + Notably, unlike its analog `mstatus.SPP`, `hstatus.SPVP` is *not* cleared when returning from a trap. - Notably, unlike its analog `mstatus.SPP`, `hstatus.SPVP` is *not* cleared when returning from a trap. + Can also be written by software without immediate side-effect. - Can also be written by software without immediate side-effect. + Affects execution by: - Affects execution by: - - * Controls the effective privilege level applied to the hypervisor load/store instructions, `hlv`, `hlvx`, and `hsv`. + * Controls the effective privilege level applied to the hypervisor load/store instructions, `hlv`, `hlvx`, and `hsv`. type: RW reset_value: UNDEFINED_LEGAL SPV: location: 7 - description: | - *Supervisor Previous Virtualization Mode* - - Written by hardware: + long_name: Supervisor Previous Virtualization Mode + description: + - id: csr-hstatus-spv-behavior + normative: false + text: | + Written by hardware: - * On a trap into HS-mode, hardware writes 1 when the prior mode was VS-mode or VU-mode, and 0 otherwise. + * On a trap into HS-mode, hardware writes 1 when the prior mode was VS-mode or VU-mode, and 0 otherwise. - Can also be written by software without immediate side-effect. + Can also be written by software without immediate side-effect. - Affects execution by: + Affects execution by: - * When an `sret` instruction in executed in HS-mode or M-mode, - control returns to VS-mode or VU-mode (as selected by `mstatus.SPP`) when - `hstatus.SPV` is 1 and to HS-mode or U-mode otherwise. + * When an `sret` instruction in executed in HS-mode or M-mode, + control returns to VS-mode or VU-mode (as selected by `mstatus.SPP`) when + `hstatus.SPV` is 1 and to HS-mode or U-mode otherwise. type: RW reset_value: UNDEFINED_LEGAL GVA: location: 6 - description: | - *Guest Virtual Address* - - Written by hardware whenever a trap is taken into HS-mode: + long_name: Guest Virtual Address + description: + - id: csr-hstatus-gva-behavior + normative: false + text: | + Written by hardware whenever a trap is taken into HS-mode: - * Writes 1 when a trap causes a guest virtual address to be written into `stval` (`Breakpoint`, `* Address Misaligned`, `* Access Fault`, `* Page Fault`, or `* Guest-Page Fault`). - * Writes 0 otherwise + * Writes 1 when a trap causes a guest virtual address to be written into `stval` (`Breakpoint`, `* Address Misaligned`, `* Access Fault`, `* Page Fault`, or `* Guest-Page Fault`). + * Writes 0 otherwise - Does not affect execution. + Does not affect execution. type: RW reset_value: UNDEFINED_LEGAL VSBE: location: 5 - description: | - *VS-mode Big Endian* - - Controls the endianness of data VS-mode (0 = little, 1 = big). - Instructions are always little endian, regardless of the data setting. - - [when,"VS_MODE_ENDIANESS == little"] - Since the CPU does not support big endian in VS-mode, this is hardwired to 0. - - [when,"VS_MODE_ENDIANESS == bit"] - Since the CPU does not support little endian in VS-mode, this is hardwired to 1. + long_name: VS-mode Big Endian + description: + - id: csr-hstatus-vgein-behavior + normative: false + text: | + Controls the endianness of data VS-mode (0 = little, 1 = big). + Instructions are always little endian, regardless of the data setting. + + - id: csr-hstatus-vgein-little-endian + normative: false + text: | + Since the CPU does not support big endian in VS-mode, this is hardwired to 0. + when(): return VS_MODE_ENDIANESS == "little"; + + - id: csr-hstatus-vgein-big-endian + normative: false + text: | + Since the CPU does not support little endian in VS-mode, this is hardwired to 1. + when(): return VS_MODE_ENDIANESS == "big"; type(): | if (VS_MODE_ENDIANESS == "dynamic") { # mode is mutable diff --git a/arch/csr/mie.yaml b/arch/csr/mie.yaml index 927ed583c8..4eca4d5187 100644 --- a/arch/csr/mie.yaml +++ b/arch/csr/mie.yaml @@ -8,8 +8,7 @@ address: 0x304 priv_mode: M length: MXLEN definedBy: Sm -description: - $copy: "mip.yaml#/description" +description: "mip.yaml#/description" fields: SSIE: location: 1 diff --git a/lib/arch_obj_models/csr_field.rb b/lib/arch_obj_models/csr_field.rb index fac8982a53..c1c2c2f10d 100644 --- a/lib/arch_obj_models/csr_field.rb +++ b/lib/arch_obj_models/csr_field.rb @@ -29,6 +29,14 @@ def initialize(parent_csr, field_name, field_data) @parent = parent_csr end + # CSR fields are defined in their parent CSR YAML file + def __source = @parent.__source + + # CSR field data starts at fields: NAME: with the YAML + def source_line(*path) + super("fields", name, *path) + end + # For a full config, whether or not the field is implemented # For a partial config, whether or the it is possible for the field to be implemented # diff --git a/lib/arch_obj_models/obj.rb b/lib/arch_obj_models/obj.rb index 67a2826438..6f4bd45e2d 100644 --- a/lib/arch_obj_models/obj.rb +++ b/lib/arch_obj_models/obj.rb @@ -90,7 +90,7 @@ def initialize(path, result) end end - attr_reader :data, :data_path, :name, :long_name, :description + attr_reader :data, :data_path, :name, :long_name # @return [Architecture] If only a specification (no config) is known # @return [ConfiguredArchitecture] If a specification and config is known @@ -184,6 +184,73 @@ def definedBy @data["definedBy"] end + # @param normative [Boolean] Include normative text? + # @param non_normative [Boolean] Include non-normative text? + # @param when_cb [Proc(AstNode, String)] Callback to generate text for the un-knowable ast + # @return [String] Descripton of the object, from YAML + def description( + normative: true, # display normative text? + non_normative: true, # display non-normative text? + when_cb: proc { |when_ast, text| + ["When `#{when_ast.gen_adoc(0)}`", text] + } + ) + case @data['description'] + when String + @data['description'] + when Array + stmts = @data['description'] + desc_lines = [] + stmts.each_with_index do |stmt, idx| + if stmt.key?("when()") + # conditional + ast = @cfg_arch.idl_compiler.compile_func_body( + stmt["when()"], + return_type: Idl::Type.new(:boolean), + symtab: @cfg_arch.symtab, + name: "#{name}.description[#{idx}].when", + input_file: __source, + input_line: source_line("description", idx, "when()") + ) + + symtab = @cfg_arch.symtab.global_clone + symtab.push(ast) + unless ast.return_type(symtab).kind == :boolean + ast.type_error "`when` must be a Boolean in description" + end + + value_result = ast.value_try do + if ast.return_value(symtab) == true + # condition holds, add the test + if (stmt["normative"] == true) && normative + desc_lines << stmt["text"] + elsif (stmt["normative"] == false) && non_normative + desc_lines << stmt["text"] + end + end + # else, value is false; don't add it + end + ast.value_else(value_result) do + # value of 'when' isn't known. prune out what we do know + # and display it + pruned_ast = ast.prune(symtab) + pruned_ast.freeze_tree(symtab) + desc_lines.concat(when_cb.call(pruned_ast, stmt["text"])) + end + symtab.pop + symtab.release + else + if (stmt["normative"] == true) && normative + desc_lines << stmt["text"] + elsif (stmt["normative"] == false) && non_normative + desc_lines << stmt["text"] + end + end + end + desc_lines.join("\n\n") + end + end + # @param data [Hash] Hash with fields to be added # @param data_path [Pathname] Path to the data file def initialize(data, data_path, arch: nil) @@ -197,7 +264,6 @@ def initialize(data, data_path, arch: nil) @arch = arch @name = data["name"] @long_name = data["long_name"] - @description = data["description"] @sem = Concurrent::Semaphore.new(1) @cache = Concurrent::Hash.new @@ -245,19 +311,19 @@ def primary_defined_by # @return [Integer] THe source line number of +path+ in the YAML file # @param path [Array] Path to the scalar you want. # @example - # yaml = <<~YAML - # misa: - # sw_read(): ... - # fields: - # A: - # type(): ... - # YAML + # 00: yaml = <<~YAML + # 01: misa: + # 02: sw_read(): ... + # 03: fields: + # 04: A: + # 05: type(): ... + # 06: YAML # misa_csr.source_line("sw_read()") #=> 2 # mis_csr.source_line("fields", "A", "type()") #=> 5 def source_line(*path) # find the line number of this operation() in the *original* file - yaml_filename = @data["$source"] + yaml_filename = __source raise "No $source for #{name}" if yaml_filename.nil? line = nil path_idx = 0 @@ -269,27 +335,46 @@ def source_line(*path) else mapping end + found = false while path_idx < path.size - idx = 0 - while idx < data.children.size - if data.children[idx].value == path[path_idx] - if path_idx == path.size - 1 - line = data.children[idx + 1].start_line - if data.children[idx + 1].style == Psych::Nodes::Scalar::LITERAL - line += 1 # the string actually begins on the next line + if data.is_a?(Psych::Nodes::Mapping) + idx = 0 + while idx < data.children.size + if data.children[idx].value == path[path_idx] + if path_idx == path.size - 1 + line = data.children[idx + 1].start_line + if data.children[idx + 1].style == Psych::Nodes::Scalar::LITERAL + line += 1 # the string actually begins on the next line + end + return line + else + found = true + data = data.children[idx + 1] + path_idx += 1 + break end + end + idx += 2 + end + raise "path #{path[path_idx]} @ #{path_idx} not found for #{self.class.name}##{name}" unless found + elsif data.is_a?(Psych::Nodes::Sequence) + raise "Expecting Integer" unless path[path_idx].is_a?(Integer) + + if data.children.size > path[path_idx] + if path_idx == path.size - 1 + line = data.children[path[path_idx]].start_line return line else - data = data.children[idx + 1] + data = data.children[path[path_idx]] path_idx += 1 - break end + else + raise "Index out of bounds" end - idx += 2 end end end - raise "Didn't find key '#{path}' in #{@data['$source']}" + raise "Didn't find path '#{path}' in #{__source}" end end diff --git a/lib/idl/ast.rb b/lib/idl/ast.rb index 23ac6dd49a..ecb5f095b6 100644 --- a/lib/idl/ast.rb +++ b/lib/idl/ast.rb @@ -4080,7 +4080,7 @@ def return_types(symtab) # @return [Type] The actual return type def return_type(symtab) - return_expression.retrun_type(symtab) + return_expression.return_type(symtab) end # @return [Type] The expected return type (as defined by the encolsing function) @@ -5026,6 +5026,15 @@ def type_check(symtab) end end + def return_type(symtab) + # go through the statements, and return the first one that has a return type + stmts.each do |s| + if s.is_a?(Returns) + return s.return_type(symtab) + end + end + end + # @!macro return_value # # @note arguments and template arguments must be put on the symtab before calling diff --git a/schemas/csr_schema.json b/schemas/csr_schema.json index c18e398ee0..13ecc70f1d 100644 --- a/schemas/csr_schema.json +++ b/schemas/csr_schema.json @@ -15,6 +15,10 @@ "type": "string", "description": "Name of the field. Optional because it is implied by the object key of the CSR object holding the field" }, + "long_name": { + "type": "string", + "description": "Long name of the field" + }, "location": { "$ref": "schema_defs.json#/$defs/field_location", "description": "Location of the field within the CSR register" @@ -59,7 +63,7 @@ "description": "When a CSR field is only defined in RV32, or RV64, the base that defines it. When defined in both, this field should be absent." }, "description": { - "type": "string", + "$ref": "schema_defs.json#/$defs/spec_text", "description": "Function of the field" }, "type": { @@ -202,23 +206,8 @@ "description": "Descriptive name for the CSR" }, "description": { - "oneOf": [ - { - "type": "string", - "description": "A full Asciidoc description of the CSR, intended to be used as documentation." - }, - { - "type": "object", - "description": "A full Asciidoc description of the CSR, intended to be used as documentation.", - "properties": { - "$copy": { - "type": "string", - "format": "uri-reference" - } - }, - "additionalProperties": false - } - ] + "$ref": "schema_defs.json#/$defs/spec_text", + "description": "Function of the field" }, "definedBy": { "$ref": "schema_defs.json#/$defs/requires_entry", diff --git a/schemas/schema_defs.json b/schemas/schema_defs.json index fb60ff841e..154f0505fe 100644 --- a/schemas/schema_defs.json +++ b/schemas/schema_defs.json @@ -62,6 +62,42 @@ "nonstandard-released" ] }, + "spec_text": { + "oneOf": [ + { + "type": "string", + "description": "Asciidoctor source" + }, + { + "type": "array", + "items": { + "$ref": "#/$defs/tagged_text" + } + } + ] + }, + "tagged_text": { + "type": "object", + "required": ["id", "text", "normative"], + "properties": { + "id": { + "type": "string", + "description": "Unique identifier for the statement" + }, + "text": { + "type": "string", + "description": "Asciidoctor source" + }, + "normative": { + "type": "boolean" + }, + "when()": { + "type": "string", + "description": "IDL boolean expression. When true, the text applies" + } + }, + "additionalProperties": false + }, "license": { "description": "License that applies to the textual documentation for this extension", "type": "object", From 71801ebeeef06b4aa76a345e094e19b7f5458494 Mon Sep 17 00:00:00 2001 From: Derek Hower <134728312+dhower-qc@users.noreply.github.com> Date: Tue, 15 Apr 2025 13:22:20 -0400 Subject: [PATCH 025/207] Rename Sm#XLEN parameter -> Sm#MXLEN (#575) * Rename Sm#XLEN parameter -> Sm#MXLEN * fix: missing base in hpmcounterNh * fix: use MXLEN in Zilsd instructions --- arch/certificate_model/MC100-32.yaml | 2 +- arch/certificate_model/MC100-64.yaml | 2 +- arch/certificate_model/MC200-64.yaml | 2 +- arch/certificate_model/MC300-64.yaml | 2 +- .../MockCertificateModel.yaml | 2 +- arch/csr/H/vsatp.yaml | 2 +- arch/csr/I/pmpaddr0.yaml | 2 +- arch/csr/I/pmpaddr1.yaml | 2 +- arch/csr/I/pmpaddr10.yaml | 2 +- arch/csr/I/pmpaddr11.yaml | 2 +- arch/csr/I/pmpaddr12.yaml | 2 +- arch/csr/I/pmpaddr13.yaml | 2 +- arch/csr/I/pmpaddr14.yaml | 2 +- arch/csr/I/pmpaddr15.yaml | 2 +- arch/csr/I/pmpaddr16.yaml | 2 +- arch/csr/I/pmpaddr17.yaml | 2 +- arch/csr/I/pmpaddr18.yaml | 2 +- arch/csr/I/pmpaddr19.yaml | 2 +- arch/csr/I/pmpaddr2.yaml | 2 +- arch/csr/I/pmpaddr20.yaml | 2 +- arch/csr/I/pmpaddr21.yaml | 2 +- arch/csr/I/pmpaddr22.yaml | 2 +- arch/csr/I/pmpaddr23.yaml | 2 +- arch/csr/I/pmpaddr24.yaml | 2 +- arch/csr/I/pmpaddr25.yaml | 2 +- arch/csr/I/pmpaddr26.yaml | 2 +- arch/csr/I/pmpaddr27.yaml | 2 +- arch/csr/I/pmpaddr28.yaml | 2 +- arch/csr/I/pmpaddr29.yaml | 2 +- arch/csr/I/pmpaddr3.yaml | 2 +- arch/csr/I/pmpaddr30.yaml | 2 +- arch/csr/I/pmpaddr31.yaml | 2 +- arch/csr/I/pmpaddr32.yaml | 2 +- arch/csr/I/pmpaddr33.yaml | 2 +- arch/csr/I/pmpaddr34.yaml | 2 +- arch/csr/I/pmpaddr35.yaml | 2 +- arch/csr/I/pmpaddr36.yaml | 2 +- arch/csr/I/pmpaddr37.yaml | 2 +- arch/csr/I/pmpaddr38.yaml | 2 +- arch/csr/I/pmpaddr39.yaml | 2 +- arch/csr/I/pmpaddr4.yaml | 2 +- arch/csr/I/pmpaddr40.yaml | 2 +- arch/csr/I/pmpaddr41.yaml | 2 +- arch/csr/I/pmpaddr42.yaml | 2 +- arch/csr/I/pmpaddr43.yaml | 2 +- arch/csr/I/pmpaddr44.yaml | 2 +- arch/csr/I/pmpaddr45.yaml | 2 +- arch/csr/I/pmpaddr46.yaml | 2 +- arch/csr/I/pmpaddr47.yaml | 2 +- arch/csr/I/pmpaddr48.yaml | 2 +- arch/csr/I/pmpaddr49.yaml | 2 +- arch/csr/I/pmpaddr5.yaml | 2 +- arch/csr/I/pmpaddr50.yaml | 2 +- arch/csr/I/pmpaddr51.yaml | 2 +- arch/csr/I/pmpaddr52.yaml | 2 +- arch/csr/I/pmpaddr53.yaml | 2 +- arch/csr/I/pmpaddr54.yaml | 2 +- arch/csr/I/pmpaddr55.yaml | 2 +- arch/csr/I/pmpaddr56.yaml | 2 +- arch/csr/I/pmpaddr57.yaml | 2 +- arch/csr/I/pmpaddr58.yaml | 2 +- arch/csr/I/pmpaddr59.yaml | 2 +- arch/csr/I/pmpaddr6.yaml | 2 +- arch/csr/I/pmpaddr60.yaml | 2 +- arch/csr/I/pmpaddr61.yaml | 2 +- arch/csr/I/pmpaddr62.yaml | 2 +- arch/csr/I/pmpaddr63.yaml | 2 +- arch/csr/I/pmpaddr7.yaml | 2 +- arch/csr/I/pmpaddr8.yaml | 2 +- arch/csr/I/pmpaddr9.yaml | 2 +- arch/csr/I/pmpaddrN.layout | 2 +- arch/csr/Zihpm/hpmcounterNh.layout | 1 + arch/csr/mconfigptr.yaml | 4 +- arch/csr/misa.yaml | 2 +- arch/csr/satp.yaml | 2 +- arch/ext/Sm.yaml | 4 +- arch/ext/U.yaml | 2 +- arch/inst/A/lr.w.yaml | 2 +- arch/inst/A/sc.w.yaml | 2 +- arch/inst/I/jalr.yaml | 2 +- arch/inst/I/sltiu.yaml | 2 +- arch/inst/M/div.yaml | 6 +- arch/inst/M/divu.yaml | 2 +- arch/inst/M/divw.yaml | 2 +- arch/inst/M/mul.yaml | 2 +- arch/inst/M/mulh.yaml | 4 +- arch/inst/M/mulhsu.yaml | 8 +- arch/inst/M/mulhu.yaml | 6 +- arch/inst/M/rem.yaml | 2 +- arch/inst/Zicsr/csrrw.yaml | 2 +- arch/inst/Zicsr/csrrwi.yaml | 2 +- arch/inst/Zilsd/ld.yaml | 6 +- arch/inst/Zilsd/sd.yaml | 6 +- arch/isa/builtin_functions.idl | 4 +- arch/isa/globals.isa | 78 +++++++++---------- arch/isa/interrupts.idl | 32 ++++---- arch/isa/util.idl | 4 +- arch/prose/idl.adoc | 53 ++++++------- arch_overlay/qc_iu/inst/Xqci/qc.addusat.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.csrrwri.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extdu.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml | 2 +- arch_overlay/qc_iu/inst/Xqci/qc.shlsat.yaml | 4 +- arch_overlay/qc_iu/inst/Xqci/qc.shlusat.yaml | 6 +- backends/cfg_html_doc/templates/csr.adoc.erb | 2 +- backends/cfg_html_doc/templates/inst.adoc.erb | 4 +- .../cpp_hart_gen/cpp/test/test_decode.cpp | 2 +- backends/ext_pdf_doc/idl_lexer.rb | 2 +- cfgs/MC100-32.yaml | 2 +- cfgs/config_validation.rb | 14 ++-- cfgs/example_rv64_with_overlay.yaml | 2 +- cfgs/mc100-32-full-example.yaml | 2 +- cfgs/qc_iu.yaml | 2 +- cfgs/rv32.yaml | 2 +- cfgs/rv64.yaml | 2 +- lib/arch_obj_models/csr.rb | 6 +- lib/arch_obj_models/csr_field.rb | 12 +-- lib/config.rb | 8 +- lib/idl/ast.rb | 14 ++-- lib/idl/idl.treetop | 18 ++--- lib/idl/type.rb | 2 +- 127 files changed, 253 insertions(+), 257 deletions(-) diff --git a/arch/certificate_model/MC100-32.yaml b/arch/certificate_model/MC100-32.yaml index a2a0d00dbd..9315f976f0 100644 --- a/arch/certificate_model/MC100-32.yaml +++ b/arch/certificate_model/MC100-32.yaml @@ -136,6 +136,6 @@ extensions: M_MODE_ENDIANESS: schema: const: little - XLEN: + MXLEN: schema: const: 32 diff --git a/arch/certificate_model/MC100-64.yaml b/arch/certificate_model/MC100-64.yaml index bede0a7a08..b7a37a1f92 100644 --- a/arch/certificate_model/MC100-64.yaml +++ b/arch/certificate_model/MC100-64.yaml @@ -15,6 +15,6 @@ base: 64 extensions: Sm: parameters: - XLEN: + MXLEN: schema: const: 64 diff --git a/arch/certificate_model/MC200-64.yaml b/arch/certificate_model/MC200-64.yaml index a4925bdb80..b09e4728dc 100644 --- a/arch/certificate_model/MC200-64.yaml +++ b/arch/certificate_model/MC200-64.yaml @@ -15,6 +15,6 @@ base: 64 extensions: Sm: parameters: - XLEN: + MXLEN: schema: const: 64 diff --git a/arch/certificate_model/MC300-64.yaml b/arch/certificate_model/MC300-64.yaml index 251b497826..105a3ebe93 100644 --- a/arch/certificate_model/MC300-64.yaml +++ b/arch/certificate_model/MC300-64.yaml @@ -15,6 +15,6 @@ base: 64 extensions: Sm: parameters: - XLEN: + MXLEN: schema: const: 64 diff --git a/arch/certificate_model/MockCertificateModel.yaml b/arch/certificate_model/MockCertificateModel.yaml index b9c072e705..609ce852dd 100644 --- a/arch/certificate_model/MockCertificateModel.yaml +++ b/arch/certificate_model/MockCertificateModel.yaml @@ -145,7 +145,7 @@ extensions: # version: "=1.1.0" # then: # enum: [little, big] - XLEN: + MXLEN: schema: const: 64 CONFIG_PTR_ADDRESS: diff --git a/arch/csr/H/vsatp.yaml b/arch/csr/H/vsatp.yaml index fef44032c4..f7a81242cb 100644 --- a/arch/csr/H/vsatp.yaml +++ b/arch/csr/H/vsatp.yaml @@ -96,7 +96,7 @@ fields: return UNDEFINED_LEGAL_DETERMINISTIC; } } else { - XReg shamt = ((XLEN == 32) || (CSR[mstatus].SXL == $bits(XRegWidth::XLEN32))) ? 9 : 16; + XReg shamt = ((xlen() == 32) || (CSR[mstatus].SXL == $bits(XRegWidth::XLEN32))) ? 9 : 16; XReg all_ones = ((1 << shamt) - 1); XReg largest_allowed_asid = (1 << shamt) - 1; diff --git a/arch/csr/I/pmpaddr0.yaml b/arch/csr/I/pmpaddr0.yaml index 250d438c06..eb51f581d5 100644 --- a/arch/csr/I/pmpaddr0.yaml +++ b/arch/csr/I/pmpaddr0.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg0].pmp0cfg[4] == 1)) { return CSR[pmpaddr0].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr1.yaml b/arch/csr/I/pmpaddr1.yaml index 5e24bf677c..b06e1e6d42 100644 --- a/arch/csr/I/pmpaddr1.yaml +++ b/arch/csr/I/pmpaddr1.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg0].pmp1cfg[4] == 1)) { return CSR[pmpaddr1].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr10.yaml b/arch/csr/I/pmpaddr10.yaml index a7da04a4b6..3e32cc3dca 100644 --- a/arch/csr/I/pmpaddr10.yaml +++ b/arch/csr/I/pmpaddr10.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg2].pmp10cfg[4] == 1)) { return CSR[pmpaddr10].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr11.yaml b/arch/csr/I/pmpaddr11.yaml index a8ccd0b6bc..0342ddc802 100644 --- a/arch/csr/I/pmpaddr11.yaml +++ b/arch/csr/I/pmpaddr11.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg2].pmp11cfg[4] == 1)) { return CSR[pmpaddr11].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr12.yaml b/arch/csr/I/pmpaddr12.yaml index 10f1f2efe5..f691a5a5c3 100644 --- a/arch/csr/I/pmpaddr12.yaml +++ b/arch/csr/I/pmpaddr12.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg3].pmp12cfg[4] == 1)) { return CSR[pmpaddr12].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr13.yaml b/arch/csr/I/pmpaddr13.yaml index 99d40a0936..a77be2e891 100644 --- a/arch/csr/I/pmpaddr13.yaml +++ b/arch/csr/I/pmpaddr13.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg3].pmp13cfg[4] == 1)) { return CSR[pmpaddr13].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr14.yaml b/arch/csr/I/pmpaddr14.yaml index cda0e1265e..a6754084d0 100644 --- a/arch/csr/I/pmpaddr14.yaml +++ b/arch/csr/I/pmpaddr14.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg3].pmp14cfg[4] == 1)) { return CSR[pmpaddr14].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr15.yaml b/arch/csr/I/pmpaddr15.yaml index 1cb1232715..8fea61982b 100644 --- a/arch/csr/I/pmpaddr15.yaml +++ b/arch/csr/I/pmpaddr15.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg3].pmp15cfg[4] == 1)) { return CSR[pmpaddr15].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr16.yaml b/arch/csr/I/pmpaddr16.yaml index d766d82fa5..1212b15737 100644 --- a/arch/csr/I/pmpaddr16.yaml +++ b/arch/csr/I/pmpaddr16.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg4].pmp16cfg[4] == 1)) { return CSR[pmpaddr16].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr17.yaml b/arch/csr/I/pmpaddr17.yaml index 94b5b47b47..70c5961098 100644 --- a/arch/csr/I/pmpaddr17.yaml +++ b/arch/csr/I/pmpaddr17.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg4].pmp17cfg[4] == 1)) { return CSR[pmpaddr17].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr18.yaml b/arch/csr/I/pmpaddr18.yaml index 1006a07df5..aac1c3013d 100644 --- a/arch/csr/I/pmpaddr18.yaml +++ b/arch/csr/I/pmpaddr18.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg4].pmp18cfg[4] == 1)) { return CSR[pmpaddr18].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr19.yaml b/arch/csr/I/pmpaddr19.yaml index 7caa8cfbed..4ecb5301b3 100644 --- a/arch/csr/I/pmpaddr19.yaml +++ b/arch/csr/I/pmpaddr19.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg4].pmp19cfg[4] == 1)) { return CSR[pmpaddr19].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr2.yaml b/arch/csr/I/pmpaddr2.yaml index 8805ecdafe..b05e6bde93 100644 --- a/arch/csr/I/pmpaddr2.yaml +++ b/arch/csr/I/pmpaddr2.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg0].pmp2cfg[4] == 1)) { return CSR[pmpaddr2].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr20.yaml b/arch/csr/I/pmpaddr20.yaml index 2479fbb520..03a71aca4f 100644 --- a/arch/csr/I/pmpaddr20.yaml +++ b/arch/csr/I/pmpaddr20.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg5].pmp20cfg[4] == 1)) { return CSR[pmpaddr20].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr21.yaml b/arch/csr/I/pmpaddr21.yaml index 27f99fec38..ac103a91dc 100644 --- a/arch/csr/I/pmpaddr21.yaml +++ b/arch/csr/I/pmpaddr21.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg5].pmp21cfg[4] == 1)) { return CSR[pmpaddr21].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr22.yaml b/arch/csr/I/pmpaddr22.yaml index e738359032..578486aa95 100644 --- a/arch/csr/I/pmpaddr22.yaml +++ b/arch/csr/I/pmpaddr22.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg5].pmp22cfg[4] == 1)) { return CSR[pmpaddr22].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr23.yaml b/arch/csr/I/pmpaddr23.yaml index b23078e01e..79536cb925 100644 --- a/arch/csr/I/pmpaddr23.yaml +++ b/arch/csr/I/pmpaddr23.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg5].pmp23cfg[4] == 1)) { return CSR[pmpaddr23].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr24.yaml b/arch/csr/I/pmpaddr24.yaml index f07a22f661..df2d34d962 100644 --- a/arch/csr/I/pmpaddr24.yaml +++ b/arch/csr/I/pmpaddr24.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg6].pmp24cfg[4] == 1)) { return CSR[pmpaddr24].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr25.yaml b/arch/csr/I/pmpaddr25.yaml index c3a791b223..67075e14fb 100644 --- a/arch/csr/I/pmpaddr25.yaml +++ b/arch/csr/I/pmpaddr25.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg6].pmp25cfg[4] == 1)) { return CSR[pmpaddr25].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr26.yaml b/arch/csr/I/pmpaddr26.yaml index ad2d1cb063..38d1ea6e5a 100644 --- a/arch/csr/I/pmpaddr26.yaml +++ b/arch/csr/I/pmpaddr26.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg6].pmp26cfg[4] == 1)) { return CSR[pmpaddr26].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr27.yaml b/arch/csr/I/pmpaddr27.yaml index ef27d3bf9c..59927a1abe 100644 --- a/arch/csr/I/pmpaddr27.yaml +++ b/arch/csr/I/pmpaddr27.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg6].pmp27cfg[4] == 1)) { return CSR[pmpaddr27].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr28.yaml b/arch/csr/I/pmpaddr28.yaml index b7f1bf4278..d6565e1437 100644 --- a/arch/csr/I/pmpaddr28.yaml +++ b/arch/csr/I/pmpaddr28.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg7].pmp28cfg[4] == 1)) { return CSR[pmpaddr28].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr29.yaml b/arch/csr/I/pmpaddr29.yaml index 7a0a971ad6..aaf57aeb76 100644 --- a/arch/csr/I/pmpaddr29.yaml +++ b/arch/csr/I/pmpaddr29.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg7].pmp29cfg[4] == 1)) { return CSR[pmpaddr29].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr3.yaml b/arch/csr/I/pmpaddr3.yaml index 7d79c0b926..f911df46b5 100644 --- a/arch/csr/I/pmpaddr3.yaml +++ b/arch/csr/I/pmpaddr3.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg0].pmp3cfg[4] == 1)) { return CSR[pmpaddr3].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr30.yaml b/arch/csr/I/pmpaddr30.yaml index 0b8481e85d..89ea4182de 100644 --- a/arch/csr/I/pmpaddr30.yaml +++ b/arch/csr/I/pmpaddr30.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg7].pmp30cfg[4] == 1)) { return CSR[pmpaddr30].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr31.yaml b/arch/csr/I/pmpaddr31.yaml index cb6889d511..3f601f73bd 100644 --- a/arch/csr/I/pmpaddr31.yaml +++ b/arch/csr/I/pmpaddr31.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg7].pmp31cfg[4] == 1)) { return CSR[pmpaddr31].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr32.yaml b/arch/csr/I/pmpaddr32.yaml index ef38ca7aab..b1a4fd4603 100644 --- a/arch/csr/I/pmpaddr32.yaml +++ b/arch/csr/I/pmpaddr32.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg8].pmp32cfg[4] == 1)) { return CSR[pmpaddr32].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr33.yaml b/arch/csr/I/pmpaddr33.yaml index 8bac474921..e690a3be69 100644 --- a/arch/csr/I/pmpaddr33.yaml +++ b/arch/csr/I/pmpaddr33.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg8].pmp33cfg[4] == 1)) { return CSR[pmpaddr33].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr34.yaml b/arch/csr/I/pmpaddr34.yaml index 8c06828a18..cd70b87c9a 100644 --- a/arch/csr/I/pmpaddr34.yaml +++ b/arch/csr/I/pmpaddr34.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg8].pmp34cfg[4] == 1)) { return CSR[pmpaddr34].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr35.yaml b/arch/csr/I/pmpaddr35.yaml index 8cc63fde59..3bcbedf0c3 100644 --- a/arch/csr/I/pmpaddr35.yaml +++ b/arch/csr/I/pmpaddr35.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg8].pmp35cfg[4] == 1)) { return CSR[pmpaddr35].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr36.yaml b/arch/csr/I/pmpaddr36.yaml index 4b22831126..8a921e4e41 100644 --- a/arch/csr/I/pmpaddr36.yaml +++ b/arch/csr/I/pmpaddr36.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg9].pmp36cfg[4] == 1)) { return CSR[pmpaddr36].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr37.yaml b/arch/csr/I/pmpaddr37.yaml index 957132029e..234e0eb95e 100644 --- a/arch/csr/I/pmpaddr37.yaml +++ b/arch/csr/I/pmpaddr37.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg9].pmp37cfg[4] == 1)) { return CSR[pmpaddr37].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr38.yaml b/arch/csr/I/pmpaddr38.yaml index 4979a53a5e..722a957875 100644 --- a/arch/csr/I/pmpaddr38.yaml +++ b/arch/csr/I/pmpaddr38.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg9].pmp38cfg[4] == 1)) { return CSR[pmpaddr38].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr39.yaml b/arch/csr/I/pmpaddr39.yaml index 41340b4953..77e63de93b 100644 --- a/arch/csr/I/pmpaddr39.yaml +++ b/arch/csr/I/pmpaddr39.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg9].pmp39cfg[4] == 1)) { return CSR[pmpaddr39].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr4.yaml b/arch/csr/I/pmpaddr4.yaml index 0a5d45b7ab..e3a9824ec1 100644 --- a/arch/csr/I/pmpaddr4.yaml +++ b/arch/csr/I/pmpaddr4.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg1].pmp4cfg[4] == 1)) { return CSR[pmpaddr4].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr40.yaml b/arch/csr/I/pmpaddr40.yaml index 21b3cf11fe..8f70807c63 100644 --- a/arch/csr/I/pmpaddr40.yaml +++ b/arch/csr/I/pmpaddr40.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg10].pmp40cfg[4] == 1)) { return CSR[pmpaddr40].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr41.yaml b/arch/csr/I/pmpaddr41.yaml index 6bb1bafc97..8810ac67ed 100644 --- a/arch/csr/I/pmpaddr41.yaml +++ b/arch/csr/I/pmpaddr41.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg10].pmp41cfg[4] == 1)) { return CSR[pmpaddr41].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr42.yaml b/arch/csr/I/pmpaddr42.yaml index bdab7845a1..c28d2d13bd 100644 --- a/arch/csr/I/pmpaddr42.yaml +++ b/arch/csr/I/pmpaddr42.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg10].pmp42cfg[4] == 1)) { return CSR[pmpaddr42].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr43.yaml b/arch/csr/I/pmpaddr43.yaml index 91b1812bcf..1d4a874910 100644 --- a/arch/csr/I/pmpaddr43.yaml +++ b/arch/csr/I/pmpaddr43.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg10].pmp43cfg[4] == 1)) { return CSR[pmpaddr43].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr44.yaml b/arch/csr/I/pmpaddr44.yaml index 5d0cdfca6f..e0032032b3 100644 --- a/arch/csr/I/pmpaddr44.yaml +++ b/arch/csr/I/pmpaddr44.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg11].pmp44cfg[4] == 1)) { return CSR[pmpaddr44].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr45.yaml b/arch/csr/I/pmpaddr45.yaml index 18e02b28cd..14c155c99c 100644 --- a/arch/csr/I/pmpaddr45.yaml +++ b/arch/csr/I/pmpaddr45.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg11].pmp45cfg[4] == 1)) { return CSR[pmpaddr45].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr46.yaml b/arch/csr/I/pmpaddr46.yaml index 950b7b2b89..f7974ce773 100644 --- a/arch/csr/I/pmpaddr46.yaml +++ b/arch/csr/I/pmpaddr46.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg11].pmp46cfg[4] == 1)) { return CSR[pmpaddr46].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr47.yaml b/arch/csr/I/pmpaddr47.yaml index fb6a5f4222..4a5641c6e6 100644 --- a/arch/csr/I/pmpaddr47.yaml +++ b/arch/csr/I/pmpaddr47.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg11].pmp47cfg[4] == 1)) { return CSR[pmpaddr47].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr48.yaml b/arch/csr/I/pmpaddr48.yaml index 9eba2608ad..c1e34e084b 100644 --- a/arch/csr/I/pmpaddr48.yaml +++ b/arch/csr/I/pmpaddr48.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg12].pmp48cfg[4] == 1)) { return CSR[pmpaddr48].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr49.yaml b/arch/csr/I/pmpaddr49.yaml index 26cb239966..d66c750e79 100644 --- a/arch/csr/I/pmpaddr49.yaml +++ b/arch/csr/I/pmpaddr49.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg12].pmp49cfg[4] == 1)) { return CSR[pmpaddr49].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr5.yaml b/arch/csr/I/pmpaddr5.yaml index 8a73ce45e6..7ce1692d3a 100644 --- a/arch/csr/I/pmpaddr5.yaml +++ b/arch/csr/I/pmpaddr5.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg1].pmp5cfg[4] == 1)) { return CSR[pmpaddr5].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr50.yaml b/arch/csr/I/pmpaddr50.yaml index 69aff1deca..00d418640b 100644 --- a/arch/csr/I/pmpaddr50.yaml +++ b/arch/csr/I/pmpaddr50.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg12].pmp50cfg[4] == 1)) { return CSR[pmpaddr50].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr51.yaml b/arch/csr/I/pmpaddr51.yaml index d5d6464f49..b03f36a114 100644 --- a/arch/csr/I/pmpaddr51.yaml +++ b/arch/csr/I/pmpaddr51.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg12].pmp51cfg[4] == 1)) { return CSR[pmpaddr51].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr52.yaml b/arch/csr/I/pmpaddr52.yaml index 49ace51ac0..10e19d1508 100644 --- a/arch/csr/I/pmpaddr52.yaml +++ b/arch/csr/I/pmpaddr52.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg13].pmp52cfg[4] == 1)) { return CSR[pmpaddr52].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr53.yaml b/arch/csr/I/pmpaddr53.yaml index 222efed3b3..9d8779fab9 100644 --- a/arch/csr/I/pmpaddr53.yaml +++ b/arch/csr/I/pmpaddr53.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg13].pmp53cfg[4] == 1)) { return CSR[pmpaddr53].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr54.yaml b/arch/csr/I/pmpaddr54.yaml index 6f7e7677d5..234d1591b2 100644 --- a/arch/csr/I/pmpaddr54.yaml +++ b/arch/csr/I/pmpaddr54.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg13].pmp54cfg[4] == 1)) { return CSR[pmpaddr54].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr55.yaml b/arch/csr/I/pmpaddr55.yaml index 0f9d5a5063..bfb4df80ca 100644 --- a/arch/csr/I/pmpaddr55.yaml +++ b/arch/csr/I/pmpaddr55.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg13].pmp55cfg[4] == 1)) { return CSR[pmpaddr55].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr56.yaml b/arch/csr/I/pmpaddr56.yaml index 4ca1bd3e55..5ccb966195 100644 --- a/arch/csr/I/pmpaddr56.yaml +++ b/arch/csr/I/pmpaddr56.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg14].pmp56cfg[4] == 1)) { return CSR[pmpaddr56].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr57.yaml b/arch/csr/I/pmpaddr57.yaml index bde0f738bf..0ee0f901a7 100644 --- a/arch/csr/I/pmpaddr57.yaml +++ b/arch/csr/I/pmpaddr57.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg14].pmp57cfg[4] == 1)) { return CSR[pmpaddr57].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr58.yaml b/arch/csr/I/pmpaddr58.yaml index 6fa1aa32e5..a415f0ec07 100644 --- a/arch/csr/I/pmpaddr58.yaml +++ b/arch/csr/I/pmpaddr58.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg14].pmp58cfg[4] == 1)) { return CSR[pmpaddr58].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr59.yaml b/arch/csr/I/pmpaddr59.yaml index 794787cfd1..0c82d33580 100644 --- a/arch/csr/I/pmpaddr59.yaml +++ b/arch/csr/I/pmpaddr59.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg14].pmp59cfg[4] == 1)) { return CSR[pmpaddr59].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr6.yaml b/arch/csr/I/pmpaddr6.yaml index 28733415e1..d83e719094 100644 --- a/arch/csr/I/pmpaddr6.yaml +++ b/arch/csr/I/pmpaddr6.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg1].pmp6cfg[4] == 1)) { return CSR[pmpaddr6].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr60.yaml b/arch/csr/I/pmpaddr60.yaml index 2932496683..e214a762c3 100644 --- a/arch/csr/I/pmpaddr60.yaml +++ b/arch/csr/I/pmpaddr60.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg15].pmp60cfg[4] == 1)) { return CSR[pmpaddr60].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr61.yaml b/arch/csr/I/pmpaddr61.yaml index 9570264235..318a6869b4 100644 --- a/arch/csr/I/pmpaddr61.yaml +++ b/arch/csr/I/pmpaddr61.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg15].pmp61cfg[4] == 1)) { return CSR[pmpaddr61].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr62.yaml b/arch/csr/I/pmpaddr62.yaml index 0ae068f5d1..3c8a113f5f 100644 --- a/arch/csr/I/pmpaddr62.yaml +++ b/arch/csr/I/pmpaddr62.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg15].pmp62cfg[4] == 1)) { return CSR[pmpaddr62].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr63.yaml b/arch/csr/I/pmpaddr63.yaml index d448de1db1..162842bb26 100644 --- a/arch/csr/I/pmpaddr63.yaml +++ b/arch/csr/I/pmpaddr63.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg15].pmp63cfg[4] == 1)) { return CSR[pmpaddr63].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr7.yaml b/arch/csr/I/pmpaddr7.yaml index 710c597570..2fb0969c8e 100644 --- a/arch/csr/I/pmpaddr7.yaml +++ b/arch/csr/I/pmpaddr7.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg1].pmp7cfg[4] == 1)) { return CSR[pmpaddr7].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr8.yaml b/arch/csr/I/pmpaddr8.yaml index e6807b1669..7f5873e0ab 100644 --- a/arch/csr/I/pmpaddr8.yaml +++ b/arch/csr/I/pmpaddr8.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg2].pmp8cfg[4] == 1)) { return CSR[pmpaddr8].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddr9.yaml b/arch/csr/I/pmpaddr9.yaml index 5cefea0afd..af7bd6d263 100644 --- a/arch/csr/I/pmpaddr9.yaml +++ b/arch/csr/I/pmpaddr9.yaml @@ -41,7 +41,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg2].pmp9cfg[4] == 1)) { return CSR[pmpaddr9].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/I/pmpaddrN.layout b/arch/csr/I/pmpaddrN.layout index 076b1d34e8..fe8345b96d 100644 --- a/arch/csr/I/pmpaddrN.layout +++ b/arch/csr/I/pmpaddrN.layout @@ -45,7 +45,7 @@ fields: sw_read(): | # when the mode is NAPOT and PMP_GRANULARITY >= 16, # bits (PMP_GRANULARITY-4):0 must read as ones - if (XLEN == 32) { + if (MXLEN == 32) { if ((PMP_GRANULARITY >= 16) && (CSR[pmpcfg<%= pmpcfg_num_32 %>].pmp<%= pmpaddr_num %>cfg[4] == 1)) { return CSR[pmpaddr<%= pmpaddr_num %>].ADDR | {PMP_GRANULARITY-3{1'b1}}; diff --git a/arch/csr/Zihpm/hpmcounterNh.layout b/arch/csr/Zihpm/hpmcounterNh.layout index 4c30ac4e5c..95742beae1 100644 --- a/arch/csr/Zihpm/hpmcounterNh.layout +++ b/arch/csr/Zihpm/hpmcounterNh.layout @@ -7,6 +7,7 @@ kind: csr name: hpmcounter<%= hpm_num %>h long_name: User-mode Hardware Performance Counter <%= hpm_num - 3 %>, high half address: 0x<%= (0xC83 + (hpm_num - 3)).to_s(16).upcase %> +base: 32 description: | Alias for M-mode CSR `mhpmcounter<%= hpm_num %>h`. diff --git a/arch/csr/mconfigptr.yaml b/arch/csr/mconfigptr.yaml index 96ef26a416..c9c644b053 100644 --- a/arch/csr/mconfigptr.yaml +++ b/arch/csr/mconfigptr.yaml @@ -50,5 +50,5 @@ fields: reset_value(): | return CONFIG_PTR_ADDRESS; legal?(csr_value): | - # pointer must be naturally aligned to XLEN - return ((XLEN-1) | csr_value.ADDRESS) == 0; + # pointer must be naturally aligned to MXLEN + return ((MXLEN-1) | csr_value.ADDRESS) == 0; diff --git a/arch/csr/misa.yaml b/arch/csr/misa.yaml index 4c554b6b06..94ce6cd4fb 100644 --- a/arch/csr/misa.yaml +++ b/arch/csr/misa.yaml @@ -16,7 +16,7 @@ fields: description: XLEN in M-mode. type: RO reset_value(): | - return (XLEN == 32) ? 2'b01 : 2'b10; + return (MXLEN == 32) ? 2'b01 : 2'b10; A: location: 0 description: | diff --git a/arch/csr/satp.yaml b/arch/csr/satp.yaml index b4d4a0d3a1..36db54e445 100644 --- a/arch/csr/satp.yaml +++ b/arch/csr/satp.yaml @@ -121,7 +121,7 @@ fields: return UNDEFINED_LEGAL_DETERMINISTIC; } } else { - XReg shamt = (XLEN == 32 || (CSR[mstatus].SXL == $bits(XRegWidth::XLEN32))) ? 9 : 16; + XReg shamt = (xlen() == 32 || (CSR[mstatus].SXL == $bits(XRegWidth::XLEN32))) ? 9 : 16; XReg all_ones = ((1 << shamt) - 1); XReg largest_allowed_asid = (1 << shamt) - 1; diff --git a/arch/ext/Sm.yaml b/arch/ext/Sm.yaml index 10f906c635..cc3c7c2dfe 100644 --- a/arch/ext/Sm.yaml +++ b/arch/ext/Sm.yaml @@ -168,9 +168,9 @@ exception_codes: when: version: ">= 1.13.0" params: - XLEN: + MXLEN: description: | - XLEN in M-mode (AKA MXLEN, tracked by issue #52) + XLEN in M-mode schema: type: integer enum: [32, 64] diff --git a/arch/ext/U.yaml b/arch/ext/U.yaml index 9b26176d52..d03fc50e26 100644 --- a/arch/ext/U.yaml +++ b/arch/ext/U.yaml @@ -40,7 +40,7 @@ params: type: integer enum: [32, 64, 3264] extra_validation: | - assert UXLEN == 32 if XLEN == 32 + assert UXLEN == 32 if MXLEN == 32 TRAP_ON_ECALL_FROM_U: description: | Whether or not an ECALL-from-U-mode causes a synchronous exception. diff --git a/arch/inst/A/lr.w.yaml b/arch/inst/A/lr.w.yaml index 3619988b8c..5de757e58a 100644 --- a/arch/inst/A/lr.w.yaml +++ b/arch/inst/A/lr.w.yaml @@ -9,7 +9,7 @@ description: | and registers a _reservation set_ -- a set of bytes that subsumes the bytes in the addressed word. - <%- if XLEN == 64 -%> + <%- if MXLEN == 64 -%> The 32-bit load result is sign-extended to 64-bits. <%- end -%> diff --git a/arch/inst/A/sc.w.yaml b/arch/inst/A/sc.w.yaml index 3fe348c4ab..019f8de403 100644 --- a/arch/inst/A/sc.w.yaml +++ b/arch/inst/A/sc.w.yaml @@ -14,7 +14,7 @@ description: | may be treated like a store. Regardless of success or failure, executing an `sc.w` instruction invalidates any reservation held by this hart. - <%- if XLEN == 64 -%> + <%- if MXLEN == 64 -%> [NOTE] If a value other than 0 or 1 is defined as a result for `sc.w`, the value will before sign-extended into _rd_. diff --git a/arch/inst/I/jalr.yaml b/arch/inst/I/jalr.yaml index f5f2f84595..56a5eb2ed1 100644 --- a/arch/inst/I/jalr.yaml +++ b/arch/inst/I/jalr.yaml @@ -29,7 +29,7 @@ operation(): | XReg returnaddr; returnaddr = $pc + 4; - jump((X[xs1] + $signed(imm)) & ~XLEN'1); + jump((X[xs1] + $signed(imm)) & ~MXLEN'1); X[xd] = returnaddr; # SPDX-SnippetBegin diff --git a/arch/inst/I/sltiu.yaml b/arch/inst/I/sltiu.yaml index f259dc5346..bfb9fa851f 100644 --- a/arch/inst/I/sltiu.yaml +++ b/arch/inst/I/sltiu.yaml @@ -29,7 +29,7 @@ access: vu: always data_independent_timing: true operation(): | - Bits sign_extend_imm = $signed(imm); + Bits sign_extend_imm = $signed(imm); X[xd] = (X[xs1] < sign_extend_imm) ? 1 : 0; # SPDX-SnippetBegin diff --git a/arch/inst/M/div.yaml b/arch/inst/M/div.yaml index cfb74ea019..d61e6f8378 100644 --- a/arch/inst/M/div.yaml +++ b/arch/inst/M/div.yaml @@ -41,11 +41,11 @@ operation(): | if (src2 == 0) { # division by zero. Since RISC-V does not have arithmetic exceptions, the result is defined # to be -1 - X[rd] = {XLEN{1'b1}}; + X[rd] = {MXLEN{1'b1}}; - } else if ((src1 == signed_min) && (src2 == {XLEN{1'b1}})) { + } else if ((src1 == signed_min) && (src2 == {MXLEN{1'b1}})) { # signed overflow. Since RISC-V does not have arithmetic exceptions, the result is defined - # to be the most negative number (-2^(XLEN-1)) + # to be the most negative number (-2^(MXLEN-1)) X[rd] = signed_min; } else { diff --git a/arch/inst/M/divu.yaml b/arch/inst/M/divu.yaml index 2fe57617d6..4aef905421 100644 --- a/arch/inst/M/divu.yaml +++ b/arch/inst/M/divu.yaml @@ -37,7 +37,7 @@ operation(): | if (src2 == 0) { # division by zero. Since RISC-V does not have arithmetic exceptions, the result is defined # to be -1 - X[rd] = {XLEN{1'b1}}; + X[rd] = {MXLEN{1'b1}}; } else { X[rd] = src1 / src2; } diff --git a/arch/inst/M/divw.yaml b/arch/inst/M/divw.yaml index 5a6cbec961..b57892b3c5 100644 --- a/arch/inst/M/divw.yaml +++ b/arch/inst/M/divw.yaml @@ -42,7 +42,7 @@ operation(): | if (src2 == 0) { # division by zero. Since RISC-V does not have arithmetic exceptions, the result is defined # to be -1 - X[rd] = {XLEN{1'b1}}; + X[rd] = {MXLEN{1'b1}}; } else if ((src1 == {33'b1, 31'b0}) && (src2 == 32'b1)) { # signed overflow. Since RISC-V does not have arithmetic exceptions, the result is defined diff --git a/arch/inst/M/mul.yaml b/arch/inst/M/mul.yaml index 9bcc8b85a6..610fa26b54 100644 --- a/arch/inst/M/mul.yaml +++ b/arch/inst/M/mul.yaml @@ -43,7 +43,7 @@ operation(): | XReg src1 = X[rs1]; XReg src2 = X[rs2]; - X[rd] = (src1 * src2)[XLEN-1:0]; + X[rd] = (src1 * src2)[MXLEN-1:0]; # SPDX-SnippetBegin # SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model diff --git a/arch/inst/M/mulh.yaml b/arch/inst/M/mulh.yaml index 9486ec85b0..6b2b7de9fa 100644 --- a/arch/inst/M/mulh.yaml +++ b/arch/inst/M/mulh.yaml @@ -41,10 +41,10 @@ operation(): | # enlarge and sign extend the sources Bits<1> rs1_sign_bit = X[rs1][xlen()-1]; - Bits src1 = {{xlen(){rs1_sign_bit}}, X[rs1]}; + Bits src1 = {{xlen(){rs1_sign_bit}}, X[rs1]}; Bits<1> rs2_sign_bit = X[rs2][xlen()-1]; - Bits src2 = {{xlen(){rs2_sign_bit}}, X[rs2]}; + Bits src2 = {{xlen(){rs2_sign_bit}}, X[rs2]}; # grab the high half of the result, and put it in rd X[rd] = (src1 * src2)[(xlen()*8'd2)-1:xlen()]; diff --git a/arch/inst/M/mulhsu.yaml b/arch/inst/M/mulhsu.yaml index d5bffc8508..eb8eca0a1b 100644 --- a/arch/inst/M/mulhsu.yaml +++ b/arch/inst/M/mulhsu.yaml @@ -40,11 +40,11 @@ operation(): | } # enlarge and extend the sources - Bits<1> rs1_sign_bit = X[rs1][XLEN-1]; - Bits src1 = {{XLEN{rs1_sign_bit}}, X[rs1]}; - Bits src2 = {{XLEN{1'b0}}, X[rs2]}; + Bits<1> rs1_sign_bit = X[rs1][MXLEN-1]; + Bits src1 = {{MXLEN{rs1_sign_bit}}, X[rs1]}; + Bits src2 = {{MXLEN{1'b0}}, X[rs2]}; - X[rd] = (src1 * src2)[(XLEN*8'd2)-1:XLEN]; + X[rd] = (src1 * src2)[(MXLEN*8'd2)-1:MXLEN]; # SPDX-SnippetBegin # SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model diff --git a/arch/inst/M/mulhu.yaml b/arch/inst/M/mulhu.yaml index 0179ff5237..d11f879cdb 100644 --- a/arch/inst/M/mulhu.yaml +++ b/arch/inst/M/mulhu.yaml @@ -40,10 +40,10 @@ operation(): | } # enlarge and zero-extend the sources - Bits src1 = {{XLEN{1'b0}}, X[rs1]}; - Bits src2 = {{XLEN{1'b0}}, X[rs2]}; + Bits src1 = {{MXLEN{1'b0}}, X[rs1]}; + Bits src2 = {{MXLEN{1'b0}}, X[rs2]}; - X[rd] = (src1 * src2)[(XLEN*8'd2)-1:XLEN]; + X[rd] = (src1 * src2)[(MXLEN*8'd2)-1:MXLEN]; # SPDX-SnippetBegin # SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model diff --git a/arch/inst/M/rem.yaml b/arch/inst/M/rem.yaml index 2c4bff4ed5..989a4e6d08 100644 --- a/arch/inst/M/rem.yaml +++ b/arch/inst/M/rem.yaml @@ -39,7 +39,7 @@ operation(): | # to be the dividend X[rd] = src1; - } else if ((src1 == {1'b1, {XLEN-1{1'b0}}}) && (src2 == {XLEN{1'b1}})) { + } else if ((src1 == {1'b1, {MXLEN-1{1'b0}}}) && (src2 == {MXLEN{1'b1}})) { # signed overflow. Since RISC-V does not have arithmetic exceptions, the result is defined # to be zero X[rd] = 0; diff --git a/arch/inst/Zicsr/csrrw.yaml b/arch/inst/Zicsr/csrrw.yaml index c379a802a8..d561ecd83b 100644 --- a/arch/inst/Zicsr/csrrw.yaml +++ b/arch/inst/Zicsr/csrrw.yaml @@ -31,7 +31,7 @@ access: operation(): | check_csr(csr, true, $encoding); - Bits initial_value = X[xs1]; + Bits initial_value = X[xs1]; if (xd != 0) { X[xd] = CSR[csr].sw_read(); diff --git a/arch/inst/Zicsr/csrrwi.yaml b/arch/inst/Zicsr/csrrwi.yaml index f3290fd3c0..1673f8486f 100644 --- a/arch/inst/Zicsr/csrrwi.yaml +++ b/arch/inst/Zicsr/csrrwi.yaml @@ -37,7 +37,7 @@ operation(): | # writes the zero-extended immediate to the CSR, # performing any WARL transformations first - CSR[csr].sw_write({{XLEN-5{1'b0}}, imm}); + CSR[csr].sw_write({{MXLEN-5{1'b0}}, imm}); # SPDX-SnippetBegin # SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model diff --git a/arch/inst/Zilsd/ld.yaml b/arch/inst/Zilsd/ld.yaml index acb5734ebd..7b9d24f1cf 100644 --- a/arch/inst/Zilsd/ld.yaml +++ b/arch/inst/Zilsd/ld.yaml @@ -25,9 +25,9 @@ access: vs: always vu: always operation(): | - Bits base = X[rs1]; - Bits offset = $signed(imm); - Bits eff_addr = base + offset; + Bits base = X[rs1]; + Bits offset = $signed(imm); + Bits eff_addr = base + offset; Bits<64> data = read_memory<64>(eff_addr, $encoding); diff --git a/arch/inst/Zilsd/sd.yaml b/arch/inst/Zilsd/sd.yaml index 56935f60ab..65806c5e5b 100644 --- a/arch/inst/Zilsd/sd.yaml +++ b/arch/inst/Zilsd/sd.yaml @@ -25,9 +25,9 @@ access: vs: always vu: always operation(): | - Bits base = X[rs1]; - Bits offset = $signed(imm); - Bits eff_addr = base + offset; + Bits base = X[rs1]; + Bits offset = $signed(imm); + Bits eff_addr = base + offset; Bits<32> lower_word = X[rs2]; Bits<32> upper_word = X[rs2 + 1]; diff --git a/arch/isa/builtin_functions.idl b/arch/isa/builtin_functions.idl index 6a11479338..8d0ad73e96 100644 --- a/arch/isa/builtin_functions.idl +++ b/arch/isa/builtin_functions.idl @@ -496,7 +496,7 @@ builtin function atomically_set_pte_a { returns Boolean arguments Bits pte_addr, - Bits pte_value, + Bits pte_value, U32 pte_len description { Atomically: @@ -516,7 +516,7 @@ builtin function atomically_set_pte_a_d { returns Boolean arguments Bits pte_addr, - Bits pte_value, + Bits pte_value, U32 pte_len description { Atomically: diff --git a/arch/isa/globals.isa b/arch/isa/globals.isa index c208dedec7..f175bb6cae 100644 --- a/arch/isa/globals.isa +++ b/arch/isa/globals.isa @@ -13,7 +13,7 @@ include "fp.idl" # This is to accommodate the zero register (x0) without # needed ISL language support or hard-to-read function calls # on any x register read/write -# Bits X[31]; +# Bits X[31]; ############################################################ # constants used to indicate special values @@ -675,7 +675,7 @@ function raise_guest_page_fault { CSR[mtval2].VALUE = write_gpa_in_tval ? (gpa >> 2) : 0; CSR[mtinst].VALUE = tinst_value; CSR[mstatus].MPP = $bits(from_mode)[1:0]; - if (XLEN == 64) { + if (MXLEN == 64) { CSR[mstatus].MPV = 1; } else { CSR[mstatush].MPV = 1; @@ -735,13 +735,13 @@ function raise_precise { CSR[mtval2].VALUE = 0; CSR[mtinst].VALUE = 0; if (from_mode == PrivilegeMode::VU || from_mode == PrivilegeMode::VS) { - if (XLEN == 32) { + if (MXLEN == 32) { CSR[mstatush].MPV = 1; } else { CSR[mstatus].MPV = 1; } } else { - if (XLEN == 32) { + if (MXLEN == 32) { CSR[mstatush].MPV = 0; } else { CSR[mstatus].MPV = 0; @@ -905,7 +905,7 @@ function xlen { Returns the effective XLEN for the current privilege mode. } body { - if (XLEN == 32) { + if (MXLEN == 32) { return 32; } else { if (mode() == PrivilegeMode::M) { @@ -1151,7 +1151,7 @@ function pmp_match { If there is no match or a partial match, report that result. } body { - if (XLEN == 64) { + if (MXLEN == 64) { return pmp_match_64(paddr, access_size); } else { return pmp_match_32(paddr, access_size); @@ -1166,7 +1166,7 @@ function mpv { } body { if (implemented?(ExtensionName::H)) { - return (XLEN == 32) ? CSR[mstatush].MPV : CSR[mstatus].MPV; + return (MXLEN == 32) ? CSR[mstatush].MPV : CSR[mstatus].MPV; } else { assert(false, "TODO"); } @@ -1287,7 +1287,7 @@ function base32? { return True iff current effective XLEN == 32 } body { - if (XLEN == 32) { + if (MXLEN == 32) { return true; } else { XRegWidth xlen32 = XRegWidth::XLEN32; @@ -1339,7 +1339,7 @@ function current_translation_mode { Bits<4> mode_val = CSR[vsatp].MODE; if (mode_val == $bits(SatpMode::Sv32)) { # Sv32 is only defined when XLEN == 32 - if (XLEN == 64) { + if (MXLEN == 64) { if ((effective_mode == PrivilegeMode::VS) && (CSR[hstatus].VSXL != $bits(XRegWidth::XLEN32))) { # not supported in this XLEN return SatpMode::Reserved; @@ -1356,7 +1356,7 @@ function current_translation_mode { # OK return SatpMode::Sv32; - } else if ((XLEN == 64) && (mode_val == $bits(SatpMode::Sv39))) { + } else if ((MXLEN == 64) && (mode_val == $bits(SatpMode::Sv39))) { # Sv39 is only defined when XLEN == 64 if (effective_mode == PrivilegeMode::VS && CSR[hstatus].VSXL != $bits(XRegWidth::XLEN64)) { # not supported in this XLEN @@ -1373,7 +1373,7 @@ function current_translation_mode { # OK return SatpMode::Sv39; - } else if ((XLEN == 64) && (mode_val == $bits(SatpMode::Sv48))) { + } else if ((MXLEN == 64) && (mode_val == $bits(SatpMode::Sv48))) { # Sv48 is only defined when XLEN == 64 if (effective_mode == PrivilegeMode::VS && CSR[hstatus].VSXL != $bits(XRegWidth::XLEN64)) { # not supported in this XLEN @@ -1390,7 +1390,7 @@ function current_translation_mode { # OK return SatpMode::Sv48; - } else if ((XLEN == 64) && (mode_val == $bits(SatpMode::Sv57))) { + } else if ((MXLEN == 64) && (mode_val == $bits(SatpMode::Sv57))) { # Sv57 is only defined when XLEN == 64 if (effective_mode == PrivilegeMode::VS && CSR[hstatus].VSXL != $bits(XRegWidth::XLEN64)) { # not supported in this XLEN @@ -1418,7 +1418,7 @@ function current_translation_mode { Bits<4> mode_val = CSR[satp].MODE; if (mode_val == $bits(SatpMode::Sv32)) { # Sv32 is only defined when XLEN == 32 - if (XLEN == 64) { + if (MXLEN == 64) { if (effective_mode == PrivilegeMode::S && CSR[mstatus].SXL != $bits(XRegWidth::XLEN32)) { # not supported in this XLEN return SatpMode::Reserved; @@ -1432,7 +1432,7 @@ function current_translation_mode { # not supported in this configuration return SatpMode::Reserved; } - } else if ((XLEN == 64) && (mode_val == $bits(SatpMode::Sv39))) { + } else if ((MXLEN == 64) && (mode_val == $bits(SatpMode::Sv39))) { # Sv39 is only defined when XLEN == 64 if (effective_mode == PrivilegeMode::S && CSR[mstatus].SXL != $bits(XRegWidth::XLEN64)) { # not supported in this XLEN @@ -1448,7 +1448,7 @@ function current_translation_mode { } # OK return SatpMode::Sv39; - } else if ((XLEN == 64) && (mode_val == $bits(SatpMode::Sv48))) { + } else if ((MXLEN == 64) && (mode_val == $bits(SatpMode::Sv48))) { # Sv48 is only defined when XLEN == 64 if (effective_mode == PrivilegeMode::S && CSR[mstatus].SXL != $bits(XRegWidth::XLEN64)) { # not supported in this XLEN @@ -1464,7 +1464,7 @@ function current_translation_mode { } # OK return SatpMode::Sv48; - } else if ((XLEN == 64) && (mode_val == $bits(SatpMode::Sv57))) { + } else if ((MXLEN == 64) && (mode_val == $bits(SatpMode::Sv57))) { # Sv57 is only defined when XLEN == 64 if (effective_mode == PrivilegeMode::S && CSR[mstatus].SXL != $bits(XRegWidth::XLEN64)) { # not supported in this XLEN @@ -1575,7 +1575,7 @@ function tinst_value_for_guest_page_fault { if (TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT == "always zero") { return 0; } else if (TINST_VALUE_ON_FINAL_LOAD_GUEST_PAGE_FAULT == "always pseudoinstruction") { - if ((VSXLEN == 32) || ((XLEN == 64) && (CSR[hstatus].VSXL == $bits(XRegWidth::XLEN32)))) { + if ((VSXLEN == 32) || ((MXLEN == 64) && (CSR[hstatus].VSXL == $bits(XRegWidth::XLEN32)))) { return 0x00002000; } else { return 0x00003000; @@ -1589,7 +1589,7 @@ function tinst_value_for_guest_page_fault { if (TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT == "always zero") { return 0; } else if (TINST_VALUE_ON_FINAL_STORE_AMO_GUEST_PAGE_FAULT == "always pseudoinstruction") { - if ((VSXLEN == 32) || ((XLEN == 64) && (CSR[hstatus].VSXL == $bits(XRegWidth::XLEN32)))) { + if ((VSXLEN == 32) || ((MXLEN == 64) && (CSR[hstatus].VSXL == $bits(XRegWidth::XLEN32)))) { return 0x00002020; } else { return 0x00003020; @@ -1603,9 +1603,9 @@ function tinst_value_for_guest_page_fault { } else { if (REPORT_GPA_IN_TVAL_ON_INTERMEDIATE_GUEST_PAGE_FAULT) { # spec states hardware must write the pseduo-instruction values to *tinst - if ((VSXLEN == 32) || ((XLEN == 64) && (CSR[hstatus].VSXL == $bits(XRegWidth::XLEN32)))) { + if ((VSXLEN == 32) || ((MXLEN == 64) && (CSR[hstatus].VSXL == $bits(XRegWidth::XLEN32)))) { return 0x00002000; - } else if ((VSXLEN == 64) || ((XLEN == 64) && (CSR[hstatus].VSXL == $bits(XRegWidth::XLEN64)))) { + } else if ((VSXLEN == 64) || ((MXLEN == 64) && (CSR[hstatus].VSXL == $bits(XRegWidth::XLEN64)))) { return 0x00003000; } } @@ -2007,7 +2007,7 @@ function stage1_page_walk { returns TranslationResult # the translated address and attributes arguments - Bits vaddr, # the virtual address to translate + Bits vaddr, # the virtual address to translate MemoryOperation op, # the operation type PrivilegeMode effective_mode, # the mode for this walk (usually effective_ldst_mode(), though different for HLV/HLX/HSV) Bits encoding # encoding of the instruction causing this access @@ -2470,11 +2470,11 @@ function canonical_gpaddr? { } else if (satp_mode == SatpMode::Sv32) { # Sv32 uses all 32 bits of the VA return true; - } else if ((XLEN > 32) && (satp_mode == SatpMode::Sv39)) { + } else if ((MXLEN > 32) && (satp_mode == SatpMode::Sv39)) { return gpaddr[63:39] == {25{gpaddr[38]}}; - } else if ((XLEN > 32) && (satp_mode == SatpMode::Sv48)) { + } else if ((MXLEN > 32) && (satp_mode == SatpMode::Sv48)) { return gpaddr[63:48] == {16{gpaddr[47]}}; - } else if ((XLEN > 32) && (satp_mode == SatpMode::Sv57)) { + } else if ((MXLEN > 32) && (satp_mode == SatpMode::Sv57)) { return gpaddr[63:57] == {6{gpaddr[56]}}; } } @@ -2604,7 +2604,7 @@ function read_memory { } function read_memory_xlen { - returns Bits + returns Bits arguments XReg virtual_address, Bits encoding @@ -2623,7 +2623,7 @@ function read_memory_xlen { function write_memory_xlen { arguments XReg virtual_address, - Bits value, + Bits value, Bits encoding description { Read XLEN bits from memory @@ -2638,7 +2638,7 @@ function write_memory_xlen { } function read_memory_xlen_aligned { - returns Bits + returns Bits arguments XReg virtual_address, Bits encoding # the encoding of an instruction causing this access, or 0 if a fetch @@ -2693,8 +2693,8 @@ function invalidate_reservation_set { function register_reservation_set { arguments - Bits physical_address, # The (always aligned) physical address to reserve. - Bits length # minimum length of the reservation. actual reservation may be larger + Bits physical_address, # The (always aligned) physical address to reserve. + Bits length # minimum length of the reservation. actual reservation may be larger description { Register a reservation for a physical address range that subsumes [physical_address, physical_address + N). @@ -2704,10 +2704,10 @@ function register_reservation_set { reservation_set_address = physical_address; if (LRSC_RESERVATION_STRATEGY == "reserve naturally-aligned 64-byte region") { - reservation_set_address = physical_address & ~XLEN'h3f; + reservation_set_address = physical_address & ~MXLEN'h3f; reservation_set_size = 64; } else if (LRSC_RESERVATION_STRATEGY == "reserve naturally-aligned 128-byte region") { - reservation_set_address = physical_address & ~XLEN'h7f; + reservation_set_address = physical_address & ~MXLEN'h7f; reservation_set_size = 128; } else if (LRSC_RESERVATION_STRATEGY == "reserve exactly enough to cover the access") { reservation_set_address = physical_address; @@ -2724,7 +2724,7 @@ function load_reserved { template U32 N # the number of bits being loaded returns Bits # the value of memory at virtual_address arguments - Bits virtual_address, # the virtual address to load + Bits virtual_address, # the virtual address to load Bits<1> aq, # acquire semantics? 0=no, 1=yes Bits<1> rl, # release semantics? 0=no, 1=yes Bits encoding # encoding of the instruction causing this access @@ -2767,13 +2767,13 @@ function load_reserved { } function store_conditional { - template U32 N # number of bits being stored - returns Boolean # whether or not the store conditional succeeded + template U32 N # number of bits being stored + returns Boolean # whether or not the store conditional succeeded arguments - Bits virtual_address, # the virtual address to store to - Bits value, # the value to store - Bits<1> aq, # acquire semantics? 0=no, 1=yes - Bits<1> rl, # release semantics? 0=no, 1=yes + Bits virtual_address, # the virtual address to store to + Bits value, # the value to store + Bits<1> aq, # acquire semantics? 0=no, 1=yes + Bits<1> rl, # release semantics? 0=no, 1=yes Bits encoding # encoding of the instruction causing this access description { Atomically check the reservation set to ensure: @@ -2991,7 +2991,7 @@ function write_memory { function write_memory_xlen_aligned { arguments XReg virtual_address, - Bits value, + Bits value, Bits encoding # encoding of the instruction causing this access description { Write to virtual memory XLEN bits (which may be runtime determined) using a known aligned address. diff --git a/arch/isa/interrupts.idl b/arch/isa/interrupts.idl index ae55420eac..d10174b310 100644 --- a/arch/isa/interrupts.idl +++ b/arch/isa/interrupts.idl @@ -11,7 +11,7 @@ Boolean pending_vsmode_timer_interrupt = false; # bitmask of interrupts that are both pending and enabled # updated by calls to refresh_pending_interrupts() -Bits pending_and_enabled_interrupts = 0; +Bits pending_and_enabled_interrupts = 0; external function set_external_interrupt { arguments PrivilegeMode target_mode @@ -159,7 +159,7 @@ function refresh_pending_interrupts { } body { # by using sw_read, we'll get, e.g., the combined value of mip.SEIP - Bits pending_ints = CSR[mip].sw_read() & $bits(CSR[mie]); + Bits pending_ints = CSR[mip].sw_read() & $bits(CSR[mie]); if (pending_ints == 0) { # there are no pending interrupts pending_and_enabled_interrupts = 0; @@ -170,22 +170,22 @@ function refresh_pending_interrupts { implemented_version?(ExtensionName::S, "<= 1.9.1") || (implemented_version?(ExtensionName::S, "> 1.9.1") && implemented_version?(ExtensionName::Sm, "> 1.9.1")); - Bits mmode_enabled_ints = + Bits mmode_enabled_ints = ((mode() == PrivilegeMode::M) && (CSR[mstatus].MIE == 1'b0)) ? 0 - : ($bits(CSR[mie]) & (HAS_MIDELEG ? ~$bits(CSR[mideleg]) : ~XLEN'0)); - Bits mmode_pending_and_enabled = pending_ints & mmode_enabled_ints; + : ($bits(CSR[mie]) & (HAS_MIDELEG ? ~$bits(CSR[mideleg]) : ~MXLEN'0)); + Bits mmode_pending_and_enabled = pending_ints & mmode_enabled_ints; if (mmode_pending_and_enabled != 0) { pending_and_enabled_interrupts = mmode_pending_and_enabled; return; } if (CSR[misa].S == 1'b1) { - Bits smode_enabled_ints = + Bits smode_enabled_ints = ((mode() == PrivilegeMode::M) || (CSR[mstatus].SIE == 1'b0)) ? 0 : $bits(CSR[mie]) & ($bits(CSR[mideleg])); - Bits smode_pending_and_enabled = pending_ints & smode_enabled_ints; + Bits smode_pending_and_enabled = pending_ints & smode_enabled_ints; if (smode_pending_and_enabled != 0) { pending_and_enabled_interrupts = smode_pending_and_enabled; return; @@ -197,11 +197,11 @@ function refresh_pending_interrupts { # if (sgei_pending_and_enabled) { # } - # Bits vsmode_enabled_ints = + # Bits vsmode_enabled_ints = # ((mode() == PrivilegeMode::M) || (mode() == PrivilegeMode::S) || (CSR[vsstatus].SIE == 1'b0) # ? 0 # : $bits(CSR[mie]) & ($bits[CSR[mideleg]] & $bits[CSR[hideleg]])); - # Bits vsmode_pending_and_enabled = pending_ints & vsmode_enabled_ints; + # Bits vsmode_pending_and_enabled = pending_ints & vsmode_enabled_ints; # if (vsmode_pending_and_enabled != 0) { # pending_and_enabled_interrupts = vsmode_pending_and_enabled; @@ -216,7 +216,7 @@ function refresh_pending_interrupts { function highest_priority_interrupt { returns InterruptCode - arguments Bits int_mask + arguments Bits int_mask description { Given a bitmask of interrupts in the format of MIE/MIP, return the highest priority interrupt code that is set @@ -276,8 +276,8 @@ function choose_interrupt { # check M mode interrupts - Bits mmode_pending_and_enabled = - pending_and_enabled_interrupts & ~(HAS_MIDELEG ? $bits(CSR[mideleg]) : XLEN'0); + Bits mmode_pending_and_enabled = + pending_and_enabled_interrupts & ~(HAS_MIDELEG ? $bits(CSR[mideleg]) : MXLEN'0); if (mmode_pending_and_enabled != 0) { assert((mode() != PrivilegeMode::M) || (CSR[mstatus].MIE == 1'b1), "M-mode interrupts are not enabled"); @@ -286,9 +286,9 @@ function choose_interrupt { # check S-mode interrupts } else if (CSR[misa].S == 1'b1) { - Bits smode_pending_and_enabled = + Bits smode_pending_and_enabled = (pending_and_enabled_interrupts & $bits(CSR[mideleg])) - # & ((CSR[misa].H == 1'b1) ? ~$bits(CSR[hideleg]) : ~XLEN'0) + # & ((CSR[misa].H == 1'b1) ? ~$bits(CSR[hideleg]) : ~MXLEN'0) ; if (smode_pending_and_enabled != 0) { @@ -305,8 +305,8 @@ function choose_interrupt { # check the delegation register PrivilegeMode to_mode; - Bits chosen_mask = (XLEN'1 << $bits(chosen)); - if (((HAS_MIDELEG ? $bits(CSR[mideleg]) : XLEN'0) & chosen_mask) == 0) { + Bits chosen_mask = (MXLEN'1 << $bits(chosen)); + if (((HAS_MIDELEG ? $bits(CSR[mideleg]) : MXLEN'0) & chosen_mask) == 0) { to_mode = PrivilegeMode::M; } else { # delegated from M diff --git a/arch/isa/util.idl b/arch/isa/util.idl index 086c7e63cb..9b212b2669 100644 --- a/arch/isa/util.idl +++ b/arch/isa/util.idl @@ -139,11 +139,11 @@ function sext { # in a common case, first_extended_bit is xlen(), which is compile-time-known unless # the effective xlen is different than XLEN in some mode # In that common case, this function will be eliminated by the compiler - if (first_extended_bit == XLEN) { + if (first_extended_bit == MXLEN) { return value; } else { Bits<1> sign = value[first_extended_bit-1]; - for (U32 i = XLEN-1; i >= first_extended_bit; i--) { + for (U32 i = MXLEN-1; i >= first_extended_bit; i--) { value[i] = sign; } return value; diff --git a/arch/prose/idl.adoc b/arch/prose/idl.adoc index 324f84c05a..318ca291eb 100644 --- a/arch/prose/idl.adoc +++ b/arch/prose/idl.adoc @@ -21,15 +21,15 @@ Instruction execution semantics are defined in IDL. Below is an example showing ==== [source,idl] ---- -Bits src1 = X(rs1); <1> -Bits src2 = X(rs2); <2> +Bits src1 = X(rs1); <1> +Bits src2 = X(rs2); <2> if (src1 <= src2) { <3> jump(PC + $signed(imm)); <4> } # fall through: advance to next instruction ---- -<1> Read general-purpose X register number `rs1`, and store it in XLEN-bit variable `src1`. XLEN is a configuration parameter that is available as a global constant in IDL. +<1> Read general-purpose X register number `rs1`, and store it in MXLEN-bit variable `src1`. MXLEN is a configuration parameter that is available as a global constant in IDL. <2> Read general-purpose X register number `rs2`, and store it in variable `src2`. <3> Check if unsigned `src1` is less than or equal to unsigned `src2`. <4> Call the `jump` function with a target address formed by adding a signed immediate to the PC. @@ -61,7 +61,7 @@ function jump { } } ---- -<1> Declare that function 'jump' takes a single argument of type `XReg` (alias of `Bits`). +<1> Declare that function 'jump' takes a single argument of type `XReg` (alias of `Bits`). <2> A mandatory description of the function. <3> IDL statements for the instruction execution are placed in body {...} <4> Trigger a synchronous exception by calling the `raise` function. @@ -125,14 +125,9 @@ The `Bits` type is a vector of N bits that is treated like an integer for ari .Examples of Bits declarations [source,idl] ---- -Bits<1> sign_bit; # 1-bit unsigned variable -Bits virtual_address; # XLEN-bit unsigned variable -Bits<{XLEN, 1'b0}> multiplication_result # unsigned variable twice as wide as XLEN - -# Careful! -# Bits multiplication_result; # compilation error; XLEN only has enough bits to - # represent itself, so XLEN*2 is truncated to zero - # (see <>) +Bits<1> sign_bit; # 1-bit unsigned variable +Bits virtual_address; # MXLEN-bit unsigned variable +Bits<{MXLEN, 1'b0}> multiplication_result # unsigned variable twice as wide as MXLEN # Bits invalid; # compilation error: N must be known at compile time ---- @@ -146,7 +141,7 @@ There are several aliases of Bits available, as shown below. |=== | Alias | Type -| `XReg` | `Bits`, where XLEN is configuration-dependent +| `XReg` | `Bits`, where MXLEN is configuration-dependent | `U64` | `Bits<64>` | `U32` | `Bits<32>` |=== @@ -308,7 +303,7 @@ When one or more values in a tuple is not needed, it can be assigned to the don' === Integer literals -Integer literal values can be expressed using either C style or Verilog style. When using Verilog style, the literal bit width can be specified. If the width is omitted using the Verilog style, the bit width will be XLEN. When using C style, the bitwidth is the minimum number of bits needed to represent the value. +Integer literal values can be expressed using either C style or Verilog style. When using Verilog style, the literal bit width can be specified. If the width is omitted using the Verilog style, the bit width will be MXLEN. When using C style, the bitwidth is the minimum number of bits needed to represent the value. A signed literal is allocated an extra bit to support negation. The literal itself is always positive, but may be immediately negated to get a negative value. For that reason, be careful constructing negative literals (see example below). @@ -334,9 +329,9 @@ Literals may contain any number of underscores after the initial digit for clari 8'13 # 13 decimal, 8-bit wide (default radix is 10) -'13 # 13 decimal, unsigned XLEN-bit wide -'s13 # 13 decimal, signed XLEN-bit wide -# 'h100000000 # compilation error when XLEN == 32; does not fit in XLEN bits +'13 # 13 decimal, unsigned MXLEN-bit wide +'s13 # 13 decimal, signed MXLEN-bit wide +# 'h100000000 # compilation error when MXLEN == 32; does not fit in MXLEN bits -4'd13 # 3 decimal: the literal is 13, unsigned, in 4-bits. when negated, the sign bit is lost # -8'sd200 # compilation error: -200 does not fit in 8 bits @@ -554,7 +549,7 @@ Two builtin variables exist: |=== | Name | Type | Scope | Description -| `$pc` | `Bits` | Global | The current program counter of the hart +| `$pc` | `Bits` | Global | The current program counter of the hart | `$encoding` | `Bits`, where VARIABLE is the length of the last fetched insruction | Instruction, Csr | The encoding of the last fetched instruction. Only accessible in Instruction scope and Csr scope (cannot be used in functions). |=== @@ -564,7 +559,7 @@ Constants are declared like mutable variables, except that their name starts wit Constant names must start with an uppercase letter and can be followed by any number of letters (any case), numbers, or an underscore. Constants must be initialized when declared, and cannot be assigned after declaration. Constants must be initialized with a value known at compile time (_i.e._, initialization cannot reference variables). -Note that many global constants, such are configuration parameters, are implicitly added before parsing (_e.g._, XLEN). +Note that many global constants, such are configuration parameters, are implicitly added before parsing (_e.g._, MXLEN). .Example constant declarations [source,idl] @@ -643,7 +638,7 @@ When the casted value is a bitfield, the resulting type will be the width of the $bits(RoundingMode::RNE) # => 3'd0 $bits(RoundingMode::RUP) # => 3'd3 -$bits(CSR[mstatus]) # => XLEN'd?? +$bits(CSR[mstatus]) # => MXLEN'd?? # assuming: # bitfield (64) Sv39PageTableEntry { ... } @@ -860,20 +855,20 @@ When a CSR defines custom behavior for software reads and/or writes via the `sw_ Bits<64> x[32]; # global constant (when this is an .idl file) function example { - return_type Bits - arguments Bits a, Bits b # a and b are in function scope + return_type Bits + arguments Bits a, Bits b # a and b are in function scope description { If a > b, return a+b. If a <= b, return a - b. } body { - Bits result; # result is in function scope + Bits result; # result is in function scope if (a > b) { - Bits result = a + b; # result shadows variable above - Bits sum = a + b; # ok + Bits result = a + b; # result shadows variable above + Bits sum = a + b; # ok result = sum; } else { - Bits difference = a - b; # ok + Bits difference = a - b; # ok result = difference; } @@ -956,9 +951,9 @@ mepc: # ... sw_write(csr_value): | # csr_value is: - # a 'bitfield (64) { PC 63-0 }' when XLEN == 64 - # a 'bitfield (32) { PC 31-0 }' when XLEN == 32 - return csr_value.PC & ~64'b1; + # a 'bitfield (64) { PC 63-0 }' when MXLEN == 64 + # a 'bitfield (32) { PC 31-0 }' when MXLEN == 32 + return csr_value.PC & ~MXLEN'b1; ---- field.type():: diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.addusat.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.addusat.yaml index e53c06cac6..620597b5aa 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.addusat.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.addusat.yaml @@ -36,7 +36,7 @@ operation(): | # overflow occurs if the msb of at least one operand is 1 and the msb of the sum is not if ((X[rs1][xlen()-1] == 1) || (X[rs2][xlen()-1] == 1)) { if (sum[xlen()-1] == 0) { - sum = ~{XLEN{1'b0}}; # return largest number + sum = ~{MXLEN{1'b0}}; # return largest number } } diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.csrrwri.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.csrrwri.yaml index 94c7df3741..1324b0f778 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.csrrwri.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.csrrwri.yaml @@ -41,4 +41,4 @@ operation(): | } # writes the zero-extended immediate to the CSR, # performing any WARL transformations first - CSR[csr].sw_write({{XLEN-5{1'b0}}, imm}); + CSR[csr].sw_write({{MXLEN-5{1'b0}}, imm}); diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml index 482cc7f7ab..0e12064eef 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extd.yaml @@ -34,6 +34,6 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; + Bits<{1'b0, MXLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width = width_minus1 + 1; X[rd] = sext((pair >> shamt) & ((1 << width) - 1), width); diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml index 3f4d12acfd..20a54ce5ab 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdpr.yaml @@ -35,7 +35,7 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; + Bits<{1'b0, MXLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][13:8]; XReg width = (width_bits > 32) ? 32 : width_bits; XReg shamt = X[rs2][5:0]; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml index b39d2ab909..c49a5a0866 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdprh.yaml @@ -35,7 +35,7 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; + Bits<{1'b0, MXLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][29:24]; XReg width = (width_bits > 32) ? 32 : width_bits; XReg shamt = X[rs2][21:16]; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml index 10ac24f771..3d79f4a171 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdr.yaml @@ -35,7 +35,7 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; + Bits<{1'b0, MXLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][21:16]; XReg width = (width_bits > 32) ? 32 : width_bits; XReg shamt = X[rs2][5:0]; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdu.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdu.yaml index 88bcd46354..7d7db3edbe 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdu.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdu.yaml @@ -34,6 +34,6 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; + Bits<{1'b0, MXLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width = width_minus1 + 1; X[rd] = (pair >> shamt) & ((1 << width) - 1); diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml index 410899c716..e48f137c3d 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdupr.yaml @@ -35,7 +35,7 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; + Bits<{1'b0, MXLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][13:8]; XReg width = (width_bits > 32) ? 32 : width_bits; XReg shamt = X[rs2][5:0]; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml index 691b126cc7..1b010061d1 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extduprh.yaml @@ -35,7 +35,7 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; + Bits<{1'b0, MXLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][29:24]; XReg width = (width_bits > 32) ? 32 : width_bits; XReg shamt = X[rs2][21:16]; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml index 1ff7dbb423..b82145beb6 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.extdur.yaml @@ -35,7 +35,7 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> pair = {X[rs1 + 1], X[rs1]}; + Bits<{1'b0, MXLEN}*2> pair = {X[rs1 + 1], X[rs1]}; XReg width_bits = X[rs2][21:16]; XReg width = (width_bits > 32) ? 32 : width_bits; XReg shamt = X[rs2][5:0]; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.shlsat.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.shlsat.yaml index 2f8e4e84ac..693212381f 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.shlsat.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.shlsat.yaml @@ -31,8 +31,8 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> sext_double_width_rs1 = {{XLEN{X[rs1][xlen()-1]}}, X[rs1]}; - Bits<{1'b0, XLEN}*2> shifted_value = sext_double_width_rs1 << X[rs2][4:0]; + Bits<{1'b0, MXLEN}*2> sext_double_width_rs1 = {{MXLEN{X[rs1][xlen()-1]}}, X[rs1]}; + Bits<{1'b0, MXLEN}*2> shifted_value = sext_double_width_rs1 << X[rs2][4:0]; XReg most_negative_number = 1 << (xlen() - 1); XReg most_positive_number = (1 << (xlen() - 1)) - 1; diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.shlusat.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.shlusat.yaml index 9a96274277..39e413cb3c 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.shlusat.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.shlusat.yaml @@ -31,9 +31,9 @@ access: vs: always vu: always operation(): | - Bits<{1'b0, XLEN}*2> sext_double_width_rs1 = {{XLEN{X[rs1][xlen()-1]}}, X[rs1]}; - Bits<{1'b0, XLEN}*2> shifted_value = sext_double_width_rs1 << X[rs2][4:0]; - XReg largest_unsigned_value = {XLEN{1'b1}}; + Bits<{1'b0, MXLEN}*2> sext_double_width_rs1 = {{MXLEN{X[rs1][xlen()-1]}}, X[rs1]}; + Bits<{1'b0, MXLEN}*2> shifted_value = sext_double_width_rs1 << X[rs2][4:0]; + XReg largest_unsigned_value = {MXLEN{1'b1}}; if (shifted_value > largest_unsigned_value) { X[rd] = largest_unsigned_value; diff --git a/backends/cfg_html_doc/templates/csr.adoc.erb b/backends/cfg_html_doc/templates/csr.adoc.erb index 3ac8f60150..860d60a153 100644 --- a/backends/cfg_html_doc/templates/csr.adoc.erb +++ b/backends/cfg_html_doc/templates/csr.adoc.erb @@ -25,7 +25,7 @@ h| Privilege Mode | <%= csr.priv_mode %> .<%= csr.name %> format [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump csr.wavedrom_desc(cfg_arch, cfg_arch.param_values["XLEN"], exclude_unimplemented: true) %> +<%= JSON.dump csr.wavedrom_desc(cfg_arch, cfg_arch.param_values["MXLEN"], exclude_unimplemented: true) %> .... <%- else -%> <%# CSR has a dynamic length, or a field has a dynamic location, diff --git a/backends/cfg_html_doc/templates/inst.adoc.erb b/backends/cfg_html_doc/templates/inst.adoc.erb index bd319dd3e1..b10d282d7e 100644 --- a/backends/cfg_html_doc/templates/inst.adoc.erb +++ b/backends/cfg_html_doc/templates/inst.adoc.erb @@ -33,7 +33,7 @@ RV64:: <%- else -%> [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump inst.wavedrom_desc(cfg_arch.param_values["XLEN"]) %> +<%= JSON.dump inst.wavedrom_desc(cfg_arch.param_values["MXLEN"]) %> .... <%- end -%> @@ -89,7 +89,7 @@ RV64:: <%- else -%> [source,idl] ---- -<%- inst.decode_variables(cfg_arch.param_values["XLEN"]).each do |d| -%> +<%- inst.decode_variables(cfg_arch.param_values["MXLEN"]).each do |d| -%> <%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; <%- end -%> ---- diff --git a/backends/cpp_hart_gen/cpp/test/test_decode.cpp b/backends/cpp_hart_gen/cpp/test/test_decode.cpp index bccaa05161..2242d52299 100644 --- a/backends/cpp_hart_gen/cpp/test/test_decode.cpp +++ b/backends/cpp_hart_gen/cpp/test/test_decode.cpp @@ -18,7 +18,7 @@ description: For testing - [Sm, "1.12.0"] params: - XLEN: 64 + MXLEN: 64 NAME: test ARCH_ID: 0x1000000000000000 IMP_ID: 0x0 diff --git a/backends/ext_pdf_doc/idl_lexer.rb b/backends/ext_pdf_doc/idl_lexer.rb index c89af9fe0d..f957d4eca6 100644 --- a/backends/ext_pdf_doc/idl_lexer.rb +++ b/backends/ext_pdf_doc/idl_lexer.rb @@ -37,7 +37,7 @@ def self.keywords_type rule %r{#.*}, Comment::Single rule %r{"[^"]*"}, Str::Double rule %r{[A-Z][a-zA-Z0-9]*}, Name::Constant - rule %r{(?:(?:[0-9]+)|(?:XLEN))?'s?[bodh]?[0-9_a-fA-F]+}, Num + rule %r{(?:(?:[0-9]+)|(?:MXLEN))?'s?[bodh]?[0-9_a-fA-F]+}, Num rule %r/0x[0-9a-f]+[lu]*/i, Num::Hex rule %r/0[0-7]+[lu]*/i, Num::Oct rule %r{\d+}, Num::Integer diff --git a/cfgs/MC100-32.yaml b/cfgs/MC100-32.yaml index d4538cbbcd..5a426ec0b0 100644 --- a/cfgs/MC100-32.yaml +++ b/cfgs/MC100-32.yaml @@ -14,7 +14,7 @@ mandatory_extensions: - { name: Zicntr, version: "~> 2.0" } additional_extensions: false params: - XLEN: 32 + MXLEN: 32 MISALIGNED_SPLIT_STRATEGY: by_byte PRECISE_SYNCHRONOUS_EXCEPTIONS: true TRAP_ON_ECALL_FROM_M: true diff --git a/cfgs/config_validation.rb b/cfgs/config_validation.rb index fa766738c1..0853a4a5ea 100644 --- a/cfgs/config_validation.rb +++ b/cfgs/config_validation.rb @@ -10,13 +10,13 @@ require_param :SXLEN if ext?(:S) # SXLEN is fixed in RV32 -assert SXLEN == 32 if ext?(:S) && XLEN == 32 +assert SXLEN == 32 if ext?(:S) && MXLEN == 32 # UXLEN should not be set unless U-mode is implemented require_param :UXLEN if ext?(:U) # UXLEN is fixed in RV32 -assert [nil, 32].include?(UXLEN) if ext?(:U) && XLEN == 32 +assert [nil, 32].include?(UXLEN) if ext?(:U) && MXLEN == 32 # is SXLEN is fixed to 32, then UXLEN cannot be > 32 assert [nil, 32].include?(UXLEN) if ext?(:S) && ext?(:U) && SXLEN == 32 @@ -49,7 +49,7 @@ assert(MTVAL_WIDTH >= max_va_width) if mtval_holds_va # 32 stands for ILEN below. Update this if/when instructions become longer than 32 -assert(MTVAL_WIDTH >= [XLEN, 32].min) if REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION +assert(MTVAL_WIDTH >= [MXLEN, 32].min) if REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION assert(COUNTENABLE_EN[0] == false) unless ext?(:Zicntr) assert(COUNTENABLE_EN[2] == false) unless ext?(:Zicntr) @@ -82,10 +82,10 @@ require_param :U_MODE_ENDIANESS if ext?(:U) require_param :VU_MODE_ENDIANESS if ext?(:H) require_param :VS_MODE_ENDIANESS if ext?(:H) -require_param :SXLEN if ext?(:S) && XLEN > 32 -require_param :UXLEN if ext?(:U) && XLEN > 32 -require_param :VSXLEN if ext?(:H) && XLEN > 32 -require_param :VUXLEN if ext?(:H) && XLEN > 32 +require_param :SXLEN if ext?(:S) && MXLEN > 32 +require_param :UXLEN if ext?(:U) && MXLEN > 32 +require_param :VSXLEN if ext?(:H) && MXLEN > 32 +require_param :VUXLEN if ext?(:H) && MXLEN > 32 require_param :ASID_WIDTH if ext?(:S) require_param :PMP_GRANULARITY unless NUM_PMP_ENTRIES.zero? require_param :NUM_EXTERNAL_GUEST_INTERRUPTS if ext?(:H) diff --git a/cfgs/example_rv64_with_overlay.yaml b/cfgs/example_rv64_with_overlay.yaml index eb4dbd93f9..5d33d28ec7 100644 --- a/cfgs/example_rv64_with_overlay.yaml +++ b/cfgs/example_rv64_with_overlay.yaml @@ -37,7 +37,7 @@ implemented_extensions: - [Zicbom, "1.0.0"] params: - XLEN: 64 + MXLEN: 64 # name of the configuration NAME: example_rv64_with_overlay diff --git a/cfgs/mc100-32-full-example.yaml b/cfgs/mc100-32-full-example.yaml index 27fa0dc32e..6c6841b4e6 100644 --- a/cfgs/mc100-32-full-example.yaml +++ b/cfgs/mc100-32-full-example.yaml @@ -13,7 +13,7 @@ implemented_extensions: - [Zicsr, "2.0"] - [Zicntr, "2.0"] params: - XLEN: 32 + MXLEN: 32 ARCH_ID: 0 IMP_ID: 0 VENDOR_ID_BANK: 1 diff --git a/cfgs/qc_iu.yaml b/cfgs/qc_iu.yaml index 7c77637532..319e447db4 100644 --- a/cfgs/qc_iu.yaml +++ b/cfgs/qc_iu.yaml @@ -22,7 +22,7 @@ implemented_extensions: - { name: Xqccmp, version: "0.3" } - { name: Xqci, version: "0.8" } params: - XLEN: 32 + MXLEN: 32 PHYS_ADDR_WIDTH: 32 ARCH_ID: 0 CONFIG_PTR_ADDRESS: 0 diff --git a/cfgs/rv32.yaml b/cfgs/rv32.yaml index ab3912961b..ca748d1213 100644 --- a/cfgs/rv32.yaml +++ b/cfgs/rv32.yaml @@ -6,7 +6,7 @@ type: partially configured name: rv32 description: A generic RV32 system; only MXLEN is known params: - XLEN: 32 + MXLEN: 32 mandatory_extensions: - name: "I" version: ">= 0" diff --git a/cfgs/rv64.yaml b/cfgs/rv64.yaml index 6f5eae32c2..9fb3977e14 100644 --- a/cfgs/rv64.yaml +++ b/cfgs/rv64.yaml @@ -6,7 +6,7 @@ type: partially configured name: rv64 description: A generic RV32 system; only MXLEN is known params: - XLEN: 64 + MXLEN: 64 mandatory_extensions: - name: "I" version: ">= 0" diff --git a/lib/arch_obj_models/csr.rb b/lib/arch_obj_models/csr.rb index 6c3ee9c1c4..d1fcca74d8 100644 --- a/lib/arch_obj_models/csr.rb +++ b/lib/arch_obj_models/csr.rb @@ -492,11 +492,11 @@ def fill_symtab(ast, effective_xlen) "__expected_return_type", Idl::Type.new(:bits, width: 128) ) - if symtab.get("XLEN").value.nil? + if symtab.get("MXLEN").value.nil? symtab.add( - "XLEN", + "MXLEN", Idl::Var.new( - "XLEN", + "MXLEN", Idl::Type.new(:bits, width: 6, qualifiers: [:const]), effective_xlen, param: true diff --git a/lib/arch_obj_models/csr_field.rb b/lib/arch_obj_models/csr_field.rb index c1c2c2f10d..581d75d8d1 100644 --- a/lib/arch_obj_models/csr_field.rb +++ b/lib/arch_obj_models/csr_field.rb @@ -508,11 +508,11 @@ def fill_symtab_for_sw_write(effective_xlen, ast) "csr_value", Idl::Var.new("csr_value", csr.bitfield_type(@cfg_arch, effective_xlen)) ) - if symtab.get("XLEN").value.nil? + if symtab.get("MXLEN").value.nil? symtab.add( - "XLEN", + "MXLEN", Idl::Var.new( - "XLEN", + "MXLEN", Idl::Type.new(:bits, width: 6, qualifiers: [:const]), effective_xlen, param: true @@ -535,11 +535,11 @@ def fill_symtab_for_type(effective_xlen, ast) "__expected_return_type", Idl::Type.new(:enum_ref, enum_class: symtab.get("CsrFieldType")) ) - if symtab.get("XLEN").value.nil? + if symtab.get("MXLEN").value.nil? symtab.add( - "XLEN", + "MXLEN", Idl::Var.new( - "XLEN", + "MXLEN", Idl::Type.new(:bits, width: 6, qualifiers: [:const]), effective_xlen, param: true diff --git a/lib/config.rb b/lib/config.rb index 6a20ae113c..501d9b7659 100644 --- a/lib/config.rb +++ b/lib/config.rb @@ -115,8 +115,8 @@ def initialize(cfg_file_path, data) @param_values = @data.key?("params") ? @data["params"] : [].freeze - @mxlen = @data.dig("params", "XLEN") - raise "Must set XLEN for a configured config" if @mxlen.nil? + @mxlen = @data.dig("params", "MXLEN") + raise "Must set MXLEN for a configured config" if @mxlen.nil? @mxlen.freeze end @@ -182,8 +182,8 @@ def initialize(cfg_file_path, data) @param_values = @data["params"] - @mxlen = @data.dig("params", "XLEN").freeze - raise "Must set XLEN for a configured config" if @mxlen.nil? + @mxlen = @data.dig("params", "MXLEN").freeze + raise "Must set MXLEN for a configured config" if @mxlen.nil? end # @return [Array>] List of all extensions known to be implemented in this architecture diff --git a/lib/idl/ast.rb b/lib/idl/ast.rb index ecb5f095b6..95dd838c8a 100644 --- a/lib/idl/ast.rb +++ b/lib/idl/ast.rb @@ -4499,12 +4499,12 @@ def freeze_tree(global_symtab) # @!macro type_check def type_check(symtab) - if text_value.delete("_") =~ /^((XLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ + if text_value.delete("_") =~ /^((MXLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ # verilog-style literal width = ::Regexp.last_match(1) value_text = ::Regexp.last_match(6) - if width.nil? || width == "XLEN" + if width.nil? || width == "MXLEN" width = symtab.mxlen.nil? ? 32 : symtab.mxlen # 32 is the min width, which is what we care about here end @@ -4518,7 +4518,7 @@ def type(symtab) return @type unless @type.nil? case text_value.delete("_") - when /^((XLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ + when /^((MXLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ # verilog-style literal signed = ::Regexp.last_match(4) width = width(symtab) @@ -4552,10 +4552,10 @@ def width(symtab) text_value_no_underscores = text_value.delete("_") case text_value_no_underscores - when /^((XLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ + when /^((MXLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ # verilog-style literal width = ::Regexp.last_match(1) - if width.nil? || width == "XLEN" + if width.nil? || width == "MXLEN" width = symtab.mxlen.nil? ? :unknown : symtab.mxlen else width = width.to_i @@ -4584,7 +4584,7 @@ def width(symtab) def value(symtab) return @value unless @value.nil? - if text_value.delete("_") =~ /^((XLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ + if text_value.delete("_") =~ /^((MXLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ # verilog-style literal signed = ::Regexp.last_match(4) width = width(symtab) @@ -4633,7 +4633,7 @@ def unsigned_value @unsigned_value = case text_value.delete("_") - when /^((XLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ + when /^((MXLEN)|([0-9]+))?'(s?)([bodh]?)(.*)$/ # verilog-style literal radix_id = ::Regexp.last_match(5) value = ::Regexp.last_match(6) diff --git a/lib/idl/idl.treetop b/lib/idl/idl.treetop index 9cead8a2b2..0107b1ea48 100644 --- a/lib/idl/idl.treetop +++ b/lib/idl/idl.treetop @@ -64,16 +64,16 @@ grammar Idl rule int # verilog style: explicit bit width - (([0-9]+)/'XLEN')? "'" 'b' [0-1xX] [0-1_xX]* / - (([0-9]+)/'XLEN')? "'" 'o' [0-7xX] [0-7_xX]* / - (([0-9]+)/'XLEN')? "'" 'd'? [0-9] [0-9_]* / - (([0-9]+)/'XLEN')? "'" 'h' [0-9a-fA-FxX] [0-9a-fA-F_xX]* / + (([0-9]+)/'MXLEN')? "'" 'b' [0-1xX] [0-1_xX]* / + (([0-9]+)/'MXLEN')? "'" 'o' [0-7xX] [0-7_xX]* / + (([0-9]+)/'MXLEN')? "'" 'd'? [0-9] [0-9_]* / + (([0-9]+)/'MXLEN')? "'" 'h' [0-9a-fA-FxX] [0-9a-fA-F_xX]* / # verilog style: explicit bit width, signed - (([0-9]+)/'XLEN')? "'" 'sb' [0-1xX] [0-1_xX]* / - (([0-9]+)/'XLEN')? "'" 'so' [0-7xX] [0-7_xX]* / - (([0-9]+)/'XLEN')? "'" 's' 'd'? [0-9] [0-9_]* / - (([0-9]+)/'XLEN')? "'" 'sh' [0-9a-fA-FxX] [0-9a-fA-F_xX]* / + (([0-9]+)/'MXLEN')? "'" 'sb' [0-1xX] [0-1_xX]* / + (([0-9]+)/'MXLEN')? "'" 'so' [0-7xX] [0-7_xX]* / + (([0-9]+)/'MXLEN')? "'" 's' 'd'? [0-9] [0-9_]* / + (([0-9]+)/'MXLEN')? "'" 'sh' [0-9a-fA-FxX] [0-9a-fA-F_xX]* / # c++ style: signed '0b' [0-1] [0-1_]* 's' / @@ -564,7 +564,7 @@ grammar Idl end rule builtin_type_name - # alias for Bits + # alias for Bits 'XReg' ![A-Za-z0-9] / 'Bits' space* '<' space* i:template_safe_expression space* '>' ![A-Za-z0-9] / diff --git a/lib/idl/type.rb b/lib/idl/type.rb index 0b582e4584..00904137c7 100644 --- a/lib/idl/type.rb +++ b/lib/idl/type.rb @@ -64,7 +64,7 @@ def qualify(qualifier) def self.from_typename(type_name, cfg_arch) case type_name when 'XReg' - return Type.new(:bits, width: cfg_arch.param_values['XLEN']) + return Type.new(:bits, width: cfg_arch.param_values["MXLEN"]) when 'FReg' return Type.new(:freg, width: 32) when 'DReg' From 61604f5cba39fe3db527c64113f89923c416f46b Mon Sep 17 00:00:00 2001 From: Kevin Broch <86068473+kbroch-rivosinc@users.noreply.github.com> Date: Wed, 16 Apr 2025 09:52:46 -0700 Subject: [PATCH 026/207] task: update git hook repo versions (#620) done with `pre-commit autoupdate` also ran `pre-commit run --all-files` to make sure everything still passes and no changes --- .pre-commit-config.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index cb92d46317..3dc8d861bf 100755 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -30,7 +30,7 @@ repos: exclude: schemas/json-schema-draft-07.json - repo: https://github.com/python-jsonschema/check-jsonschema - rev: 0.32.1 + rev: 0.33.0 hooks: - id: check-jsonschema alias: check-jsonschema-inst From 213456e02c9bbd7afc9880d9efad25752b06c934 Mon Sep 17 00:00:00 2001 From: M Abdullah <2022ee19@gmail.com> Date: Wed, 16 Apr 2025 22:05:08 +0500 Subject: [PATCH 027/207] Fix for H.yaml (#621) * Update H.yaml Signed-off-by: M Abdullah <2022ee19@gmail.com> * Updated H.yaml --------- Signed-off-by: M Abdullah <2022ee19@gmail.com> Co-authored-by: root <2022e19@gmail.com> --- arch/ext/H.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/ext/H.yaml b/arch/ext/H.yaml index 98e600c4f7..6781ffd279 100644 --- a/arch/ext/H.yaml +++ b/arch/ext/H.yaml @@ -167,6 +167,9 @@ params: type: integer minimum: 1 maximum: 63 + extra_validation: | + # GEILEN must be <= 31 for RV32 + assert NUM_EXTERNAL_GUEST_INTERRUPTS <= 31 if SXLEN == 32 VS_MODE_ENDIANESS: description: | Endianness of data in VS-mode. Can be one of: From 2b22350c37336d0217517b520a9bbaf32a643c57 Mon Sep 17 00:00:00 2001 From: ayosher Date: Wed, 16 Apr 2025 20:57:07 +0300 Subject: [PATCH 028/207] Xqci (Xqciint) extensiion: Fix IDL code of qc.c.mileaveret instruction to match Smdbltrp behaviour (#618) Signed-off-by: Albert Yosher --- arch_overlay/qc_iu/ext/Xqci.yaml | 34 +++++++++++++++++++ arch_overlay/qc_iu/ext/Xqciint.yaml | 13 +++++++ .../qc_iu/inst/Xqci/qc.c.mileaveret.yaml | 13 ++++++- 3 files changed, 59 insertions(+), 1 deletion(-) diff --git a/arch_overlay/qc_iu/ext/Xqci.yaml b/arch_overlay/qc_iu/ext/Xqci.yaml index 782ca84f13..c08e00b326 100644 --- a/arch_overlay/qc_iu/ext/Xqci.yaml +++ b/arch_overlay/qc_iu/ext/Xqci.yaml @@ -312,6 +312,40 @@ versions: requires: name: Zca version: ">= 1.0.0" +- version: "0.10.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix IDL code for Smdbltrp and Smrnmi spec compatibility for qc.c.mileaveret instruction + implies: + - { name: Xqcia, version: "0.6.0" } + - { name: Xqciac, version: "0.3.0" } + - { name: Xqcibi, version: "0.2.0" } + - { name: Xqcibm, version: "0.7.0" } + - { name: Xqcicli, version: "0.3.0" } + - { name: Xqcicm, version: "0.2.0" } + - { name: Xqcics, version: "0.2.0" } + - { name: Xqcicsr, version: "0.3.0" } + - { name: Xqciint, version: "0.7.0" } + - { name: Xqciio, version: "0.1.0" } + - { name: Xqcilb, version: "0.2.0" } + - { name: Xqcili, version: "0.2.0" } + - { name: Xqcilia, version: "0.2.0" } + - { name: Xqcilo, version: "0.3.0" } + - { name: Xqcilsm, version: "0.5.0" } + - { name: Xqcisim, version: "0.2.0" } + - { name: Xqcisls, version: "0.2.0" } + - { name: Xqcisync, version: "0.2.0" } + requires: + name: Zca + version: ">= 1.0.0" description: | The Xqci extension includes a set of instructions that improve RISC-V code density and performance in microontrollers. It fills several gaps: diff --git a/arch_overlay/qc_iu/ext/Xqciint.yaml b/arch_overlay/qc_iu/ext/Xqciint.yaml index 4cc76c2a00..507482cfd2 100644 --- a/arch_overlay/qc_iu/ext/Xqciint.yaml +++ b/arch_overlay/qc_iu/ext/Xqciint.yaml @@ -93,6 +93,19 @@ versions: changes: - Fix IDL code for Smdbltrp and Smrnmi spec compatibility for qc.c.mret and qc.c.mnret instructions requires: { name: Zca, version: ">= 1.0.0" } +- version: "0.7.0" + state: frozen + ratification_date: null + contributors: + - name: Albert Yosher + company: Qualcomm Technologies, Inc. + email: ayosher@qti.qualcomm.com + - name: Derek Hower + company: Qualcomm Technologies, Inc. + email: dhower@qti.qualcomm.com + changes: + - Fix IDL code for Smdbltrp and Smrnmi spec compatibility for qc.c.mileaveret instruction + requires: { name: Zca, version: ">= 1.0.0" } description: | The Xqciint extension includes eleven instructions to accelerate interrupt servicing by performing common actions during ISR prologue/epilogue. diff --git a/arch_overlay/qc_iu/inst/Xqci/qc.c.mileaveret.yaml b/arch_overlay/qc_iu/inst/Xqci/qc.c.mileaveret.yaml index dfe0859d46..7d7b3e8ff4 100644 --- a/arch_overlay/qc_iu/inst/Xqci/qc.c.mileaveret.yaml +++ b/arch_overlay/qc_iu/inst/Xqci/qc.c.mileaveret.yaml @@ -53,11 +53,16 @@ operation(): | Bits<4> mpil_val = (qc_mcause_val >> 16) & 0xF; CSR[mstatus].MIE = mpie_val; CSR[mstatus].MPIE = 1'b1; - CSR[mstatush].MDT = mpdt_val; + if (implemented?(ExtensionName::Smdbltrp)) { + CSR[mstatush].MDT = mpdt_val; + } CSR[qc.mcause].sw_write(qc_mcause_val_masked | (1<<27) | (mpie_val<<26) | (0<<29) | (mpil_val << 12) | (0xF << 16)); if (mpdt_val == 1'b0) { + if (CSR[mstatus].MPP != 2'b11) { + CSR[mstatus].MPRV = 0; + } if (CSR[mstatus].MPP == 2'b00) { set_mode(PrivilegeMode::U); } else if (CSR[mstatus].MPP == 2'b01) { @@ -77,6 +82,12 @@ operation(): | CSR[qc.mcause].sw_write(qc_mcause_val_masked | (1<<28) | (mnpie_val<<26) | (1<<30) | (mnpil_val << 12) | (0xF << 20)); + if (CSR[mnstatus].MNPP != 2'b11) { + CSR[mstatus].MPRV = 0; + if (implemented?(ExtensionName::Smdbltrp)) { + CSR[mstatush].MDT = 1'b0; + } + } if (CSR[mnstatus].MNPP == 2'b00) { set_mode(PrivilegeMode::U); } else if (CSR[mnstatus].MNPP == 2'b01) { From 16fdbd15d4231739586eaaa92c16dd2e1a610e86 Mon Sep 17 00:00:00 2001 From: Kevin Broch <86068473+kbroch-rivosinc@users.noreply.github.com> Date: Wed, 16 Apr 2025 13:03:39 -0700 Subject: [PATCH 029/207] task: fix typos (#624) relates to #623 --- arch/isa/globals.isa | 2 +- arch/profile/RVB23U64.yaml | 2 +- backends/certificate_doc/templates/certificate.adoc.erb | 6 +++--- backends/cpp_hart_gen/cpp/include/udb/bits.hpp | 2 +- backends/cpp_hart_gen/cpp/include/udb/csr.hpp | 4 ++-- backends/cpp_hart_gen/cpp/include/udb/defines.hpp | 2 +- backends/cpp_hart_gen/cpp/include/udb/version.hpp | 2 +- backends/cpp_hart_gen/cpp/src/libhart_renode.cpp | 2 +- backends/cpp_hart_gen/cpp/test/test_bits.cpp | 6 +++--- backends/cpp_hart_gen/cpp/test/test_version.cpp | 2 +- backends/cpp_hart_gen/lib/gen_cpp.rb | 2 +- backends/cpp_hart_gen/lib/template_helpers.rb | 2 +- backends/cpp_hart_gen/templates/enum.cxx.erb | 2 +- backends/cpp_hart_gen/templates/hart.hxx.erb | 4 ++-- backends/cpp_hart_gen/templates/libhart.h.erb | 2 +- backends/cpp_hart_gen/templates/libhart_renode.h.erb | 2 +- lib/arch_obj_models/instruction.rb | 4 ++-- lib/arch_obj_models/obj.rb | 2 +- lib/arch_obj_models/portfolio.rb | 2 +- lib/cfg_arch.rb | 6 +++--- lib/config.rb | 2 +- lib/idl/ast.rb | 2 +- lib/idl/type.rb | 4 ++-- schemas/inst_schema.json | 2 +- 24 files changed, 34 insertions(+), 34 deletions(-) diff --git a/arch/isa/globals.isa b/arch/isa/globals.isa index f175bb6cae..08e7966617 100644 --- a/arch/isa/globals.isa +++ b/arch/isa/globals.isa @@ -2844,7 +2844,7 @@ function amo { returns Bits arguments XReg virtual_address, # the virtual address to load from/store to - Bits value, # the value for the second hald of the atomic operation + Bits value, # the value for the second half of the atomic operation AmoOperation op, # atomic operation to apply Bits<1> aq, # acquire semantics? 0=no, 1=yes Bits<1> rl, # release semantics? 0=no, 1=yes diff --git a/arch/profile/RVB23U64.yaml b/arch/profile/RVB23U64.yaml index b133ce78aa..a68a6da887 100644 --- a/arch/profile/RVB23U64.yaml +++ b/arch/profile/RVB23U64.yaml @@ -39,7 +39,7 @@ extensions: presence: mandatory version: "~>1.0" note: | - Commpressed (16-bit) may-be operations + Compressed (16-bit) may-be operations Zcb: presence: mandatory version: "~>1.0" diff --git a/backends/certificate_doc/templates/certificate.adoc.erb b/backends/certificate_doc/templates/certificate.adoc.erb index b9a3897f55..75093f95fb 100644 --- a/backends/certificate_doc/templates/certificate.adoc.erb +++ b/backends/certificate_doc/templates/certificate.adoc.erb @@ -71,10 +71,10 @@ with the RVI TSC (Technical Steering Committee) organization who creates RISC-V The CRDs refer to and augment information provided in existing ratified RVI standards. -There are a variety of certificates offered by RVI to accomodate the various RVI standards. +There are a variety of certificates offered by RVI to accommodate the various RVI standards. There are certificates for processors, non-processor system IP (e.g., IOMMU), and system platforms (processor + system IP) hardware standards. -There are multiple classes of processor certificates available to accomodate the wide range of +There are multiple classes of processor certificates available to accommodate the wide range of RISC-V implementations from basic microcontrollers to advanced Applications-class processors. Each CRD has a list of mandatory behaviors along with a list of optional behaviors. @@ -152,7 +152,7 @@ Where: * is 3-digit integer defined as follows: ** The hundreds's digit indicates the series ** The ten's digit identifies large differences in mandatory extensions (e.g., V, H) within the series -** The one's digit indentifies small/medium differences in mandatory extensions (e.g., Zicond, PMP) within the series +** The one's digit identifies small/medium differences in mandatory extensions (e.g., Zicond, PMP) within the series * is optional and is 32 for RV32I, 64 for RV64I, and 32E for RV32E ** If a CRD supports multiple bases and is omitted in a reference, it applies to all supported bases ** If a CRD only supports one base then is generally omitted diff --git a/backends/cpp_hart_gen/cpp/include/udb/bits.hpp b/backends/cpp_hart_gen/cpp/include/udb/bits.hpp index 330a8dfaab..8eaac27b20 100644 --- a/backends/cpp_hart_gen/cpp/include/udb/bits.hpp +++ b/backends/cpp_hart_gen/cpp/include/udb/bits.hpp @@ -258,7 +258,7 @@ namespace udb { // exactly fits in a native type, so just cast it return static_cast(unsigned_value); } else { - // we have a native type, but some bits are unsed. need to sign extend + // we have a native type, but some bits are unused. need to sign extend // the storage to the native width return static_cast(sign_extend(unsigned_value)); } diff --git a/backends/cpp_hart_gen/cpp/include/udb/csr.hpp b/backends/cpp_hart_gen/cpp/include/udb/csr.hpp index 668d582cbe..cfdf1cdeb7 100644 --- a/backends/cpp_hart_gen/cpp/include/udb/csr.hpp +++ b/backends/cpp_hart_gen/cpp/include/udb/csr.hpp @@ -41,7 +41,7 @@ namespace udb { const unsigned& xlen) = 0; // write the field, applying any restrictions first - // given teh effective xlen + // given the effective xlen // virtual void sw_write(const uint64_t& field_write_value, // const unsigned& xlen) = 0; @@ -113,7 +113,7 @@ namespace udb { // no checks or transformations are applied virtual void hw_write(const uint64_t& value, const unsigned& xlen) = 0; - // cant this CSR be implemented when ext is not? + // can't this CSR be implemented when ext is not? virtual bool implemented_without_Q_(const ExtensionName&) const = 0; }; } // namespace udb diff --git a/backends/cpp_hart_gen/cpp/include/udb/defines.hpp b/backends/cpp_hart_gen/cpp/include/udb/defines.hpp index a7ecc06a9b..ff2ad506fe 100644 --- a/backends/cpp_hart_gen/cpp/include/udb/defines.hpp +++ b/backends/cpp_hart_gen/cpp/include/udb/defines.hpp @@ -6,7 +6,7 @@ #include // type to be used when you want to pass a string literal as a template -// arugment +// argument template struct TemplateString { constexpr TemplateString(const char (&str)[N]) : size(N) { diff --git a/backends/cpp_hart_gen/cpp/include/udb/version.hpp b/backends/cpp_hart_gen/cpp/include/udb/version.hpp index f49c1d0199..4db9d9611b 100644 --- a/backends/cpp_hart_gen/cpp/include/udb/version.hpp +++ b/backends/cpp_hart_gen/cpp/include/udb/version.hpp @@ -145,7 +145,7 @@ namespace udb { OpKind m_kind; }; - // default requiremnt is >= 0 + // default requirement is >= 0 VersionRequirement() : m_op(OpKind::GTE), m_version(0, 0, 0, false) {} constexpr VersionRequirement(const std::string_view& req) diff --git a/backends/cpp_hart_gen/cpp/src/libhart_renode.cpp b/backends/cpp_hart_gen/cpp/src/libhart_renode.cpp index b3929ba5b3..29ab786dae 100644 --- a/backends/cpp_hart_gen/cpp/src/libhart_renode.cpp +++ b/backends/cpp_hart_gen/cpp/src/libhart_renode.cpp @@ -24,7 +24,7 @@ struct RenodeSocModel { uint64_t read_mcycle() { return 0; } uint64_t read_mtime() { return 0; } - // returns new value of mcycle (coudl be different than new_value) + // returns new value of mcycle (could be different than new_value) uint64_t sw_write_mcycle(uint64_t new_value) { return 0; } void cache_block_zero(uint64_t paddr) {} diff --git a/backends/cpp_hart_gen/cpp/test/test_bits.cpp b/backends/cpp_hart_gen/cpp/test/test_bits.cpp index 178c106045..9aee7af80d 100644 --- a/backends/cpp_hart_gen/cpp/test/test_bits.cpp +++ b/backends/cpp_hart_gen/cpp/test/test_bits.cpp @@ -115,14 +115,14 @@ TEST_CASE("Inversion", "[bits]") { REQUIRE((~Bits<129>(5)).get() == 0x1fffffffffffffffffffffffffffffffa_mpz); REQUIRE((~Bits<129>(5)).get() < 0); } -TEST_CASE("64-bit Assignement", "[bits]") { +TEST_CASE("64-bit Assignment", "[bits]") { Bits<64> a{5}; Bits<64> b; b = a; REQUIRE(a.get() == b.get()); REQUIRE(a.get() == 5); } -TEST_CASE("65-bit Assignement", "[bits]") { +TEST_CASE("65-bit Assignment", "[bits]") { Bits<65> a{5}; Bits<65> b; b = a; @@ -130,7 +130,7 @@ TEST_CASE("65-bit Assignement", "[bits]") { REQUIRE(a.get() == 5); } -TEST_CASE("129-bit Assignement", "[bits]") { +TEST_CASE("129-bit Assignment", "[bits]") { Bits<129> a{5}; Bits<129> b; b = a; diff --git a/backends/cpp_hart_gen/cpp/test/test_version.cpp b/backends/cpp_hart_gen/cpp/test/test_version.cpp index 87a80374f5..580d1212e8 100644 --- a/backends/cpp_hart_gen/cpp/test/test_version.cpp +++ b/backends/cpp_hart_gen/cpp/test/test_version.cpp @@ -47,7 +47,7 @@ TEST_CASE("version ordering", "[version]") { REQUIRE(v2 >= v1); } -TEST_CASE("version ordering iwth pre", "[version]") { +TEST_CASE("version ordering with pre", "[version]") { Version v1("2.1.3-pre"sv); Version v2("2.1.3"sv); diff --git a/backends/cpp_hart_gen/lib/gen_cpp.rb b/backends/cpp_hart_gen/lib/gen_cpp.rb index 56b305eb5c..c7d8bc7bbf 100644 --- a/backends/cpp_hart_gen/lib/gen_cpp.rb +++ b/backends/cpp_hart_gen/lib/gen_cpp.rb @@ -31,7 +31,7 @@ def to_cxx module Idl class AstNode def gen_cpp(symtab, indent = 0, indent_spaces: 2) - internal_error "Need to implemente #gen_cpp for #{self.class.name}" + internal_error "Need to implement #gen_cpp for #{self.class.name}" end end diff --git a/backends/cpp_hart_gen/lib/template_helpers.rb b/backends/cpp_hart_gen/lib/template_helpers.rb index 3288aa478c..faa16bbb2a 100644 --- a/backends/cpp_hart_gen/lib/template_helpers.rb +++ b/backends/cpp_hart_gen/lib/template_helpers.rb @@ -53,7 +53,7 @@ def to_cxx(&block) def to_cxx(&block) raise ArgumentError, "Missing block" unless block_given? - raise ArgumentError, "Blcok expects two arguments" unless block.arity == 2 + raise ArgumentError, "Block expects two arguments" unless block.arity == 2 to_logic_tree(expand: false).to_cxx(&block) end diff --git a/backends/cpp_hart_gen/templates/enum.cxx.erb b/backends/cpp_hart_gen/templates/enum.cxx.erb index cc6f0686d8..93bd7daee0 100644 --- a/backends/cpp_hart_gen/templates/enum.cxx.erb +++ b/backends/cpp_hart_gen/templates/enum.cxx.erb @@ -20,7 +20,7 @@ namespace udb { case <%= element_values[idx] %>: return "<%= element_names[idx] %>"; <%- seen << element_values[idx] -%> <%- end -%> - default: return "Uknown"; + default: return "Unknown"; } } diff --git a/backends/cpp_hart_gen/templates/hart.hxx.erb b/backends/cpp_hart_gen/templates/hart.hxx.erb index c9452a580c..019f5c0f06 100644 --- a/backends/cpp_hart_gen/templates/hart.hxx.erb +++ b/backends/cpp_hart_gen/templates/hart.hxx.erb @@ -245,7 +245,7 @@ namespace udb { uint64_t xreg(unsigned num) const override { if (num >= 32) { - throw std::out_of_range("X register indicies are 0 - 31, inclusive"); + throw std::out_of_range("X register indices are 0 - 31, inclusive"); } return _xreg(num); } @@ -261,7 +261,7 @@ namespace udb { void set_xreg(unsigned num, uint64_t value) override { if (num >= 32) { - throw std::out_of_range("X register indicies are 0 - 31, inclusive"); + throw std::out_of_range("X register indices are 0 - 31, inclusive"); } _set_xreg(num, value); } diff --git a/backends/cpp_hart_gen/templates/libhart.h.erb b/backends/cpp_hart_gen/templates/libhart.h.erb index fad10d515a..2111cd3014 100644 --- a/backends/cpp_hart_gen/templates/libhart.h.erb +++ b/backends/cpp_hart_gen/templates/libhart.h.erb @@ -41,7 +41,7 @@ LINKAGE typedef struct { uint64_t (*read_mcycle)(); uint64_t (*read_mtime)(); - // returns new value of mcycle (coudl be different than new_value) + // returns new value of mcycle (could be different than new_value) uint64_t (*sw_write_mcycle)(uint64_t new_value); void (*cache_block_zero)(uint64_t paddr); diff --git a/backends/cpp_hart_gen/templates/libhart_renode.h.erb b/backends/cpp_hart_gen/templates/libhart_renode.h.erb index dd709091eb..8c9ee4bcbe 100644 --- a/backends/cpp_hart_gen/templates/libhart_renode.h.erb +++ b/backends/cpp_hart_gen/templates/libhart_renode.h.erb @@ -46,7 +46,7 @@ LINKAGE typedef struct { uint64_t (*read_mcycle)(); uint64_t (*read_mtime)(); - // returns new value of mcycle (coudl be different than new_value) + // returns new value of mcycle (could be different than new_value) uint64_t (*sw_write_mcycle)(uint64_t new_value); void (*cache_block_zero)(uint64_t paddr); diff --git a/lib/arch_obj_models/instruction.rb b/lib/arch_obj_models/instruction.rb index 738e73cc34..29ada2a1fd 100644 --- a/lib/arch_obj_models/instruction.rb +++ b/lib/arch_obj_models/instruction.rb @@ -599,7 +599,7 @@ def indistinguishable?(other_encoding, check_other: true) if same # the mask can't be distinguished; is there one or more exclusions that distinguishes them? - # we have to check all combinations of dvs with exlcusions, and their values + # we have to check all combinations of dvs with exclusions, and their values exclusion_dvs = @decode_variables.reject { |dv| dv.excludes.empty? } exclusion_dv_values = [] def expand(exclusion_dvs, exclusion_dv_values, base, idx) @@ -702,7 +702,7 @@ def bad_encoding_conflict?(xlen, other_inst) !(hints.include?(other_inst) || other_inst.hints.include?(self)) end - # @return [Array] List of instructions that re-use this instruction's encoding, + # @return [Array] List of instructions that reuse this instruction's encoding, # but can't be present in the same system because their defining # extensions conflict def conflicting_instructions(xlen) diff --git a/lib/arch_obj_models/obj.rb b/lib/arch_obj_models/obj.rb index 6f4bd45e2d..b41291d56d 100644 --- a/lib/arch_obj_models/obj.rb +++ b/lib/arch_obj_models/obj.rb @@ -187,7 +187,7 @@ def definedBy # @param normative [Boolean] Include normative text? # @param non_normative [Boolean] Include non-normative text? # @param when_cb [Proc(AstNode, String)] Callback to generate text for the un-knowable ast - # @return [String] Descripton of the object, from YAML + # @return [String] Description of the object, from YAML def description( normative: true, # display normative text? non_normative: true, # display non-normative text? diff --git a/lib/arch_obj_models/portfolio.rb b/lib/arch_obj_models/portfolio.rb index eace808328..5a2978aba3 100644 --- a/lib/arch_obj_models/portfolio.rb +++ b/lib/arch_obj_models/portfolio.rb @@ -5,7 +5,7 @@ # RVA and MC are examples of portfolio classes # # Many classes inherit from the DatabaseObject class. This provides facilities for accessing the contents of a -# Portfolio Class YAML or Portfolio Model YAML file via the "data" member (hash holding releated YAML file contents). +# Portfolio Class YAML or Portfolio Model YAML file via the "data" member (hash holding related YAML file contents). # # A variable name with a "_data" suffix indicates it is the raw hash data from the portfolio YAML file. diff --git a/lib/cfg_arch.rb b/lib/cfg_arch.rb index 05d4531912..b95cccb6c3 100644 --- a/lib/cfg_arch.rb +++ b/lib/cfg_arch.rb @@ -335,8 +335,8 @@ def params_without_value # @return [String] A string representation of the object. def inspect = "ConfiguredArchitecture##{name}" - # @return [Array] List of extension versions explictly marked as implemented in the config. - # Does *not* include extensions implied by explictly implemented extensions. + # @return [Array] List of extension versions explicitly marked as implemented in the config. + # Does *not* include extensions implied by explicitly implemented extensions. def explicitly_implemented_extension_versions return @explicitly_implemented_extension_versions unless @explicitly_implemented_extension_versions.nil? @@ -459,7 +459,7 @@ def transitive_prohibited_extension_versions end end - # now add everything that is not mandatory or implied by mandatory, if addtional extensions are not allowed + # now add everything that is not mandatory or implied by mandatory, if additional extensions are not allowed unless @config.additional_extensions_allowed? extensions.each do |ext| ext.versions.each do |ext_ver| diff --git a/lib/config.rb b/lib/config.rb index 501d9b7659..7c02685558 100644 --- a/lib/config.rb +++ b/lib/config.rb @@ -123,7 +123,7 @@ def initialize(cfg_file_path, data) def additional_extensions_allowed? = @data.key?("additional_extensions") ? @data["additional_extensions"] : true - def implemented_extensions = raise "implemented_extensions is only availabe for a FullConfig" + def implemented_extensions = raise "implemented_extensions is only available for a FullConfig" # @return [Array String,Array] # List of all extensions that must be implemented, as specified in the config file diff --git a/lib/idl/ast.rb b/lib/idl/ast.rb index 95dd838c8a..4bdafd8af5 100644 --- a/lib/idl/ast.rb +++ b/lib/idl/ast.rb @@ -4207,7 +4207,7 @@ def type_check(symtab) end unless return_type(symtab).convertable_to?(expected_return_type(symtab)) - type_error "Return type (#{return_type(symtab)}) not convertable to expected return type (#{expected_return_type(symtab)})" + type_error "Return type (#{return_type(symtab)}) not convertible to expected return type (#{expected_return_type(symtab)})" end end diff --git a/lib/idl/type.rb b/lib/idl/type.rb index 00904137c7..2bea234eda 100644 --- a/lib/idl/type.rb +++ b/lib/idl/type.rb @@ -8,8 +8,8 @@ class Type :boolean, # true or false, not compatible with bits/int/xreg :bits, # integer with compile-time-known bit width :enum, # enumeration class - :enum_ref, # reference to an enumeration element, convertable to int and/or Bits - :bitfield, # bitfield, convertable to int and/or Bits + :enum_ref, # reference to an enumeration element, convertible to int and/or Bits + :bitfield, # bitfield, convertible to int and/or Bits :struct, # structure class :array, # array of other types :tuple, # tuple of other dissimilar types diff --git a/schemas/inst_schema.json b/schemas/inst_schema.json index aba5229d26..e3359c1f27 100644 --- a/schemas/inst_schema.json +++ b/schemas/inst_schema.json @@ -220,7 +220,7 @@ "type": "string", "format": "uri-reference", "pattern": "^inst/.+\\.yaml#.*$", - "description": "Ref to an instruction that is using a HINT codepoint(s) of this instruciton" + "description": "Ref to an instruction that is using a HINT codepoint(s) of this instruction" } }, "required": ["$ref"], From 2974f27293ad108fce27e25da73f0c28189fca34 Mon Sep 17 00:00:00 2001 From: Kevin Broch <86068473+kbroch-rivosinc@users.noreply.github.com> Date: Wed, 16 Apr 2025 18:42:21 -0700 Subject: [PATCH 030/207] task: fix typo and put 2 N's in endianness (#627) relates to #625 --- arch/certificate_model/MC100-32.yaml | 2 +- .../MockCertificateModel.yaml | 2 +- arch/csr/hstatus.yaml | 10 +++---- arch/csr/mstatus.yaml | 28 +++++++++---------- arch/csr/mstatush.yaml | 10 +++---- arch/csr/vsstatus.yaml | 10 +++---- arch/ext/H.yaml | 4 +-- arch/ext/S.yaml | 2 +- arch/ext/Sm.yaml | 2 +- arch/ext/U.yaml | 2 +- arch/profile/RVA20S64.yaml | 2 +- arch/profile/RVA20U64.yaml | 2 +- arch/prose/idl.adoc | 4 +-- .../cpp_hart_gen/cpp/test/test_decode.cpp | 2 +- cert_flow.txt | 2 +- cfgs/MC100-32.yaml | 2 +- cfgs/config_validation.rb | 8 +++--- cfgs/example_rv64_with_overlay.yaml | 10 +++---- cfgs/mc100-32-full-example.yaml | 2 +- docs/ruby/Idl/SymbolTable.html | 2 +- 20 files changed, 54 insertions(+), 54 deletions(-) diff --git a/arch/certificate_model/MC100-32.yaml b/arch/certificate_model/MC100-32.yaml index 9315f976f0..975404fbeb 100644 --- a/arch/certificate_model/MC100-32.yaml +++ b/arch/certificate_model/MC100-32.yaml @@ -133,7 +133,7 @@ extensions: TRAP_ON_EBREAK: schema: const: true - M_MODE_ENDIANESS: + M_MODE_ENDIANNESS: schema: const: little MXLEN: diff --git a/arch/certificate_model/MockCertificateModel.yaml b/arch/certificate_model/MockCertificateModel.yaml index 609ce852dd..06b84d4578 100644 --- a/arch/certificate_model/MockCertificateModel.yaml +++ b/arch/certificate_model/MockCertificateModel.yaml @@ -132,7 +132,7 @@ extensions: REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION: schema: const: true - M_MODE_ENDIANESS: + M_MODE_ENDIANNESS: schema: const: little # TODO: Uncomment when GitHub issue # is fixed. diff --git a/arch/csr/hstatus.yaml b/arch/csr/hstatus.yaml index 5081d899d0..ebfa1adebe 100644 --- a/arch/csr/hstatus.yaml +++ b/arch/csr/hstatus.yaml @@ -244,15 +244,15 @@ fields: normative: false text: | Since the CPU does not support big endian in VS-mode, this is hardwired to 0. - when(): return VS_MODE_ENDIANESS == "little"; + when(): return VS_MODE_ENDIANNESS == "little"; - id: csr-hstatus-vgein-big-endian normative: false text: | Since the CPU does not support little endian in VS-mode, this is hardwired to 1. - when(): return VS_MODE_ENDIANESS == "big"; + when(): return VS_MODE_ENDIANNESS == "big"; type(): | - if (VS_MODE_ENDIANESS == "dynamic") { + if (VS_MODE_ENDIANNESS == "dynamic") { # mode is mutable return CsrFieldType::RW; } else { @@ -260,10 +260,10 @@ fields: return CsrFieldType::RO; } reset_value(): | - if (VS_MODE_ENDIANESS == "little") { + if (VS_MODE_ENDIANNESS == "little") { # little endian return 0; - } else if (VS_MODE_ENDIANESS == "big") { + } else if (VS_MODE_ENDIANNESS == "big") { # big endian return 1; } else { diff --git a/arch/csr/mstatus.yaml b/arch/csr/mstatus.yaml index 84cd5695ac..f4750626cb 100644 --- a/arch/csr/mstatus.yaml +++ b/arch/csr/mstatus.yaml @@ -91,17 +91,17 @@ fields: Controls the endianness of data M-mode (0 = little, 1 = big). Instructions are always little endian, regardless of the data setting. - [when,"M_MODE_ENDIANESS == little"] + [when,"M_MODE_ENDIANNESS == little"] Since the CPU does not support big endian, this is hardwired to 0. - [when,"M_MODE_ENDIANESS == big"] + [when,"M_MODE_ENDIANNESS == big"] Since the CPU does not support little endian, this is hardwired to 1. type(): | - return (M_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; + return (M_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; # if endianness is mutable, MBE comes out of reset in little-endian mode reset_value(): | - return (M_MODE_ENDIANESS == "big") ? 1 : 0; + return (M_MODE_ENDIANNESS == "big") ? 1 : 0; SBE: location: 36 @@ -113,19 +113,19 @@ fields: Controls the endianness of S-mode (0 = little, 1 = big). Instructions are always little endian, regardless of the data setting. - [when,"S_MODE_ENDIANESS == little"] + [when,"S_MODE_ENDIANNESS == little"] Since the CPU does not support big endian, this is hardwired to 0. - [when,"S_MODE_ENDIANESS == big"] + [when,"S_MODE_ENDIANNESS == big"] Since the CPU does not support little endian, this is hardwired to 1. type(): | - return (S_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; + return (S_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; # if endianness is mutable, MBE comes out of reset in little-endian mode reset_value(): | - if (S_MODE_ENDIANESS == "little") { + if (S_MODE_ENDIANNESS == "little") { return 0; - } else if (S_MODE_ENDIANESS == "big") { + } else if (S_MODE_ENDIANNESS == "big") { return 1; } else { return UNDEFINED_LEGAL; @@ -532,18 +532,18 @@ fields: Controls the endianness of U-mode (0 = little, 1 = big). Instructions are always little endian, regardless of the data setting. - [when,"U_MODE_ENDIANESS == 'little'"] + [when,"U_MODE_ENDIANNESS == 'little'"] Since the CPU does not support big endian in U-mode, this is hardwired to 0. - [when,"U_MODE_ENDIANESS == 'big'"] + [when,"U_MODE_ENDIANNESS == 'big'"] Since the CPU does not support little endian in U-mode, this is hardwired to 1. type(): | - return (U_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; + return (U_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | - if (U_MODE_ENDIANESS == "little") { + if (U_MODE_ENDIANNESS == "little") { return 0; - } else if (U_MODE_ENDIANESS == "big") { + } else if (U_MODE_ENDIANNESS == "big") { return 1; } else { return UNDEFINED_LEGAL; diff --git a/arch/csr/mstatush.yaml b/arch/csr/mstatush.yaml index 1b44ad800c..350390e55e 100644 --- a/arch/csr/mstatush.yaml +++ b/arch/csr/mstatush.yaml @@ -50,19 +50,19 @@ fields: location: 5 description: | see `mstatus.MBE` - type(): 'return (M_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;' - reset_value(): 'return (M_MODE_ENDIANESS == "big") ? 1 : 0;' + type(): 'return (M_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;' + reset_value(): 'return (M_MODE_ENDIANNESS == "big") ? 1 : 0;' alias: mstatus.MBE SBE: location: 4 definedBy: S description: | see `mstatus.SBE` - type(): 'return (S_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;' + type(): 'return (S_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;' reset_value(): | - if (S_MODE_ENDIANESS == "little") { + if (S_MODE_ENDIANNESS == "little") { return 0; - } else if (S_MODE_ENDIANESS == "big") { + } else if (S_MODE_ENDIANNESS == "big") { return 1; } else { return UNDEFINED_LEGAL; diff --git a/arch/csr/vsstatus.yaml b/arch/csr/vsstatus.yaml index 08287caa26..357490a0c4 100644 --- a/arch/csr/vsstatus.yaml +++ b/arch/csr/vsstatus.yaml @@ -160,19 +160,19 @@ fields: Controls the endianness of VU-mode (0 = little, 1 = big). - [when,"VU_MODE_ENDIANESS == 'little'"] + [when,"VU_MODE_ENDIANNESS == 'little'"] Since the CPU does not support big endian, this is hardwired to 0. - [when,"VU_MODE_ENDIANESS == 'big'"] + [when,"VU_MODE_ENDIANNESS == 'big'"] Since the CPU does not support big endian, this is hardwired to 1. type(): | - return (VU_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; + return (VU_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; definedBy: S reset_value(): | - if (VU_MODE_ENDIANESS == "little") { + if (VU_MODE_ENDIANNESS == "little") { # little endian return 0; - } else if (VU_MODE_ENDIANESS == "big") { + } else if (VU_MODE_ENDIANNESS == "big") { # big endian return 1; } else { diff --git a/arch/ext/H.yaml b/arch/ext/H.yaml index 6781ffd279..a2d409ee30 100644 --- a/arch/ext/H.yaml +++ b/arch/ext/H.yaml @@ -170,7 +170,7 @@ params: extra_validation: | # GEILEN must be <= 31 for RV32 assert NUM_EXTERNAL_GUEST_INTERRUPTS <= 31 if SXLEN == 32 - VS_MODE_ENDIANESS: + VS_MODE_ENDIANNESS: description: | Endianness of data in VS-mode. Can be one of: @@ -181,7 +181,7 @@ params: schema: type: string enum: [little, big, dynamic] - VU_MODE_ENDIANESS: + VU_MODE_ENDIANNESS: description: | Endianness of data in VU-mode. Can be one of: diff --git a/arch/ext/S.yaml b/arch/ext/S.yaml index de635c42b6..799f1989f0 100644 --- a/arch/ext/S.yaml +++ b/arch/ext/S.yaml @@ -60,7 +60,7 @@ params: maximum: 16 extra_validation: | assert ASID_WIDTH <= 9 if XLEN == 32 - S_MODE_ENDIANESS: + S_MODE_ENDIANNESS: description: | Endianness of data in S-mode. Can be one of: diff --git a/arch/ext/Sm.yaml b/arch/ext/Sm.yaml index cc3c7c2dfe..8dd3b3655a 100644 --- a/arch/ext/Sm.yaml +++ b/arch/ext/Sm.yaml @@ -423,7 +423,7 @@ params: type: integer minimum: 1 maximum: 64 - M_MODE_ENDIANESS: + M_MODE_ENDIANNESS: description: | Endianness of data in M-mode. Can be one of: diff --git a/arch/ext/U.yaml b/arch/ext/U.yaml index d03fc50e26..556a14314b 100644 --- a/arch/ext/U.yaml +++ b/arch/ext/U.yaml @@ -18,7 +18,7 @@ params: Indicates whether or not the `U` extension can be disabled with the `misa.U` bit. schema: type: boolean - U_MODE_ENDIANESS: + U_MODE_ENDIANNESS: description: | Endianness of data in U-mode. Can be one of: diff --git a/arch/profile/RVA20S64.yaml b/arch/profile/RVA20S64.yaml index 939b820f09..9ad4c02a21 100644 --- a/arch/profile/RVA20S64.yaml +++ b/arch/profile/RVA20S64.yaml @@ -15,7 +15,7 @@ extensions: presence: mandatory version: "~> 1.0" param_constraints: - U_MODE_ENDIANESS: + U_MODE_ENDIANNESS: schema: const: little`` S: diff --git a/arch/profile/RVA20U64.yaml b/arch/profile/RVA20U64.yaml index 47d1cfa4b9..ba563e7734 100644 --- a/arch/profile/RVA20U64.yaml +++ b/arch/profile/RVA20U64.yaml @@ -27,7 +27,7 @@ extensions: presence: mandatory version: "~> 2.0" param_constraints: - U_MODE_ENDIANESS: + U_MODE_ENDIANNESS: schema: const: little Zicntr: diff --git a/arch/prose/idl.adoc b/arch/prose/idl.adoc index 318ca291eb..676d856799 100644 --- a/arch/prose/idl.adoc +++ b/arch/prose/idl.adoc @@ -970,7 +970,7 @@ mstatus: MBE: # ... type(): | - return (M_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; + return (M_MODE_ENDIANNESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; ---- field.reset_value():: @@ -988,5 +988,5 @@ mstatus: # ... # if endianness is mutable, MBE comes out of reset in little-endian mode reset_value(): | - return (M_MODE_ENDIANESS == "big") ? 1 : 0; + return (M_MODE_ENDIANNESS == "big") ? 1 : 0; ---- diff --git a/backends/cpp_hart_gen/cpp/test/test_decode.cpp b/backends/cpp_hart_gen/cpp/test/test_decode.cpp index 2242d52299..f9b3a3bfd2 100644 --- a/backends/cpp_hart_gen/cpp/test/test_decode.cpp +++ b/backends/cpp_hart_gen/cpp/test/test_decode.cpp @@ -49,7 +49,7 @@ description: For testing CONFIG_PTR_ADDRESS: 0 PMA_GRANULARITY: 12 PHYS_ADDR_WIDTH: 54 - M_MODE_ENDIANESS: little + M_MODE_ENDIANNESS: little MISA_CSR_IMPLEMENTED: true MTVEC_MODES: [0, 1] MTVEC_BASE_ALIGNMENT_DIRECT: 4 diff --git a/cert_flow.txt b/cert_flow.txt index 20d4be77af..6d83c5fe3b 100644 --- a/cert_flow.txt +++ b/cert_flow.txt @@ -78,5 +78,5 @@ params: PRECISE_SYNCHRONOUS_EXCEPTIONS: true TRAP_ON_ECALL_FROM_M: true TRAP_ON_EBREAK: true - M_MODE_ENDIANESS: little + M_MODE_ENDIANNESS: little XLEN: 32 diff --git a/cfgs/MC100-32.yaml b/cfgs/MC100-32.yaml index 5a426ec0b0..1a2f023aee 100644 --- a/cfgs/MC100-32.yaml +++ b/cfgs/MC100-32.yaml @@ -19,4 +19,4 @@ params: PRECISE_SYNCHRONOUS_EXCEPTIONS: true TRAP_ON_ECALL_FROM_M: true TRAP_ON_EBREAK: true - M_MODE_ENDIANESS: little + M_MODE_ENDIANNESS: little diff --git a/cfgs/config_validation.rb b/cfgs/config_validation.rb index 0853a4a5ea..1d4dedb63c 100644 --- a/cfgs/config_validation.rb +++ b/cfgs/config_validation.rb @@ -78,10 +78,10 @@ # require_param :MUTABLE_MISA_U if ext?(:U) ## Needs definition of what happens require_param :MUTABLE_MISA_V if ext?(:V) -require_param :S_MODE_ENDIANESS if ext?(:S) -require_param :U_MODE_ENDIANESS if ext?(:U) -require_param :VU_MODE_ENDIANESS if ext?(:H) -require_param :VS_MODE_ENDIANESS if ext?(:H) +require_param :S_MODE_ENDIANNESS if ext?(:S) +require_param :U_MODE_ENDIANNESS if ext?(:U) +require_param :VU_MODE_ENDIANNESS if ext?(:H) +require_param :VS_MODE_ENDIANNESS if ext?(:H) require_param :SXLEN if ext?(:S) && MXLEN > 32 require_param :UXLEN if ext?(:U) && MXLEN > 32 require_param :VSXLEN if ext?(:H) && MXLEN > 32 diff --git a/cfgs/example_rv64_with_overlay.yaml b/cfgs/example_rv64_with_overlay.yaml index 5d33d28ec7..dd5e4272a0 100644 --- a/cfgs/example_rv64_with_overlay.yaml +++ b/cfgs/example_rv64_with_overlay.yaml @@ -423,35 +423,35 @@ params: # * little: M-mode data is always little endian # * big: M-mode data is always big endian # * dynamic: M-mode data can be either little or big endian, depending on the RW CSR field mstatus.MBE - M_MODE_ENDIANESS: little + M_MODE_ENDIANNESS: little # Endianness of data in M-mode. Can be one of: # # * little: S-mode data is always little endian # * big: S-mode data is always big endian # * dynamic: S-mode data can be either little or big endian, depending on the RW CSR field mstatus.SBE - S_MODE_ENDIANESS: little + S_MODE_ENDIANNESS: little # Endianness of data in M-mode. Can be one of: # # * little: U-mode data is always little endian # * big: U-mode data is always big endian # * dynamic: U-mode data can be either little or big endian, depending on the RW CSR field mstatus.UBE - U_MODE_ENDIANESS: little + U_MODE_ENDIANNESS: little # Endianness of data in VU-mode. Can be one of: # # * little: VU-mode data is always little endian # * big: VU-mode data is always big endian # * dynamic: VU-mode data can be either little or big endian, depending on the RW CSR field vsstatus.UBE - VU_MODE_ENDIANESS: little + VU_MODE_ENDIANNESS: little # Endianness of data in VS-mode. Can be one of: # # * little: VS-mode data is always little endian # * big: VS-mode data is always big endian # * dynamic: VS-mode data can be either little or big endian, depending on the RW CSR field hstatus.VSBE - VS_MODE_ENDIANESS: little + VS_MODE_ENDIANNESS: little # XLENs supported in S-mode. Can be one of: # diff --git a/cfgs/mc100-32-full-example.yaml b/cfgs/mc100-32-full-example.yaml index 6c6841b4e6..add0e3fbb2 100644 --- a/cfgs/mc100-32-full-example.yaml +++ b/cfgs/mc100-32-full-example.yaml @@ -25,7 +25,7 @@ params: PRECISE_SYNCHRONOUS_EXCEPTIONS: true TRAP_ON_ECALL_FROM_M: true TRAP_ON_EBREAK: true - M_MODE_ENDIANESS: little + M_MODE_ENDIANNESS: little TRAP_ON_ILLEGAL_WLRL: true TRAP_ON_UNIMPLEMENTED_INSTRUCTION: true TRAP_ON_RESERVED_INSTRUCTION: true diff --git a/docs/ruby/Idl/SymbolTable.html b/docs/ruby/Idl/SymbolTable.html index b554b1e264..d707aecba6 100644 --- a/docs/ruby/Idl/SymbolTable.html +++ b/docs/ruby/Idl/SymbolTable.html @@ -704,7 +704,7 @@

add!(name, Var.new(name, Type.new(:boolean), value)) elsif value.is_a?(String) # just make sure this isn't something we think we need - expected_names = ["NAME", "M_MODE_ENDIANESS", "S_MODE_ENDIANESS", "U_MODE_ENDIANESS", "VS_MODE_ENDIANESS", "VU_MODE_ENDIANESS"] + expected_names = ["NAME", "M_MODE_ENDIANNESS", "S_MODE_ENDIANNESS", "U_MODE_ENDIANNESS", "VS_MODE_ENDIANNESS", "VU_MODE_ENDIANNESS"] raise "Unexpected String type for '#{name}'" unless expected_names.include?(name) elsif value.is_a?(Array) unless value.all? { |v| v.is_a?(Integer) || v.is_a?(TrueClass) || v.is_a?(FalseClass) } From c09d447eb6e78f4120be44a47227d5aa0f04d152 Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Thu, 17 Apr 2025 08:00:00 +0100 Subject: [PATCH 031/207] Enhance wavedrom display to a number-per-cell format. (#613) * fix: make string to hexa conversion methods be available for all templates, instead of just instruction_appendix Signed-off-by: Afonso Oliveira * feat: make all outputs use the new number-per-cell format in wavedroms. Signed-off-by: Afonso Oliveira --------- Signed-off-by: Afonso Oliveira --- backends/common_templates/adoc/inst.adoc.erb | 16 ++-- .../templates/instructions.adoc.erb | 82 ++----------------- .../manual/templates/instruction.adoc.erb | 18 ++-- lib/arch_obj_models/instruction.rb | 7 ++ lib/template_helpers.rb | 67 +++++++++++++++ 5 files changed, 98 insertions(+), 92 deletions(-) diff --git a/backends/common_templates/adoc/inst.adoc.erb b/backends/common_templates/adoc/inst.adoc.erb index 6e33f8c3e8..82df0c3a3c 100644 --- a/backends/common_templates/adoc/inst.adoc.erb +++ b/backends/common_templates/adoc/inst.adoc.erb @@ -30,23 +30,23 @@ This instruction has different encodings in RV32 and RV64 RV32:: [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump inst.wavedrom_desc(32) %> +<%= inst.processed_wavedrom_desc(32) %> .... RV64:: [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump inst.wavedrom_desc(64) %> +<%= inst.processed_wavedrom_desc(64) %> .... <%- else -%> [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump inst.wavedrom_desc(inst.base.nil? ? 64 : inst.base) %> +<%= inst.processed_wavedrom_desc(inst.base.nil? ? 64 : inst.base) %> .... <%- end -%> Description:: -<%= inst.description %> +<%= inst.fix_entities(inst.description) %> Decode Variables:: @@ -89,7 +89,7 @@ RV64:: Operation:: [source,idl,subs="specialchars,macros"] ---- -<%= inst.operation_ast.gen_adoc %> +<%= inst.fix_entities(inst.operation_ast.gen_adoc) %> ---- <% end %> <% end %> @@ -99,7 +99,7 @@ Operation:: Sail:: [source,sail] ---- -<%= inst.data["sail()"] %> +<%= inst.fix_entities(inst.data["sail()"]) %> ---- <% end %> <% end %> @@ -111,9 +111,9 @@ Included in:: | Extension | Version <%- inst.defined_by_condition.flat_versions.each do |r| -%> -| *<%= r.name %>* | <%= r.requirement_specs_to_s %> +| *<%= r.name %>* | <%= inst.fix_entities(r.requirement_specs_to_s) %> <%- end -%> |=== <%- else -%> -<%= inst.defined_by_condition.to_asciidoc %> +<%= inst.fix_entities(inst.defined_by_condition.to_asciidoc) %> <%- end -%> diff --git a/backends/instructions_appendix/templates/instructions.adoc.erb b/backends/instructions_appendix/templates/instructions.adoc.erb index 5be9c281ca..3a77a379c7 100755 --- a/backends/instructions_appendix/templates/instructions.adoc.erb +++ b/backends/instructions_appendix/templates/instructions.adoc.erb @@ -1,71 +1,3 @@ -<% -# Helper to substitute problematic entity strings with proper Unicode characters. -def fix_entities(text) - text.to_s.gsub("≠", "≠") - .gsub("±", "±") - .gsub("-∞", "−∞") - .gsub("+∞", "+∞") -end - -# Custom JSON converter for wavedrom that handles hexadecimal literals -def json_dump_with_hex_literals(data) - # First convert to standard JSON - json_string = JSON.dump(data) - - # Replace string hex values with actual hex literals - json_string.gsub(/"0x([0-9a-fA-F]+)"/) do |match| - # Remove the quotes, leaving just the hex literal - "0x#{$1}" - end.gsub(/"name":/, '"name": ') # Add space after colon for name field -end - -# Helper to process wavedrom data -def process_wavedrom(json_data) - result = json_data.dup - - # Process reg array if it exists - if result["reg"].is_a?(Array) - result["reg"].each do |item| - # For fields that are likely opcodes or immediates (type 2) - if item["type"] == 2 - # Convert to number first (if it's a string) - if item["name"].is_a?(String) - if item["name"].start_with?("0x") - # Already hexadecimal - numeric_value = item["name"].to_i(16) - elsif item["name"] =~ /^[01]+$/ - # Binary string without prefix - numeric_value = item["name"].to_i(2) - elsif item["name"] =~ /^\d+$/ - # Decimal - numeric_value = item["name"].to_i - else - # Not a number, leave it alone - next - end - else - # Already a number - numeric_value = item["name"] - end - - # Convert to hexadecimal string - hex_str = numeric_value.to_s(16).downcase - - # Set the name to a specially formatted string that will be converted - # to a hex literal in our custom JSON converter - item["name"] = "0x" + hex_str - end - - # Ensure bits is a number - if item["bits"].is_a?(String) && item["bits"] =~ /^\d+$/ - item["bits"] = item["bits"].to_i - end - end - end - - result -end -%> = Instruction Appendix :doctype: book :wavedrom: <%= $root %>/node_modules/.bin/wavedrom-cli @@ -86,23 +18,23 @@ This instruction has different encodings in RV32 and RV64 RV32:: [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= fix_entities(json_dump_with_hex_literals(process_wavedrom(inst.wavedrom_desc(32)))) %> +<%= inst.processed_wavedrom_desc(32) %> .... RV64:: [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= fix_entities(json_dump_with_hex_literals(process_wavedrom(inst.wavedrom_desc(64)))) %> +<%= inst.processed_wavedrom_desc(64) %> .... <%- else -%> [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= fix_entities(json_dump_with_hex_literals(process_wavedrom(inst.wavedrom_desc(inst.base.nil? ? 64 : inst.base)))) %> +<%= inst.processed_wavedrom_desc(inst.base.nil? ? 64 : inst.base) %> .... <%- end -%> Description:: -<%= fix_entities(inst.description) %> +<%= inst.fix_entities(inst.description) %> Decode Variables:: <%- if inst.multi_encoding? ? (inst.decode_variables(32).empty? && inst.decode_variables(64).empty?) : inst.decode_variables(inst.base.nil? ? 64 : inst.base).empty? -%> @@ -149,12 +81,12 @@ Included in:: |=== | Extension | Version <% inst.defined_by_condition.flat_versions.each do |r| %> -| *<%= r.name %>* | <%= fix_entities(r.requirement_specs_to_s) %> +| *<%= r.name %>* | <%= inst.fix_entities(r.requirement_specs_to_s) %> <% end %> |=== <%- else -%> -<%= fix_entities(inst.defined_by_condition.to_asciidoc) %> +<%= inst.fix_entities(inst.defined_by_condition.to_asciidoc) %> <%- end -%> -<<< +< <% end %> diff --git a/backends/manual/templates/instruction.adoc.erb b/backends/manual/templates/instruction.adoc.erb index 429f981558..14e3aa9550 100644 --- a/backends/manual/templates/instruction.adoc.erb +++ b/backends/manual/templates/instruction.adoc.erb @@ -7,7 +7,7 @@ This instruction is defined by: -<%= inst.defined_by_condition.to_asciidoc %> +<%= inst.fix_entities(inst.defined_by_condition.to_asciidoc) %> This instruction is included in the following profiles: @@ -41,20 +41,20 @@ RV32:: + [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump inst.wavedrom_desc(32) %> +<%= inst.processed_wavedrom_desc(32) %> .... RV64:: + [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump inst.wavedrom_desc(64) %> +<%= inst.processed_wavedrom_desc(64) %> .... ==== <%- else -%> [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump inst.wavedrom_desc(inst.base.nil? ? 32 : inst.base) %> +<%= inst.processed_wavedrom_desc(inst.base.nil? ? 32 : inst.base) %> .... <%- end -%> @@ -69,7 +69,7 @@ RV64:: This instruction must have data-independent timing when extension `Zkt` is enabled. <%- end -%> -<%= inst.description %> +<%= inst.fix_entities(inst.description) %> == Access [cols="^,^,^,^,^"] @@ -84,7 +84,7 @@ This instruction must have data-independent timing when extension `Zkt` is enabl |=== <%- if inst.access_detail? -%> -<%= inst.access_detail %> +<%= inst.fix_entities(inst.access_detail) %> <%- end -%> == Decode Variables @@ -128,7 +128,7 @@ IDL:: + [source,idl,subs="specialchars,macros"] ---- -<%= inst.operation_ast.gen_adoc %> +<%= inst.fix_entities(inst.operation_ast.gen_adoc) %> ---- <%- end -%> @@ -137,7 +137,7 @@ Sail:: + [source,sail] ---- -<%= inst["sail()"] %> +<%= inst.fix_entities(inst["sail()"]) %> ---- <%- end -%> ==== @@ -149,7 +149,7 @@ Sail:: This instruction may result in the following synchronous exceptions: <%- exception_list.sort.each do |etype| -%> - * <%= etype %> + * <%= inst.fix_entities(etype) %> <%- end -%> <%- end -%> diff --git a/lib/arch_obj_models/instruction.rb b/lib/arch_obj_models/instruction.rb index 29ada2a1fd..92045a3286 100644 --- a/lib/arch_obj_models/instruction.rb +++ b/lib/arch_obj_models/instruction.rb @@ -7,6 +7,13 @@ # model of a specific instruction in a specific base (RV32/RV64) class Instruction < DatabaseObject + def processed_wavedrom_desc(base) + data = wavedrom_desc(base) + processed_data = process_wavedrom(data) + TemplateHelpers.fix_entities(json_dump_with_hex_literals(processed_data)) + end + + def self.ary_from_location(location_str_or_int) return [location_str_or_int] if location_str_or_int.is_a?(Integer) diff --git a/lib/template_helpers.rb b/lib/template_helpers.rb index 35cb24462a..a9949a41f2 100644 --- a/lib/template_helpers.rb +++ b/lib/template_helpers.rb @@ -9,6 +9,73 @@ # collection of functions that can be used inside ERB templates module TemplateHelpers + + def fix_entities(text) + text.to_s.gsub("≠", "≠") + .gsub("±", "±") + .gsub("-∞", "−∞") + .gsub("+∞", "+∞") + end + + # Custom JSON converter for wavedrom that handles hexadecimal literals + def json_dump_with_hex_literals(data) + # First convert to standard JSON + json_string = JSON.dump(data) + + # Replace string hex values with actual hex literals + json_string.gsub(/"0x([0-9a-fA-F]+)"/) do |match| + # Remove the quotes, leaving just the hex literal + "0x#{$1}" + end.gsub(/"name":/, '"name": ') # Add space after colon for name field + end + + # Helper to process wavedrom data + def process_wavedrom(json_data) + result = json_data.dup + + # Process reg array if it exists + if result["reg"].is_a?(Array) + result["reg"].each do |item| + # For fields that are likely opcodes or immediates (type 2) + if item["type"] == 2 + # Convert to number first (if it's a string) + if item["name"].is_a?(String) + if item["name"].start_with?("0x") + # Already hexadecimal + numeric_value = item["name"].to_i(16) + elsif item["name"] =~ /^[01]+$/ + # Binary string without prefix + numeric_value = item["name"].to_i(2) + elsif item["name"] =~ /^\d+$/ + # Decimal + numeric_value = item["name"].to_i + else + # Not a number, leave it alone + next + end + else + # Already a number + numeric_value = item["name"] + end + + # Convert to hexadecimal string + hex_str = numeric_value.to_s(16).downcase + + # Set the name to a specially formatted string that will be converted + # to a hex literal in our custom JSON converter + item["name"] = "0x" + hex_str + end + + # Ensure bits is a number + if item["bits"].is_a?(String) && item["bits"] =~ /^\d+$/ + item["bits"] = item["bits"].to_i + end + end + end + + result + end + # Insert a hyperlink to an extension. # @param name [#to_s] Name of the extension def link_to_ext(name) From a4f1498b34a9e6e54f58ef6ca314ffbdcdc0f0a2 Mon Sep 17 00:00:00 2001 From: Yu Jin Date: Thu, 17 Apr 2025 19:44:06 +0800 Subject: [PATCH 032/207] fix: misa[M,S,U,V] wrong offset bits (#630) --- arch/csr/misa.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/csr/misa.yaml b/arch/csr/misa.yaml index 94ce6cd4fb..5f6ebb06b3 100644 --- a/arch/csr/misa.yaml +++ b/arch/csr/misa.yaml @@ -134,7 +134,7 @@ fields: definedBy: I reset_value: 1 M: - location: 13 + location: 12 description: | Indicates support for the `M` (integer multiply/divide) extension. @@ -146,7 +146,7 @@ fields: return implemented?(ExtensionName::M) ? 1 : 0; definedBy: M S: - location: 19 + location: 18 description: | Indicates support for the `S` (supervisor mode) extension. @@ -158,7 +158,7 @@ fields: return implemented?(ExtensionName::S) ? 1 : 0; definedBy: S U: - location: 21 + location: 20 description: | Indicates support for the `U` (user mode) extension. @@ -170,7 +170,7 @@ fields: return implemented?(ExtensionName::U) ? 1 : 0; definedBy: U V: - location: 22 + location: 21 description: | Indicates support for the `V` (vector) extension. From 215341e718b575a3039f2dacce1d4a8432825ab7 Mon Sep 17 00:00:00 2001 From: M Abdullah <2022ee19@gmail.com> Date: Thu, 17 Apr 2025 18:45:17 +0500 Subject: [PATCH 033/207] Add long_name and description to AES instructions (#615) * Update aes32dsi.yaml Signed-off-by: M Abdullah <2022ee19@gmail.com> * Update aes32dsmi.yaml Signed-off-by: M Abdullah <2022ee19@gmail.com> * Update aes32dsi.yaml Signed-off-by: M Abdullah <2022ee19@gmail.com> * Updated aes32dsmi.yaml Signed-off-by: M Abdullah <2022ee19@gmail.com> * Update aes32dsi.yaml Signed-off-by: M Abdullah <2022ee19@gmail.com> * Updated aes32dsmi.yaml Signed-off-by: M Abdullah <2022ee19@gmail.com> * Recommitted with pre-commit fix * Recommitted after pre-commit tests --------- Signed-off-by: M Abdullah <2022ee19@gmail.com> Co-authored-by: root <2022e19@gmail.com> --- arch/inst/Zk/aes32dsi.yaml | 7 +++++-- arch/inst/Zk/aes32dsmi.yaml | 7 +++++-- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/inst/Zk/aes32dsi.yaml b/arch/inst/Zk/aes32dsi.yaml index 443c1afa0f..2dd956f586 100644 --- a/arch/inst/Zk/aes32dsi.yaml +++ b/arch/inst/Zk/aes32dsi.yaml @@ -3,9 +3,12 @@ $schema: "inst_schema.json#" kind: instruction name: aes32dsi -long_name: No synopsis available. +long_name: AES final round decryption instruction for RV32 description: | - No description available. + This instruction sources a single byte from `rs2` according to `bs`. To this it applies the inverse AES + SBox operation, and XOR's the result with `rs1`. This instruction must always be implemented such + that its execution latency does not depend on the data being operated on. + definedBy: anyOf: [Zk, Zkn, Zknd] base: 32 diff --git a/arch/inst/Zk/aes32dsmi.yaml b/arch/inst/Zk/aes32dsmi.yaml index 1f83af5414..1bd5eaee09 100644 --- a/arch/inst/Zk/aes32dsmi.yaml +++ b/arch/inst/Zk/aes32dsmi.yaml @@ -3,9 +3,12 @@ $schema: "inst_schema.json#" kind: instruction name: aes32dsmi -long_name: No synopsis available. +long_name: AES middle round decryption instruction for RV32 description: | - No description available. + This instruction sources a single byte from `rs2` according to `bs`. To this it applies the inverse AES + SBox operation, and a partial inverse MixColumn, before XOR'ing the result with `rs1`. This + instruction must always be implemented such that its execution latency does not depend on the + data being operated on. definedBy: anyOf: [Zk, Zkn, Zknd] base: 32 From 1c52fbf99e7ad3d2a1f2948c7faaf3bb4f6da161 Mon Sep 17 00:00:00 2001 From: james-ball-qualcomm Date: Thu, 17 Apr 2025 12:22:25 -0700 Subject: [PATCH 034/207] Merge of CSC fork into main UDB repository (#584) * Finally able to generate MC100-32 PDF and it looks good. * Forgot to switch profile_class method of a profile_release to use the updated $ref syntax (matching certificates). * Forgot to make dest directory in profiles tasks.rake * Fixing comments * Fixes to uniq! (returns nil sometimes, not good). * Improve tasks.rake message * Found some extra places to rename cfg_arch to design. * Looks like I found a bug in the csr_field type_cache. It was barfing if a different design was passed to it which seems bizzare since it goes out of its way to support having a different type for different designs. So, I modified it to work like the type cache in ast and do what I think it wanted to do in the first place. * Rename routines ending in _extensions to _ext_reqs or _ext_vers to make it clearer the return type since I found bugs in the code related to this. * RVB23 listed RVA as its class erroneously * Renamed mandatory_extensions to mandatory_ext_reqs in places I shouldn't have (i.e. in @config). Also true for implemented and prohibited. * Fixed instructions and CSRs in #291 (CRDs list things like instructions, CSRs, and traps that aren't in the configuration). Still need to fix traps and interrupts. * Working on getting list of exceptions and interrupts correct for the design. * Created IDesign that unit-level and Design can both use. * Fixes due to introduction of Design class and removal of ConfiguredArchitecture inheritence from Architecture. * One more fix * Fix to bug found after merging in main. * Change comment to kick off another regression test on GitHub server (seems to have failed incorrectly). * task for profile is now profile_release_pdf. * Renaming certificate to CRD in the backend. Also added proc_ prefix to frontend /arch files. And, also igore *.bak files in Git. * Remove unneccessary concepts of base from architecture and portfolios (especially rakefiles). Now use cfg "_" instead of rv32 or rv64 since there really is no difference in the generated design. * Adding missing items to .gitignore * Created portfolio tasks.rake file and moved common Rake code from profile & CRD tasks.rake into it. * Created portfolio backend with common tasks.rake code between portfolios. Also created include_erb method in PortfolioDesign that invokes ERB partial templates with a standard set of locals. * Fix updated path to common templates * Finished * Portfolio name changes in preparation for CTP. * One more typo apparently. * Update profile release name * Update UDB README to reflect updated Profile/CRD PDF names. * Clean up adoc links before starting to mock up CTPs * Added IDL functions to new portfolio appendix in preparation for linking to IDL. Also found more places to use link_to_* and anchor_for_* helpers. * Found weird typo in backend_helper.rb causing manual regression test to fail. * Changed anchors and links to use [[anchor]] and <> after learning more about the nuances in adoc and looking at what the ISA manual does. * Fixed bug I introduced in AntoraUtils (didn't realize that all IDL functions go to the same func.adoc file). * Improve comment in AntoraUtils and add links to relevant Antora documentation. * Changed anchors to use #[foo] syntax. Added preliminary CTP information to mul.yaml. * Generating PDF for CTP with ISA manuals included in it. * Improve auto update of changes from submodules. * Started to finally make progress on actual CTP generated doc. * Added mock instruction to Xmock extension. For testing CTP. * Changed CTP rake to always sync to latest of csc-riscv-isa-manual. * Starting to generate CTP coverage points * Added support for instructions, extensions, CSRs, and CSR fields to have certification test plan information. * Only add CTP content to CTP docs (was going in CRDs and Profiles too). * Switch display of test procedures from table to list. * Fixed regress bug due to incorrect constructor call to ExtensionVersion. * Add CTP info to extensions, CSRs, and CSR fields * Fix array in schema * Improve formating of CTP and add mandatory ID * Remove comments to work around commit yaml checker problem. * Create proper adoc for CTP book part 1. Part 2 & 3 (ISA manuals) are giving an invalid part error. * New version of isa manual (uses level 2 instead of level 1 headings for colophons and now the isa manuals are proper adoc "parts" in the overall "book"). * Improved display of coverage points and test procedures. * Added Sail operation to instruction appendix. * Added links from test procedures to coverage points. * Fix bug in display of all extensions that define a parameter in a CRD. * Renaming CertLinks to DocLinks since parameters will also use them. * Renaming of CTP things * More link doc * Added priv modes and related specs to CTP by moving it from CRD into templates they can share. * Update mock.yaml Just adding a bogus extra line. Signed-off-by: james-ball-qualcomm * Remove blank line * Creating AC100 CRD from RVB23 profile. * Forgot these files somehow. * Added list of CSRs added by extension. Also other misc formating improvements. * Fix bug in pages.yml that wasn't copying RVI20 correctly. Also reduced TOC levels to 3 since TOC is 200+ pages for AC100-CRD otherwise. And, try adding index.html for Portfolio artifacts. * Found bug in RVI20U32 that was requiring version 2.2 of C extension but only 2.0 exists. Also, test:nightly was calling task regress but it has to call test:regress. Not sure how this was working in upstream. * Fixes for version numbers in Yaml files now found by version check added in Ruby. * Improve index.html to link to all portfolio-created artifacts and copy index.html in pages action. * Switch to "git clone" for latest CSC fork of ISA manual from trying to use git submodules unreliably. * Fix bug in bin/setup using braces around ROOT env instead of parenthesis. * Fixed inst appendix to use adoc description list for coverpoints and test procedures * Rename coverage points to normative rules to avoid confusion with system verilog coverage points. * Make M extension optional in MC100 to make it a better pipe cleaner (so we have at least one optional extension). * Changed cert steps to just passthru adoc from YAML instead of having defined steps. Also, removed name in test procedures since ID is enough. And added optional test file name. * Add MockProcessor-CTP to list of pages. * Update pages.yml fix typo that wasn't copying mc100 CTP properly * Switched from PDF page size from A4 to larger A3. Also, improved PDF outline and inst appendix headings. * Remove all non UTF characters added by recent PR to main branch of UDB. * Added AC200 CRD * Moved priv modes from cert class to cert model. * Fix for issue #479 - Certificates not properly processing optional extensions from profiles and S-mode profiles don't inherit U-mode profiles. * Incorporate fixes to RVB23U64 typos found by Shehroz. Also fixed cert model schema to allow AC100 to be a parent of AC200 (schema was missing \\$parent_of in a couple of places). * Issue #245 - Creating summary of RISC-V ISA in .xlsx * Generating .xlsx file with extension name column. * Made priv/unpriv ext type mandatory in schema and added where missing. Add all columns up to ratification date. * Added profile presence to riscv summary * Generating basic dynamic javascript table for riscv_summary backend with fake data. * Generating javascript with riscv_summary using tabulator-master. * Add riscv_summary to csc website * Add -R to riscv_summary page copy * Move riscv_summary earlier in pages, smoke, & regress since it is very fast. * Renamed riscv_summary to isa_explorer * Renamed isa_explorer html to browser. * Forgot to rename xlsx dir to spreadsheet * Add column definition to Tabulator to prepare for better formating and sorting. * Add hyperlink to UDB extension doc to ISA Explorer Extension Name column. * Improved column formatting, filtering, sorting * Freeze extension name column * Added instrucetion table and table height to speed loading in browser. * Fixed bug in manual inst template * Create csc_lib and copied upstream lib over original lib * Accidentally staged lib.tar * Making progress on merging in Derek's changes. Now hung up on defined_by? missing in DatabaseObject. * Commiting changes before I start major surgery on my code. * Remove isa_explorer temporarily from smoke test (since it won't work yet) and fix type checking bug I introduced into symbol_table.rb (now smoke passes). * Pass config object to ConfiguredArchitecture constructor. Also couple of minor fixes to get smoke to pass. * Make Config class an abstract base class and create ConfigFromFile child classes in preparation for Config from Portfolio. * Added ConfigFromPortfolioGroup to satisfy the Config API with a PortfolioGroup object. Unfortunately there is a circular dependency I can't avoid because of additions made in the cpp_hart branch that require a cfg_arch in DatabaseObject base of the new ExtensionRequirementExpression and ConditionalExtensionVersionList classes. I'll need Derek's help to determine a way forward. * Figured out how to work around cfg_arch circular dependency. Now able to build RVA20 Profile Release. Fixed other bugs I found due to lack of type checking in non-CSC code. * Passing smoke test now including with ISA Explorer. * About to copy main "backends" directory over top of mine to merge in changes. * Finally passing regression test with my changes merged in manually. * Update regress.yml Missing empty line Signed-off-by: james-ball-qualcomm * Fix trailing whitespace * Fixes requested by Derek's review. More to come. * Added missing classes for CTP caused by manual merge. * Forgot to change schema of misa.M CTP stuff. * Fixed schema in mul.yaml for CTP. Also, take advantage of higher priv profiles inheriting everything in lower-priv profiles. * Making changes request by Derek's review such as adding tabulator-master to .gitmodules (still needs more work to remove copy of code), added CSR table to ISA explorer (actually a new feature), fixes to CTP generation and RVI20 generation, deploy.sh now prints more informative information about its progress and includes all CSC artifacts and the ISA explorer. * Oops, had wrong max_base logic for portfolio_group. * obj.rb rename to database_obj.rb wasn't made in this file. Causes regressions to fail right away. * Fix for instruction appendix backend regression failure (https://github.com/riscv-software-src/riscv-unified-db/actions/runs/14432823958/job/40469667597?pr=584). Use old name for instruction anchor utility routine. Also removed some puts messages about including ERB files in portfolio-based backends that was making the regression log excessively long. * Instruction appendix backend using old name for another function (convert_monospace_to_links is new name). Also, added regression test to debug launch configurations. * For isa_explorer backend, remove tabulator-master Javascript code and instead just have HTML load it. * Forgot to remove tabulator-master from git submodules. * Forgot to stage some files. * Rename XLEN to MXLEN in inst/mock.yaml * Changes requested by 2nd half of Derek's review. --------- Signed-off-by: james-ball-qualcomm --- .github/workflows/pages.yml | 90 ++ .github/workflows/regress.yml | 4 +- .gitignore | 1 + .pre-commit-config.yaml | 8 +- .vscode/launch.json | 136 ++- Gemfile | 1 + Gemfile.lock | 6 + Rakefile | 173 ++-- arch/README.adoc | 6 +- arch/certificate_class/MC.yaml | 13 - .../MockCertificateClass.yaml | 13 - arch/certificate_model/MC100-64.yaml | 20 - arch/certificate_model/MC200-64.yaml | 20 - arch/certificate_model/MC300-32.yaml | 35 - arch/certificate_model/MC300-64.yaml | 20 - arch/csr/misa.yaml | 40 + arch/ext/Sha.yaml | 28 +- arch/ext/Shcounterenw.yaml | 21 + arch/ext/Shvsatpa.yaml | 16 + arch/ext/Ssstrict.yaml | 1 + arch/ext/Sv32.yaml | 6 + arch/ext/Sv39.yaml | 6 + arch/ext/Sv48.yaml | 12 + arch/ext/Sv57.yaml | 12 + arch/ext/Svbare.yaml | 1 + arch/ext/Svinval.yaml | 1 + arch/ext/Svnapot.yaml | 1 + arch/ext/Xmock.yaml | 31 + arch/ext/Za128rs.yaml | 1 + arch/ext/Za64rs.yaml | 1 + arch/ext/Zabha.yaml | 2 +- arch/ext/Zama16b.yaml | 1 + arch/ext/Ziccamoa.yaml | 1 + arch/ext/Ziccamoc.yaml | 1 + arch/ext/Ziccif.yaml | 1 + arch/ext/Zicclsm.yaml | 1 + arch/ext/Ziccrse.yaml | 1 + arch/ext/Zihintntl.yaml | 3 +- arch/inst/M/mul.yaml | 33 + arch/inst/Zicond/czero.eqz.yaml | 2 +- arch/inst/Zicond/czero.nez.yaml | 2 +- arch/inst/mock.yaml | 97 ++ arch/proc_cert_class/AC.yaml | 10 + arch/proc_cert_class/MC.yaml | 10 + arch/proc_cert_class/MockProcessor.yaml | 10 + arch/proc_cert_model/AC100.yaml | 69 ++ arch/proc_cert_model/AC200.yaml | 55 ++ .../MC100-32.yaml | 40 +- arch/proc_cert_model/MC100-64.yaml | 20 + .../MC200-32.yaml | 21 +- arch/proc_cert_model/MC200-64.yaml | 20 + arch/proc_cert_model/MC300-32.yaml | 37 + arch/proc_cert_model/MC300-64.yaml | 20 + .../MockProcessor.yaml} | 67 +- arch/profile/MP-S-64.yaml | 4 +- arch/profile/MP-U-64.yaml | 2 +- arch/profile/RVA20S64.yaml | 4 +- arch/profile/RVA22S64.yaml | 42 +- arch/profile/RVA23M64.yaml | 18 + arch/profile/RVA23S64.yaml | 4 +- arch/profile/RVB23M64.yaml | 119 +++ arch/profile/RVB23S64.yaml | 8 +- arch/profile/RVB23U64.yaml | 10 +- arch/profile/RVI20U32.yaml | 2 +- .../{MockProfileClass.yaml => Mock.yaml} | 2 +- .../{MockProfileRelease.yaml => Mock.yaml} | 7 +- arch/profile_release/RVA20.yaml | 3 +- arch/profile_release/RVA22.yaml | 3 +- arch/profile_release/RVA23.yaml | 7 +- arch/profile_release/RVB23.yaml | 7 +- arch/profile_release/RVI20.yaml | 5 +- backends/certificate_doc/tasks.rake | 148 --- .../templates/certificate.adoc.erb | 884 ------------------ backends/cfg_html_doc/adoc_gen.rake | 10 +- backends/cfg_html_doc/html_gen.rake | 40 +- backends/cfg_html_doc/templates/csr.adoc.erb | 2 +- backends/cfg_html_doc/templates/ext.adoc.erb | 2 +- backends/cfg_html_doc/templates/inst.adoc.erb | 2 +- backends/cfg_html_doc/templates/toc.adoc.erb | 4 +- backends/common_templates/adoc/csr.adoc.erb | 6 +- backends/common_templates/adoc/inst.adoc.erb | 2 +- .../cpp/include/udb/config_validator.hpp | 2 +- backends/cpp_hart_gen/tasks.rake | 4 +- backends/ext_pdf_doc/tasks.rake | 42 +- .../ext_pdf_doc/templates/ext_pdf.adoc.erb | 4 +- backends/instructions_appendix/tasks.rake | 2 +- .../templates/instructions.adoc.erb | 2 +- backends/isa_explorer/csr_table.html | 13 + backends/isa_explorer/ext_table.html | 13 + backends/isa_explorer/inst_table.html | 13 + backends/isa_explorer/isa_explorer.rb | 419 +++++++++ backends/isa_explorer/tasks.rake | 205 ++++ backends/manual/tasks.rake | 20 +- backends/manual/templates/csr.adoc.erb | 34 +- backends/manual/templates/ext.adoc.erb | 5 +- .../manual/templates/instruction.adoc.erb | 2 +- backends/manual/templates/isa_nav.adoc.erb | 6 +- backends/manual/templates/param_list.adoc.erb | 2 +- backends/portfolio/README.adoc | 2 + backends/portfolio/tasks.rake | 160 ++++ backends/portfolio/templates/README.adoc | 1 + .../portfolio/templates/beginning.adoc.erb | 66 ++ .../portfolio/templates/csr_appendix.adoc.erb | 189 ++++ .../portfolio/templates/ext_appendix.adoc.erb | 152 +++ .../templates/idl_func_appendix.adoc.erb | 40 + .../templates/inst_appendix.adoc.erb | 140 +++ .../templates/normative_rules.adoc.erb | 22 + .../templates/test_procedures.adoc.erb | 27 + backends/proc_cert/README.adoc | 2 + backends/proc_cert/tasks.rake | 43 + backends/proc_cert/templates/README.adoc | 1 + .../proc_cert/templates/glossary.adoc.erb | 20 + .../proc_cert/templates/priv_modes.adoc.erb | 13 + .../templates/proc_naming_scheme.adoc.erb | 14 + .../templates/related_specs.adoc.erb | 12 + .../proc_cert/templates/rev_history.adoc.erb | 14 + .../templates/rvcp_naming_scheme.adoc.erb | 22 + .../proc_cert/templates/typographic.adoc.erb | 17 + backends/proc_crd/tasks.rake | 93 ++ backends/proc_crd/templates/proc_crd.adoc.erb | 361 +++++++ backends/proc_ctp/tasks.rake | 95 ++ backends/proc_ctp/templates/proc_ctp.adoc.erb | 189 ++++ backends/profile/tasks.rake | 137 +++ .../templates/profile.adoc.erb | 375 +------- backends/profile_doc/tasks.rake | 110 --- cert_flow.txt | 82 -- do | 5 + docs/ruby/ArchDef.html | 8 +- docs/ruby/ArchGen.html | 2 +- docs/ruby/Instruction.html | 8 +- docs/ruby/method_list.html | 4 +- ext/docs-resources | 2 +- lib/arch_obj_models/cert_normative_rule.rb | 36 + lib/arch_obj_models/cert_test_procedure.rb | 42 + lib/arch_obj_models/certifiable_obj.rb | 64 ++ lib/arch_obj_models/certificate.rb | 249 ++++- lib/arch_obj_models/csr.rb | 41 +- lib/arch_obj_models/csr_field.rb | 36 +- .../{obj.rb => database_obj.rb} | 128 ++- lib/arch_obj_models/doc_link.rb | 46 + lib/arch_obj_models/extension.rb | 357 ++----- lib/arch_obj_models/instruction.rb | 33 +- lib/arch_obj_models/instructions_appendix.rb | 2 +- lib/arch_obj_models/manual.rb | 2 +- lib/arch_obj_models/parameter.rb | 136 +++ lib/arch_obj_models/portfolio.rb | 727 +++++++++----- lib/arch_obj_models/profile.rb | 101 +- lib/architecture.rb | 55 +- lib/backend_helpers.rb | 380 ++++++++ lib/cfg_arch.rb | 76 +- lib/config.rb | 296 ++++-- lib/deploy.sh | 158 ++-- lib/idl/ast.rb | 6 +- lib/idl/symbol_table.rb | 5 - lib/portfolio_design.rb | 250 +++++ lib/presence.rb | 148 +++ lib/proc_cert_design.rb | 71 ++ lib/template_helpers.rb | 152 --- lib/test/test_backend_helpers.rb | 152 +++ lib/version.rb | 4 +- schemas/csr_schema.json | 12 + schemas/ext_schema.json | 12 +- schemas/inst_schema.json | 6 + ...chema.json => proc_cert_class_schema.json} | 14 +- ...chema.json => proc_cert_model_schema.json} | 157 +++- schemas/profile_schema.json | 12 +- schemas/schema_defs.json | 52 ++ 167 files changed, 6716 insertions(+), 3113 deletions(-) delete mode 100644 arch/certificate_class/MC.yaml delete mode 100644 arch/certificate_class/MockCertificateClass.yaml delete mode 100644 arch/certificate_model/MC100-64.yaml delete mode 100644 arch/certificate_model/MC200-64.yaml delete mode 100644 arch/certificate_model/MC300-32.yaml delete mode 100644 arch/certificate_model/MC300-64.yaml create mode 100644 arch/ext/Shcounterenw.yaml create mode 100644 arch/ext/Shvsatpa.yaml create mode 100644 arch/inst/mock.yaml create mode 100644 arch/proc_cert_class/AC.yaml create mode 100644 arch/proc_cert_class/MC.yaml create mode 100644 arch/proc_cert_class/MockProcessor.yaml create mode 100644 arch/proc_cert_model/AC100.yaml create mode 100644 arch/proc_cert_model/AC200.yaml rename arch/{certificate_model => proc_cert_model}/MC100-32.yaml (84%) create mode 100644 arch/proc_cert_model/MC100-64.yaml rename arch/{certificate_model => proc_cert_model}/MC200-32.yaml (60%) create mode 100644 arch/proc_cert_model/MC200-64.yaml create mode 100644 arch/proc_cert_model/MC300-32.yaml create mode 100644 arch/proc_cert_model/MC300-64.yaml rename arch/{certificate_model/MockCertificateModel.yaml => proc_cert_model/MockProcessor.yaml} (83%) create mode 100644 arch/profile/RVA23M64.yaml create mode 100644 arch/profile/RVB23M64.yaml rename arch/profile_class/{MockProfileClass.yaml => Mock.yaml} (96%) rename arch/profile_release/{MockProfileRelease.yaml => Mock.yaml} (86%) delete mode 100644 backends/certificate_doc/tasks.rake delete mode 100644 backends/certificate_doc/templates/certificate.adoc.erb create mode 100644 backends/isa_explorer/csr_table.html create mode 100644 backends/isa_explorer/ext_table.html create mode 100644 backends/isa_explorer/inst_table.html create mode 100644 backends/isa_explorer/isa_explorer.rb create mode 100644 backends/isa_explorer/tasks.rake create mode 100644 backends/portfolio/README.adoc create mode 100644 backends/portfolio/tasks.rake create mode 100644 backends/portfolio/templates/README.adoc create mode 100644 backends/portfolio/templates/beginning.adoc.erb create mode 100644 backends/portfolio/templates/csr_appendix.adoc.erb create mode 100644 backends/portfolio/templates/ext_appendix.adoc.erb create mode 100644 backends/portfolio/templates/idl_func_appendix.adoc.erb create mode 100644 backends/portfolio/templates/inst_appendix.adoc.erb create mode 100644 backends/portfolio/templates/normative_rules.adoc.erb create mode 100644 backends/portfolio/templates/test_procedures.adoc.erb create mode 100644 backends/proc_cert/README.adoc create mode 100644 backends/proc_cert/tasks.rake create mode 100644 backends/proc_cert/templates/README.adoc create mode 100644 backends/proc_cert/templates/glossary.adoc.erb create mode 100644 backends/proc_cert/templates/priv_modes.adoc.erb create mode 100644 backends/proc_cert/templates/proc_naming_scheme.adoc.erb create mode 100644 backends/proc_cert/templates/related_specs.adoc.erb create mode 100644 backends/proc_cert/templates/rev_history.adoc.erb create mode 100644 backends/proc_cert/templates/rvcp_naming_scheme.adoc.erb create mode 100644 backends/proc_cert/templates/typographic.adoc.erb create mode 100644 backends/proc_crd/tasks.rake create mode 100644 backends/proc_crd/templates/proc_crd.adoc.erb create mode 100644 backends/proc_ctp/tasks.rake create mode 100644 backends/proc_ctp/templates/proc_ctp.adoc.erb create mode 100644 backends/profile/tasks.rake rename backends/{profile_doc => profile}/templates/profile.adoc.erb (63%) delete mode 100644 backends/profile_doc/tasks.rake delete mode 100644 cert_flow.txt create mode 100644 lib/arch_obj_models/cert_normative_rule.rb create mode 100644 lib/arch_obj_models/cert_test_procedure.rb create mode 100644 lib/arch_obj_models/certifiable_obj.rb rename lib/arch_obj_models/{obj.rb => database_obj.rb} (89%) create mode 100644 lib/arch_obj_models/doc_link.rb create mode 100644 lib/arch_obj_models/parameter.rb create mode 100644 lib/backend_helpers.rb mode change 100644 => 100755 lib/deploy.sh create mode 100644 lib/portfolio_design.rb create mode 100644 lib/presence.rb create mode 100644 lib/proc_cert_design.rb delete mode 100644 lib/template_helpers.rb create mode 100644 lib/test/test_backend_helpers.rb rename schemas/{cert_class_schema.json => proc_cert_class_schema.json} (73%) rename schemas/{cert_model_schema.json => proc_cert_model_schema.json} (56%) diff --git a/.github/workflows/pages.yml b/.github/workflows/pages.yml index 97bb586f78..922045a787 100644 --- a/.github/workflows/pages.yml +++ b/.github/workflows/pages.yml @@ -26,6 +26,96 @@ jobs: uses: ./.github/actions/singularity-setup - name: Create deploy dir run: /bin/bash lib/deploy.sh + - name: Create _site/isa_explorer + run: mkdir -p _site/isa_explorer + - name: Create isa_explorer_browser + run: ./do gen:isa_explorer_browser + - name: Copy isa_explorer_browser + run: cp -R gen/isa_explorer/browser _site/isa_explorer + - name: Create isa_explorer_spreadsheet + run: ./do gen:isa_explorer_spreadsheet + - name: Copy isa_explorer_spreadsheet + run: cp -R gen/isa_explorer/spreadsheet _site/isa_explorer + - name: Build manual + run: ./do gen:html_manual MANUAL_NAME=isa VERSIONS=all + - name: Build html documentation for generic_rv64 + run: ./do gen:html[generic_rv64] + - name: Generate YARD docs + run: ./do gen:tool_doc + - name: Create _site/example_cfg + run: mkdir -p _site/example_cfg + - name: Create _site/manual + run: mkdir -p _site/manual + - name: Create _site/pdfs + run: mkdir -p _site/pdfs + - name: Create _site/htmls + run: mkdir -p _site/htmls + - name: Copy cfg html + run: cp -R gen/cfg_html_doc/generic_rv64/html _site/example_cfg + - name: Copy top-level index.html with links to portfolio artifacts + run: cp index.html _site + - name: Create RVI20 Profile Release PDF Spec + run: ./do gen:profile_release_pdf[RVI20] + - name: Copy RVI20 Profile Release PDF + run: cp gen/profile/pdf/RVI20ProfileRelease.pdf _site/pdfs + - name: Create RVA20 Profile Release PDF Spec + run: ./do gen:profile_release_pdf[RVA20] + - name: Copy RVA20 Profile Release PDF + run: cp gen/profile/pdf/RVA20ProfileRelease.pdf _site/pdfs + - name: Create RVA22 Profile Release PDF Spec + run: ./do gen:profile_release_pdf[RVA22] + - name: Copy RVA22 Profile Release PDF + run: cp gen/profile/pdf/RVA22ProfileRelease.pdf _site/pdfs + - name: Create RVA23 Profile Release PDF Spec + run: ./do gen:profile_release_pdf[RVA23] + - name: Copy RVA23 Profile Release PDF + run: cp gen/profile/pdf/RVA23ProfileRelease.pdf _site/pdfs + - name: Create RVB23 Profile Release PDF Spec + run: ./do gen:profile_release_pdf[RVB23] + - name: Copy RVB23 Profile Release PDF + run: cp gen/profile/pdf/RVB23ProfileRelease.pdf _site/pdfs + - name: Create AC100-CRD PDF Spec + run: ./do gen:proc_crd_pdf[AC100] + - name: Copy AC100-CRD PDF + run: cp gen/proc_crd/pdf/AC100-CRD.pdf _site/pdfs + - name: Create AC200-CRD PDF Spec + run: ./do gen:proc_crd_pdf[AC200] + - name: Copy AC200-CRD PDF + run: cp gen/proc_crd/pdf/AC200-CRD.pdf _site/pdfs + - name: Create MC100-32-CRD PDF Spec + run: ./do gen:proc_crd_pdf[MC100-32] + - name: Copy MC100-32-CRD PDF + run: cp gen/proc_crd/pdf/MC100-32-CRD.pdf _site/pdfs + - name: Create MC100-64-CRD PDF Spec + run: ./do gen:proc_crd_pdf[MC100-64] + - name: Copy MC100-64-CRD PDF + run: cp gen/proc_crd/pdf/MC100-64-CRD.pdf _site/pdfs + - name: Create MC200-32-CRD PDF Spec + run: ./do gen:proc_crd_pdf[MC200-32] + - name: Copy MC200-32-CRD PDF + run: cp gen/proc_crd/pdf/MC200-32-CRD.pdf _site/pdfs + - name: Create MC200-64-CRD PDF Spec + run: ./do gen:proc_crd_pdf[MC200-64] + - name: Copy MC200-64-CRD PDF + run: cp gen/proc_crd/pdf/MC200-64-CRD.pdf _site/pdfs + - name: Create MC300-32-CRD PDF Spec + run: ./do gen:proc_crd_pdf[MC300-32] + - name: Copy MC300-32-CRD PDF + run: cp gen/proc_crd/pdf/MC300-32-CRD.pdf _site/pdfs + - name: Create MC300-64-CRD PDF Spec + run: ./do gen:proc_crd_pdf[MC300-64] + - name: Copy MC300-64-CRD PDF + run: cp gen/proc_crd/pdf/MC300-64-CRD.pdf _site/pdfs + - name: Create MC100-32-CTP PDF Spec + run: ./do gen:proc_ctp_pdf[MC100-32] + - name: Copy MC100-32-CTP PDF + run: cp gen/proc_ctp/pdf/MC100-32-CTP.pdf _site/pdfs + - name: Create MockProcessor-CTP PDF Spec + run: ./do gen:proc_ctp_pdf[MockProcessor] + - name: Copy MockProcessor-CTP PDF + run: cp gen/proc_ctp/pdf/MockProcessor-CTP.pdf _site/pdfs + - name: Copy manual html + run: cp -R gen/manual/isa/top/all/html _site/manual - name: Setup Pages uses: actions/configure-pages@v5 - name: Upload artifact diff --git a/.github/workflows/regress.yml b/.github/workflows/regress.yml index 5313265a2a..e1f2b8c4ae 100644 --- a/.github/workflows/regress.yml +++ b/.github/workflows/regress.yml @@ -86,7 +86,7 @@ jobs: - name: singularity setup uses: ./.github/actions/singularity-setup - name: Generate extension PDF - run: ./do gen:cert_model_pdf[MockCertificateModel] + run: ./do gen:proc_crd_pdf[MockProcessor] regress-gen-profile: runs-on: ubuntu-latest env: @@ -97,7 +97,7 @@ jobs: - name: singularity setup uses: ./.github/actions/singularity-setup - name: Generate extension PDF - run: ./do gen:profile[MockProfileRelease] + run: ./do gen:profile_release_pdf[Mock] regress-gen-go: runs-on: ubuntu-latest env: diff --git a/.gitignore b/.gitignore index 8f6230a0b8..433377dccb 100644 --- a/.gitignore +++ b/.gitignore @@ -16,4 +16,5 @@ gen node_modules _site images +*.bak *.log diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 3dc8d861bf..3e635835d7 100755 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -46,12 +46,12 @@ repos: args: ["--schemafile", "schemas/ext_schema.json"] - id: check-jsonschema alias: check-jsonschema-cert-model - files: ^arch/certificate_model/.*\.(yaml|yml)$ - args: ["--schemafile", "schemas/cert_model_schema.json"] + files: ^arch/proc_cert_model/.*\.(yaml|yml)$ + args: ["--schemafile", "schemas/proc_cert_model_schema.json"] - id: check-jsonschema alias: check-jsonschema-cert-class - files: ^arch/certificate_class/.*\.(yaml|yml)$ - args: ["--schemafile", "schemas/cert_class_schema.json"] + files: ^arch/proc_cert_class/.*\.(yaml|yml)$ + args: ["--schemafile", "schemas/proc_cert_class_schema.json"] # Commenting because throwing errors and not sure this is complete yet # - id: check-jsonschema # alias: check-jsonschema-manual-version diff --git a/.vscode/launch.json b/.vscode/launch.json index ccaf87153d..d90a1bd8b0 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -3,19 +3,109 @@ "configurations": [ { "type": "rdbg", - "name": "MC100-32", + "name": "Smoke test", "request": "launch", "command": "bundle exec rake", - "script": "gen:cert_model_pdf[MC100-32]", + "script": "test:smoke", "args": [], "askParameters": false }, { "type": "rdbg", - "name": "MC200-32", + "name": "Regression test", "request": "launch", "command": "bundle exec rake", - "script": "gen:cert_model_pdf[MC200-32]", + "script": "test:regress", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "Manual", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:html_manual MANUAL_NAME=isa VERSIONS=all", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "MC100-32-CRD", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:proc_crd_pdf[MC100-32]", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "MC100-32-CTP", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:proc_ctp_pdf[MC100-32]", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "MC200-32-CRD", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:proc_crd_pdf[MC200-32]", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "AC100-CRD", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:proc_crd_pdf[AC100]", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "AC200-CRD", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:proc_crd_pdf[AC200]", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "MockCRD", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:proc_crd_pdf[MockProcessor]", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "MockCTP", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:proc_ctp_pdf[MockProcessor]", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "portfolios", + "request": "launch", + "command": "bundle exec rake", + "script": "portfolios", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "MockProfile", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:profile_release_pdf[Mock]", "args": [], "askParameters": false }, @@ -24,7 +114,43 @@ "name": "RVA20", "request": "launch", "command": "bundle exec rake", - "script": "gen:profile[RVA20]", + "script": "gen:profile_release_pdf[RVA20]", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "ISA Explorer Browser Extension Generator", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:isa_explorer_browser_ext", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "ISA Explorer Browser Instruction Generator", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:isa_explorer_browser_inst", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "ISA Explorer Browser CSR Generator", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:isa_explorer_browser_csr", + "args": [], + "askParameters": false + }, + { + "type": "rdbg", + "name": "ISA Explorer Spreadsheet Generator", + "request": "launch", + "command": "bundle exec rake", + "script": "gen:isa_explorer_spreadsheet", "args": [], "askParameters": false }, diff --git a/Gemfile b/Gemfile index 199ed5b982..2f064d3170 100644 --- a/Gemfile +++ b/Gemfile @@ -19,6 +19,7 @@ gem "ruby-progressbar", "~> 1.13" gem "treetop", "1.6.12" gem "ttfunk", "1.7" # needed to avoid having asciidoctor-pdf dependencies pulling in a buggy version of ttunk (1.8) gem "webrick" +gem "write_xlsx" gem "yard" group :development do diff --git a/Gemfile.lock b/Gemfile.lock index 2a334c1ee3..a53fe95832 100644 --- a/Gemfile.lock +++ b/Gemfile.lock @@ -89,6 +89,7 @@ GEM logger (1.6.6) matrix (0.4.2) minitest (5.25.5) + nkf (0.2.0) nokogiri (1.18.6-aarch64-linux-gnu) racc (~> 1.4) nokogiri (1.18.6-x86_64-linux-gnu) @@ -166,6 +167,7 @@ GEM ruby-prof (1.7.1) ruby-progressbar (1.13.0) ruby-rc4 (0.1.5) + rubyzip (2.4.1) securerandom (0.4.1) simpleidn (0.2.3) solargraph (0.52.0) @@ -200,6 +202,9 @@ GEM unicode-emoji (4.0.4) uri (1.0.3) webrick (1.9.1) + write_xlsx (1.12.1) + nkf + rubyzip (>= 1.0.0) yard (0.9.37) yard-solargraph (0.1.0) yard (~> 0.9) @@ -232,6 +237,7 @@ DEPENDENCIES treetop (= 1.6.12) ttfunk (= 1.7) webrick + write_xlsx yard RUBY VERSION diff --git a/Rakefile b/Rakefile index 46a4361fd2..8b70c5f4fe 100755 --- a/Rakefile +++ b/Rakefile @@ -1,5 +1,7 @@ # frozen_string_literal: true +Encoding.default_external = "UTF-8" + $jobs = ENV["JOBS"].nil? ? 1 : ENV["JOBS"].to_i Rake.application.options.thread_pool_size = $jobs puts "Running with #{Rake.application.options.thread_pool_size} job(s)" @@ -14,43 +16,50 @@ require "yard" require "minitest/test_task" require_relative $root / "lib" / "architecture" +require_relative $root / "lib" / "portfolio_design" +require_relative $root / "lib" / "proc_cert_design" directory "#{$root}/.stamps" +# Load and execute Rakefile for each backend. Dir.glob("#{$root}/backends/*/tasks.rake") do |rakefile| load rakefile end directory "#{$root}/.stamps" -def cfg_arch_for(config) - raise ArgumentError, "excpecting String or Pathname" unless config.is_a?(String) || config.is_a?(Pathname) - config = config.to_s +# @param config_locator [String or Pathname] +# @return [ConfiguredArchitecture] +def cfg_arch_for(config_locator) + raise ArgumentError, "expecting String or Pathname" unless config_locator.is_a?(String) || config_locator.is_a?(Pathname) + config_locator = config_locator.to_s $cfg_archs ||= {} - return $cfg_archs[config] unless $cfg_archs[config].nil? + return $cfg_archs[config_locator] unless $cfg_archs[config_locator].nil? # does the gen cfg already exist? - if File.exist?("#{$root}/gen/cfgs/#{config}.yaml") - config_yaml = YAML.load_file("#{$root}/gen/cfgs/#{config}.yaml") - if File.mtime("#{$root}/gen/cfgs/#{config}.yaml") < File.mtime(config_yaml["$source"]) + if File.exist?("#{$root}/gen/cfgs/#{config_locator}.yaml") + config_yaml = YAML.load_file("#{$root}/gen/cfgs/#{config_locator}.yaml") + if File.mtime("#{$root}/gen/cfgs/#{config_locator}.yaml") < File.mtime(config_yaml["$source"]) + cfg_arch = ConfiguredArchitecture.new( - config, - $root / "gen" / "resolved_arch" / config + config_locator, + FileConfig.create("#{$root}/gen/cfgs/#{config_locator}.yaml"), + $root / "gen" / "resolved_arch" / config_locator ) - $cfg_archs[config] = cfg_arch + $cfg_archs[config_locator] = cfg_arch return cfg_arch end end config_path = - if File.exist?("#{$root}/cfgs/#{config}.yaml") - "#{$root}/cfgs/#{config}.yaml" - elsif File.exist? config - File.realpath(config) + if File.exist?("#{$root}/cfgs/#{config_locator}.yaml") + "#{$root}/cfgs/#{config_locator}.yaml" + elsif File.exist? config_locator + File.realpath(config_locator) else - raise ArgumentError, "Can't find config #{config}" + raise ArgumentError, "Can't find config #{config_locator}" end config_yaml = YAML.load_file(config_path) @@ -80,6 +89,7 @@ def cfg_arch_for(config) $cfg_archs[config_name] = ConfiguredArchitecture.new( config_name, + FileConfig.create("#{$root}/gen/cfgs/#{config_name}.yaml"), $root / "gen" / "resolved_arch" / config_name ) end @@ -109,7 +119,7 @@ rule %r{#{$root}/.stamps/resolve-.+\.stamp} => proc { |tname| raise "Missing gen/cfgs/#{tname}" unless File.exist?("#{$root}/cfgs/#{cfg_name}.yaml") cfg_path = "#{$root}/cfgs/#{cfg_name}.yaml" - cfg = Config.create(cfg_path) + cfg = FileConfig.create(cfg_path) arch_files = Dir.glob("#{$root}/arch/**/*.yaml") overlay_files = cfg.overlay? ? Dir.glob("#{cfg.arch_overlay_abs}/**/*.yaml") : [] [ @@ -119,7 +129,7 @@ rule %r{#{$root}/.stamps/resolve-.+\.stamp} => proc { |tname| } do |t| cfg_name = File.basename(t.name, ".stamp").sub("resolve-", "") cfg_path = "#{$root}/cfgs/#{cfg_name}.yaml" - cfg = Config.create(cfg_path) + cfg = FileConfig.create(cfg_path) overlay_dir = cfg.overlay? ? cfg.arch_overlay_abs : "/does/not/exist" sh "#{$root}/.home/.venv/bin/python3 lib/yaml_resolver.py merge arch #{overlay_dir} gen/arch/#{cfg_name}" @@ -407,11 +417,20 @@ namespace :test do These are basic but fast-running tests to check the database and tools DESC task :smoke do + puts "UPDATE: Starting test:smoke" + puts "UPDATE: Running gen:isa_explorer_browser_ext" + Rake::Task["gen:isa_explorer_browser_ext"].invoke + puts "UPDATE: Running test:idl_compiler" Rake::Task["test:idl_compiler"].invoke + puts "UPDATE: Running test:lib" Rake::Task["test:lib"].invoke + puts "UPDATE: Running test:schema" Rake::Task["test:schema"].invoke + puts "UPDATE: Running test:idl" Rake::Task["test:idl"].invoke + puts "UPDATE: Running test:inst_encodings" Rake::Task["test:inst_encodings"].invoke + puts "UPDATE: Done test:smoke" end desc <<~DESC @@ -420,25 +439,41 @@ namespace :test do These tests must pass before a commit will be allowed in the main branch on GitHub DESC task :regress do + puts "UPDATE: Starting test:regress" Rake::Task["test:smoke"].invoke + puts "UPDATE: Running gen:isa_explorer_browser" + Rake::Task["gen:isa_explorer_browser"].invoke + + puts "UPDATE: Running gen:isa_explorer_spreadsheet" + Rake::Task["gen:isa_explorer_spreadsheet"].invoke + + puts "UPDATE: Running gen:html_manual MANUAL_NAME=isa VERSIONS=all" ENV["MANUAL_NAME"] = "isa" ENV["VERSIONS"] = "all" Rake::Task["gen:html_manual"].invoke + puts "UPDATE: Running gen:ext_pdf EXT=B VERSION=latest" ENV["EXT"] = "B" ENV["VERSION"] = "latest" Rake::Task["gen:ext_pdf"].invoke + puts "UPDATE: Running gen:html for example_rv64_with_overlay" Rake::Task["gen:html"].invoke("example_rv64_with_overlay") - Rake::Task["#{$root}/gen/certificate_doc/pdf/MockCertificateModel.pdf"].invoke - Rake::Task["#{$root}/gen/profile_doc/pdf/MockProfileRelease.pdf"].invoke + puts "UPDATE: Generating MockProcessor-CRD.pdf" + Rake::Task["#{$root}/gen/proc_crd/pdf/MockProcessor-CRD.pdf"].invoke + puts "UPDATE: Generating MockProcessor-CTP.pdf" + Rake::Task["#{$root}/gen/proc_ctp/pdf/MockProcessor-CTP.pdf"].invoke + + puts "UPDATE: Generating MockProfileRelease.pdf" + Rake::Task["#{$root}/gen/profile/pdf/MockProfileRelease.pdf"].invoke + + puts "UPDATE: Generating Go Language Support" Rake::Task["gen:go"].invoke - puts - puts "Regression test PASSED" + puts "UPDATE: Done test:regress" end desc <<~DESC @@ -458,32 +493,40 @@ desc <<~DESC Generate all portfolio-based PDF artifacts (certificates and profiles) DESC task :portfolios do - portfolio_start_msg("MockCertificateModel") - Rake::Task["#{$root}/gen/certificate_doc/pdf/MockCertificateModel.pdf"].invoke + portfolio_start_msg("MockProcessor-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/MockProcessor-CRD.pdf"].invoke + portfolio_start_msg("MockProcessor-CTP") + Rake::Task["#{$root}/gen/proc_ctp/pdf/MockProcessor-CTP.pdf"].invoke portfolio_start_msg("MockProfileRelease") - Rake::Task["#{$root}/gen/profile_doc/pdf/MockProfileRelease.pdf"].invoke - portfolio_start_msg("MC100-32") - Rake::Task["#{$root}/gen/certificate_doc/pdf/MC100-32.pdf"].invoke - portfolio_start_msg("MC100-64") - Rake::Task["#{$root}/gen/certificate_doc/pdf/MC100-64.pdf"].invoke - portfolio_start_msg("MC200-32") - Rake::Task["#{$root}/gen/certificate_doc/pdf/MC200-32.pdf"].invoke - portfolio_start_msg("MC200-64") - Rake::Task["#{$root}/gen/certificate_doc/pdf/MC200-64.pdf"].invoke - portfolio_start_msg("MC300-32") - Rake::Task["#{$root}/gen/certificate_doc/pdf/MC300-32.pdf"].invoke - portfolio_start_msg("MC300-64") - Rake::Task["#{$root}/gen/certificate_doc/pdf/MC300-64.pdf"].invoke - portfolio_start_msg("RVI20") - Rake::Task["#{$root}/gen/profile_doc/pdf/RVI20.pdf"].invoke - portfolio_start_msg("RVA20") - Rake::Task["#{$root}/gen/profile_doc/pdf/RVA20.pdf"].invoke - portfolio_start_msg("RVA22") - Rake::Task["#{$root}/gen/profile_doc/pdf/RVA22.pdf"].invoke - portfolio_start_msg("RVA23") - Rake::Task["#{$root}/gen/profile_doc/pdf/RVA23.pdf"].invoke - portfolio_start_msg("RVB23") - Rake::Task["#{$root}/gen/profile_doc/pdf/RVB23.pdf"].invoke + Rake::Task["#{$root}/gen/profile/pdf/MockProfileRelease.pdf"].invoke + portfolio_start_msg("MC100-32-CTP") + Rake::Task["#{$root}/gen/proc_ctp/pdf/MC100-32-CTP.pdf"].invoke + portfolio_start_msg("MC100-32-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/MC100-32-CRD.pdf"].invoke + portfolio_start_msg("MC100-64-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/MC100-64-CRD.pdf"].invoke + portfolio_start_msg("MC200-32-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/MC200-32-CRD.pdf"].invoke + portfolio_start_msg("MC200-64-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/MC200-64-CRD.pdf"].invoke + portfolio_start_msg("MC300-32-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/MC300-32-CRD.pdf"].invoke + portfolio_start_msg("MC300-64-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/MC300-64-CRD.pdf"].invoke + portfolio_start_msg("AC100-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/AC100-CRD.pdf"].invoke + portfolio_start_msg("AC200-CRD") + Rake::Task["#{$root}/gen/proc_crd/pdf/AC200-CRD.pdf"].invoke + portfolio_start_msg("RVI20ProfileRelease") + Rake::Task["#{$root}/gen/profile/pdf/RVI20ProfileRelease.pdf"].invoke + portfolio_start_msg("RVA20ProfileRelease") + Rake::Task["#{$root}/gen/profile/pdf/RVA20ProfileRelease.pdf"].invoke + portfolio_start_msg("RVA22ProfileRelease") + Rake::Task["#{$root}/gen/profile/pdf/RVA22ProfileRelease.pdf"].invoke + portfolio_start_msg("RVA23ProfileRelease") + Rake::Task["#{$root}/gen/profile/pdf/RVA23ProfileRelease.pdf"].invoke + portfolio_start_msg("RVB23ProfileRelease") + Rake::Task["#{$root}/gen/profile/pdf/RVB23ProfileRelease.pdf"].invoke end def portfolio_start_msg(name) @@ -494,17 +537,27 @@ def portfolio_start_msg(name) puts "" end -# Shortcut targets for building profiles and certificates. -task "MockCertificateModel": "#{$root}/gen/certificate_doc/pdf/MockCertificateModel.pdf" -task "MC100-32": "#{$root}/gen/certificate_doc/pdf/MC100-32.pdf" -task "MC100-64": "#{$root}/gen/certificate_doc/pdf/MC100-64.pdf" -task "MC200-32": "#{$root}/gen/certificate_doc/pdf/MC200-32.pdf" -task "MC200-64": "#{$root}/gen/certificate_doc/pdf/MC200-64.pdf" -task "MC300-32": "#{$root}/gen/certificate_doc/pdf/MC300-32.pdf" -task "MC300-64": "#{$root}/gen/certificate_doc/pdf/MC300-64.pdf" -task "MockProfileRelease": "#{$root}/gen/profile_doc/pdf/MockProfileRelease.pdf" -task "RVI20": "#{$root}/gen/profile_doc/pdf/RVI20.pdf" -task "RVA20": "#{$root}/gen/profile_doc/pdf/RVA20.pdf" -task "RVA22": "#{$root}/gen/profile_doc/pdf/RVA22.pdf" -task "RVA23": "#{$root}/gen/profile_doc/pdf/RVA23.pdf" -task "RVB23": "#{$root}/gen/profile_doc/pdf/RVB23.pdf" +# Shortcut targets for building CRDs, CTPs, and Profile Releases. +task "MockCRD": "#{$root}/gen/proc_crd/pdf/MockProcessor-CRD.pdf" +task "MockProcessorCRD": "#{$root}/gen/proc_crd/pdf/MockProcessor-CRD.pdf" +task "MockCTP": "#{$root}/gen/proc_ctp/pdf/MockProcessor-CTP.pdf" +task "MockProcessorCTP": "#{$root}/gen/proc_ctp/pdf/MockProcessor-CTP.pdf" +task "MockCTP-HTML": "#{$root}/gen/proc_ctp/pdf/MockProcessor-CTP.html" +task "MockProcessorCTP-HTML": "#{$root}/gen/proc_ctp/pdf/MockProcessor-CTP.html" +task "MC100-32-CTP": "#{$root}/gen/proc_ctp/pdf/MC100-32-CTP.pdf" +task "MC100-32-CTP-HTML": "#{$root}/gen/proc_ctp/pdf/MC100-32-CTP.html" +task "MC100-32-CRD": "#{$root}/gen/proc_crd/pdf/MC100-32-CRD.pdf" +task "MC100-64-CRD": "#{$root}/gen/proc_crd/pdf/MC100-64-CRD.pdf" +task "MC200-32-CRD": "#{$root}/gen/proc_crd/pdf/MC200-32-CRD.pdf" +task "MC200-64-CRD": "#{$root}/gen/proc_crd/pdf/MC200-64-CRD.pdf" +task "MC300-32-CRD": "#{$root}/gen/proc_crd/pdf/MC300-32-CRD.pdf" +task "MC300-64-CRD": "#{$root}/gen/proc_crd/pdf/MC300-64-CRD.pdf" +task "AC100-CRD": "#{$root}/gen/proc_crd/pdf/AC100-CRD.pdf" +task "AC200-CRD": "#{$root}/gen/proc_crd/pdf/AC200-CRD.pdf" +task "MockProfile": "#{$root}/gen/profile/pdf/MockProfileRelease.pdf" +task "MockProfileRelease": "#{$root}/gen/profile/pdf/MockProfileRelease.pdf" +task "RVI20": "#{$root}/gen/profile/pdf/RVI20ProfileRelease.pdf" +task "RVA20": "#{$root}/gen/profile/pdf/RVA20ProfileRelease.pdf" +task "RVA22": "#{$root}/gen/profile/pdf/RVA22ProfileRelease.pdf" +task "RVA23": "#{$root}/gen/profile/pdf/RVA23ProfileRelease.pdf" +task "RVB23": "#{$root}/gen/profile/pdf/RVB23ProfileRelease.pdf" diff --git a/arch/README.adoc b/arch/README.adoc index 4603c210b0..f471a61264 100644 --- a/arch/README.adoc +++ b/arch/README.adoc @@ -34,9 +34,9 @@ Each extension/instruction/CSR has its own file. [ditaa] .... +--------------------------------------------------------------------------+ -| Config (cfgs/NAME) | +| AbstractConfig (cfgs/NAME) | | +------------------------------+ +-----------------------------------+ | -| | Config (extensions & params) | | Implementation Overlay [optional] | | +| | AbstractConfig (extensions & params) | | Implementation Overlay [optional] | | | | (cfgs/NAME/cfg.yaml) | | (cfgs/NAME/arch_overlay/*.yaml) | | | +------------------------------+ +-----------------------------------+ | +--------|------------------------------------------------------|----------+ @@ -69,7 +69,7 @@ Each extension/instruction/CSR has its own file. +------|-------------------------------------------------|---------+ | | Ruby Interface | | | /--------\ | | - | | Config | | | + | | AbstractConfig | | | | \--------/ /---------------\ | | | | +-| Architecture |<----------------------+ | | | | \---------------/ | diff --git a/arch/certificate_class/MC.yaml b/arch/certificate_class/MC.yaml deleted file mode 100644 index ae5eb19779..0000000000 --- a/arch/certificate_class/MC.yaml +++ /dev/null @@ -1,13 +0,0 @@ -# yaml-language-server: $schema=../../schemas/cert_class_schema.json - -$schema: cert_class_schema.json# -kind: Processor CRD -processor_kind: Microcontroller -name: MC -long_name: Microcontroller Class CRD - -introduction: | - The MC (Microcontroller Class) targets processors running low-level software on an RTOS or bare-metal. - -mandatory_priv_modes: - - M diff --git a/arch/certificate_class/MockCertificateClass.yaml b/arch/certificate_class/MockCertificateClass.yaml deleted file mode 100644 index e358b8684e..0000000000 --- a/arch/certificate_class/MockCertificateClass.yaml +++ /dev/null @@ -1,13 +0,0 @@ -# yaml-language-server: $schema=../../schemas/cert_class_schema.json - -$schema: cert_class_schema.json# -kind: Processor CRD -processor_kind: Apps Processor -name: MockCertificateClass -long_name: Mock Certificate Class Long Name - -introduction: | - Here's the Mock Certificate Class introduction. - -mandatory_priv_modes: - - M diff --git a/arch/certificate_model/MC100-64.yaml b/arch/certificate_model/MC100-64.yaml deleted file mode 100644 index b7a37a1f92..0000000000 --- a/arch/certificate_model/MC100-64.yaml +++ /dev/null @@ -1,20 +0,0 @@ -# yaml-language-server: $schema=../../schemas/cert_model_schema.json - -$schema: cert_model_schema.json# -kind: certificate model -name: MC100-64 -long_name: Basic 64-bit Microcontroller Certificate -class: - $ref: certificate_class/MC.yaml# - -$inherits: "certificate_model/MC100-32.yaml#" - -# XLEN used by rakefile -base: 64 - -extensions: - Sm: - parameters: - MXLEN: - schema: - const: 64 diff --git a/arch/certificate_model/MC200-64.yaml b/arch/certificate_model/MC200-64.yaml deleted file mode 100644 index b09e4728dc..0000000000 --- a/arch/certificate_model/MC200-64.yaml +++ /dev/null @@ -1,20 +0,0 @@ -# yaml-language-server: $schema=../../schemas/cert_model_schema.json - -$schema: cert_model_schema.json# -kind: certificate model -name: MC200-64 -long_name: Intermediate 64-bit Microcontroller Certificate -class: - $ref: certificate_class/MC.yaml# - -$inherits: "certificate_model/MC200-32.yaml#" - -# XLEN used by rakefile -base: 64 - -extensions: - Sm: - parameters: - MXLEN: - schema: - const: 64 diff --git a/arch/certificate_model/MC300-32.yaml b/arch/certificate_model/MC300-32.yaml deleted file mode 100644 index 512dd0b613..0000000000 --- a/arch/certificate_model/MC300-32.yaml +++ /dev/null @@ -1,35 +0,0 @@ -# yaml-language-server: $schema=../../schemas/cert_model_schema.json - -$schema: cert_model_schema.json# -kind: certificate model -name: MC300-32 -long_name: Advanced 32-bit Microcontroller Certificate -class: - $ref: certificate_class/MC.yaml# - -# Semantic versions within the model -versions: - - version: "1.0.0" - -# XLEN used by rakefile -base: 32 - -$inherits: "certificate_model/MC200-32.yaml#" - -revision_history: - - revision: "0.1.0" - date: "2024-11-27" - changes: - - First created - -introduction: | - MC300 is an advanced RISC-V microcontroller that adds the following mandatory extensions to the MC200-series: - - * S extension (Supervisor-mode privilege level) - * Sspmp extension (S-mode PMP, not ratified yet) - -# TODO: No ratified sPMP yet. - -extensions: - S: - presence: mandatory diff --git a/arch/certificate_model/MC300-64.yaml b/arch/certificate_model/MC300-64.yaml deleted file mode 100644 index 105a3ebe93..0000000000 --- a/arch/certificate_model/MC300-64.yaml +++ /dev/null @@ -1,20 +0,0 @@ -# yaml-language-server: $schema=../../schemas/cert_model_schema.json - -$schema: cert_model_schema.json# -kind: certificate model -name: MC300-64 -long_name: Advanced 64-bit Microcontroller Certificate -class: - $ref: certificate_class/MC.yaml# - -$inherits: "certificate_model/MC300-32.yaml#" - -# XLEN used by rakefile -base: 64 - -extensions: - Sm: - parameters: - MXLEN: - schema: - const: 64 diff --git a/arch/csr/misa.yaml b/arch/csr/misa.yaml index 5f6ebb06b3..1853393ca4 100644 --- a/arch/csr/misa.yaml +++ b/arch/csr/misa.yaml @@ -145,6 +145,29 @@ fields: reset_value(): | return implemented?(ExtensionName::M) ? 1 : 0; definedBy: M + cert_normative_rules: + - id: csr_field.misa.M.disabled + name: Disabling `misa.M` bit + description: What happens when you turn off `misa.M` + doc_links: + - manual:csr:misa:disabling-extension + cert_test_procedures: + - id: csr.misa.M.muldiv_with_M_on&off + description: Execute with M on/off + normative_rules: [csr_field.misa.M.disabled] + steps: | + . on + .. Turn on `misa.M` + . execute + .. Execute every in-scope multiply extension instruction + . check + .. Check that every multiply extension instruction works as normal + . off + .. Turn off `misa.M` + . execute + .. Execute every in-scope multiply extension instruction + . check + .. Check that every multiply extension instruction throws illegal instruction exception S: location: 18 description: | @@ -196,3 +219,20 @@ sw_read(): | (CSR[misa].C << 2) | (CSR[misa].B << 1) | CSR[misa].A); +cert_normative_rules: + - id: csr.misa.disabling_bits + name: Disabling `misa` bits + description: What happens when you turn off bits + doc_links: + - manual:csr:misa:disabling-extension +cert_test_procedures: + - id: csr.misa.off&on + description: Turn on/off each bit and see what happens + normative_rules: [csr.misa.disabling_bits] + steps: | + . Setup + .. Turn on all bits + . Loop + .. Turn off each present bit invidually and try affected behaviors + . Check + .. Fail unless turning off bit disables extension as expected diff --git a/arch/ext/Sha.yaml b/arch/ext/Sha.yaml index e0dc46d058..896f71fc63 100644 --- a/arch/ext/Sha.yaml +++ b/arch/ext/Sha.yaml @@ -3,6 +3,7 @@ $schema: "ext_schema.json#" kind: extension name: Sha +type: privileged long_name: The augmented hypervisor extension description: | *Sha* comprises the following extensions: @@ -44,13 +45,20 @@ versions: - version: "1.0.0" state: ratified ratification_date: null - requires: - allOf: - - H - - Ssstateen - - Shcounterenw - - Shvstvala - - Shtvala - - Shvstvecd - - Shvsatpa - - Shgatpa + implies: + - name: H + version: "1.0.0" + - name: Ssstateen + version: "1.0.0" + - name: Shcounterenw + version: "1.0.0" + - name: Shvstvala + version: "1.0.0" + - name: Shtvala + version: "1.0.0" + - name: Shvstvecd + version: "1.0.0" + - name: Shvsatpa + version: "1.0.0" + - name: Shgatpa + version: "1.0.0" diff --git a/arch/ext/Shcounterenw.yaml b/arch/ext/Shcounterenw.yaml new file mode 100644 index 0000000000..208ab6a3a3 --- /dev/null +++ b/arch/ext/Shcounterenw.yaml @@ -0,0 +1,21 @@ +# yaml-language-server: $schema=../../schemas/ext_schema.json + +$schema: "ext_schema.json#" +kind: extension +name: Shcounterenw +long_name: Hypervisor counter enable +description: | + For any hpmcounter that is not read-only zero, the corresponding bit in `hcounteren` must be writable. + + [NOTE] + This extension was ratified with the RVA22 profiles. +type: privileged +versions: + - version: "1.0.0" + state: ratified + ratification_date: 2023-08 + url: https://drive.google.com/file/d/1KcjgbLM5L1ZKY8934aJl8aQwGlMz6Cbo/view?usp=drive_link + param_constraints: + HCOUNTENABLE_EN: + extra_validation: | + HPM_COUNTER_EN.each_with_index { |hpm_exists, idx| assert(!hpm_exists || HCOUNTENABLE_EN[idx]) } diff --git a/arch/ext/Shvsatpa.yaml b/arch/ext/Shvsatpa.yaml new file mode 100644 index 0000000000..97ca456473 --- /dev/null +++ b/arch/ext/Shvsatpa.yaml @@ -0,0 +1,16 @@ +# yaml-language-server: $schema=../../schemas/ext_schema.json + +$schema: "ext_schema.json#" +kind: extension +name: Shvsatpa +long_name: vstap translation mode requirements +description: | + All translation modes supported in the `satp` CSR must be supported in the `vsatp` CSR. + + [NOTE] + This extension was ratified with the RVA22 profiles. +type: privileged +versions: + - version: "1.0.0" + state: ratified + ratification_date: null diff --git a/arch/ext/Ssstrict.yaml b/arch/ext/Ssstrict.yaml index 8856e08f3a..37a1bc3e46 100644 --- a/arch/ext/Ssstrict.yaml +++ b/arch/ext/Ssstrict.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Ssstrict long_name: Unimplemented reserved encodings trap and no no-conforming extensions +type: privileged description: | No non-conforming extensions are present. Attempts to execute unimplemented opcodes or access unimplemented CSRs in the diff --git a/arch/ext/Sv32.yaml b/arch/ext/Sv32.yaml index 6ac42cabe9..8fa5a1f333 100644 --- a/arch/ext/Sv32.yaml +++ b/arch/ext/Sv32.yaml @@ -7,7 +7,13 @@ long_name: 32-bit virtual address translation (3 level) description: 32-bit virtual address translation (3 level) type: privileged versions: + - version: "1.11.0" + state: ratified + ratification_date: null - version: "1.12.0" state: ratified ratification_date: null url: https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf + - version: "1.13.0" + state: ratified + ratification_date: null diff --git a/arch/ext/Sv39.yaml b/arch/ext/Sv39.yaml index 646c0380e7..430113c341 100644 --- a/arch/ext/Sv39.yaml +++ b/arch/ext/Sv39.yaml @@ -7,7 +7,13 @@ long_name: 39-bit virtual address translation (3 level) description: 39-bit virtual address translation (3 level) type: privileged versions: + - version: "1.11.0" + state: ratified + ratification_date: null - version: "1.12.0" state: ratified ratification_date: null url: https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf + - version: "1.13.0" + state: ratified + ratification_date: null diff --git a/arch/ext/Sv48.yaml b/arch/ext/Sv48.yaml index ef7f970e57..fb80092e02 100644 --- a/arch/ext/Sv48.yaml +++ b/arch/ext/Sv48.yaml @@ -7,6 +7,12 @@ long_name: 48-bit virtual address translation (4 level) description: 48-bit virtual address translation (4 level) type: privileged versions: + - version: "1.11.0" + state: ratified + ratification_date: null + requires: + name: Sv39 + version: ">= 1.11" - version: "1.12.0" state: ratified ratification_date: null @@ -14,3 +20,9 @@ versions: requires: name: Sv39 version: ">= 1.12" + - version: "1.13.0" + state: ratified + ratification_date: null + requires: + name: Sv39 + version: ">= 1.13" diff --git a/arch/ext/Sv57.yaml b/arch/ext/Sv57.yaml index 18bdd3d157..7fac3cf8bf 100644 --- a/arch/ext/Sv57.yaml +++ b/arch/ext/Sv57.yaml @@ -7,6 +7,12 @@ long_name: 57-bit virtual address translation (5 level) description: 57-bit virtual address translation (5 level) type: privileged versions: + - version: "1.11.0" + state: ratified + ratification_date: null + requires: + name: Sv48 + version: ">= 1.11" - version: "1.12.0" state: ratified ratification_date: null @@ -14,3 +20,9 @@ versions: requires: name: Sv48 version: ">= 1.12" + - version: "1.13.0" + state: ratified + ratification_date: null + requires: + name: Sv48 + version: ">= 1.13" diff --git a/arch/ext/Svbare.yaml b/arch/ext/Svbare.yaml index 379238fcb8..c0acbeb743 100644 --- a/arch/ext/Svbare.yaml +++ b/arch/ext/Svbare.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Svbare long_name: Bare virtual addressing +type: privileged description: | This extension mandates that the `satp` mode Bare must be supported. diff --git a/arch/ext/Svinval.yaml b/arch/ext/Svinval.yaml index c208c0adf2..f8bd145763 100644 --- a/arch/ext/Svinval.yaml +++ b/arch/ext/Svinval.yaml @@ -3,6 +3,7 @@ $schema: "ext_schema.json#" kind: extension name: Svinval +type: privileged long_name: Fine-grained address-translation cache invalidation description: | The `Svinval` extension splits `sfence.vma`, `hfence.vma`, and `hfence.gvma` instructions into diff --git a/arch/ext/Svnapot.yaml b/arch/ext/Svnapot.yaml index d3fb8c3d51..bcddf05b49 100644 --- a/arch/ext/Svnapot.yaml +++ b/arch/ext/Svnapot.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Svnapot long_name: Naturally-aligned Power of Two Translation Contiguity +type: privileged description: | In Sv39, Sv48, and Sv57, when a PTE has N=1, the PTE represents a translation that is part of a range of contiguous virtual-to-physical diff --git a/arch/ext/Xmock.yaml b/arch/ext/Xmock.yaml index db1c0e0b7d..19850b209a 100644 --- a/arch/ext/Xmock.yaml +++ b/arch/ext/Xmock.yaml @@ -154,3 +154,34 @@ params: type: boolean maxItems: 8 minItems: 8 +cert_normative_rules: + - id: ext.Xmock.cov1 + name: Mock normative rule 1 + description: Let's have fun with the `Xmock` extension + doc_links: + - manual:inst:mul:encoding + - udb:doc:inst:mock + - id: ext.Xmock.cov2 + name: Mock normative rule 2 + description: And some more fun! + doc_links: + - manual:csr:misa:disabling-extension +cert_test_procedures: + - id: ext.Xmock.my_first + test_file_name: mock.S + description: Verify that when it rains in Spain, it rains mainly on the plains! + normative_rules: [ext.Xmock.cov1, ext.Xmock.cov2] + steps: | + . Wait for rain + .. First we need some rain + + + [NOTE] + This is getting silly. Very unprofessional. This note is preceded by a + instead of a blank line. + . Measure rainfall + .. Get a bunch of buckets around Spain + + + [NOTE] + Yup, pretty silly. This note also has to be preceded by a + so that the ordered list + number continues rather than being reset to 1. + . Compare rainful. See this number is continued, not 1. + .. Fail unless more rain falls on the plains than other regions diff --git a/arch/ext/Za128rs.yaml b/arch/ext/Za128rs.yaml index 24a2324610..10cca317a7 100644 --- a/arch/ext/Za128rs.yaml +++ b/arch/ext/Za128rs.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Za128rs long_name: Reservation set requirement for RVA profiles +type: unprivileged description: | Reservation sets must be contiguous, naturally aligned, and at most 128 bytes in size. diff --git a/arch/ext/Za64rs.yaml b/arch/ext/Za64rs.yaml index ea833511a0..9dd3d27844 100644 --- a/arch/ext/Za64rs.yaml +++ b/arch/ext/Za64rs.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Za64rs long_name: Reservation set requirement for RVA profiles +type: unprivileged description: | Reservation sets must be contiguous, naturally aligned, and at most 64 bytes in size. diff --git a/arch/ext/Zabha.yaml b/arch/ext/Zabha.yaml index 62ebb54ad0..baed40d195 100644 --- a/arch/ext/Zabha.yaml +++ b/arch/ext/Zabha.yaml @@ -4,9 +4,9 @@ $schema: "ext_schema.json#" kind: extension name: Zabha long_name: Byte and Halfword Atomic Memory Operations +type: unprivileged description: | Adds byte and halfword atomic memory operations to the RISC-V Unprivileged ISA. - type: unprivileged versions: - version: "1.0.0" state: ratified diff --git a/arch/ext/Zama16b.yaml b/arch/ext/Zama16b.yaml index 10812d4491..d5d059ae5d 100644 --- a/arch/ext/Zama16b.yaml +++ b/arch/ext/Zama16b.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Zama16b long_name: Misaligned load/store/AMO within aligned 16-byte address are atomic +type: unprivileged description: | Misaligned loads, stores, and AMOs to main memory regions that do not cross a naturally-aligned 16-byte boundary are atomic. diff --git a/arch/ext/Ziccamoa.yaml b/arch/ext/Ziccamoa.yaml index ceea8fe110..dfd83a1c6c 100644 --- a/arch/ext/Ziccamoa.yaml +++ b/arch/ext/Ziccamoa.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Ziccamoa long_name: Main memory atomicity requirement for RVA profiles +type: unprivileged description: | Main memory regions with both the cacheability and coherence PMAs must support AMOArithmetic. diff --git a/arch/ext/Ziccamoc.yaml b/arch/ext/Ziccamoc.yaml index 373ec4fd68..b253605181 100644 --- a/arch/ext/Ziccamoc.yaml +++ b/arch/ext/Ziccamoc.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Ziccamoc long_name: Cacheable and coherent PMAs provide `AMOCASQ` level PMA support +type: unprivileged description: | Main memory regions with both the cacheability and coherence PMAs must provide `AMOCASQ` level PMA support. diff --git a/arch/ext/Ziccif.yaml b/arch/ext/Ziccif.yaml index 69d7e32403..f93c996cbc 100644 --- a/arch/ext/Ziccif.yaml +++ b/arch/ext/Ziccif.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Ziccif long_name: Main memory fetch requirement for RVA profiles +type: unprivileged description: | Main memory regions with both the cacheability and coherence PMAs must support instruction fetch, and any instruction fetches of naturally aligned power-of-2 sizes up to diff --git a/arch/ext/Zicclsm.yaml b/arch/ext/Zicclsm.yaml index 9eae9b58a8..ff6238eb66 100644 --- a/arch/ext/Zicclsm.yaml +++ b/arch/ext/Zicclsm.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Zicclsm long_name: Main memory misaligned requirement for RVA profiles +type: unprivileged description: | Misaligned loads and stores to main memory regions with both the cacheability and coherence PMAs must be supported. diff --git a/arch/ext/Ziccrse.yaml b/arch/ext/Ziccrse.yaml index f73fc4f39c..62bff6ab8a 100644 --- a/arch/ext/Ziccrse.yaml +++ b/arch/ext/Ziccrse.yaml @@ -4,6 +4,7 @@ $schema: "ext_schema.json#" kind: extension name: Ziccrse long_name: Main memory reservability requirement for RVA profiles +type: unprivileged description: | Main memory regions with both the cacheability and coherence PMAs must support RsrvEventual. diff --git a/arch/ext/Zihintntl.yaml b/arch/ext/Zihintntl.yaml index 8df21228fc..1efb018d0a 100644 --- a/arch/ext/Zihintntl.yaml +++ b/arch/ext/Zihintntl.yaml @@ -59,7 +59,8 @@ description: | loads and stores. ==== - <> lists several software use cases and the recommended NTL variant that _portable_ software—i.e., software not tuned for any specific implementation's memory hierarchy—should use in each case. + <> lists several software use cases and the recommended NTL variant that _portable_ software + i.e., software not tuned for any specific implementation's memory hierarchy should use in each case. [[ntl-portable]] .Recommended NTL variant for portable software to employ in various scenarios. diff --git a/arch/inst/M/mul.yaml b/arch/inst/M/mul.yaml index 610fa26b54..901aa0ba6c 100644 --- a/arch/inst/M/mul.yaml +++ b/arch/inst/M/mul.yaml @@ -68,3 +68,36 @@ sail(): | } # SPDX-SnippetEnd + +cert_normative_rules: + - id: inst.mul.encoding + name: Encoding + description: Encoding of `mul` instruction + doc_links: + - manual:inst:mul:encoding + - id: inst.mul.basic_op + name: Basic operation + description: Basic operation of `mul` instruction + doc_links: + - manual:inst:mul:operation + - id: inst.mul.ill_exc_misa_M_disabled + name: Illegal instruction exception when misa.M is 0 + description: | + An illegal instruction exception is raised when the instruction is executed + and `misa.M` is 0. + doc_links: + - manual:csr:misa:disabling-extension + +cert_test_procedures: + - id: inst.mul.encoding + description: Verify the encoding of the `mul` instruction + normative_rules: [inst.mul.encoding] + steps: | + . Setup + .. Load a variety of known values into rs1 & rs2 with a variety of rs1/rs2/rd values. + . Execution + .. Execute the `mul` instruction + . Validation + .. Check each result in rd + . Teardown + .. Clear the registers used for rd diff --git a/arch/inst/Zicond/czero.eqz.yaml b/arch/inst/Zicond/czero.eqz.yaml index 2502df7da0..5d098c9182 100644 --- a/arch/inst/Zicond/czero.eqz.yaml +++ b/arch/inst/Zicond/czero.eqz.yaml @@ -8,7 +8,7 @@ description: | If rs2 contains the value zero, this instruction writes the value zero to rd. Otherwise, this instruction copies the contents of rs1 to rd. This instruction carries a syntactic dependency from both rs1 and rs2 to rd. Furthermore, if the Zkt - extension is implemented, this instruction’s timing is independent of the data values in rs1 and rs2. + extension is implemented, this instruction's timing is independent of the data values in rs1 and rs2. definedBy: Zicond assembly: xd, xs1, xs2 encoding: diff --git a/arch/inst/Zicond/czero.nez.yaml b/arch/inst/Zicond/czero.nez.yaml index e83dcdb3b6..cb7ebeee10 100644 --- a/arch/inst/Zicond/czero.nez.yaml +++ b/arch/inst/Zicond/czero.nez.yaml @@ -8,7 +8,7 @@ description: | If rs2 contains a nonzero value, this instruction writes the value zero to rd. Otherwise, this instruction copies the contents of rs1 to rd. This instruction carries a syntactic dependency from both rs1 and rs2 to rd. Furthermore, if the Zkt - extension is implemented, this instruction’s timing is independent of the data values in rs1 and rs2. + extension is implemented, this instruction's timing is independent of the data values in rs1 and rs2. definedBy: Zicond assembly: xd, xs1, xs2 encoding: diff --git a/arch/inst/mock.yaml b/arch/inst/mock.yaml new file mode 100644 index 0000000000..20bcfab512 --- /dev/null +++ b/arch/inst/mock.yaml @@ -0,0 +1,97 @@ +# yaml-language-server: $schema=../../schemas/inst_schema.json + +$schema: "inst_schema.json#" +kind: instruction +name: mock +long_name: Mock Instruction (Just for testing UDB) +description: | + The mock instruction computes the value of PI to an infinite number of decimal places. + Okay, actually it performs the equivalent of the `mul` instruction. + + [NOTE] + Computing PI to an infinite number of decicial places is impossible, but hey, why not? + +definedBy: Xmock +assembly: xd, xs1, xs2 +encoding: + # Use custom-0 opcode to avoid conflicts with RISC-V defined instructions. + match: 0000001----------000-----0001011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 +access: + s: always + u: always + vs: always + vu: always +data_independent_timing: true +operation(): | + #anchor("illegal-inst-exc-misa-disabled") { + if (implemented?(ExtensionName::M) && (CSR[misa].M == 1'b0)) { + raise (ExceptionCode::IllegalInstruction, mode(), $encoding); + } + #} + + XReg src1 = X[rs1]; + XReg src2 = X[rs2]; + + #anchor("calculation") { + X[rd] = (src1 * src2)[MXLEN-1:0]; + #} + +sail(): | + { + if extension("M") | haveZmmul() then { + let rs1_val = X(rs1); + let rs2_val = X(rs2); + let rs1_int : int = if signed1 then signed(rs1_val) else unsigned(rs1_val); + let rs2_int : int = if signed2 then signed(rs2_val) else unsigned(rs2_val); + let result_wide = to_bits(2 * sizeof(xlen), rs1_int * rs2_int); + let result = if high + then result_wide[(2 * sizeof(xlen) - 1) .. sizeof(xlen)] + else result_wide[(sizeof(xlen) - 1) .. 0]; + X(rd) = result; + RETIRE_SUCCESS + } else { + handle_illegal(); + RETIRE_FAIL + } + } + +cert_normative_rules: + - id: inst.mock.encoding&basic_op + name: Encoding and basic operation + description: Encoding and basic operation for `mock` instruction + doc_links: + - manual:inst:mul:encoding + - udb:doc:inst:mock + - id: inst.mock.ill_exc_misa_M_disabled + name: Illegal instruction exception when misa.M is 0 + description: | + An illegal instruction exception is raised when the instruction is executed + and `misa.M` is 0. + doc_links: + - manual:csr:misa:disabling-extension + # - idl:code:inst:mock:illegal-inst-exc-misa-disabled + +cert_test_procedures: + - id: inst.mock.enc_and_basic + description: Verify the encoding and basic operation of the `mock` instruction + normative_rules: [inst.mock.encoding&basic_op] + steps: | + . Setup + .. Load a variety of known values into rs1 & rs2 with a variety of rs1/rs2/rd values. + . Execution + .. Execute the `mock` instruction + . Validation + .. Check each result in rd + . Teardown + .. Clear the registers used for rd + + [NOTE] + Don't really need to clear the registers so this is a contrived example. + I've got this note after the ordered list above. diff --git a/arch/proc_cert_class/AC.yaml b/arch/proc_cert_class/AC.yaml new file mode 100644 index 0000000000..0738b65117 --- /dev/null +++ b/arch/proc_cert_class/AC.yaml @@ -0,0 +1,10 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_class_schema.json + +$schema: proc_cert_class_schema.json# +kind: processor certificate class +processor_kind: Apps Processor +name: AC +long_name: Apps Processor Certificate Class + +introduction: | + The AC (Apps processor Class) targets processors that support virtual memory and run rich operating systems such as Linux and Android. diff --git a/arch/proc_cert_class/MC.yaml b/arch/proc_cert_class/MC.yaml new file mode 100644 index 0000000000..be3468f07e --- /dev/null +++ b/arch/proc_cert_class/MC.yaml @@ -0,0 +1,10 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_class_schema.json + +$schema: proc_cert_class_schema.json# +kind: processor certificate class +processor_kind: Microcontroller +name: MC +long_name: Microcontroller Processor Certificate Class + +introduction: | + The MC (Microcontroller Class) targets processors running low-level software on an RTOS or bare-metal. diff --git a/arch/proc_cert_class/MockProcessor.yaml b/arch/proc_cert_class/MockProcessor.yaml new file mode 100644 index 0000000000..bfb144698c --- /dev/null +++ b/arch/proc_cert_class/MockProcessor.yaml @@ -0,0 +1,10 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_class_schema.json + +$schema: proc_cert_class_schema.json# +kind: processor certificate class +processor_kind: Apps Processor +name: MockProcessor +long_name: Mock Processor Certificate Class Long Name + +introduction: | + Here's the Mock Certificate Class introduction. diff --git a/arch/proc_cert_model/AC100.yaml b/arch/proc_cert_model/AC100.yaml new file mode 100644 index 0000000000..bfc3a3bc06 --- /dev/null +++ b/arch/proc_cert_model/AC100.yaml @@ -0,0 +1,69 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json + +$schema: proc_cert_model_schema.json# +kind: processor certificate model +name: AC100 +long_name: AC100 Apps Processor Certificate based on the RVB23 profile release +class: + $ref: proc_cert_class/AC.yaml# + + # MXLEN used by rakefile +base: 64 + +# Semantic versions within the model +versions: + - version: "1.0.0" + +revision_history: + - revision: "0.1.0" + date: "2025-02-03" + changes: + - Created + +introduction: | + The AC100 Processor Certificate targets RISC-V Apps Processors running rich operating systems such as + custom Yocto Linux. + Software source code compatibility is a strong requirement and binary compatibility is a lesser requirement. + + AC100 is based on the following: + + * RVB23 Profile without Hypervisor or Vector support + * M-mode requirements + * AIA or PLIC interrupt controller + * Debug and trace (TBD) + +# Specification versions +tsc_profile_release: + $ref: profile_release/RVB23.yaml# +unpriv_isa_manual_revision: "20240411" +priv_isa_manual_revision: "20240411" +debug_manual_revision: "1.0.0" + +# Certificate doesn't include hypervisor +in_scope_priv_modes: + - U + - S + - M + +extensions: + $inherits: + - "profile/RVB23M64.yaml#/extensions" +requirement_groups: + m_mode_reqs: + name: M-mode Requirements + description: | + Extra requirements for M-mode beyond the minimum M-mode defined by the Sm extension. + These extra requirements come from https://github.com/riscv/riscv-profiles/blob/main/src/old-m-profiles.adoc. + requirements: + - name: REQ-M_Mode-Non_Zero_CSRs + description: The `mvendorid`, `marchid`, and `mimpid` CSRs must be nonzero. + - name: REQ-M_Mode-mstatus_writeable_fields + description: The `mstatus.TVM`, `mstatus.TW`, and `mstatus.TSR` CSR fields must be writable. + - name: REQ-M_Mode-medeleg_writable_bits + description: The `medeleg` CSR bits 3, 8, 12, 13, and 15 must be writable. + - name: REQ-M_Mode-mideleg_writable_bits + description: The `mideleg` CSR bits 1, 5, and 9 must be writable. + - name: REQ-M_Mode-mideleg_readonlyzero_bits + description: The `mideleg` CSR bits 3, 7, and 11 must be read-only zero. + - name: REQ-M_Mode-mcounteren_writeable_bits + description: For any `mhpmcounter` that is writable, the corresponding bit in `mcounteren` must be writable. diff --git a/arch/proc_cert_model/AC200.yaml b/arch/proc_cert_model/AC200.yaml new file mode 100644 index 0000000000..9cf2c20bbf --- /dev/null +++ b/arch/proc_cert_model/AC200.yaml @@ -0,0 +1,55 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json + +$schema: proc_cert_model_schema.json# +kind: processor certificate model +name: AC200 +long_name: AC200 Apps Processor Certificate based on the RVA23 profile release +class: + $ref: proc_cert_class/AC.yaml# + + # MXLEN used by rakefile +base: 64 + +# Semantic versions within the model +versions: + - version: "1.0.0" + +revision_history: + - revision: "0.1.0" + date: "2025-03-07" + changes: + - Created + +introduction: | + The AC200 Processor Certificate targets RISC-V Apps Processors running rich operating systems such as + commercial Linux distributions or Android. + Software source code compatibility and binary compatibility between implementations are strong requirements. + + AC200 is based on the following: + + * RVA23 Profile (includes mandatory Hypervisor and Vector support) + * M-mode requirements + * AIA or PLIC interrupt controller + * Debug and trace (TBD) + +# Specification versions +tsc_profile_release: + $ref: profile_release/RVA23.yaml# +unpriv_isa_manual_revision: "20240411" +priv_isa_manual_revision: "20240411" +debug_manual_revision: "1.0.0" + +in_scope_priv_modes: + - U + - S + - M + - HS + - VS + - VU + +extensions: + $inherits: + - "profile/RVA23M64.yaml#/extensions" +requirement_groups: + $inherits: + - "proc_cert_model/AC100.yaml#/requirement_groups" diff --git a/arch/certificate_model/MC100-32.yaml b/arch/proc_cert_model/MC100-32.yaml similarity index 84% rename from arch/certificate_model/MC100-32.yaml rename to arch/proc_cert_model/MC100-32.yaml index 975404fbeb..0abc0eea1a 100644 --- a/arch/certificate_model/MC100-32.yaml +++ b/arch/proc_cert_model/MC100-32.yaml @@ -1,20 +1,36 @@ -# yaml-language-server: $schema=../../schemas/cert_model_schema.json +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json -$schema: cert_model_schema.json# -kind: certificate model +$schema: proc_cert_model_schema.json# +kind: processor certificate model name: MC100-32 long_name: Basic 32-bit Microcontroller Certificate class: - $ref: certificate_class/MC.yaml# + $ref: proc_cert_class/MC.yaml# # Semantic versions within the model versions: - version: "1.0.0" -# XLEN used by rakefile +# MXLEN used by rakefile base: 32 +in_scope_priv_modes: + - M + +# History of this certificate. revision_history: + - revision: "0.9.0" + date: "2025-02-06" + changes: + - | + Provided to CSC Microcontroller WG for review given the following list of known issues: + ** abc + ** def + - revision: "0.8.0" + date: "2025-01-19" + changes: + - Updated so that content can apply equally to all certificate-related documents + such as CRDs (Certification Requirement Documents) and CTPs (Certification Test Plans). - revision: "0.7.0" date: "2024-07-29" changes: @@ -68,10 +84,8 @@ revision_history: - Initial version introduction: | - The MC100 Processor CRD (Certification Requirements Document) defines the requirements - a processor implementation must meet in order to be eligible for the associated MC100 certificate. - MC100 is a basic RISC-V processor with minimal M-mode support and has 32-bit and 64-bit variants. - + The MC100 Processor Certificate targets basic RISC-V microcontrollers. + It supports either a 32-bit (MC100-32) or 64-bit (MC100-64) base ISA. MC100 is not intended for the smallest possible microcontrollers but rather for applications benefiting from a minimal but standardized microcontroller. It consists of: @@ -80,7 +94,7 @@ introduction: | * Privileged ISA: Only the M-mode features listed as mandatory in the RISC-V Privileged ISA manual # Specification versions -tsc_profile: null # None for MC100 +tsc_profile_release: null # None for MC100 unpriv_isa_manual_revision: "20191213" priv_isa_manual_revision: "20190608-Priv-MSU-Ratified" debug_manual_revision: "0.13.2" @@ -95,19 +109,19 @@ extensions: presence: mandatory M: version: "~> 2.0" - presence: mandatory + presence: optional Zicsr: version: "~> 2.0" presence: mandatory Zicntr: version: "~> 2.0" presence: mandatory - parameters: + param_constraints: TIME_CSR_IMPLEMENTED: {} # Unconstrained Sm: version: "~> 1.11.0" presence: mandatory - parameters: + param_constraints: MTVEC_BASE_ALIGNMENT_DIRECT: {} # Unconstrained MTVEC_BASE_ALIGNMENT_VECTORED: {} # Unconstrained ARCH_ID: {} # Unconstrained diff --git a/arch/proc_cert_model/MC100-64.yaml b/arch/proc_cert_model/MC100-64.yaml new file mode 100644 index 0000000000..fb93272829 --- /dev/null +++ b/arch/proc_cert_model/MC100-64.yaml @@ -0,0 +1,20 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json + +$schema: proc_cert_model_schema.json# +kind: processor certificate model +name: MC100-64 +long_name: Basic 64-bit Microcontroller Certificate +class: + $ref: proc_cert_class/MC.yaml# + +$inherits: "proc_cert_model/MC100-32.yaml#" + +# MXLEN used by rakefile +base: 64 + +extensions: + Sm: + param_constraints: + MXLEN: + schema: + const: 64 diff --git a/arch/certificate_model/MC200-32.yaml b/arch/proc_cert_model/MC200-32.yaml similarity index 60% rename from arch/certificate_model/MC200-32.yaml rename to arch/proc_cert_model/MC200-32.yaml index ee2d1049a2..1ab108e1cf 100644 --- a/arch/certificate_model/MC200-32.yaml +++ b/arch/proc_cert_model/MC200-32.yaml @@ -1,20 +1,20 @@ -# yaml-language-server: $schema=../../schemas/cert_model_schema.json +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json -$schema: cert_model_schema.json# -kind: certificate model +$schema: proc_cert_model_schema.json# +kind: processor certificate model name: MC200-32 long_name: Intermediate 32-bit Microcontroller Certificate class: - $ref: certificate_class/MC.yaml# + $ref: proc_cert_class/MC.yaml# # Semantic versions within the model versions: - version: "1.0.0" -# XLEN used by rakefile +# MXLEN used by rakefile base: 32 -$inherits: "certificate_model/MC100-32.yaml#" +$inherits: "proc_cert_model/MC100-32.yaml#" revision_history: - revision: "0.1.0" @@ -23,8 +23,11 @@ revision_history: - First created introduction: | - MC200 is an intermedicate RISC-V microcontroller that adds the following mandatory extensions to the MC100-series: + The MC200 Processor Certificate targets intermediate RISC-V microcontrollers. + It supports either a 32-bit (MC200-32) or 64-bit (MC200-64) base ISA. + The MC200 adds the following mandatory extensions to the MC100: + * M extension (mandatory) * U extension (User-mode privilege level) * Smpmp extension (M-mode PMP) * B (Bitfield) extension @@ -32,7 +35,7 @@ introduction: | * CLIC extension (if/when ratified) # Specification versions -tsc_profile: null # None for MC200 +tsc_profile_release: null # None for MC200 unpriv_isa_manual_revision: "20191213" priv_isa_manual_revision: "20190608-Priv-MSU-Ratified" debug_manual_revision: "0.13.2" @@ -40,6 +43,8 @@ debug_manual_revision: "0.13.2" # TODO: No ratified CLIC yet. It will be multiple extensions. extensions: + M: + presence: mandatory B: presence: mandatory Zce: diff --git a/arch/proc_cert_model/MC200-64.yaml b/arch/proc_cert_model/MC200-64.yaml new file mode 100644 index 0000000000..1945bff9ff --- /dev/null +++ b/arch/proc_cert_model/MC200-64.yaml @@ -0,0 +1,20 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json + +$schema: proc_cert_model_schema.json# +kind: processor certificate model +name: MC200-64 +long_name: Intermediate 64-bit Microcontroller Certificate +class: + $ref: proc_cert_class/MC.yaml# + +$inherits: "proc_cert_model/MC200-32.yaml#" + +# MXLEN used by rakefile +base: 64 + +extensions: + Sm: + param_constraints: + MXLEN: + schema: + const: 64 diff --git a/arch/proc_cert_model/MC300-32.yaml b/arch/proc_cert_model/MC300-32.yaml new file mode 100644 index 0000000000..edc9af5a8a --- /dev/null +++ b/arch/proc_cert_model/MC300-32.yaml @@ -0,0 +1,37 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json + +$schema: proc_cert_model_schema.json# +kind: processor certificate model +name: MC300-32 +long_name: Advanced 32-bit Microcontroller Certificate +class: + $ref: proc_cert_class/MC.yaml# + +# Semantic versions within the model +versions: + - version: "1.0.0" + +# MXLEN used by rakefile +base: 32 + +$inherits: "proc_cert_model/MC200-32.yaml#" + +revision_history: + - revision: "0.1.0" + date: "2024-11-27" + changes: + - First created + +introduction: | + The MC300 Processor Certificate targets advanced RISC-V microcontrollers. + It supports either a 32-bit (MC300-32) or 64-bit (MC300-64) base ISA. + The MC300 adds the following mandatory extensions to the MC200: + + * S extension (Supervisor-mode privilege level) + * Sspmp extension (S-mode PMP, not ratified yet) + +# TODO: No ratified sPMP yet. + +extensions: + S: + presence: mandatory diff --git a/arch/proc_cert_model/MC300-64.yaml b/arch/proc_cert_model/MC300-64.yaml new file mode 100644 index 0000000000..bf3199847f --- /dev/null +++ b/arch/proc_cert_model/MC300-64.yaml @@ -0,0 +1,20 @@ +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json + +$schema: proc_cert_model_schema.json# +kind: processor certificate model +name: MC300-64 +long_name: Advanced 64-bit Microcontroller Certificate +class: + $ref: proc_cert_class/MC.yaml# + +$inherits: "proc_cert_model/MC300-32.yaml#" + +# MXLEN used by rakefile +base: 64 + +extensions: + Sm: + param_constraints: + MXLEN: + schema: + const: 64 diff --git a/arch/certificate_model/MockCertificateModel.yaml b/arch/proc_cert_model/MockProcessor.yaml similarity index 83% rename from arch/certificate_model/MockCertificateModel.yaml rename to arch/proc_cert_model/MockProcessor.yaml index 06b84d4578..bf77c0cb17 100644 --- a/arch/certificate_model/MockCertificateModel.yaml +++ b/arch/proc_cert_model/MockProcessor.yaml @@ -1,15 +1,18 @@ -# yaml-language-server: $schema=../../schemas/cert_model_schema.json +# yaml-language-server: $schema=../../schemas/proc_cert_model_schema.json -$schema: cert_model_schema.json# -kind: certificate model -name: MockCertificateModel -long_name: Mock Certificate Model Long Name +$schema: proc_cert_model_schema.json# +kind: processor certificate model +name: MockProcessor +long_name: Mock Processor Certificate Model Long Name class: - $ref: certificate_class/MockCertificateClass.yaml# + $ref: proc_cert_class/MockProcessor.yaml# - # XLEN used by rakefile + # MXLEN used by rakefile base: 64 +in_scope_priv_modes: + - M + # Semantic versions within the model versions: - version: "1.0.0" @@ -26,13 +29,14 @@ revision_history: - Also created to test CRDs introduction: | - Mock CRD introduction: + Mock Certificate Model introduction: * Hello * Bob! # Specification versions -tsc_profile: null +tsc_profile_release: + $ref: profile_release/Mock.yaml# unpriv_isa_manual_revision: "20191213" priv_isa_manual_revision: "20190608-Priv-MSU-Ratified" debug_manual_revision: "0.13.2" @@ -45,7 +49,7 @@ extensions: note: Just added this note to I extension Xmock: presence: mandatory - parameters: + param_constraints: MOCK_ENUM_2_INTS: {} MOCK_ENUM_2_STRINGS: {} MOCK_BOOL_1: {} @@ -76,25 +80,27 @@ extensions: C: version: "~> 2.2" presence: mandatory - parameters: + param_constraints: MUTABLE_MISA_C: schema: const: false note: | Here's a multi-line note + for the C extension. + M: + presence: mandatory Zicsr: version: "~> 2.0" presence: mandatory Zicntr: version: "~> 2.0" presence: mandatory - parameters: + param_constraints: TIME_CSR_IMPLEMENTED: {} # Unconstrained Sm: version: "~> 1.11" presence: mandatory - parameters: + param_constraints: MTVEC_BASE_ALIGNMENT_DIRECT: {} # Unconstrained MTVEC_BASE_ALIGNMENT_VECTORED: {} # Unconstrained ARCH_ID: {} # Unconstrained @@ -158,54 +164,47 @@ extensions: Zicbop: presence: optional note: "Testing CACHE_BLOCK_SIZE parameter which is also defined by Zicbom." - parameters: + param_constraints: CACHE_BLOCK_SIZE: schema: const: 64 Zicbom: presence: optional note: "Testing CACHE_BLOCK_SIZE parameter which is also defined by Zicbop." - parameters: + param_constraints: CACHE_BLOCK_SIZE: schema: const: 64 - Zba: - presence: mandatory - version: "~> 1.0" - note: "Added these as mandatory to see if bug in profiles not listing instructions in appendix is here in CRD too." - Zbb: + B: presence: mandatory version: "~> 1.0" - note: "Added these as mandatory to see if bug in profiles not listing instructions in appendix is here in CRD too." - Zbs: - presence: mandatory - version: "~> 1.0" - note: "Added these as mandatory to see if bug in profiles not listing instructions in appendix is here in CRD too." + note: "Added this as mandatory to see if Zba, Zbb, and Zbs are included." requirement_groups: - - name: Req-Grp-Any-XLEN + any_xlen: + name: Req-Grp-Any-MXLEN description: | A bunch of additional requirements not associated with an extension. requirements: - - name: REQ-ANY-XLEN-001 + - name: REQ-ANY-MXLEN-001 description: Must pay your taxes on time - - name: REQ-ANY-XLEN-002 + - name: REQ-ANY-MXLEN-002 description: Don't count your chickens before they're hatched! - - - name: Req-Grp-XLEN32 + xlen32: + name: Req-Grp-XLEN32 when: xlen: 32 description: | - A bunch of additional requirements only that should show up for XLEN=32 + A bunch of additional requirements only that should show up for MXLEN=32 requirements: - name: REQ-XLEN32-001 description: Need lots of extra CSRs with `h` suffix - - - name: Req-Grp-XLEN64 + xlen64: + name: Req-Grp-XLEN64 when: xlen: 64 description: | - A bunch of additional requirements only that should show up for XLEN=64 + A bunch of additional requirements only that should show up for MXLEN=64 requirements: - name: REQ-XLEN64-001 description: Can avoid adding extra CSRs with `h` suffix diff --git a/arch/profile/MP-S-64.yaml b/arch/profile/MP-S-64.yaml index de2718e082..8311821ef9 100644 --- a/arch/profile/MP-S-64.yaml +++ b/arch/profile/MP-S-64.yaml @@ -7,7 +7,7 @@ marketing_name: MockProfile 64-bit S-mode description: This is the Mock Profile Supervisor Mode description. mode: S base: 64 -release: { $ref: profile_release/MockProfileRelease.yaml# } +release: { $ref: profile_release/Mock.yaml# } contributors: - name: Micky Mouse email: micky@disney.com @@ -34,7 +34,7 @@ extensions: Sv48: presence: optional: transitory - version: "= 1.11" + version: "= 1.12" note: Made this a transitory option Xmock: presence: mandatory diff --git a/arch/profile/MP-U-64.yaml b/arch/profile/MP-U-64.yaml index 3273c323bf..8d84a87270 100644 --- a/arch/profile/MP-U-64.yaml +++ b/arch/profile/MP-U-64.yaml @@ -4,7 +4,7 @@ name: MP-U-64 marketing_name: MockProfile 64-bit Unpriv mode: Unpriv base: 64 -release: { $ref: profile_release/MockProfileRelease.yaml# } +release: { $ref: profile_release/Mock.yaml# } extensions: A: presence: optional diff --git a/arch/profile/RVA20S64.yaml b/arch/profile/RVA20S64.yaml index 9ad4c02a21..02b650ad37 100644 --- a/arch/profile/RVA20S64.yaml +++ b/arch/profile/RVA20S64.yaml @@ -10,14 +10,14 @@ introduction: | supervisor-mode execution environment in 64-bit applications processors. RVA20S64 is based on privileged architecture version 1.11. extensions: - $inherits: "profile/RVI20U64.yaml#/extensions" + $inherits: "profile/RVA20U64.yaml#/extensions" U: presence: mandatory version: "~> 1.0" param_constraints: U_MODE_ENDIANNESS: schema: - const: little`` + const: little S: presence: mandatory version: "= 1.11" diff --git a/arch/profile/RVA22S64.yaml b/arch/profile/RVA22S64.yaml index e2de79e2ac..9a94c1682e 100644 --- a/arch/profile/RVA22S64.yaml +++ b/arch/profile/RVA22S64.yaml @@ -11,7 +11,9 @@ introduction: | processors. RVA22S64 is based on privileged architecture version 1.12. extensions: - $inherits: "profile/RVA20S64.yaml#/extensions" + $inherits: + - "profile/RVA20S64.yaml#/extensions" + - "profile/RVA22U64.yaml#/extensions" S: presence: mandatory version: "= 1.12" @@ -26,41 +28,9 @@ extensions: Svinval: presence: mandatory version: "~> 1.0" - Ssstateen: - presence: mandatory - version: "~> 1.0" - when: - implemented: H - note: | - Ssstateen is a new extension name introduced with RVA22. - Shvstvala: - presence: mandatory - version: "~> 1.0" - when: - implemented: H - note: | - Shvstvala is a new extension name introduced with RVA22. - Shtvala: - presence: mandatory - version: "~> 1.0" - when: - implemented: H - note: | - Shtvala is a new extension name introduced with RVA22. - Shvstvecd: - presence: mandatory - version: "~> 1.0" - when: - implemented: H - note: | - Shvstvecd is a new extension name introduced with RVA22. - Shgatpa: - presence: mandatory - version: "~> 1.0" - when: - implemented: H - note: | - Shgatpa is a new extension name introduced with RVA22. + Sv48: + presence: optional + version: "~> 1.12" Sv57: presence: optional version: "~> 1.12" diff --git a/arch/profile/RVA23M64.yaml b/arch/profile/RVA23M64.yaml new file mode 100644 index 0000000000..4ef7338aa9 --- /dev/null +++ b/arch/profile/RVA23M64.yaml @@ -0,0 +1,18 @@ +$schema: profile_schema.json# +kind: profile +name: RVA23M64 +marketing_name: RVA23M64 +mode: M +base: 64 +release: { $ref: profile_release/RVA23.yaml# } +introduction: | + The RVA23M64 profile specifies the ISA features available to machine-mode + execution environments in 64-bit applications processors. + + [NOTE] + The RVA23M64 profile is not a ratified profile by RISC-V International. + It only exists here to support certificates based on RVA23 Profile Release having M-mode extensions. +extensions: + $inherits: + - "profile/RVB23M64.yaml#/extensions" + - "profile/RVA23S64.yaml#/extensions" diff --git a/arch/profile/RVA23S64.yaml b/arch/profile/RVA23S64.yaml index 2484cafa92..17dbbf6a2f 100644 --- a/arch/profile/RVA23S64.yaml +++ b/arch/profile/RVA23S64.yaml @@ -14,7 +14,9 @@ extensions: ######################################################################### # imported from RVB23U64 ######################################################################### - $inherits: "profile/RVB23S64.yaml#/extensions" + $inherits: + - "profile/RVB23S64.yaml#/extensions" + - "profile/RVA23U64.yaml#/extensions" ######################################################################### # MANDATORY extensions in RVA23S64 (that were optional in RVB23S64) diff --git a/arch/profile/RVB23M64.yaml b/arch/profile/RVB23M64.yaml new file mode 100644 index 0000000000..4729a4ff12 --- /dev/null +++ b/arch/profile/RVB23M64.yaml @@ -0,0 +1,119 @@ +$schema: profile_schema.json# +kind: profile +name: RVB23M64 +marketing_name: RVB23M64 +mode: M +base: 64 +release: { $ref: profile_release/RVB23.yaml# } +introduction: | + The RVB23M64 profile specifies the ISA features available to machine-mode + execution environments in 64-bit applications processors. + + [NOTE] + The RVB23M64 profile is not a ratified profile by RISC-V International. + It only exists here to support certificates based on RVB23 Profile Release having M-mode extensions. +extensions: + $inherits: + - "profile/RVB23S64.yaml#/extensions" + + ######################################################################### + # MANDATORY extensions in RVB23 (and RVA23) + ######################################################################### + Sm: + version: "~> 1.13" + presence: mandatory + param_constraints: + MTVEC_BASE_ALIGNMENT_DIRECT: + schema: + const: 4 + MTVEC_BASE_ALIGNMENT_VECTORED: {} # Unconstrained + ARCH_ID: {} # Unconstrained + IMP_ID: {} # Unconstrained + VENDOR_ID_BANK: {} # Unconstrained + VENDOR_ID_OFFSET: {} # Unconstrained + MISA_CSR_IMPLEMENTED: {} # Unconstrained + MTVAL_WIDTH: {} # Unconstrained + MTVEC_MODES: + schema: + items: + enum: [0, 1] + PHYS_ADDR_WIDTH: {} # Unconstrained + PRECISE_SYNCHRONOUS_EXCEPTIONS: + schema: + const: true + TRAP_ON_ECALL_FROM_M: + schema: + const: true + TRAP_ON_EBREAK: + schema: + const: true + REPORT_VA_IN_MTVAL_ON_BREAKPOINT: + note: Not required when `ebreak` or `c.ebreak` instructions are executed. + schema: + const: true + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT: + schema: + const: true + REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT: + schema: + const: true + REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT: + schema: + const: true + REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION: + schema: + const: true + M_MODE_ENDIANESS: + schema: + const: little + # TODO: Uncomment when GitHub issue # is fixed. + #schema: + #- when: + # version: "=1.0.0" + # then: + # const: little + #- when: + # version: "=1.1.0" + # then: + # enum: [little, big] + XLEN: + schema: + const: 64 + CONFIG_PTR_ADDRESS: + schema: + const: 0xdeadbeef + note: "This parameter and its associated CSR shouldn't be here. See GitHub issue #53." + Smpmp: + version: "~> 1.13" + presence: mandatory + param_constraints: + NUM_PMP_ENTRIES: + schema: + minimum: 4 + PMP_GRANULARITY: + schema: + maximum: 12 + + ######################################################################### + # OPTIONAL LOCALIZED extensions in RVB23M64 + ######################################################################### + + # None + + ######################################################################### + # OPTIONAL DEVELOPMENT extensions in RVB23M64 + ######################################################################### + + # None + + ######################################################################### + # OPTIONAL EXPANSION extensions in RVB23M64 + ######################################################################### + + # None + + ######################################################################### + # OPTIONAL EXPANSION extensions in both RVB23M64 and RVA23M64 + ######################################################################### + + # None diff --git a/arch/profile/RVB23S64.yaml b/arch/profile/RVB23S64.yaml index 404096b7ae..daec5e7d31 100644 --- a/arch/profile/RVB23S64.yaml +++ b/arch/profile/RVB23S64.yaml @@ -14,7 +14,9 @@ extensions: ######################################################################### # imported from RVA22S64 ######################################################################### - $inherits: "profile/RVA22S64.yaml#/extensions" + $inherits: + - "profile/RVA22S64.yaml#/extensions" + - "profile/RVB23U64.yaml#/extensions" ######################################################################### # MANDATORY extensions in RVB23 (and RVA23) @@ -184,14 +186,14 @@ extensions: Sv48: presence: optional: expansion - version: "~>1.0" + version: "~>1.13" note: | Page-based 48-bit virtual-memory system Sv57: presence: optional: expansion - version: "~>1.0" + version: "~>1.13" note: | Page-based 57-bit virtual-memory system diff --git a/arch/profile/RVB23U64.yaml b/arch/profile/RVB23U64.yaml index a68a6da887..3cb1631ec4 100644 --- a/arch/profile/RVB23U64.yaml +++ b/arch/profile/RVB23U64.yaml @@ -157,7 +157,7 @@ extensions: version: "~>1.0" note: | Misaligned loads, stores, and AMOs to main memory regions that do not cross - Daaaa naturally aligned 16-byte boundary are atomic + a naturally aligned 16-byte boundary are atomic ######################################################################### # OPTIONAL EXPANSION extensions in RVB23 @@ -173,7 +173,7 @@ extensions: note: | Zfhmin is a small extension that adds support to load/store and convert IEEE 754 half-precision numbers to and from the IEEE 754 single-precision - format. The hardware cost for this extension is low, and mandating the + format. The hardware cost for this extension is low, and mandating the extension avoids adding an option to the profile. V: presence: @@ -199,7 +199,7 @@ extensions: optional: expansion version: "~>1.0" note: | - Vector basic bit-manipulation instructions + Vector data-independent execution latency Supm: presence: optional: expansion @@ -265,7 +265,7 @@ extensions: note: Vector carryless multiplication #-------------------------------------------- - # Ssstrict is an expansion option in RVB2U64 and RVA23U64 + # Ssstrict is an expansion option in RVB23U64 and RVA23U64 # (but is not intended to be made mandatory in future RVB or RVA Profiles) #-------------------------------------------- Ssstrict: @@ -273,7 +273,7 @@ extensions: optional: expansion version: "~>1.0" note: | - all opcodes in the Standard and Reserved opcode spaces (SROS), + All opcodes in the Standard and Reserved opcode spaces (SROS), other than those identified in a Profile as Mandatory or Optional, cause a trap. # should the above say "current or subsequent Profile" rather than just "Profile"? diff --git a/arch/profile/RVI20U32.yaml b/arch/profile/RVI20U32.yaml index 4a1e173434..f2e2ea4001 100644 --- a/arch/profile/RVI20U32.yaml +++ b/arch/profile/RVI20U32.yaml @@ -36,7 +36,7 @@ extensions: version: "= 2.1" C: presence: optional - version: "= 2.2" + version: "= 2.0" D: presence: optional version: "= 2.2" diff --git a/arch/profile_class/MockProfileClass.yaml b/arch/profile_class/Mock.yaml similarity index 96% rename from arch/profile_class/MockProfileClass.yaml rename to arch/profile_class/Mock.yaml index 36da53ffae..eb27909903 100644 --- a/arch/profile_class/MockProfileClass.yaml +++ b/arch/profile_class/Mock.yaml @@ -1,7 +1,7 @@ $schema: profile_class_schema.json# kind: profile class processor_kind: Microcontroller -name: MockProfileClass +name: Mock marketing_name: Mock Profile Class introduction: Here's the Mock Profile Class introduction. description: | diff --git a/arch/profile_release/MockProfileRelease.yaml b/arch/profile_release/Mock.yaml similarity index 86% rename from arch/profile_release/MockProfileRelease.yaml rename to arch/profile_release/Mock.yaml index 8c4c635436..3c6a6c775e 100644 --- a/arch/profile_release/MockProfileRelease.yaml +++ b/arch/profile_release/Mock.yaml @@ -1,8 +1,9 @@ $schema: profile_release_schema.json# kind: profile release -name: MockProfileRelease -marketing_name: MockProfileRelease Marketing Name -class: MockProfileClass +name: Mock +marketing_name: Mock Profile Release Marketing Name +class: + $ref: profile_class/Mock.yaml# release: 20 state: ratified # current status ["ratified", "development"] versions: diff --git a/arch/profile_release/RVA20.yaml b/arch/profile_release/RVA20.yaml index c524c091cd..59715da256 100644 --- a/arch/profile_release/RVA20.yaml +++ b/arch/profile_release/RVA20.yaml @@ -2,7 +2,8 @@ $schema: profile_release_schema.json# kind: profile release name: RVA20 marketing_name: RVA20 -class: RVA +class: + $ref: profile_class/RVA.yaml# release: 20 state: ratified # current status ["ratified", "development"] ratification_date: "2023-04-03" diff --git a/arch/profile_release/RVA22.yaml b/arch/profile_release/RVA22.yaml index 284ed4e78e..7a3350a15b 100644 --- a/arch/profile_release/RVA22.yaml +++ b/arch/profile_release/RVA22.yaml @@ -2,7 +2,8 @@ $schema: profile_release_schema.json# kind: profile release name: RVA22 marketing_name: RVA22 -class: RVA +class: + $ref: profile_class/RVA.yaml# release: 22 state: ratified # current status ["ratified", "development"] ratification_date: "2023-04-03" diff --git a/arch/profile_release/RVA23.yaml b/arch/profile_release/RVA23.yaml index 102ad13b31..a883d8a8b6 100644 --- a/arch/profile_release/RVA23.yaml +++ b/arch/profile_release/RVA23.yaml @@ -1,8 +1,9 @@ -$schema: profile_schema.json# -kind: profile +$schema: profile_release_schema.json# +kind: profile release name: RVA23 marketing_name: RVA23 -class: RVA +class: + $ref: profile_class/RVA.yaml# release: 23 state: ratified # current status ["ratified", "development"] ratification_date: "2023-04-03" diff --git a/arch/profile_release/RVB23.yaml b/arch/profile_release/RVB23.yaml index 98e453eac9..53eae651ac 100644 --- a/arch/profile_release/RVB23.yaml +++ b/arch/profile_release/RVB23.yaml @@ -1,8 +1,9 @@ -$schema: profile_schema.json# -kind: profile +$schema: profile_release_schema.json# +kind: profile release name: RVB23 marketing_name: RVB23 -class: RVB +class: + $ref: profile_class/RVB.yaml# release: 23 state: ratified # current status ["ratified", "development"] ratification_date: "2023-04-03" diff --git a/arch/profile_release/RVI20.yaml b/arch/profile_release/RVI20.yaml index 55a5a265dd..a1a283f031 100644 --- a/arch/profile_release/RVI20.yaml +++ b/arch/profile_release/RVI20.yaml @@ -2,8 +2,9 @@ $schema: profile_release_schema.json# kind: profile release name: RVI20 marketing_name: RVI20 -class: RVI -release: 20 +class: + $ref: profile_class/RVI.yaml# +base: null state: ratified # current status ["ratified", "development"] ratification_date: "2023-04-03" diff --git a/backends/certificate_doc/tasks.rake b/backends/certificate_doc/tasks.rake deleted file mode 100644 index 31766c0cd7..0000000000 --- a/backends/certificate_doc/tasks.rake +++ /dev/null @@ -1,148 +0,0 @@ -# frozen_string_literal: true - -require "pathname" - -require "asciidoctor-pdf" -require "asciidoctor-diagram" - -require_relative "#{$lib}/idl/passes/gen_adoc" - -CERT_DOC_DIR = Pathname.new "#{$root}/backends/certificate_doc" - -Dir.glob("#{$root}/arch/certificate_model/*.yaml") do |f| - cert_model_name = File.basename(f, ".yaml") - cert_model_obj = YAML.load_file(f, permitted_classes: [Date]) - cert_class_name = File.basename(cert_model_obj['class']['$ref'].split("#")[0], ".yaml") - raise "Ill-formed certificate model file #{f}: missing 'class' field" if cert_model_obj['class'].nil? - - base = cert_model_obj["base"] - raise "Missing certificate model base" if base.nil? - - file "#{$root}/gen/certificate_doc/adoc/#{cert_model_name}.adoc" => [ - "#{$root}/arch/certificate_model/#{cert_model_name}.yaml", - "#{$root}/arch/certificate_class/#{cert_class_name}.yaml", - "#{CERT_DOC_DIR}/templates/certificate.adoc.erb", - __FILE__ - ] do |t| - puts "UPDATE: Creating bootstrap objects for #{cert_model_name}" - - # Create bootstrap ConfiguredArchitecture object which also creates and contains - # a PartialConfig object for the rv32/rv64 configuration. - bootstrap_cfg_arch = cfg_arch_for("rv#{base}") - - # Creates CertModel object for every certificate model in the database - # using rv32/rv64 PartialConfig object and then returns named CertModel object. - bootstrap_cert_model = bootstrap_cfg_arch.cert_model(cert_model_name) - raise "No certificate model named '#{cert_model_name}'" if bootstrap_cert_model.nil? - - puts "UPDATE: Creating real objects for #{cert_model_name}" - - # Use bootstrap CertModel to create a ConfiguredArchitecture for this CertModel - # to use instead of the the bootstrap one created based on the rv32/rv64 configuration. - cfg_arch = bootstrap_cert_model.to_cfg_arch - - # Use model-specific ConfiguredArchitecture to create CertModel objects again - # for every certificate model in the database and then return named CertModel object. - cert_model = cfg_arch.cert_model(cert_model_name) - - # Set globals for ERB template. - portfolio = cert_model - cert_class = cert_model.cert_class - portfolio = cert_model - portfolio_class = cert_class - - version = File.basename(t.name, '.adoc').split('-')[1..].join('-') - - erb = ERB.new(File.read("#{CERT_DOC_DIR}/templates/certificate.adoc.erb"), trim_mode: "-") - erb.filename = "#{CERT_DOC_DIR}/templates/certificate.adoc.erb" - - FileUtils.mkdir_p File.dirname(t.name) - - # Convert ERB to final ASCIIDOC. Note that this code is broken up into separate function calls - # each with a variable name to aid in running a command-line debugger on this code. - erb_result = erb.result(binding) - erb_result_monospace_converted_to_links = cfg_arch.find_replace_links(erb_result) - erb_result_with_links_added = cfg_arch.find_replace_links(erb_result_monospace_converted_to_links) - erb_result_with_links_resolved = AsciidocUtils.resolve_links(erb_result_with_links_added) - - File.write t.name, erb_result_with_links_resolved - puts "Generated adoc source at #{t.name}" - end - - file "#{$root}/gen/certificate_doc/pdf/#{cert_model_name}.pdf" => [ - "#{$root}/gen/certificate_doc/adoc/#{cert_model_name}.adoc" - ] do |t| - adoc_file = "#{$root}/gen/certificate_doc/adoc/#{cert_model_name}.adoc" - FileUtils.mkdir_p File.dirname(t.name) - sh [ - "asciidoctor-pdf", - "-w", - "-v", - "-a toc", - "-a compress", - "-a pdf-theme=#{$root}/ext/docs-resources/themes/riscv-pdf.yml", - "-a pdf-fontsdir=#{$root}/ext/docs-resources/fonts", - "-a imagesdir=#{$root}/ext/docs-resources/images", - "-r asciidoctor-diagram", - "-r #{$root}/backends/ext_pdf_doc/idl_lexer", - "-o #{t.name}", - adoc_file - ].join(" ") - end - - file "#{$root}/gen/certificate_doc/html/#{cert_model_name}.html" => [ - "#{$root}/gen/certificate_doc/adoc/#{cert_model_name}.adoc" - ] do |t| - adoc_file = "#{$root}/gen/certificate_doc/adoc/#{cert_model_name}.adoc" - FileUtils.mkdir_p File.dirname(t.name) - sh [ - "asciidoctor", - "-w", - "-v", - "-a toc", - "-a imagesdir=#{$root}/ext/docs-resources/images", - "-b html5", - "-r asciidoctor-diagram", - "-r #{$root}/backends/ext_pdf_doc/idl_lexer", - "-o #{t.name}", - adoc_file - ].join(" ") - end - -end - -namespace :gen do - desc <<~DESC - Generate certificate documentation for a specific version as a PDF - - Required options: - cert_model_name - The key of the certification model under arch/certificate_model - DESC - task :cert_model_pdf, [:cert_model_name] do |_t, args| - if args[:cert_model_name].nil? - warn "Missing required option: 'cert_model_name'" - exit 1 - end - - unless File.exist?("#{$root}/arch/certificate_model/#{args[:cert_model_name]}.yaml") - warn "No certification model named '#{args[:cert_model_name]}' found in arch/certificate_model" - exit 1 - end - - Rake::Task["#{$root}/gen/certificate_doc/pdf/#{args[:cert_model_name]}.pdf"].invoke - end - - task :cert_model_html, [:cert_model_name] do |_t, args| - if args[:cert_model_name].nil? - warn "Missing required option: 'cert_model_name'" - exit 1 - end - - unless File.exist?("#{$root}/arch/certificate_model/#{args[:cert_model_name]}.yaml") - warn "No certification model named '#{args[:cert_model_name]}' found in arch/certificate_model" - exit 1 - end - - Rake::Task["#{$root}/gen/certificate_doc/html/#{args[:cert_model_name]}.html"].invoke - end -end diff --git a/backends/certificate_doc/templates/certificate.adoc.erb b/backends/certificate_doc/templates/certificate.adoc.erb deleted file mode 100644 index 75093f95fb..0000000000 --- a/backends/certificate_doc/templates/certificate.adoc.erb +++ /dev/null @@ -1,884 +0,0 @@ -// Number heading sections (e.g., 1.0, 1.1, etc.) -:sectnums: - -// Add a table of contents for HTML (and VSCode adoc preview) -:toc: left - -// Include headings up to 3 levels deep (don't know why 5 gives you this). -:toclevels: 5 - -// -// Stuff to generate nice wavedrom drawings of instruction and CSR fields -// -:wavedrom: <%= $root %>/node_modules/.bin/wavedrom-cli - -// TODO: needs to be changed -:imagesoutdir: images - -= <%= cert_model.name %> Processor Certification Requirements Document - -[Preface] -== Revision History - -History of documentation changes that eventually lead to releases. - -[cols="1,1,5"] -|=== -| Date | Revision | Changes - -<% cert_model.revision_history.each do |rev| -%> -| <%= rev.date %> -| <%= rev.revision %> -a| <% rev.changes.each do |change| %> -* <%= change %> -<% end -%> -<% end -%> -|=== - -[Preface] -== Typographic Conventions - -CSR field colors:: - -* Grey fields are reserved (WPRI) -* Green fields are present -* Red fields are defined by the RISC-V ISA but not present - -CSR field types:: - -[%autowidth] -|=== -| Abbreviation | Description - -<% CsrField::TYPE_DESC_MAP.each do |abbreviation, description| -%> -| <%= abbreviation %> -| <%= description %> -<% end -%> -|=== - -== Introduction - -<%= cert_model.introduction %> - -<%= cert_class.introduction %> - -=== What's a CRD? - -Certification Requirements Documents (CRDs) list requirements an implementation must meet -to obtain an associated RVI (RISC-V International) certificate. -CRDs are developed by the RVI CSC (Certification Steering Committee) organization in collaboration -with the RVI TSC (Technical Steering Committee) organization who creates RISC-V standards. - -The CRDs refer to and augment information provided in existing ratified RVI standards. - -There are a variety of certificates offered by RVI to accommodate the various RVI standards. -There are certificates for processors, non-processor system IP (e.g., IOMMU), -and system platforms (processor + system IP) hardware standards. -There are multiple classes of processor certificates available to accommodate the wide range of -RISC-V implementations from basic microcontrollers to advanced Applications-class processors. - -Each CRD has a list of mandatory behaviors along with a list of optional behaviors. -Note that not all behaviors allowed in RISC-V standards are supported by a particular CRD. - -=== CRD Naming Scheme - -CRDs have the following naming scheme: - - Format: [v] - -Where: - -* Left & right square braces denote optional. -* Less-than & greater-than signs just separate fields (i.e., they aren't present in the CRD name). -* identifies the type of RISC-V standard (processor, non-processor system IP, or platform) along with - any other information required to identify the variant of that standard. -* identifies a particular CRD release -** Format is [.[.]] -** Follows semantic versioning scheme (https://semver.org/) -** The release is updated when certification test changes are made that *could* cause a previously certified - implementation to now fail. - Examples are fixing a test bug, or increasing test coverage, or requiring a new version of a standard - A release of 0 is used for pre-release versions of a CRD and release versions start with 1. -** The release is updated when a CRD increases support for optional behaviors. - Examples are supporting for new optional standards or - supporting additional optional behaviors for standards already in a certificate. -** The release is updated when certification test changes are made that *can't* cause a previously certified - implementation to now fail. - Examples are test changes not designed to increase coverage or fixing a documentation typo. -** If omitted, defaults to v1.0.0 -** Examples: v1, v1.1, v2.3.1, 0.3.4 (pre-release) - -=== CRD Terminology - -.Requirement Types -[%autowidth] -|=== -| Term | Meaning - -| MANDATORY | You have to implement it to get a certificate and the certificate tests will cover it -| OPTIONAL | It's up to you if you implement or not. If you claim to implement it, certificate tests will cover it -| IN-SCOPE | Either MANDATORY or OPTIONAL -| OUT-OF-SCOPE | It's up to you if you implement or not. If you implement it, it won't be certified but make sure you don't mess up anything we are certifying. -| INCOMPATIBLE | If you implement it you won't get a certificate -|=== - -.Glossary -[%autowidth] -|=== -| Term | Meaning - -| CRD | Certification Requirements Document -| N/A | “Not Applicable” -| AKA | “Also Known As” -|=== - -=== Processor CRDs - -There are Processor CRDs for different classes of RISC-V processors. -These documents augment information in the related TSC Profile when available and/or other RVI standards documents -(e.g., Priv and Unpriv ISA manuals). -Only ratified extensions are candidates for certification. -This implies all custom extensions are also OUT-OF-SCOPE. - -==== Processor CRD Naming Scheme - -Processor CRD names have the following format: - - [<-base>] - -Where: - -* is MC for Microcontroller Class and AC for Apps-processor Class -* is 3-digit integer defined as follows: -** The hundreds's digit indicates the series -** The ten's digit identifies large differences in mandatory extensions (e.g., V, H) within the series -** The one's digit identifies small/medium differences in mandatory extensions (e.g., Zicond, PMP) within the series -* is optional and is 32 for RV32I, 64 for RV64I, and 32E for RV32E -** If a CRD supports multiple bases and is omitted in a reference, it applies to all supported bases -** If a CRD only supports one base then is generally omitted - -[%autowidth] -|=== -| CRD | TSC Profile | Description - -| MC100-series | TBD | 32/64-bit minimal microcontroller that runs low-level software on an RTOS or bare-metal (no virtual memory) -| MC200-series | TBD | 32/64-bit intermediate microcontroller -| MC300-series | TBD | 32/64-bit advanced microcontroller -| AC100-series | RVB23 | 64-bit Apps-processor running Bespoke rich operating systems (e.g., Yocto Linux) -| AC200-series | RVA23 | 64-bit Apps-processor running standard rich operating systems (e.g., commercial Linux distributions, Android) -|=== - -==== CSR Field Terminology - -.Definition of CSR Fields -[%autowidth] -|=== -| Field Type | Read Value After Writing Illegal Value | Read Value Function Of | Illegal Instruction Exception | Priv ISA Manual Quote - -| WLRL | Any deterministic legal or illegal value | Value before write and illegal value written | Optional -| Implementations are permitted but not required to raise an illegal-instruction exception if an instruction attempts to write a non-supported value to a WLRL field. Implementations can return arbitrary bit patterns on the read of a WLRL field when the last write was of an illegal value, but the value returned should deterministically depend on the illegal written value and the value of the field prior to the write. -| WARL | Any deterministic legal value | Any architectural hart state | Prohibited -| Implementations will not raise an exception on writes of unsupported values to a WARL field. Implementations can return any legal value on the read of a WARL field when the last write was of an illegal value, but the legal value returned should deterministically depend on the illegal written value and the architectural state of the hart. -| WPRI | 0 | Nothing | Not specified -| Some whole read/write fields are reserved for future use. Implementations that do not furnish these fields must make them read-only zero. -|=== - -*WARL (Write Anything, Read Legal)*: - -The Priv ISA requires reads of WARL fields to return some implementation-dependent deterministic legal value -after the field is written with an illegal value. -Certifying such behaviors is expensive and provides low value for a certificate since software can't rely -on a particular behavior from one implementation to another. - -Processor CRDs define writes to WARL fields of illegal values to be OUT-OF-SCOPE unless otherwise stated -(i.e., certification tests will only ever write legal values to WARL fields except for the special cases listed below). -When not OUT-OF-SCOPE, the required behavior is defined as this might be more constrained in implementations than -in the standard. - -The following special cases for WARL are supported when explicitly listed in the corresponding CRD CSR field requirements: - -1. Probing for Field Width - -* Some WARL fields are variable length such as the ASID field in the virtual memory extension. -* Here's the algorithm recommended to discover the ASID width: -** The number of implemented ASID bits, termed ASIDLEN, may be determined by writing one to every bit position in - the ASID field, then reading back the value in the satp CSR to see which bit positions in the ASID field hold a one. -* The RVCP-provided certification materials (certification tests, certification reference models) can map writes of - illegal values to the ASID field to the corresponding read value as long as they are provided the ASIDLEN value - for an implementation. - -2. Probing for Options - -* E.g., Writable misa bits - -3. Allowed values are a function of extension presence and/or their parameters - -* E.g., satp.mode legal write values - -*WLRL (Write Legal, Read Legal)*: - -The Priv ISA requires reads of WLRL fields to return some implementation-dependent deterministic arbitrary value -after the field is written with an illegal value. -Certifying such behaviors is expensive and provides low value for a certificate since software can't rely -on a particular behavior. -Processor CRDs define writes to WLRL fields of illegal values to be OUT-OF-SCOPE unless otherwise stated -(i.e., certification tests will only ever write legal values to WLRL fields). - -*WPRI (Write Preserve, Read Ignore)*: - -The Priv ISA requires reads of WPRI fields to return a value of 0. -Such WPRI fields are always unimplemented by definition. -Certification tests are aware of which fields in the CSRs are WPRI and normally write them with 0 but will -also write them with ~0 (all ones) and ensure that reads return 0 in both cases. -It is OUT-OF-SCOPE for certification tests to write all possible values of WPRI fields -(especially if they are more than just a few bits) and certification tests aren't designed to be comprehensive -verification test suites anyways. - -=== Related Specifications - -[cols="2,2,3,3,3"] -|=== -| Certificate Model | TSC Profile | Unpriv ISA Manual | Priv ISA Manual | Debug Manual - -| <%= cert_model.name %> -| <%= cert_model.tsc_profile.nil? ? "No profile" : cert_model.tsc_profile.marketing_name %> -| <%= cert_model.unpriv_isa_manual_revision %> -| <%= cert_model.priv_isa_manual_revision %> -| <%= cert_model.debug_manual_revision %> -|=== - -=== Privileged Modes - -|=== -| M | S | U | VS | VU - -| <% if cert_class.mandatory_priv_modes.include?('M') -%> MANDATORY <% else -%> OUT-OF-SCOPE <% end -%> -| <% if cert_class.mandatory_priv_modes.include?('S') -%> MANDATORY <% else -%> OUT-OF-SCOPE <% end -%> -| <% if cert_class.mandatory_priv_modes.include?('U') -%> MANDATORY <% else -%> OUT-OF-SCOPE <% end -%> -| <% if cert_class.mandatory_priv_modes.include?('VS') -%> MANDATORY <% else -%> OUT-OF-SCOPE <% end -%> -| <% if cert_class.mandatory_priv_modes.include?('VU') -%> MANDATORY <% else -%> OUT-OF-SCOPE <% end -%> - -|=== - -<<< -== Extensions - -Any RISC-V extensions not listed in this section are OUT-OF-SCOPE. -The <%= cert_model.name %> certificate doesn't cover their behaviors. - -<% ExtensionPresence.presence_types_obj.each do |presence_obj| -%> - -=== <%= presence_obj.to_s.capitalize %> Extensions - -<% ext_reqs = cert_model.in_scope_ext_reqs(presence_obj) -%> -<% if ext_reqs.empty? -%> -None -<% else -%> -[%autowidth] -|=== -| Requirement ID | Extension | Version | Long Name | Note - -<% ext_reqs.sort.each do |ext_req| -%> -<% ext = cfg_arch.extension(ext_req.name) -%> -| <%= ext_req.req_id %> -| <-def,<%= ext_req.name %>>> -| <%= ext_req.requirement_specs.map(&:to_s).join(", ") %> -| <%= ext.nil? ? "" : ext.long_name %> -| <%= ext_req.note.nil? ? "" : ext_req.note %> -<% end # each ext_req -%> -|=== -<% end # if empty ext_reqs -%> - -<% cert_model.extra_notes_for_presence(presence_obj)&.each do |extra_note| -%> -NOTE: <%= extra_note.text %> - -<% end # each extra_note -%> - -<% end # each possible presence -%> - -<% unless cert_model.recommendations.empty? -%> -=== Recommendations - -Recommendations are not strictly mandated but are included to guide implementers making design choices. - -<% cert_model.recommendations.each do |recommendation| -%> -<%= recommendation.text %> -<% end # each recommendation -%> -<% end # unless recommendations empty -%> - -<<< -== Implementation-dependencies - -RISC-V standards support many implementation-defined parameters. In many cases, there -are no names associated with these parameters. Names are defined in this section when -not provided in the associated standard. - -=== IN-SCOPE Parameters - -These implementation-dependent options defined by MANDATORY or OPTIONAL extensions are IN-SCOPE. -An implementation must abide by the "Allowed Value(s)" to obtain a certificate. -If the "Allowed Value(s)" is "Any" then any value allowed by the type is acceptable. - -<% if cert_model.all_in_scope_ext_params.empty? -%> -None -<% else -%> -[cols="4,2,1,1,2"] -|=== -| Parameter | Type | Allowed Value(s) | Extension(s) | Note - -<% cert_model.all_in_scope_ext_params.sort.each do |in_scope_ext_param| -%> -<% param = in_scope_ext_param.param -%> -<% exts = cert_model.all_in_scope_exts_with_param(param) -%> -| <%= param.name_potentially_with_link(exts) %> -| <%= param.schema_type %> -| <%= in_scope_ext_param.allowed_values %> -| <% exts.sort.each do |ext| -%><-param-<%= param.name %>-def,<%= ext.name %>>> <% end # do ext -%> -a| <%= in_scope_ext_param.note %> -<% end # do -%> -|=== -<% end # if table -%> - -=== OUT-OF-SCOPE Parameters - -These implementation-dependent options defined by MANDATORY or OPTIONAL extensions are OUT-OF-SCOPE. -There are no restrictions on their values for certification purposes because the certificate -doesn't cover the behavior of the associated RISC-V standard as a function of these parameters. - -<% if cert_model.all_out_of_scope_params.empty? -%> -None -<% else -%> -[%autowidth] -|=== -| Parameters | Type | Extension(s) - -<% cert_model.all_out_of_scope_params.sort.each do |param| -%> -<% exts = cert_model.all_in_scope_exts_without_param(param) -%> -| <%= param.name_potentially_with_link(exts) %> -| <%= param.schema_type %> -| <% exts.sort.each do |ext| -%><-param-<%= param.name %>-def,<%= ext.name %>>> <% end # do ext -%> - -<% end # do -%> -|=== -<% end # if table -%> - -== Traps - -RISC-V supports both synchronous exceptions and asynchronous interrupts. -TODO: List only traps that exist in this certificate model (currently lists all possible in present extensions). -See https://github.com/riscv-software-src/riscv-unified-db/issues/291 and https://github.com/riscv-software-src/riscv-unified-db/issues/324 -TODO: Show traps per privilege mode - -=== Synchronous Exceptions - -|=== -| `xcause.CODE` CSR Field Value | Name -<% cfg_arch.exception_codes.sort_by{ |code| code.num }.each do |code| -%> -| <%= code.num %> | <%= code.name %> -<% end -%> -|=== - -=== Asynchronous Interrupts - -|=== -| `xcause.CODE` CSR Field Value | Name -<% cfg_arch.interrupt_codes.sort_by{ |code| code.num }.each do |code| -%> -| <%= code.num %> | <%= code.name %> -<% end -%> -|=== - -== Instruction Summary - -TODO: List only instructions that exist in this certificate model. -Currently lists all possible in present extensions so the I extension is providing both RV32I and RV64I instructions. -See https://github.com/riscv-software-src/riscv-unified-db/issues/291 and https://github.com/riscv-software-src/riscv-unified-db/issues/324 - -<% - insts = cert_model.in_scope_extensions.map { |ext_cert_model| ext_cert_model.instructions }.flatten.uniq - insts.sort_by!(&:name) --%> - -[%autowidth] -|=== -| Name | Long Name - -<% portfolio.in_scope_instructions.each do |inst| -%> -| <%= link_to_inst(inst.name) %> -| <%= inst.long_name %> -<% end # do -%> -|=== - -== CSR Summary - -<% - csrs = cert_model.in_scope_ext_reqs.map { |ext_req| ext_req.csrs }.flatten.uniq --%> - -=== By Name - -[%autowidth] -|=== -| Name | Long Name | Address | Mode | Primary Extension - -<% csrs.sort_by!(&:name).each do |csr| -%> -| <-def,<%= csr.name %>>> -| <%= csr.long_name %> -| <%= "0x#{csr.address.to_s(16)}" %> -| <%= csr.priv_mode %> -| <%= csr.primary_defined_by %> -<% end # do -%> -|=== - -=== By Address - -[%autowidth] -|=== -| Address | Mode | Name | Long Name | Primary Extension - -<% csrs.sort_by!(&:address).each do |csr| -%> -| <%= "0x#{csr.address.to_s(16)}" %> -| <%= csr.priv_mode %> -| <-def,<%= csr.name %>>> -| <%= csr.long_name %> -| <%= csr.primary_defined_by %> -<% end # do -%> -|=== - -<% unless cert_model.requirement_groups.empty? -%> -== Additional Requirements - -This section contains requirements in addition to those already specified related to extensions and parameters. -These additional requirements are organized as groups of related requirements. - -<% cert_model.requirement_groups.each do |group| -%> -=== <%= group.name %> - -<%= group.description %> - -<% unless group.when.nil? -%> -[IMPORTANT] -<%= group.name %> requirements only apply when <%= group.when_pretty %>. -<% end -%> - -[%autowidth] -|=== -| Req Number | Description - -<% group.requirements.each do |req| -%> -| <%= req.name %> -a| <%= req.description %> -<% unless req.when.nil? -%> -[IMPORTANT] -Requirement <%= req.name %> only apply when <%= req.when_pretty %>. -<% end -%> -<% end -%> -|=== - -<% end -%> -<% end # unless requirement_groups.empty? -%> - -<<< -[appendix] -== Extension Details -<% cert_model.in_scope_ext_reqs.sort.each do |ext_req| -%> -<% ext = cfg_arch.extension(ext_req.name) -%> - -[[ext-<%= ext_req.name %>-def]] -=== Extension <%= ext_req.name %> + -<%= ext.nil? ? "" : "*Long Name*: " + ext.long_name + " +" %> - -*Version Requirement*: <%= ext_req.requirement_specs.map(&:to_s).join(", ") %> + - -<% ext.versions.each do |v| -%> -<%= v.version_spec %>:: - State::: - <%= v.state %> - <% if v.state == "ratified" -%> - Ratification date::: - <%= v.ratification_date %> - <% end # if %> - <% if v.changes.size > 0 -%> - Changes::: - - <% v.changes.each do |c| -%> - * <%= c %> - <% end -%> - - <% end -%> - <% unless v.url.nil? -%> - Ratification document::: - <%= v.url %> - <% end -%> - <% if v.implications.size > 0 -%> - Implies::: - <%= v.implications.each { |i| "* #{i[:ext_ver].name} (#{i[:ext_ver].version_spec}) #{i[:cond].empty? ? '' : i[:cond].to_asciidoc(join: ', ')}" }.join("\n* ") %> - <% end -%> -<% end -%> - -==== Synopsis - -:leveloffset: +3 - -<%= ext.description %> - -:leveloffset: -3 - -<% unless ext_req.note.nil? -%> -[NOTE] --- -<%= ext_req.note %> --- -<% end -%> - -// TODO: GitHub issue 92: Use version specified by each profile. -<% - insts = cfg_arch.instructions.select do |i| - i.defined_by_condition.satisfied_by? do |defining_ext_req| - cert_model.in_scope_ext_reqs.any? do |in_scope_ext_req| - in_scope_ext_req.satisfying_versions.any? { |ext_ver| defining_ext_req.satisfied_by?(ext_ver) } - end - end - end --%> -<% unless insts.empty? -%> -==== Instructions - -The following instructions are added by this extension: - -[cols="1,3"] -|=== -<% insts.sort.each do |inst| -%> -| <%= link_to_inst(inst.name) %> -| *<%= inst.long_name %>* -<% end -%> -|=== -<% end -%> - -<% unless cert_model.in_scope_ext_params(ext_req).empty? -%> -==== IN-SCOPE Parameters - -<% cert_model.in_scope_ext_params(ext_req).sort.each do |ext_param| -%> -[[ext-<%= ext_req.name %>-param-<%= ext_param.name %>-def]] -<%= ext_param.name %> ⇒ <%= ext_param.param.schema_type %>:: -+ --- -<%= ext_param.param.desc %> --- -<% end # do ext_param -%> -<% end # unless table -%> - -<% unless cert_model.out_of_scope_params(ext_req.name).empty? -%> -==== OUT-OF-SCOPE Parameters - -<% cert_model.out_of_scope_params(ext_req.name).sort.each do |param| -%> -[[ext-<%= ext_req.name %>-param-<%= param.name %>-def]] -<%= param.name %> ⇒ <%= param.schema_type %>:: -+ --- -<%= param.desc %> --- -<% end # do param -%> -<% end # unless table -%> -<% end # do ext_req -%> - -<<< -[appendix] -== Instruction Details - -<% portfolio.in_scope_instructions.each do |inst| -%> -<<< -<%= anchor_for_inst(inst.name) %> -=== <%= inst.name %> - -*<%= inst.long_name %>* - -This instruction is defined by: - -<%= inst.defined_by_condition.to_asciidoc %> - -==== Encoding - -<% if inst.multi_encoding? -%> -[NOTE] -This instruction has different encodings in RV32 and RV64. - -==== -RV32:: -+ -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump inst.wavedrom_desc(32) %> -.... - -RV64:: -+ -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump inst.wavedrom_desc(64) %> -.... -==== -<% else -%> -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump inst.wavedrom_desc(inst.base.nil? ? 32 : inst.base) %> -.... -<% end -%> - -==== Synopsis - -<%= inst.description %> - -==== Access -<% if cert_model.in_scope_extensions.any? { |e| e.name == "H" } -%> -[cols="^,^,^,^,^"] -<% else -%> -[cols="^,^,^"] -<% end -%> -|=== -| M | <% if cert_model.in_scope_extensions.any? { |e| e.name == "H" } -%>HS<% else -%>S<% end -%> | U <% if cert_model.in_scope_extensions.any? { |e| e.name == "H" } -%> | VS | VU <% end -%> - -| [.access-always]#Always# -| [.access-<%=inst.access['s']%>]#<%= inst.access['s'].capitalize %># -| [.access-<%=inst.access['u']%>]#<%= inst.access['u'].capitalize %># -<% if cert_model.in_scope_extensions.any? { |e| e.name == "H" } %> -| [.access-<%=inst.access['vs']%>]#<%= inst.access['vs'].capitalize %># -| [.access-<%=inst.access['vu']%>]#<%= inst.access['vu'].capitalize %># -<% end %> -|=== - -<% if inst.access_detail? -%> -<%= inst.access_detail %> -<% end -%> - -==== Decode Variables - -<% if inst.multi_encoding? -%> -==== -RV32:: -+ -[source.idl] ----- -<% inst.decode_variables(32).each do |d| -%> -<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; -<% end -%> ----- - -RV64:: -+ -[source,idl] ----- -<% inst.decode_variables(64).each do |d| -%> -<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; -<% end -%> ----- -==== -<% else -%> -[source,idl] ----- -<% inst.decode_variables(inst.base.nil? ? 32 : inst.base).each do |d| -%> -<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; -<% end -%> ----- -<% end -%> - -==== Execution - -<% xlens = inst.base.nil? ? [32, 64] : [inst.base] -%> - -<% if inst.key?("operation()") -%> -[source,idl,subs="specialchars,macros"] ----- -<%= inst.operation_ast.gen_adoc %> ----- -<% end -%> - -==== Exceptions - -<%- exception_list = inst.reachable_exceptions_str -%> -<%- if exception_list.empty? -%> -This instruction does not generate synchronous exceptions. -<%- else -%> -This instruction may result in the following synchronous exceptions: - - <%- exception_list.sort.each do |etype| -%> - * <%= etype %> - <%- end -%> - -<%- end -%> - - -<% end -%> - -<<< -[appendix] -== CSR Details - -<% - csrs = cert_model.in_scope_ext_reqs.map { |ext_req| ext_req.csrs }.flatten.uniq - csrs.sort_by!(&:name) --%> - -<% csrs.each do |csr| -%> -<<< -[[csr-<%= csr.name %>-def]] -=== <%= csr.name %> - -*<%= csr.long_name %>* - -<% unless csr.base.nil? -%> -[NOTE] --- -`<%= csr.name %>` is only defined in RV<%= csr.base %>. --- -<% end -%> - -<%= csr.description %> - -==== Attributes -[%autowidth] -|=== -h| CSR Address | <%= "0x#{csr.address.to_s(16)}" %> -<% if csr.priv_mode == 'VS' -%> -h| Virtual CSR Address | <%= "0x#{csr.virtual_address.to_s(16)}" %> -<% end -%> -h| Defining extension a| <%= csr.defined_by_condition.to_asciidoc %> -<% if csr.dynamic_length? -%> -h| Length | <%= csr.length_pretty %> -<% else -%> -h| Length | <%= csr.length_pretty %> -<% end -%> -h| Privilege Mode | <%= csr.priv_mode %> -|=== - - -==== Format -<% unless csr.dynamic_length? || csr.possible_fields.any? { |f| f.dynamic_location? } -%> -<%# CSR has a known static length, so there is only one format to display -%> -.<%= csr.name %> format -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump csr.wavedrom_desc(cfg_arch, csr.base.nil? ? 32 : csr.base, optional_type: 2) %> -.... -<% else -%> -<%# CSR has a dynamic length, or a field has a dynamic location, - so there is more than one format to display -%> -This CSR format changes dynamically with XLEN. - -.<%= csr.name %> Format when <%= csr.length_cond32 %> -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump csr.wavedrom_desc(cfg_arch, 32, optional_type: 2) %> -.... - -.<%= csr.name %> Format when <%= csr.length_cond64 %> -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump csr.wavedrom_desc(cfg_arch, 64, optional_type: 2) %> -.... - - -<% end # unless dynamic length -%> - -==== Field Summary - -// use @ as a separator since IDL code can contain | -[%autowidth,separator=@,float="center",align="center",cols="^,<,<,<",options="header",role="stretch"] -|=== -@ Name @ Location @ Type @ Reset Value - -<%- csr.possible_fields.each do |field| -%> -@ xref:<%=csr.name%>-<%=field.name%>-def[`<%= field.name %>`] -a@ -<%- if field.dynamic_location? -%> - -[when,"<%= field.location_cond32 %>"] --- -<%= field.location_pretty(32) %> --- - -[when,"<%= field.location_cond64 %>"] --- -<%= field.location_pretty(64) %> --- - -<%- else -%> -<%= field.location_pretty %> -<%- end -%> -a@ - --- -<%= field.type_pretty %> --- - -a@ - --- -<%= field.reset_value_pretty %> --- - -<%- end -%> -|=== - -==== Fields - -<%- if csr.possible_fields.empty? -%> -This CSR has no fields. However, it must still exist (not cause an `Illegal Instruction` trap) and always return zero on a read. -<%- else -%> - -<%- csr.possible_fields.each do |field| -%> -[[<%=csr.name%>-<%=field.name%>-def]] -===== `<%= field.name %>` - -<%- if !field.defined_in_all_bases? -%> -IMPORTANT: <%= field.name %> is only defined in <%= field.base32_only? ? "RV32" : "RV64" %> (`<%= field.base32_only? ? field.location_cond32 : field.location_cond64 %>`) -<%- end -%> - -**** -Location:: -<%= field.location_pretty %> - -Description:: -<%= field.description.gsub("\n", " +\n") %> - -Type:: -<%= field.type_pretty %> - -Reset value:: -<%= field.reset_value_pretty %> - -**** - -<%- end -%> -<%- end -%> - -<%- if csr.possible_fields.map(&:has_custom_sw_write?).any? -%> -==== Software write - -This CSR may store a value that is different from what software attempts to write. - -When a software write occurs (_e.g._, through `csrrw`), the following determines the -written value: - -[idl] ----- -<%- csr.possible_fields.each do |field| -%> -<%- if field.has_custom_sw_write? -%> -<%= field.name %> = <%= field["sw_write(csr_value)"] %> -<%- else -%> -<%= field.name %> = csr_value.<%= field.name %> -<%- end -%> -<%- end -%> ----- -<%- end -%> - -<%- if csr.has_custom_sw_read? -%> -==== Software read - -This CSR may return a value that is different from what is stored in hardware. - -[source,idl,subs="specialchars,macros"] ----- -<%= csr.sw_read_ast(cfg_arch.symtab).gen_adoc %> ----- -<%- end -%> - -<% end # do csrs -%> diff --git a/backends/cfg_html_doc/adoc_gen.rake b/backends/cfg_html_doc/adoc_gen.rake index 61effb3d12..116ed479d5 100644 --- a/backends/cfg_html_doc/adoc_gen.rake +++ b/backends/cfg_html_doc/adoc_gen.rake @@ -29,14 +29,14 @@ require "ruby-prof" cfg_arch.transitive_implemented_csrs.each do |csr| path = dir_path / "#{csr.name}.adoc" puts " Generating #{path}" - File.write(path, cfg_arch.find_replace_links(erb.result(binding))) + File.write(path, cfg_arch.convert_monospace_to_links(erb.result(binding))) end when "inst" cfg_arch.transitive_implemented_instructions.each do |inst| path = dir_path / "#{inst.name}.adoc" puts " Generating #{path}" # RubyProf.start - File.write(path, cfg_arch.find_replace_links(erb.result(binding))) + File.write(path, cfg_arch.convert_monospace_to_links(erb.result(binding))) # result = RubyProf.stop # RubyProf::FlatPrinter.new(result).print(STDOUT) end @@ -45,13 +45,13 @@ require "ruby-prof" ext = cfg_arch.extension(ext_version.name) path = dir_path / "#{ext.name}.adoc" puts " Generating #{path}" - File.write(path, cfg_arch.find_replace_links(erb.result(binding))) + File.write(path, cfg_arch.convert_monospace_to_links(erb.result(binding))) end when "func" global_symtab = cfg_arch.symtab path = dir_path / "funcs.adoc" puts " Generating #{path}" - File.write(path, cfg_arch.find_replace_links(erb.result(binding))) + File.write(path, cfg_arch.convert_monospace_to_links(erb.result(binding))) else raise "todo" end @@ -106,7 +106,7 @@ require "ruby-prof" raise "Unsupported type" end - File.write t.name, cfg_arch.find_replace_links(lines.join("\n")) + File.write t.name, cfg_arch.convert_monospace_to_links(lines.join("\n")) end end diff --git a/backends/cfg_html_doc/html_gen.rake b/backends/cfg_html_doc/html_gen.rake index 1a2534fa24..908da1ec46 100644 --- a/backends/cfg_html_doc/html_gen.rake +++ b/backends/cfg_html_doc/html_gen.rake @@ -1,40 +1,6 @@ # frozen_string_literal: true -# Utilities for generating an Antora site out of an architecture def -module AntoraUtils - class << self - def resolve_links(path_or_str) - str = - if path_or_str.is_a?(Pathname) - path_or_str.read - else - path_or_str - end - str.gsub(/%%LINK%([^;%]+)\s*;\s*([^;%]+)\s*;\s*([^%]+)%%/) do - type = Regexp.last_match[1] - name = Regexp.last_match[2] - link_text = Regexp.last_match[3] - - case type - when "inst" - "xref:insts:#{name}.adoc##{name}-def[#{link_text.gsub(']', '\]')}]" - when "csr" - "xref:csrs:#{name}.adoc##{name}-def[#{link_text.gsub(']', '\]')}]" - when "csr_field" - csr_name, field_name = name.split('.') - "xref:csrs:#{csr_name}.adoc##{csr_name}-#{field_name}-def[#{link_text.gsub(']', '\]')}]" - when "ext" - "xref:exts:#{name}.adoc##{name}-def[#{link_text.gsub(']', '\]')}]" - when "func" - "xref:funcs:funcs.adoc##{name}-func-def[#{link_text.gsub(']', '\]')}]" - else - raise "Unhandled link type '#{type}' for '#{name}' #{match.captures}" - end - end - end - end -end - +# fill out templates for every csr, inst, ext, and func ["csr", "inst", "ext", "func"].each do |type| rule %r{#{$root}/gen/cfg_html_doc/.*/antora/modules/#{type}s/pages/.*\.adoc} => proc { |tname| config_name = Pathname.new(tname).relative_path_from("#{$root}/gen/cfg_html_doc").to_s.split("/")[0] @@ -86,7 +52,7 @@ rule %r{#{$root}/gen/cfg_html_doc/.*/antora/modules/ROOT/pages/config.adoc} => p cfg_arch = cfg_arch_for(config_name) FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AntoraUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + File.write t.name, AntoraUtils.resolve_links(cfg_arch.convert_monospace_to_links(erb.result(binding))) end rule %r{#{$root}/gen/cfg_html_doc/.*/antora/modules/ROOT/pages/landing.adoc} => proc { |tname| @@ -100,7 +66,7 @@ rule %r{#{$root}/gen/cfg_html_doc/.*/antora/modules/ROOT/pages/landing.adoc} => cfg_arch = cfg_arch_for(config_name) FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AntoraUtils.resolve_links(cfg_arch.find_replace_links(File.read(t.prerequisites[0]))) + File.write t.name, AntoraUtils.resolve_links(cfg_arch.convert_monospace_to_links(File.read(t.prerequisites[0]))) end rule %r{#{$root}/gen/cfg_html_doc/.*/antora/antora.yml} => proc { |tname| diff --git a/backends/cfg_html_doc/templates/csr.adoc.erb b/backends/cfg_html_doc/templates/csr.adoc.erb index 860d60a153..2c80bbed87 100644 --- a/backends/cfg_html_doc/templates/csr.adoc.erb +++ b/backends/cfg_html_doc/templates/csr.adoc.erb @@ -15,7 +15,7 @@ h| CSR Address | <%= "0x#{csr.address.to_s(16)}" %> h| Virtual CSR Address | <%= "0x#{csr.virtual_address.to_s(16)}" %> <%- end -%> h| Defining extension a| <%= csr.defined_by_condition.to_asciidoc %> -h| Length | <%= csr.length_pretty() %> +h| Length | <%= csr.length_pretty %> h| Privilege Mode | <%= csr.priv_mode %> |=== diff --git a/backends/cfg_html_doc/templates/ext.adoc.erb b/backends/cfg_html_doc/templates/ext.adoc.erb index b4866ed92a..f5728062c7 100644 --- a/backends/cfg_html_doc/templates/ext.adoc.erb +++ b/backends/cfg_html_doc/templates/ext.adoc.erb @@ -40,7 +40,7 @@ Implemented Version:: <%= ext_version.version_str %> <%- unless insts.empty? -%> == Instructions -The following instructions are added by this extension in the <%= ext.cfg_arch.name %> configuration: +The following instructions are added by this extension in the <%= cfg_arch.name %> configuration: [cols="1,3"] |=== diff --git a/backends/cfg_html_doc/templates/inst.adoc.erb b/backends/cfg_html_doc/templates/inst.adoc.erb index b10d282d7e..f0d569cbf5 100644 --- a/backends/cfg_html_doc/templates/inst.adoc.erb +++ b/backends/cfg_html_doc/templates/inst.adoc.erb @@ -1,6 +1,6 @@ :tabs-sync-option: -[[inst:<%=inst.name.gsub('.', '_')%>-def]] +<%= anchor_for_udb_doc_inst(inst.name) %> = <%= inst.name %> *<%= inst.long_name %>* diff --git a/backends/cfg_html_doc/templates/toc.adoc.erb b/backends/cfg_html_doc/templates/toc.adoc.erb index 445d0a5c61..f605e0f339 100644 --- a/backends/cfg_html_doc/templates/toc.adoc.erb +++ b/backends/cfg_html_doc/templates/toc.adoc.erb @@ -7,12 +7,12 @@ .Control and Status Registers <%- cfg_arch.transitive_implemented_csrs.sort { |a, b| a.name <=> b.name }.each do |csr| -%> -* %%LINK%csr;<%= csr.name %>;<%= csr.name %>%% +* %%UDB_DOC_LINK%csr;<%= csr.name %>;<%= csr.name %>%% <%- end -%> .Instructions <%- cfg_arch.transitive_implemented_instructions.sort { |a, b| a.name <=> b.name }.each do |inst| -%> -* %%LINK%inst;<%= inst.name %>;<%= inst.name %>%% +* %%UDB_DOC_LINK%inst;<%= inst.name %>;<%= inst.name %>%% <%- end -%> .IDL functions diff --git a/backends/common_templates/adoc/csr.adoc.erb b/backends/common_templates/adoc/csr.adoc.erb index 13d57b3362..5dcf616132 100644 --- a/backends/common_templates/adoc/csr.adoc.erb +++ b/backends/common_templates/adoc/csr.adoc.erb @@ -1,4 +1,4 @@ -<%= anchor_for_csr(csr.name) %> +<%= anchor_for_udb_doc_csr(csr.name) %> = <%= csr.name %> *<%= csr.long_name %>* @@ -13,7 +13,7 @@ h| CSR Address | <%= "0x#{csr.address.to_s(16)}" %> <%- if csr.priv_mode == 'VS' -%> h| Virtual CSR Address | <%= "0x#{csr.virtual_address.to_s(16)}" %> <%- end -%> -h| Length | <%= csr.length_pretty(cfg_arch) %> +h| Length | <%= csr.length_pretty %> h| Privilege Mode | <%= csr.priv_mode %> |=== @@ -50,7 +50,7 @@ This CSR format changes dynamically. @Name @ Location @ Type @ Reset Value <%- csr.fields.each do |field| -%> -@ <%= link_to_csr_field(csr.name, field.name) %> +@ <%= link_to_udb_doc_csr_field(csr.name, field.name) %> @ <%= field.location_pretty %> @ <%= field.type_pretty %> @ <%= field.reset_value_pretty %> diff --git a/backends/common_templates/adoc/inst.adoc.erb b/backends/common_templates/adoc/inst.adoc.erb index 82df0c3a3c..c4403686a7 100644 --- a/backends/common_templates/adoc/inst.adoc.erb +++ b/backends/common_templates/adoc/inst.adoc.erb @@ -11,7 +11,7 @@ end %> -<%= anchor_for_inst(inst.name) %> +<%= anchor_for_udb_doc_inst(inst.name) %> = <%= inst.name %> Synopsis:: diff --git a/backends/cpp_hart_gen/cpp/include/udb/config_validator.hpp b/backends/cpp_hart_gen/cpp/include/udb/config_validator.hpp index 1c8e1acc7c..cfd5fa0e3e 100644 --- a/backends/cpp_hart_gen/cpp/include/udb/config_validator.hpp +++ b/backends/cpp_hart_gen/cpp/include/udb/config_validator.hpp @@ -44,7 +44,7 @@ namespace udb { auto default_patch = validator.validate(json); return json.patch(default_patch); } catch (const std::exception& e) { - throw std::runtime_error("Config validation failed: " + + throw std::runtime_error("AbstractConfig validation failed: " + std::string(e.what())); } } diff --git a/backends/cpp_hart_gen/tasks.rake b/backends/cpp_hart_gen/tasks.rake index 1b8e44a816..82ff88c3b3 100644 --- a/backends/cpp_hart_gen/tasks.rake +++ b/backends/cpp_hart_gen/tasks.rake @@ -105,7 +105,7 @@ rule %r{#{CPP_HART_GEN_DST}/.*/include/udb/cfgs/[^/]+/[^/]+\.h(xx)?\.unformatted "#{CPP_HART_GEN_SRC}/lib/gen_cpp.rb", "#{$root}/lib/idl/passes/prune.rb", "#{CPP_HART_GEN_SRC}/lib/template_helpers.rb", - "#{CPP_HART_GEN_SRC}/lib/csr_template_helpers.rb", + "#{CPP_HART_GEN_SRC}/lib/csr_backend_helpers.rb", __FILE__ ] } do |t| @@ -139,7 +139,7 @@ rule %r{#{CPP_HART_GEN_DST}/.*/src/cfgs/[^/]+/[^/]+\.cxx\.unformatted$} => proc "#{CPP_HART_GEN_SRC}/lib/gen_cpp.rb", "#{$root}/lib/idl/passes/prune.rb", "#{CPP_HART_GEN_SRC}/lib/template_helpers.rb", - "#{CPP_HART_GEN_SRC}/lib/csr_template_helpers.rb", + "#{CPP_HART_GEN_SRC}/lib/csr_backend_helpers.rb", __FILE__ ] } do |t| diff --git a/backends/ext_pdf_doc/tasks.rake b/backends/ext_pdf_doc/tasks.rake index 0ae83d56d2..99ef981d91 100644 --- a/backends/ext_pdf_doc/tasks.rake +++ b/backends/ext_pdf_doc/tasks.rake @@ -9,44 +9,6 @@ require_relative "#{$lib}/idl/passes/gen_adoc" EXT_PDF_DOC_DIR = Pathname.new "#{$root}/backends/ext_pdf_doc" -# Utilities for generating an Antora site out of an architecture def -module AsciidocUtils - class << self - def resolve_links(path_or_str) - str = - if path_or_str.is_a?(Pathname) - path_or_str.read - else - path_or_str - end - str.gsub(/%%LINK%([^;%]+)\s*;\s*([^;%]+)\s*;\s*([^%]+)%%/) do - type = Regexp.last_match[1] - name = Regexp.last_match[2] - link_text = Regexp.last_match[3] - - case type - when "inst" - "xref:#inst-#{name.gsub('.', '_')}-def[#{link_text.gsub(']', '\]')}]" - when "csr" - "xref:#csr-#{name}-def[#{link_text.gsub(']', '\]')}]" - when "csr_field" - csr_name, field_name = name.split('.') - # "xref:csrs:#{csr_name}.adoc##{csr_name}-#{field_name}-def[#{link_text.gsub(']', '\]')}]" - link_text - when "ext" - # "xref:exts:#{name}.adoc##{name}-def[#{link_text.gsub(']', '\]')}]" - link_text - when "func" - # "xref:funcs:funcs.adoc##{name}-func-def[#{link_text.gsub(']', '\]')}]" - link_text - else - raise "Unhandled link type '#{type}' for '#{name}' #{match.captures}" - end - end - end - end -end - file "#{$root}/ext/docs-resources/themes/riscv-pdf.yml" => "#{$root}/.gitmodules" do |t| system "git submodule update --init ext/docs-resources" end @@ -114,7 +76,7 @@ rule %r{#{$root}/gen/ext_pdf_doc/.*/adoc/.*_extension\.adoc} => proc { |tname| config_name = Pathname.new(tname).relative_path_from("#{$root}/gen/ext_pdf_doc").to_s.split("/")[0] arch_yaml_paths = Dir.glob("#{$root}/arch/**/*.yaml") cfg_path = $root / "gen" / "ext_pdf_doc" / "#{config_name}.yaml" - cfg = Config.create(cfg_path) + cfg = FileConfig.create(cfg_path) arch_yaml_paths += Dir.glob("#{cfg.arch_overlay_abs}/**/*.yaml") unless cfg.arch_overlay.nil? [ (EXT_PDF_DOC_DIR / "templates" / "ext_pdf.adoc.erb").to_s, @@ -150,7 +112,7 @@ rule %r{#{$root}/gen/ext_pdf_doc/.*/adoc/.*_extension\.adoc} => proc { |tname| max_version = versions.max { |a, b| a.version <=> b.version } FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AsciidocUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + File.write t.name, AsciidocUtils.resolve_links(cfg_arch.convert_monospace_to_links(erb.result(binding))) end namespace :gen do diff --git a/backends/ext_pdf_doc/templates/ext_pdf.adoc.erb b/backends/ext_pdf_doc/templates/ext_pdf.adoc.erb index 2a67bb9937..2b22253f56 100644 --- a/backends/ext_pdf_doc/templates/ext_pdf.adoc.erb +++ b/backends/ext_pdf_doc/templates/ext_pdf.adoc.erb @@ -309,7 +309,7 @@ The following <%= csr_list.size %> CSRs are affected by this extension. <%- ext.csrs.each do |csr| -%> <<< :leveloffset: +2 -<%= partial "adoc/csr.adoc.erb", { csr: csr, cfg_arch: cfg_arch } %> +<%= partial "common_templates/adoc/csr.adoc.erb", { csr: csr, cfg_arch: cfg_arch } %> :leveloffset: -2 <%- end -%> @@ -322,7 +322,7 @@ The following <%= csr_list.size %> CSRs are affected by this extension. <%- ext.instructions.each do |i| -%> :leveloffset: +2 -<%= partial "adoc/inst.adoc.erb", { inst: i, cfg_arch: cfg_arch } %> +<%= partial "common_templates/adoc/inst.adoc.erb", { inst: i, cfg_arch: cfg_arch } %> :leveloffset: -2 <<< diff --git a/backends/instructions_appendix/tasks.rake b/backends/instructions_appendix/tasks.rake index 8252e026e8..5241fff137 100755 --- a/backends/instructions_appendix/tasks.rake +++ b/backends/instructions_appendix/tasks.rake @@ -30,7 +30,7 @@ file MERGED_INSTRUCTIONS_FILE.to_s => [__FILE__, TEMPLATE_FILE.to_s] do |t| FileUtils.mkdir_p(File.dirname(t.name)) File.write( t.name, - AntoraUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + AntoraUtils.resolve_links(cfg_arch.convert_monospace_to_links(erb.result(binding))) ) end diff --git a/backends/instructions_appendix/templates/instructions.adoc.erb b/backends/instructions_appendix/templates/instructions.adoc.erb index 3a77a379c7..07ecee19c4 100755 --- a/backends/instructions_appendix/templates/instructions.adoc.erb +++ b/backends/instructions_appendix/templates/instructions.adoc.erb @@ -4,7 +4,7 @@ // Now the document header is complete and the wavedrom attribute is active. <% instructions.sort_by(&:name).each do |inst| %> -<%= anchor_for_inst(inst.name) %> +<%= anchor_for_udb_doc_inst(inst.name) %> == <%= inst.name %> Synopsis:: diff --git a/backends/isa_explorer/csr_table.html b/backends/isa_explorer/csr_table.html new file mode 100644 index 0000000000..3f2cf0cc1a --- /dev/null +++ b/backends/isa_explorer/csr_table.html @@ -0,0 +1,13 @@ + + + + + RISC-V ISA CSR Explorer + + + +
+ + + + diff --git a/backends/isa_explorer/ext_table.html b/backends/isa_explorer/ext_table.html new file mode 100644 index 0000000000..52bb0d23d1 --- /dev/null +++ b/backends/isa_explorer/ext_table.html @@ -0,0 +1,13 @@ + + + + + RISC-V ISA Extension Explorer + + + +
+ + + + diff --git a/backends/isa_explorer/inst_table.html b/backends/isa_explorer/inst_table.html new file mode 100644 index 0000000000..f4547026b5 --- /dev/null +++ b/backends/isa_explorer/inst_table.html @@ -0,0 +1,13 @@ + + + + + RISC-V ISA Instruction Explorer + + + +
+ + + + diff --git a/backends/isa_explorer/isa_explorer.rb b/backends/isa_explorer/isa_explorer.rb new file mode 100644 index 0000000000..e8ef266147 --- /dev/null +++ b/backends/isa_explorer/isa_explorer.rb @@ -0,0 +1,419 @@ +# frozen_string_literal: true +# +# Generate + +require "write_xlsx" +require_relative $root / "lib" / "architecture" + +# @param presence [String] Can be nil +# @return [String] m=mandatory, o=optional, n=not present +def presence2char(presence) + raise ArgumentError, "Expecting String but got class #{presence}" unless presence.is_a?(String) + + if presence == Presence.mandatory + "m" + elsif presence == Presence.optional + "o" + elsif presence == '-' + "n" + else + raise ArgumentError, "Unknown presence of #{presence}" + end +end + +# @param arch [Architecture] The entire RISC-V architecture +# @return [Hash] Extension table data +def arch2ext_table(arch) + raise ArgumentError, "arch is a #{arch.class} class but needs to be Architecture" unless arch.is_a?(Architecture) + + sorted_profile_releases = get_sorted_profile_releases(arch) + + ext_table = { + # Array of hashes + "columns" => [ + {name: "Extension Name", formatter: "link", sorter: "alphanum", headerFilter: true, frozen: true, formatterParams: + { + labelField:"Extension Name", + urlPrefix: "https://risc-v-certification-steering-committee.github.io/riscv-unified-db/manual/html/isa/isa_20240411/exts/" + } + }, + {name: "Description", formatter: "textarea", sorter: "alphanum", headerFilter: true}, + {name: "IC", formatter: "textarea", sorter: "alphanum", headerFilter: true}, + {name: "Extensions\nIncluded\n(subsets)", formatter: "textarea", sorter: "alphanum"}, + {name: "Implied By\n(and\ntransitives)", formatter: "textarea", sorter: "alphanum"}, + {name: "Incompatible\n(and\ntransitives)", formatter: "textarea", sorter: "alphanum"}, + {name: "Ratified", formatter: "textarea", sorter: "boolean", headerFilter: true}, + {name: "Ratification\nDate", formatter: "textarea", sorter: "alphanum", headerFilter: true}, + sorted_profile_releases.map do |pr| + {name: "#{pr.name}", formatter: "textarea", sorter: "alphanum", headerFilter: true} + end + ].flatten, + + # Will eventually be an array containing arrays. + "rows" => [] + } + + arch.extensions.sort_by!(&:name).each do |ext| + row = [ + ext.name, + ext.long_name, + ext.compact_priv_type, + "UDB Missing", + # See https://github.com/riscv-software-src/riscv-unified-db/issues/597 for the next 2 columns. + ext.max_version.implied_by.map(&:name), + # ext.max_version.transitive_conflicts.map(&:name), + "UDB MISSING", + ext.ratified, + if ext.ratified + if ext.min_ratified_version.ratification_date.nil? || ext.min_ratified_version.ratification_date.empty? + "UDB MISSING" + else + ext.min_ratified_version.ratification_date + end + else + "" + end + ] + + sorted_profile_releases.each do |pr| + row.append(presence2char(pr.extension_presence(ext.name))) + end + + ext_table["rows"].append(row) + end + + return ext_table +end + +# @param arch [Architecture] The entire RISC-V architecture +# @return [Hash] Instruction table data +def arch2inst_table(arch) + raise ArgumentError, "arch is a #{arch.class} class but needs to be Architecture" unless arch.is_a?(Architecture) + + sorted_profile_releases = get_sorted_profile_releases(arch) + + inst_table = { + # Array of hashes + "columns" => [ + {name: "Instruction Name", formatter: "link", sorter: "alphanum", headerFilter: true, frozen: true, formatterParams: + { + labelField:"Instruction Name", + urlPrefix: "https://risc-v-certification-steering-committee.github.io/riscv-unified-db/manual/html/isa/isa_20240411/insts/" + } + }, + {name: "Description", formatter: "textarea", sorter: "alphanum", headerFilter: true}, + {name: "Assembly", formatter: "textarea", sorter: "alphanum", headerFilter: true}, + sorted_profile_releases.map do |pr| + {name: "#{pr.name}", formatter: "textarea", sorter: "alphanum", headerFilter: true} + end + ].flatten, + + # Will eventually be an array containing arrays. + "rows" => [] + } + + insts = arch.instructions.sort_by!(&:name) + progressbar = ProgressBar.create(title: "Instruction Table", total: insts.size) + + insts.each do |inst| + progressbar.increment + + row = [ + inst.name, + inst.long_name, + inst.name + " " + inst.assembly.gsub('x', 'r') + ] + + sorted_profile_releases.each do |pr| + row.append(presence2char(pr.instruction_presence(inst.name))) + end + + inst_table["rows"].append(row) + end + + return inst_table +end + +# @param arch [Architecture] The entire RISC-V architecture +# @return [Hash] CSR table data +def arch2csr_table(arch) + raise ArgumentError, "arch is a #{arch.class} class but needs to be Architecture" unless arch.is_a?(Architecture) + + sorted_profile_releases = get_sorted_profile_releases(arch) + + csr_table = { + # Array of hashes + "columns" => [ + {name: "CSR Name", formatter: "link", sorter: "alphanum", headerFilter: true, frozen: true, formatterParams: + { + labelField:"CSR Name", + urlPrefix: "https://risc-v-certification-steering-committee.github.io/riscv-unified-db/manual/html/isa/isa_20240411/csrs/" + } + }, + {name: "Address", formatter: "textarea", sorter: "number", headerFilter: true}, + {name: "Description", formatter: "textarea", sorter: "alphanum", headerFilter: true}, + sorted_profile_releases.map do |pr| + {name: "#{pr.name}", formatter: "textarea", sorter: "alphanum", headerFilter: true} + end + ].flatten, + + # Will eventually be an array containing arrays. + "rows" => [] + } + + csrs = arch.csrs.sort_by!(&:name) + progressbar = ProgressBar.create(title: "CSR Table", total: csrs.size) + + csrs.each do |csr| + progressbar.increment + + raise "Indirect CSRs not yet supported for CSR #{csr.name}" if csr.address.nil? + + row = [ + csr.name, + csr.address, + csr.long_name, + ] + + sorted_profile_releases.each do |pr| + row.append(presence2char(pr.csr_presence(csr.name))) + end + + csr_table["rows"].append(row) + end + + return csr_table +end + +# Create ISA Explorer table as XLSX worksheet. +# +# @param table [Hash] Table data +# @param workbook +# @param worksheet +def gen_xlsx_table(table, workbook, worksheet) + # Add and define a header format + header_format = workbook.add_format + header_format.set_bold + header_format.set_align('center') + + # Add column names in 1st row (row 0). + col_num = 0 + table["columns"].each do |column| + worksheet.write(0, col_num, column[:name], header_format) + col_num += 1 + end + + # Add table information in rows + row_num = 1 + table["rows"].each do |row_cells| + col_num = 0 + row_cells.each do |cell| + if cell.is_a?(String) || cell.is_a?(Integer) + cell_fmt = cell.to_s + elsif cell.is_a?(TrueClass) || cell.is_a?(FalseClass) + cell_fmt = cell ? "Y" : "N" + elsif cell.is_a?(Array) + cell_fmt = cell.join(", ") + else + raise ArgumentError, "Unknown cell class of #{cell.class} for '#{cell}'" + end + + worksheet.write(row_num, col_num, cell_fmt) + col_num += 1 + end + row_num += 1 + end + + # Set column widths to hold data width. + worksheet.autofit +end + +# Create ISA Explorer tables as XLSX file. +# +# @param arch [Architecture] The entire RISC-V architecture +# @param output_pname [String] Full absolute pathname to output file +def gen_xlsx(arch, output_pname) + raise ArgumentError, "arch is a #{arch.class} class but needs to be Architecture" unless arch.is_a?(Architecture) + raise ArgumentError, "output_pname is a #{output_pname.class} class but needs to be String" unless output_pname.is_a?(String) + + # Create a new Excel workbook + puts "UPDATE: Creating Excel workboook #{output_pname}" + workbook = WriteXLSX.new(output_pname) + + # Convert arch to ext_table data structure + puts "UPDATE: Creating extension table data structure" + ext_table = arch2ext_table(arch) + + # Add a worksheet + ext_worksheet = workbook.add_worksheet("Extensions") + + # Populate worksheet with ext_table + puts "UPDATE: Adding extension table to worksheet #{ext_worksheet.name}" + gen_xlsx_table(ext_table, workbook, ext_worksheet) + + # Convert arch to inst_table data structure + puts "UPDATE: Creating instruction table data structure" + inst_table = arch2inst_table(arch) + + # Add a worksheet + inst_worksheet = workbook.add_worksheet("Instructions") + + # Populate worksheet with inst_table + puts "UPDATE: Adding instruction table to worksheet #{inst_worksheet.name}" + gen_xlsx_table(inst_table, workbook, inst_worksheet) + + # Convert arch to csr_table data structure + puts "UPDATE: Creating CSR table data structure" + csr_table = arch2csr_table(arch) + + # Add a worksheet + csr_worksheet = workbook.add_worksheet("CSRs") + + # Populate worksheet with csr + puts "UPDATE: Adding CSR table to worksheet #{csr_worksheet.name}" + gen_xlsx_table(csr_table, workbook, csr_worksheet) + + workbook.close +end + +# Create ISA Explorer table as JavaScript file. +# +# @param table [Hash] Table data +# @param div_name [String] Name of div element in HTML +# @param output_pname [String] Full absolute pathname to output file +def gen_js_table(table, div_name, output_pname) + columns = table["columns"] + rows = table["rows"] + + File.open(output_pname, "w") do |fp| + fp.write "// Define data array\n" + fp.write "\n" + fp.write "var tabledata = [\n" + + rows.each do |row| + items = [] + columns.each_index do |i| + column = columns[i] + column_name = column[:name].gsub("\n", " ") + cell = row[i] + if cell.is_a?(String) + cell_fmt = '"' + row[i].gsub("\n", "\\n") + '"' + elsif cell.is_a?(TrueClass) || cell.is_a?(FalseClass) || cell.is_a?(Integer) + cell_fmt = "#{cell}" + elsif cell.is_a?(Array) + cell_fmt = '"'+ cell.join("\\n") + '"' + else + raise ArgumentError, "Unknown cell class of #{cell.class} for '#{cell}'" + end + items.append('"' + column_name + '":' + cell_fmt) + end + fp.write " {" + items.join(", ") + "},\n" + end + + fp.write "];\n" + fp.write "\n" + fp.write "// Initialize table\n" + fp.write "var table = new Tabulator(\"##{div_name}\", {\n" + fp.write " height: window.innerHeight-25, // Set height to window less 25 pixels for horz scrollbar\n" + fp.write " data: tabledata, // Assign data to table\n" + fp.write " columns:[\n" + columns.each do |column| + column_name = column[:name].gsub("\n", " ") + sorter = column[:sorter] + formatter = column[:formatter] + fp.write " {title: \"#{column_name}\", field: \"#{column_name}\", sorter: \"#{sorter}\", formatter: \"#{formatter}\"" + + if column[:headerFilter] == true + fp.write ", headerFilter: true" + end + if column[:headerVertical] == true + fp.write ", headerVertical: true" + end + if column[:frozen] == true + fp.write ", frozen: true" + end + + if formatter == "link" + formatterParams = column[:formatterParams] + urlPrefix = formatterParams[:urlPrefix] + fp.write ", formatterParams:{\n" + fp.write " labelField:\"#{column_name}\",\n" + fp.write " urlPrefix:\"#{urlPrefix}\"\n" + fp.write " }\n" + # elsif formatter == "array" + end + fp.write " },\n" + end + fp.write " ]\n" + fp.write "});\n" + fp.write "\n" + end +end + +# Create ISA Explorer extension table as JavaScript file. +# +# @param arch [Architecture] The entire RISC-V architecture +# @param output_pname [String] Full absolute pathname to output file +def gen_js_ext_table(arch, output_pname) + raise ArgumentError, "arch is a #{arch.class} class but needs to be Architecture" unless arch.is_a?(Architecture) + raise ArgumentError, "output_pname is a #{output_pname.class} class but needs to be String" unless output_pname.is_a?(String) + + # Convert arch to ext_table data structure + puts "UPDATE: Creating extension table data structure" + ext_table = arch2ext_table(arch) + + puts "UPDATE: Converting extension table to #{output_pname}" + gen_js_table(ext_table, "ext_table", output_pname) +end + +# Create ISA Explorer instruction table as JavaScript file. +# +# @param arch [Architecture] The entire RISC-V architecture +# @param output_pname [String] Full absolute pathname to output file +def gen_js_inst_table(arch, output_pname) + raise ArgumentError, "arch is a #{arch.class} class but needs to be Architecture" unless arch.is_a?(Architecture) + raise ArgumentError, "output_pname is a #{output_pname.class} class but needs to be String" unless output_pname.is_a?(String) + + # Convert arch to inst_table data structure + puts "UPDATE: Creating instruction table data structure" + inst_table = arch2inst_table(arch) + + puts "UPDATE: Converting instruction table to #{output_pname}" + gen_js_table(inst_table, "inst_table", output_pname) +end + +# Create ISA Explorer CSR table as JavaScript file. +# +# @param arch [Architecture] The entire RISC-V architecture +# @param output_pname [String] Full absolute pathname to output file +def gen_js_csr_table(arch, output_pname) + raise ArgumentError, "arch is a #{arch.class} class but needs to be Architecture" unless arch.is_a?(Architecture) + raise ArgumentError, "output_pname is a #{output_pname.class} class but needs to be String" unless output_pname.is_a?(String) + + # Convert arch to csr_table data structure + puts "UPDATE: Creating CSR table data structure" + csr_table = arch2csr_table(arch) + + puts "UPDATE: Converting CSR table to #{output_pname}" + gen_js_table(csr_table, "csr_table", output_pname) +end + +# param [Architecture] arch +# return [Array] Nice list of profile release to use in a nice order +def get_sorted_profile_releases(arch) + raise ArgumentError, "arch is a #{arch.class} class but needs to be Architecture" unless arch.is_a?(Architecture) + + # Get array of profile releases and sort by name + sorted_profile_releases = arch.profile_releases.sort_by(&:name) + + # Remove Mock profile release if present. + sorted_profile_releases.delete_if {|pr| pr.name == "Mock" } + + # Move RVI20 to the beginning of the array if it exists. + if sorted_profile_releases.any? {|pr| pr.name == "RVI20" } + sorted_profile_releases.delete_if {|pr| pr.name == "RVI20" } + sorted_profile_releases.unshift(arch.profile_release("RVI20")) + end + + return sorted_profile_releases +end diff --git a/backends/isa_explorer/tasks.rake b/backends/isa_explorer/tasks.rake new file mode 100644 index 0000000000..8a1083aa4f --- /dev/null +++ b/backends/isa_explorer/tasks.rake @@ -0,0 +1,205 @@ +# frozen_string_literal: true +# +# Contains Rake rules to generate ISA explorer. + +require "pathname" +require_relative "isa_explorer" + +# Backend generator directory +BACKEND_NAME = "isa_explorer" +BACKEND_DIR = "#{$root}/backends/#{BACKEND_NAME}" + +# Static source files +SRC_EXT_HTML_PNAME = "#{BACKEND_DIR}/ext_table.html" +SRC_INST_HTML_PNAME = "#{BACKEND_DIR}/inst_table.html" +SRC_CSR_HTML_PNAME = "#{BACKEND_DIR}/csr_table.html" + +# Generated directories/files +GEN_ROOT = $root / "gen" / BACKEND_NAME +GEN_SPREADSHEET_DIR = GEN_ROOT / "spreadsheet" +GEN_BROWSER_DIR = GEN_ROOT / "browser" +GEN_XLSX = GEN_SPREADSHEET_DIR / "isa_explorer.xlsx" +GEN_HTML_EXT_TABLE = GEN_BROWSER_DIR / "ext_table.html" +GEN_JS_EXT_TABLE = GEN_BROWSER_DIR / "ext_table.js" +GEN_HTML_INST_TABLE = GEN_BROWSER_DIR / "inst_table.html" +GEN_JS_INST_TABLE = GEN_BROWSER_DIR / "inst_table.js" +GEN_HTML_CSR_TABLE = GEN_BROWSER_DIR / "csr_table.html" +GEN_JS_CSR_TABLE = GEN_BROWSER_DIR / "csr_table.js" + +directory(GEN_SPREADSHEET_DIR) +directory(GEN_BROWSER_DIR) + +namespace :gen do + desc("Generate RISC-V ISA Explorer for Excel spreadsheet") + task :isa_explorer_spreadsheet do + Rake::Task["#{GEN_XLSX}"].invoke + end + + desc("Generate RISC-V ISA Explorer Extensions for browser") + task :isa_explorer_browser_ext do + Rake::Task["#{GEN_HTML_EXT_TABLE}"].invoke + Rake::Task["#{GEN_JS_EXT_TABLE}"].invoke + end + + desc("Generate RISC-V ISA Explorer Instructions for browser") + task :isa_explorer_browser_inst do + Rake::Task["#{GEN_HTML_INST_TABLE}"].invoke + Rake::Task["#{GEN_JS_INST_TABLE}"].invoke + end + + desc("Generate RISC-V ISA Explorer CSR for browser") + task :isa_explorer_browser_csr do + Rake::Task["#{GEN_HTML_CSR_TABLE}"].invoke + Rake::Task["#{GEN_JS_CSR_TABLE}"].invoke + end + + desc("Generate RISC-V ISA Explorer for browser") + task :isa_explorer_browser do + Rake::Task["#{GEN_HTML_EXT_TABLE}"].invoke + Rake::Task["#{GEN_JS_EXT_TABLE}"].invoke + Rake::Task["#{GEN_HTML_INST_TABLE}"].invoke + Rake::Task["#{GEN_JS_INST_TABLE}"].invoke + Rake::Task["#{GEN_HTML_CSR_TABLE}"].invoke + Rake::Task["#{GEN_JS_CSR_TABLE}"].invoke + end +end + +src_pnames = [ + "#{BACKEND_DIR}/isa_explorer.rb", + "#{$root}/lib/architecture.rb", + "#{$root}/lib/version.rb", + "#{$root}/lib/presence.rb", + "#{$root}/lib/backend_helpers.rb", + "#{$root}/lib/arch_obj_models/database_obj.rb", + "#{$root}/lib/arch_obj_models/extension.rb", + "#{$root}/lib/arch_obj_models/instruction.rb" +] + +file "#{GEN_XLSX}" => [ + __FILE__, + src_pnames +].flatten do |t| + arch = create_arch + + # Ensure directory holding target file is present. + FileUtils.mkdir_p File.dirname(t.name) + + gen_xlsx(arch, t.name) + + puts "Success: Generated #{t.name}" +end + +file "#{GEN_HTML_EXT_TABLE}" => [ + __FILE__, + SRC_EXT_HTML_PNAME +].flatten do |t| + # Ensure directory holding target file is present. + FileUtils.mkdir_p File.dirname(t.name) + + # Delete target file if already present. + if File.exist?(t.name) + begin + File.delete(t.name) + rescue StandardError => e + raise "Can't delete '#{t.name}': #{e.message}" + end + end + + # Just copy static HTML file. + FileUtils.copy_file(SRC_EXT_HTML_PNAME, t.name) +end + +file "#{GEN_HTML_INST_TABLE}" => [ + __FILE__, + SRC_INST_HTML_PNAME +].flatten do |t| + # Ensure directory holding target file is present. + FileUtils.mkdir_p File.dirname(t.name) + + # Delete target file if already present. + if File.exist?(t.name) + begin + File.delete(t.name) + rescue StandardError => e + raise "Can't delete '#{t.name}': #{e.message}" + end + end + + # Just copy static HTML file. + FileUtils.copy_file(SRC_INST_HTML_PNAME, t.name) +end + +file "#{GEN_HTML_CSR_TABLE}" => [ + __FILE__, + SRC_CSR_HTML_PNAME +].flatten do |t| + # Ensure directory holding target file is present. + FileUtils.mkdir_p File.dirname(t.name) + + # Delete target file if already present. + if File.exist?(t.name) + begin + File.delete(t.name) + rescue StandardError => e + raise "Can't delete '#{t.name}': #{e.message}" + end + end + + # Just copy static HTML file. + FileUtils.copy_file(SRC_CSR_HTML_PNAME, t.name) +end + +file "#{GEN_JS_EXT_TABLE}" => [ + __FILE__, + src_pnames, + SRC_EXT_HTML_PNAME +].flatten do |t| + arch = create_arch + + # Ensure directory holding target file is present. + FileUtils.mkdir_p File.dirname(t.name) + + gen_js_ext_table(arch, t.name) + + puts "Success: Generated #{t.name}" +end + +file "#{GEN_JS_INST_TABLE}" => [ + __FILE__, + src_pnames, + SRC_INST_HTML_PNAME +].flatten do |t| + arch = create_arch + + # Ensure directory holding target file is present. + FileUtils.mkdir_p File.dirname(t.name) + + gen_js_inst_table(arch, t.name) + + puts "Success: Generated #{t.name}" +end + +file "#{GEN_JS_CSR_TABLE}" => [ + __FILE__, + src_pnames, + SRC_CSR_HTML_PNAME +].flatten do |t| + arch = create_arch + + # Ensure directory holding target file is present. + FileUtils.mkdir_p File.dirname(t.name) + + gen_js_csr_table(arch, t.name) + + puts "Success: Generated #{t.name}" +end + + +# @return [ConfiguredArchitecture] +def create_arch + # Ensure that unconfigured resolved architecture called "_" exists. + Rake::Task["#{$root}/.stamps/resolve-_.stamp"].invoke + + # Create architecture object using the unconfigured resolved architecture called "_" to get the entire RISC-V arch. + cfg_arch_for("_") +end diff --git a/backends/manual/tasks.rake b/backends/manual/tasks.rake index d7573071eb..4a853d8595 100644 --- a/backends/manual/tasks.rake +++ b/backends/manual/tasks.rake @@ -199,7 +199,7 @@ rule %r{#{MANUAL_GEN_DIR}/.*/.*/antora/modules/insts/pages/.*.adoc} => [ erb.filename = inst_template_path.to_s FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AntoraUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + File.write t.name, AntoraUtils.resolve_links(cfg_arch.convert_monospace_to_links(erb.result(binding))) end # rule to create csr appendix page @@ -211,19 +211,16 @@ rule %r{#{MANUAL_GEN_DIR}/.*/.*/antora/modules/csrs/pages/.*\.adoc} => [ csr_name = File.basename(t.name, ".adoc") cfg_arch = cfg_arch_for("_") - # cfg_arch_32 = cfg_arch_for("_32") csr = cfg_arch.csr(csr_name) raise "Can't find csr '#{csr_name}'" if csr.nil? - # csr_32 = cfg_arch_32.csr(csr_name) - csr_template_path = $root / "backends" / "common_templates" / "adoc" / "csr.adoc.erb" erb = ERB.new(csr_template_path.read, trim_mode: "-") erb.filename = csr_template_path.to_s FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AntoraUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + File.write t.name, AntoraUtils.resolve_links(cfg_arch.convert_monospace_to_links(erb.result(binding))) end # rule to create ext appendix page @@ -242,7 +239,7 @@ rule %r{#{MANUAL_GEN_DIR}/.*/.*/antora/modules/exts/pages/.*.adoc} => [ erb.filename = ext_template_path.to_s FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AntoraUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + File.write t.name, AntoraUtils.resolve_links(cfg_arch.convert_monospace_to_links(erb.result(binding))) end # rule to create IDL function appendix page @@ -257,7 +254,7 @@ rule %r{#{MANUAL_GEN_DIR}/.*/.*/antora/modules/funcs/pages/funcs.adoc} => [ erb.filename = funcs_template_path.to_s FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AntoraUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + File.write t.name, AntoraUtils.resolve_links(cfg_arch.convert_monospace_to_links(erb.result(binding))) end # rule to create IDL function appendix page @@ -274,7 +271,7 @@ rule %r{#{MANUAL_GEN_DIR}/.*/.*/antora/modules/params/pages/param_list.adoc} => erb.filename = param_list_template_path.to_s FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AntoraUtils.resolve_links(cfg_arch.find_replace_links(erb.result(binding))) + File.write t.name, AntoraUtils.resolve_links(cfg_arch.convert_monospace_to_links(erb.result(binding))) end rule %r{#{MANUAL_GEN_DIR}/.*/top/.*/antora/landing/antora.yml} => [ @@ -430,12 +427,17 @@ namespace :gen do Rake::Task[antora_path / "antora.yml"].invoke Rake::Task[antora_path / "nav.adoc"].invoke + puts "UPDATE: Generating CSRs" version_obj.csrs.each do |csr| Rake::Task[antora_path / "modules" / "csrs" / "pages" / "#{csr.name}.adoc"].invoke end + + puts "UPDATE: Generating Instructions" version_obj.instructions.each do |inst| Rake::Task[antora_path / "modules" / "insts" / "pages" / "#{inst.name}.adoc"].invoke end + + puts "UPDATE: Generating Extensions" version_obj.extensions.each do |ext| Rake::Task[antora_path / "modules" / "exts" / "pages" / "#{ext.name}.adoc"].invoke end @@ -451,6 +453,8 @@ namespace :gen do playbook_path = MANUAL_GEN_DIR / ENV["MANUAL_NAME"] / "top" / output_hash / "antora" / "playbook" / "playbook.yml" Rake::Task[playbook_path].invoke + puts "UPDATE: Using npm to execute Antora" + sh [ "npm exec -- antora", "--stacktrace", diff --git a/backends/manual/templates/csr.adoc.erb b/backends/manual/templates/csr.adoc.erb index e4e241cf59..86ac070300 100644 --- a/backends/manual/templates/csr.adoc.erb +++ b/backends/manual/templates/csr.adoc.erb @@ -1,6 +1,6 @@ :tabs-sync-option: -[#csrs-<%= csr.name.gsub('.', '_') %>,reftext=<%= csr.name %>] +<%= anchor_for_udb_doc_csr(csr.name) %> = <%= csr.name %> *<%= csr.long_name %>* @@ -15,28 +15,28 @@ h| CSR Address | <%= "0x#{csr.address.to_s(16)}" %> <%- if csr.priv_mode == 'VS' -%> h| Virtual CSR Address | <%= "0x#{csr.virtual_address.to_s(16)}" %> <%- end -%> -<%- if csr.dynamic_length?(cfg_arch) || csr.data["length"] == "MXLEN" -%> +<%- if csr.dynamic_length? || csr.data["length"] == "MXLEN" -%> h| Length a| [when,"<%= csr.length_cond32 %>"] -- -<%= csr_32.length_pretty(cfg_arch_32, 32) %> +<%= csr_32.length_pretty(32) %> -- [when,"<%= csr.length_cond64 %>"] -- -<%= csr.length_pretty(cfg_arch, 64) %> +<%= csr.length_pretty(64) %> -- <%- else -%> -h| Length | <%= csr.length_pretty(cfg_arch) %> +h| Length | <%= csr.length_pretty %> <%- end -%> h| Privilege Mode | <%= csr.priv_mode %> |=== == Format -<%- unless csr.dynamic_length?(cfg_arch) || csr.fields.any? { |f| f.dynamic_location?(cfg_arch) } || csr.data["length"] == "MXLEN" -%> +<%- unless csr.dynamic_length? || csr.fields.any? { |f| f.dynamic_location? } || csr.data["length"] == "MXLEN" -%> <%# CSR has a known static length, so there is only one format to display -%> .<%= csr.name %> format [wavedrom, ,svg,subs='attributes',width="100%"] @@ -73,22 +73,22 @@ This CSR format changes dynamically. @ Name @ Location @ Type @ Reset Value <%- csr.fields.each do |field| -%> -@ xref:<%=csr.name%>-<%=field.name%>-def[`<%= field.name %>`] +@ <%= link_to_udb_doc_csr_field(csr.name, field.name) %> a@ -<%- if field.dynamic_location?(cfg_arch) -%> +<%- if field.dynamic_location? -%> [when,"<%= field.location_cond32 %>"] -- -<%= field.location_pretty(cfg_arch, 32) %> +<%= field.location_pretty(32) %> -- [when,"<%= field.location_cond64 %>"] -- -<%= field.location_pretty(cfg_arch, 64) %> +<%= field.location_pretty(64) %> -- <%- else -%> -<%= field.location_pretty(cfg_arch) %> +<%= field.location_pretty %> <%- end -%> a@ @@ -99,7 +99,7 @@ a@ a@ -- -<%= field.reset_value_pretty(cfg_arch) %> +<%= field.reset_value_pretty %> -- <%- end -%> @@ -112,8 +112,8 @@ This CSR has no fields. However, it must still exist (not cause an `Illegal Inst <%- else -%> <%- csr.fields.each do |field| -%> -[[<%=csr.name%>-<%=field.name%>-def]] -=== `<%= field.name %>` +<%= anchor_for_udb_doc_csr_field(csr.name, field.name) %> +=== `<%= field.name %>` Field <%- if !field.defined_in_all_bases? -%> IMPORTANT: <%= field.name %> is only defined in <%= field.base32_only? ? "RV32" : "RV64" %> (`<%= field.base32_only? ? field.location_cond32 : field.location_cond64 %>`) @@ -121,16 +121,16 @@ IMPORTANT: <%= field.name %> is only defined in <%= field.base32_only? ? "RV32" **** Location:: -<%= field.location_pretty(cfg_arch) %> +<%= field.location_pretty %> Description:: <%= cfg_arch.render_erb(field.description, "#{csr.name}.#{field.name}.description").gsub("\n", " +\n") %> Type:: -<%= field.type_pretty(cfg_arch.symtab) %> +<%= field.type_pretty %> Reset value:: -<%= field.reset_value_pretty(cfg_arch) %> +<%= field.reset_value_pretty %> **** diff --git a/backends/manual/templates/ext.adoc.erb b/backends/manual/templates/ext.adoc.erb index e0c6af8d19..b5818a9b7a 100644 --- a/backends/manual/templates/ext.adoc.erb +++ b/backends/manual/templates/ext.adoc.erb @@ -1,4 +1,4 @@ -[ext:$<%= ext.name %>-def] +<%= anchor_for_udb_doc_ext(ext.name) %> = <%= ext.name %> Extension <%= ext.long_name %> @@ -53,9 +53,10 @@ The following instructions are affected by this extension: <%- unless ext.params.empty? -%> == Parameters -This extension has the following implementation options: +This extension has the following implementation options (AKA parameters): <%- ext.params.sort_by { |p| p.name }.each do |param| -%> +<%= anchor_for_udb_doc_ext_param(ext.name, param.name) %> <%= param.name %>:: + -- diff --git a/backends/manual/templates/instruction.adoc.erb b/backends/manual/templates/instruction.adoc.erb index 14e3aa9550..7ad32b1ebe 100644 --- a/backends/manual/templates/instruction.adoc.erb +++ b/backends/manual/templates/instruction.adoc.erb @@ -1,6 +1,6 @@ :tabs-sync-option: -[[inst:<%=inst.name.gsub('.', '_')%>-def]] +<%= anchor_for_udb_doc_inst(inst.name) %> = <%= inst.name %> *<%= inst.long_name %>* diff --git a/backends/manual/templates/isa_nav.adoc.erb b/backends/manual/templates/isa_nav.adoc.erb index 93ebd88570..cc805a1f16 100644 --- a/backends/manual/templates/isa_nav.adoc.erb +++ b/backends/manual/templates/isa_nav.adoc.erb @@ -8,17 +8,17 @@ * Alphabetical list of instructions <%- manual_version.instructions.sort { |a, b| a.name <=> b.name }.each do |inst| -%> -** xref:insts:<%= inst.name %>.adoc[<%= inst.name %>] +** <%= link_to_udb_doc_inst(inst.name) %> <%- end -%> * Alphabetical list of CSRs <%- manual_version.csrs.sort { |a, b| a.name <=> b.name }.each do |csr| -%> -** xref:csrs:<%= csr.name %>.adoc[<%= csr.name %>] +** <%= link_to_udb_doc_csr(csr.name) %> <%- end -%> * Alphabetical list of extensions <%- manual_version.extensions.sort { |a, b| a.name <=> b.name }.each do |ext| -%> -** xref:exts:<%= ext.name %>.adoc[<%= ext.name %>] +** <%= link_to_udb_doc_ext(ext.name) %> <%- end -%> * xref:params:param_list.adoc[Alphabetical list of parameters] diff --git a/backends/manual/templates/param_list.adoc.erb b/backends/manual/templates/param_list.adoc.erb index dd273b85b9..21a2a70d5f 100644 --- a/backends/manual/templates/param_list.adoc.erb +++ b/backends/manual/templates/param_list.adoc.erb @@ -12,7 +12,7 @@ The following <%= params.size %> parameters are defined in this manual: <%- params.each do |param| -%> | <%= param.name %> | <%= param.schema.to_pretty_s %> -| <%= param.exts.map { |ext| "`#{ext.name}`"}.join(", ") %> +| <%= param.exts.map { |ext| link_to_udb_doc_ext_param(ext.name, param.name, ext.name) }.join(", ") %> a| <%= param.desc %> <%- end -%> |=== diff --git a/backends/portfolio/README.adoc b/backends/portfolio/README.adoc new file mode 100644 index 0000000000..1f3ffee0f7 --- /dev/null +++ b/backends/portfolio/README.adoc @@ -0,0 +1,2 @@ +This portfolio backend isn't a real backend. +Instead, it contains common Rake code and ERB templates shared by multiple portfolio-based backends. diff --git a/backends/portfolio/tasks.rake b/backends/portfolio/tasks.rake new file mode 100644 index 0000000000..566760b4a6 --- /dev/null +++ b/backends/portfolio/tasks.rake @@ -0,0 +1,160 @@ +# frozen_string_literal: true +# +# Contains common methods called from portfolio-based tasks.rake files. + +require "pathname" +require "asciidoctor-pdf" +require "asciidoctor-diagram" +require_relative "#{$lib}/idl/passes/gen_adoc" + +# @return [Architecture] +def pf_create_arch + # Ensure that unconfigured resolved architecture called "_" exists. + Rake::Task["#{$root}/.stamps/resolve-_.stamp"].invoke + + # Create architecture object using the unconfigured resolved architecture called "_". + Architecture.new($root / "gen" / "resolved_arch" / "_") +end + +# @param portfolio_grp_with_arch [PortfolioGroup] Contains one or more Portfolio objects that have an arch (not a cfg_arch). +# @return [ConfiguredArchitecture] +def pf_create_cfg_arch(portfolio_grp_with_arch) + raise ArgumentError, "portfolio_grp_with_arch is a #{portfolio_grp_with_arch.class} but must be a PortfolioGroup" unless portfolio_grp_with_arch.is_a?(PortfolioGroup) + + # Ensure that unconfigured resolved architecture called "_" exists. + Rake::Task["#{$root}/.stamps/resolve-_.stamp"].invoke + + # Create a ConfiguredArchitecture object and provide it a PortfolioGroupConfig object to implement the AbstractConfig API. + # The DatabaseObjects in PortfolioGroup only have an Architecture object and not a ConfiguredArchitecture object + # otherwise there would be a circular dependency. To avoid this circular dependency, none of the routines + # called in the PortfolioGroup object to satisfy the requests from the AbstractConfig API for the ConfiguredArchitecture + # object can require that the PortfolioGroup DatabaseObjects contain a ConfiguredArchitecture. + cfg_arch_with_portfolio_grp_with_arch = ConfiguredArchitecture.new( + portfolio_grp_with_arch.name, + PortfolioGroupConfig.new(portfolio_grp_with_arch), + $root / "gen" / "resolved_arch" / "_" + ) +end + +# Clones the CSC fork of the ISA manual repository or updates it if it already exists. +# Does the same for the docs-resources repository which is used by the ISA manual. +# +# @param target_pname [String] Full pathname of target file being generated +def pf_get_latest_csc_isa_manual(target_pname) + # Directory path for target file. + target_dir = File.dirname(target_pname) + + pf_ensure_repository("https://github.com/RISC-V-Certification-Steering-Committee/riscv-isa-manual", + target_dir + "/ext/riscv-isa-manual") + + pf_ensure_repository("https://github.com/riscv/docs-resources", target_dir + "/ext/riscv-isa-manual/docs-resources") +end + +# @param url [String] Where to clone repository from +# @param workspace_dir [String] Path to desired workspace directory +def pf_ensure_repository(url, workspace_dir) + if Dir.exist?(workspace_dir) && !Dir.empty?(workspace_dir) + # Workspace already exists so just make sure it is up-to-date. + sh "git -C #{workspace_dir} fetch" + sh "git -C #{workspace_dir} pull origin main" + else + # Need to clone repository. + sh "git clone #{url} #{workspace_dir}" + end +end + +# @param erb_template_pname [String] Path to ERB template file +# @param erb_binding [Binding] Path to ERB template file +# @param target_pname [String] Full pathname of adoc file being generated +# @param portfolio_design [PortfolioDesign] PortfolioDesign being generated +def pf_create_adoc(erb_template_pname, erb_binding, target_pname, portfolio_design) + template_path = Pathname.new(erb_template_pname) + erb = ERB.new(File.read(template_path), trim_mode: "-") + erb.filename = template_path.to_s + + # Ensure directory holding target adoc file is present. + FileUtils.mkdir_p File.dirname(target_pname) + + # Convert ERB to final ASCIIDOC. Note that this code is broken up into separate function calls + # each with a variable name to aid in running a command-line debugger on this code. + puts "UPDATE: Converting ERB template to adoc for #{portfolio_design.name}" + erb_result = erb.result(erb_binding) + erb_result_monospace_converted_to_links = portfolio_design.convert_monospace_to_links(erb_result) + erb_result_with_links_resolved = AsciidocUtils.resolve_links(erb_result_monospace_converted_to_links) + + File.write(target_pname, erb_result_with_links_resolved) + puts "UPDATE: Generated adoc in #{target_pname}" +end + +# @param adoc_file [String] Full name of source adoc file +# @param target_pname [String] Full name of PDF file being generated +def pf_adoc2pdf(adoc_file, target_pname) + FileUtils.mkdir_p File.dirname(target_pname) + + puts "UPDATE: Generating PDF in #{target_pname}" + cmd = [ + "asciidoctor-pdf", + "-w", + "-v", + "-a toc", + "-a compress", + "-a pdf-theme=#{$root}/ext/docs-resources/themes/riscv-pdf.yml", + "-a pdf-fontsdir=#{$root}/ext/docs-resources/fonts", + "-a imagesdir=#{$root}/ext/docs-resources/images", + "-r asciidoctor-diagram", + "-r #{$root}/backends/ext_pdf_doc/idl_lexer", + "-o #{target_pname}", + adoc_file + ].join(" ") + + puts "UPDATE: bundle exec #{cmd}" + + # Write out command used to convert adoc to PDF to allow running this + # manually during development. + run_pname = File.dirname(adoc_file) + "/adoc2pdf.sh" + sh "rm -f #{run_pname}" + sh "echo '#!/bin/bash' >#{run_pname}" + sh "echo >>#{run_pname}" + sh "echo bundle exec #{cmd} >>#{run_pname}" + sh "chmod +x #{run_pname}" + + # Now run the actual command. + sh cmd + + puts "UPDATE: Generated PDF in #{target_pname}" +end + +# @param adoc_file [String] Full name of source adoc file +# @param target_pname [String] Full name of HTML file being generated +def pf_adoc2html(adoc_file, target_pname) + FileUtils.mkdir_p File.dirname(target_pname) + + puts "UPDATE: Generating HTML in #{target_pname}" + cmd = [ + "asciidoctor", + "-w", + "-v", + "-a toc", + "-a imagesdir=#{$root}/ext/docs-resources/images", + "-r asciidoctor-diagram", + "-r #{$root}/backends/ext_pdf_doc/idl_lexer", + "-o #{target_pname}", + adoc_file + ].join(" ") + + puts "UPDATE: bundle exec #{cmd}" + + # Write out command used to convert adoc to HTML to allow running this + # manually during development. + run_pname = File.dirname(adoc_file) + "/adoc2html.sh" + sh "rm -f #{run_pname}" + sh "echo '#!/bin/bash' >#{run_pname}" + sh "echo >>#{run_pname}" + sh "echo bundle exec #{cmd} >>#{run_pname}" + sh "chmod +x #{run_pname}" + + # Now run the actual command. + sh cmd + + puts "UPDATE: Generated HTML in #{target_pname}" +end diff --git a/backends/portfolio/templates/README.adoc b/backends/portfolio/templates/README.adoc new file mode 100644 index 0000000000..2378336999 --- /dev/null +++ b/backends/portfolio/templates/README.adoc @@ -0,0 +1 @@ +This directory contains partial ERB templates shared by multiple portfolio-based backend. diff --git a/backends/portfolio/templates/beginning.adoc.erb b/backends/portfolio/templates/beginning.adoc.erb new file mode 100644 index 0000000000..800ce1a35e --- /dev/null +++ b/backends/portfolio/templates/beginning.adoc.erb @@ -0,0 +1,66 @@ +[[header]] +:description: <%= portfolio_design.name %> <%= portfolio_design.portfolio_design_type %> +// :revnumber: TODO +:revmark: "TODO: revmark" +:company: RISC-V +:url-riscv: https://riscv.org +:preface-title: Licensing and Acknowledgements +:colophon: +:appendix-caption: Appendix +:title-logo-image: image:risc-v_logo.png["RISC-V International Logo",pdfwidth=3.25in,align=center] +:back-cover-image: image:riscv-horizontal-color.svg[opacity=25%] + +// Settings +:experimental: +:reproducible: +:wavedrom: <%= $root %>/node_modules/.bin/wavedrom-cli +// TODO: needs to be changed +:imagesoutdir: images +:icons: font +:lang: en +:example-caption: Example +:listing-caption: Listing +:table-caption: Table +:figure-caption: Figure +:xrefstyle: short +:chapter-refsig: Chapter +:section-refsig: Section +:appendix-refsig: Appendix +:sectnums: + +// Table of contents +// Limit levels to level 0 (parts) and level 1 (2 equals signs). +:toc: left +:toclevels: 1 + +// The number of levels in the PDF outline. Max is 5. +// See https://docs.asciidoctor.org/pdf-converter/latest/pdf-outline/#levels. +:outlinelevels: 5 + +// A4 is the default for RISC-V but isn't wide enough for good display of the tables in the portfolios. +// A3 is the next bigest size. +// See https://github.com/prawnpdf/pdf-core/blob/0.6.0/lib/pdf/core/page_geometry.rb#L16-L68 +:pdf-page-size: A3 + +// Determined that uncommenting this causes cross-references to IDL functions +// from instruction IDL code to not link. The IDL code uses this +// block tag to get "source" formatting: +// [source,idl,subs="specialchars,macros"] +// +// :source-highlighter: pygments +// ifdef::backend-pdf[] +// :source-highlighter: rouge +// endif::[] +:data-uri: +:hide-uri-scheme: +:stem: +:footnote: +:stem: latexmath +:footnote: +:le: ≤ +:ge: ≥ +:ne: ≠ +:approx: ≈ +:inf: ∞ +:csrname: envcfg +:imagesdir: images diff --git a/backends/portfolio/templates/csr_appendix.adoc.erb b/backends/portfolio/templates/csr_appendix.adoc.erb new file mode 100644 index 0000000000..1bfc6848f6 --- /dev/null +++ b/backends/portfolio/templates/csr_appendix.adoc.erb @@ -0,0 +1,189 @@ +<<< +[appendix] +== CSR Details + +<% portfolio_design.in_scope_csrs.sort_by(&:name).each do |csr| -%> +<<< +<%= anchor_for_udb_doc_csr(csr.name) %> +=== <%= csr.name %> + +*<%= csr.long_name %>* + +<% unless csr.base.nil? -%> +[NOTE] +-- +`<%= csr.name %>` is only defined in RV<%= csr.base %>. +-- +<% end -%> + +<%= csr.description %> + +==== Attributes +[%autowidth] +|=== +h| CSR Address | <%= "0x#{csr.address.to_s(16)}" %> +<% if csr.priv_mode == 'VS' -%> +h| Virtual CSR Address | <%= "0x#{csr.virtual_address.to_s(16)}" %> +<% end -%> +h| Defining extension a| <%= csr.defined_by_condition.to_asciidoc %> +<% if csr.dynamic_length? -%> +h| Length | <%= csr.length_pretty %> +<% else -%> +h| Length | <%= csr.length_pretty %> +<% end -%> +h| Privilege Mode | <%= csr.priv_mode %> +|=== + + +==== Format +<% unless csr.dynamic_length? || csr.possible_fields.any? { |f| f.dynamic_location? } -%> +<%# CSR has a known static length, so there is only one format to display -%> +.<%= csr.name %> format +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= JSON.dump csr.wavedrom_desc(portfolio_design.cfg_arch, csr.base.nil? ? 32 : csr.base, optional_type: 2) %> +.... +<% else -%> +<%# CSR has a dynamic length, or a field has a dynamic location, + so there is more than one format to display -%> +This CSR format changes dynamically with XLEN. + +.<%= csr.name %> Format when <%= csr.length_cond32 %> +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= JSON.dump csr.wavedrom_desc(portfolio_design.cfg_arch, 32, optional_type: 2) %> +.... + +.<%= csr.name %> Format when <%= csr.length_cond64 %> +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= JSON.dump csr.wavedrom_desc(portfolio_design.cfg_arch, 64, optional_type: 2) %> +.... + + +<% end # unless dynamic length -%> + +==== Field Summary + +// use @ as a separator since IDL code can contain | +[%autowidth,separator=@,float="center",align="center",cols="^,<,<,<",options="header",role="stretch"] +|=== +@ Name @ Location @ Type @ Reset Value + +<% csr.possible_fields.each do |field| -%> +@ <%= link_to_udb_doc_csr_field(csr.name, field.name) %> +a@ +<% if field.dynamic_location? -%> + +[when,"<%= field.location_cond32 %>"] +-- +<%= field.location_pretty(32) %> +-- + +[when,"<%= field.location_cond64 %>"] +-- +<%= field.location_pretty(64) %> +-- + +<% else -%> +<%= field.location_pretty %> +<% end -%> +a@ + +-- +<%= field.type_pretty %> +-- + +a@ + +-- +<%= field.reset_value_pretty %> +-- + +<% end -%> +|=== + +==== Fields + +<% if csr.possible_fields.empty? -%> +This CSR has no fields. However, it must still exist (not cause an `Illegal Instruction` trap) and always return zero on a read. +<% else -%> + +<% csr.possible_fields.each do |field| -%> +<%= anchor_for_udb_doc_csr_field(csr.name, field.name) %> +===== `<%= csr.name %>.<%= field.name %>` Field + +<% if !field.defined_in_all_bases? -%> +IMPORTANT: <%= field.name %> is only defined in <%= field.base32_only? ? "RV32" : "RV64" %> (`<%= field.base32_only? ? field.location_cond32 : field.location_cond64 %>`) +<% end -%> + +// These four asterisks are called a "delimited sidebar block" +// (see https://docs.asciidoctor.org/asciidoc/latest/blocks/sidebars/) +// and cause the text until the next four asterisks to have a thin border around it. +// You can also use the [sidebar] attribute on a block. +// +// One limitation of sidebars is the normal section heading syntax +// (e.g., == for a level 1 heading) won't work. Instead, you have to +// do what's described in https://github.com/asciidoctor/asciidoctor/issues/1709 +// but that would be a level 5 heading in this CSR field case which is pretty ugly. + +**** +Location: :: +<%= field.location_pretty %> + +Description: :: +<%= field.description.gsub("\n", " +\n") %> + +Type: :: +<%= field.type_pretty %> + +Reset value: :: +<%= field.reset_value_pretty %> + +<% if defined?(gen_ctp_content) && gen_ctp_content -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => field, "org" => "appendix", "use_description_list" => true }) %> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => field, "org" => "appendix", "use_description_list" => true }) %> +<% end # if gen_ctp_content -%> + +**** + +<% end # Each field -%> +<% end # if no fields -%> + +<% if csr.possible_fields.map(&:has_custom_sw_write?).any? -%> +==== Software write + +This CSR may store a value that is different from what software attempts to write. + +When a software write occurs (_e.g._, through `csrrw`), the following determines the +written value: + +[idl] +---- +<% csr.possible_fields.each do |field| -%> +<% if field.has_custom_sw_write? -%> +<%= field.name %> = <%= field["sw_write(csr_value)"] %> +<% else -%> +<%= field.name %> = csr_value.<%= field.name %> +<% end -%> +<% end -%> +---- +<% end -%> + +<% if csr.has_custom_sw_read? -%> +==== Software read + +This CSR may return a value that is different from what is stored in hardware. + +[source,idl,subs="specialchars,macros"] +---- +<%= csr.sw_read_ast(portfolio_design.symtab).gen_adoc %> +---- +<% end -%> + +<% if defined?(gen_ctp_content) && gen_ctp_content -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => csr, "org" => "appendix" }) %> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => csr, "org" => "appendix" }) %> +<% end # if gen_ctp_content -%> + +<% end # do in_scope_csrs -%> diff --git a/backends/portfolio/templates/ext_appendix.adoc.erb b/backends/portfolio/templates/ext_appendix.adoc.erb new file mode 100644 index 0000000000..450e10ec21 --- /dev/null +++ b/backends/portfolio/templates/ext_appendix.adoc.erb @@ -0,0 +1,152 @@ +<<< +[appendix] +== Extension Details +<% portfolio_design.in_scope_ext_reqs.each do |ext_req| -%> +<% ext = arch.extension(ext_req.name) -%> +<% min_ext_ver = ext_req.min_satisfying_ext_ver -%> + +<%= anchor_for_udb_doc_ext(ext_req.name) %> +=== Extension <%= ext_req.name %> + +*Long Name*: <%= ext.long_name %> + +*Version Requirement*: <%= ext_req.requirement_specs.map(&:to_s).join(", ") %> + +<% if portfolios.size > 1 -%> +<%= ext.name %> Extension Presence +|=== +| <%= portfolio_kind %> | v<%= ext.versions.map { |ext_ver| ext_ver.canonical_version.to_s }.join(" | v") %> + +<% portfolios.each do |portfolio| -%> +| <%= portfolio.name %> | <%= portfolio.version_greatest_presence(ext.name, ext.versions).join(" | ") -%> +<% end -%> + +|=== +<% end # portfolios.size > 1 -%> + +<% ext.versions.each do |v| -%> +<%= v.canonical_version %>:: + State::: + <%= v.state %> + <% if v.state == "ratified" && !v.ratification_date.nil? -%> + Ratification date::: + <%= v.ratification_date %> + <% end # if %> + <% unless v.changes.empty? -%> + Changes::: + + <% v.changes.each do |c| -%> + * <%= c %> + <% end -%> + + <% end -%> + <% unless v.url.nil? -%> + Ratification document::: + <%= v.url %> + <% end -%> + <% unless v.implications.empty? -%> + Implies::: + <%- v.implications.each do |i| -%> + <%- next unless i[:cond].satisfied_by? { |ext_req| portfolio_design.cfg_arch.possible_extension_versions.any? { |ext_ver| ext_req.satisfied_by?(ext_ver)}} -%> + * `<%= i[:ext_ver].name %>` version <%= i[:ext_ver].version_str %> + <%- end -%> + <% end -%> +<% end -%> + +==== Synopsis + +:leveloffset: +3 + +<%= ext.description %> + +:leveloffset: -3 + +<% unless ext_req.note.nil? -%> +[NOTE] +-- +<%= ext_req.note %> +-- +<% end -%> + +<% insts = min_ext_ver.in_scope_instructions(portfolio_design) -%> +<% unless insts.empty? -%> +==== Instructions + +The following <%= insts.size %> instructions are added by extension version <%= min_ext_ver.version_str %> +(the minimum version of this extension that satifies the extension requirement). + +[cols="1,3"] +|=== +<% insts.each do |inst| -%> +| <%= link_to_udb_doc_inst(inst.name) %> +| *<%= inst.long_name %>* +<% end -%> +|=== +<% end -%> + +<% csrs = min_ext_ver.in_scope_csrs(portfolio_design) -%> +<% unless csrs.empty? -%> +==== CSRs + +The following <%= csrs.size %> CSRs are added by extension version <%= min_ext_ver.version_str %> +(the minimum version of this extension that satifies the extension requirement). + +[%autowidth] +|=== +| Name | Long Name | Address | Mode + +<% csrs.sort_by(&:name).each do |csr| -%> +| <%= link_to_udb_doc_csr(csr.name) %> +| <%= csr.long_name %> +| <%= "0x#{csr.address.to_s(16)}" %> +| <%= csr.priv_mode %> +<% end # do -%> +|=== +<% end -%> + +<% unless ext.params.empty? -%> +<% if portfolio_design.in_scope_params(ext_req).empty? && portfolio_design.out_of_scope_params(ext_req.name).empty? -%> +==== Parameters + +This extension has the following parameters (AKA implementation options): + +<% ext.params.sort_by { |p| p.name }.each do |param| -%> +<%= param.name %>:: ++ +-- +<%= param.desc %> +-- +<% end # do param -%> + +<% end # if in_scope & out_of_scope empty -%> +<% end # unless table -%> + +<% unless portfolio_design.in_scope_params(ext_req).empty? -%> +==== IN-SCOPE Parameters + +<% portfolio_design.in_scope_params(ext_req).each do |param| -%> +<%= anchor_for_udb_doc_ext_param(ext_req.name, param.name) %> +<%= param.name %> ⇒ <%= param.param.schema_type %>:: ++ +-- +<%= param.param.desc %> +-- +<% end # do param -%> +<% end # unless table -%> + +<% unless portfolio_design.out_of_scope_params(ext_req.name).empty? -%> +==== OUT-OF-SCOPE Parameters + +<% portfolio_design.out_of_scope_params(ext_req.name).each do |param| -%> +<%= anchor_for_udb_doc_ext_param(ext_req.name, param.name) %> +<%= param.name %> ⇒ <%= param.schema_type %>:: ++ +-- +<%= param.desc %> +-- +<% end # do param -%> +<% end # unless table -%> + +<% if defined?(gen_ctp_content) && gen_ctp_content -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => ext, "org" => "appendix", "use_description_list" => true}) %> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => ext, "org" => "appendix", "use_description_list" => true}) %> +<% end # if gen_ctp_content -%> + +<% end # do ext_req -%> diff --git a/backends/portfolio/templates/idl_func_appendix.adoc.erb b/backends/portfolio/templates/idl_func_appendix.adoc.erb new file mode 100644 index 0000000000..1ec2990ab8 --- /dev/null +++ b/backends/portfolio/templates/idl_func_appendix.adoc.erb @@ -0,0 +1,40 @@ +<<< +[appendix] +== IDL Function Details + +<% portfolio_design.functions.each do |f| -%> +<%= anchor_for_udb_doc_idl_func(f.name) %> +=== <%= f.name %><% if f.builtin? -%> (builtin)<% end -%><% if f.generated? -%> (generated)<% end -%> + +<%= f.description %> + +[cols="1,2"] +|=== +h| Return Type +a| +[source,idl] +---- +<%= f.return_type_list_str.join(', ') %> +---- + +h| Arguments +a| +<%- if f.arguments_list_str.empty? -%> +None +<%- else -%> +[source,idl] +---- +<%= f.arguments_list_str.join (', ') %> +---- +<%- end -%> +|=== + +<%- unless f.builtin? || f.generated? -%> +<%- body_ast = f.body -%> +[source,idl,subs="specialchars,macros"] +---- +<%= body_ast.gen_adoc %> +---- +<%- end -%> + +<%- end -%> diff --git a/backends/portfolio/templates/inst_appendix.adoc.erb b/backends/portfolio/templates/inst_appendix.adoc.erb new file mode 100644 index 0000000000..71e3dab338 --- /dev/null +++ b/backends/portfolio/templates/inst_appendix.adoc.erb @@ -0,0 +1,140 @@ +<<< +[appendix] +== Instruction Details + +<% portfolio_design.in_scope_instructions.each do |inst| -%> +<<< +<%= anchor_for_udb_doc_inst(inst.name) %> +=== <%= inst.name %> + +*<%= inst.long_name %>* + +This instruction is defined by: + +<%= inst.defined_by_condition.to_asciidoc %> + +==== Encoding + +<% if inst.multi_encoding? -%> +[NOTE] +This instruction has different encodings in RV32 and RV64. + +[tabs] +==== +RV32:: ++ +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= JSON.dump inst.wavedrom_desc(32) %> +.... + +RV64:: ++ +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= JSON.dump inst.wavedrom_desc(64) %> +.... +==== +<% else -%> +[wavedrom, ,svg,subs='attributes',width="100%"] +.... +<%= JSON.dump inst.wavedrom_desc(inst.base.nil? ? 32 : inst.base) %> +.... +<% end -%> + +==== Description + +<%= inst.description %> + +==== Access +<% if portfolio_design.in_scope_extensions.any? { |e| e.name == "H" } -%> +[cols="^,^,^,^,^"] +<% else -%> +[cols="^,^,^"] +<% end -%> +|=== +| M | <% if portfolio_design.in_scope_extensions.any? { |e| e.name == "H" } -%>HS<% else -%>S<% end -%> | U <% if portfolio_design.in_scope_extensions.any? { |e| e.name == "H" } -%> | VS | VU <% end -%> + +| [.access-always]#Always# +| [.access-<%=inst.access['s']%>]#<%= inst.access['s'].capitalize %># +| [.access-<%=inst.access['u']%>]#<%= inst.access['u'].capitalize %># +<% if portfolio_design.in_scope_extensions.any? { |e| e.name == "H" } %> +| [.access-<%=inst.access['vs']%>]#<%= inst.access['vs'].capitalize %># +| [.access-<%=inst.access['vu']%>]#<%= inst.access['vu'].capitalize %># +<% end %> +|=== + +<% if inst.access_detail? -%> +<%= inst.access_detail %> +<% end -%> + +==== Decode Variables + +<% if inst.multi_encoding? -%> +[tabs] +==== +RV32:: ++ +[source.idl] +---- +<% inst.decode_variables(32).each do |d| -%> +<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; +<% end -%> +---- + +RV64:: ++ +[source,idl] +---- +<% inst.decode_variables(64).each do |d| -%> +<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; +<% end -%> +---- +==== +<% else -%> +[source,idl] +---- +<% inst.decode_variables(inst.base.nil? ? 32 : inst.base).each do |d| -%> +<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; +<% end -%> +---- +<% end -%> + +<% if inst.key?("operation()") -%> +==== IDL Operation + +[source,idl,subs="specialchars,macros"] +---- +<%= inst.operation_ast.gen_adoc %> +---- +<% end -%> + +<% if inst.key?("sail()") -%> +==== Sail Operation + +[source,sail] +---- +<%= inst["sail()"] %> +---- +<% end -%> + +==== Exceptions + +<% exception_list = inst.reachable_exceptions_str() -%> +<% if exception_list.empty? -%> +This instruction does not generate synchronous exceptions. +<% else -%> +This instruction may result in the following synchronous exceptions: + + <% exception_list.sort.each do |etype| -%> + * <%= etype %> + <% end -%> + +<% end -%> + +<% if defined?(gen_ctp_content) && gen_ctp_content -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => inst, "org" => "appendix" }) %> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => inst, "org" => "appendix" }) %> +<% end # if gen_ctp_content -%> + +<% end # each in_scope instruction -%> diff --git a/backends/portfolio/templates/normative_rules.adoc.erb b/backends/portfolio/templates/normative_rules.adoc.erb new file mode 100644 index 0000000000..fa8d133787 --- /dev/null +++ b/backends/portfolio/templates/normative_rules.adoc.erb @@ -0,0 +1,22 @@ +<% unless db_obj.cert_normative_rules.empty? -%> +<% nice_name = db_obj.is_a?(CsrField) ? "#{db_obj.parent.name}.#{db_obj.name}" : db_obj.name -%> +<% if defined?(use_description_list) && use_description_list -%> +Normative Rules for `<%= nice_name %>`: :: +<% else -%> +==== Normative Rules for `<%= nice_name %>` +<% end -%> + +[%autowidth] +|=== +| ID | Description | Documentation Links + +<% db_obj.cert_normative_rules.each do |cp| -%> +| <%= defined?(org) ? anchor_for_udb_doc_cov_pt(org, cp.id) : "" %><%= cp.id %> +| <%= cp.description %> +a| <% cp.doc_links.each do |link| -%> +* <%= link.to_adoc %> +<% end # each link -%> +<% end # each normative rule -%> +|=== + +<% end # unless no normative rules -%> diff --git a/backends/portfolio/templates/test_procedures.adoc.erb b/backends/portfolio/templates/test_procedures.adoc.erb new file mode 100644 index 0000000000..051bec0530 --- /dev/null +++ b/backends/portfolio/templates/test_procedures.adoc.erb @@ -0,0 +1,27 @@ +<% unless db_obj.cert_test_procedures.empty? -%> +<% nice_name = db_obj.is_a?(CsrField) ? "#{db_obj.parent.name}.#{db_obj.name}" : db_obj.name -%> +<% if defined?(use_description_list) && use_description_list -%> +Test Procedures for `<%= nice_name %>`: :: +<% else -%> +==== Test Procedures for `<%= nice_name %>` +<% end -%> + +<% db_obj.cert_test_procedures.each do |tp| -%> +[%autowidth] +.*Test Procedure ID <%= tp.id %>* +|=== + +| *Test File Name* | <%= tp.test_file_name.nil? ? "None" : tp.test_file_name %> +| *Description* | <%= tp.description %> +| *Normative Rules* +a| +<% tp.cert_normative_rules.each do |cp| -%> +* <%= defined?(org) ? link_to_udb_doc_cov_pt(org, cp.id) : cp.id %> +<% end # each cp -%> +| *Steps* +a| +<%= tp.cert_steps %> +<% end # each test procedure -%> +|=== + +<% end # unless no test plans -%> diff --git a/backends/proc_cert/README.adoc b/backends/proc_cert/README.adoc new file mode 100644 index 0000000000..6bd20e8328 --- /dev/null +++ b/backends/proc_cert/README.adoc @@ -0,0 +1,2 @@ +This certification backend isn't a real backend. +Instead, it contains common Rake code and ERB templates shared by multiple processor certification backends. diff --git a/backends/proc_cert/tasks.rake b/backends/proc_cert/tasks.rake new file mode 100644 index 0000000000..8eb268fbfe --- /dev/null +++ b/backends/proc_cert/tasks.rake @@ -0,0 +1,43 @@ +# frozen_string_literal: true +# +# Contains common methods called from certification backend tasks.rake files. + +require "pathname" +require "asciidoctor-pdf" +require "asciidoctor-diagram" + +# @param erb_template_pname [String] Path to ERB template file +# @param target_pname [String] Full name of adoc file being generated +# @param model_name [String] Name of the processor certificate model +def proc_cert_create_adoc(erb_template_pname, target_pname, model_name) + # Create Architecture object without any knowledge of certificate model. + arch = pf_create_arch + + # Create ProcCertModel for specific processor certificate model as specified in its arch YAML file. + # The Architecture object also creates all other portfolio-related class instances from their arch YAML files. + # None of these objects are provided with a AbstractConfig or Design object when created. + puts "UPDATE: Creating ProcCertModel with only an Architecture object for #{model_name}" + proc_cert_model_with_arch = arch.proc_cert_model(model_name) + + # Create the ConfiguredArchitecture object with knowledge of the ProcCertModel. + # Needs a PortfolioGroup object so just create one with just one ProcCertModel (which is a child of Portfolio). + cfg_arch = pf_create_cfg_arch(PortfolioGroup.new(model_name, [proc_cert_model_with_arch])) + + puts "UPDATE: Creating ProcCertModel with a ConfiguredArchitecture object for #{model_name}" + proc_cert_model_with_cfg_arch = cfg_arch.proc_cert_model(model_name) + + # Create the one ProcCertDesign object required for the ERB evaluation using the cfg_arch. + puts "UPDATE: Creating ProcCertDesign object using processor certificate model #{model_name}" + proc_cert_design = ProcCertDesign.new(model_name, cfg_arch, ProcCertDesign.proc_ctp_type, proc_cert_model_with_cfg_arch, + proc_cert_model_with_cfg_arch.proc_cert_class) + + # Create empty binding and then specify explicitly which variables the ERB template can access. + # Seems to use this method name in stack backtraces (hence its name). + def evaluate_erb + binding + end + erb_binding = evaluate_erb + proc_cert_design.init_erb_binding(erb_binding) + + pf_create_adoc(erb_template_pname, erb_binding, target_pname, proc_cert_design) +end diff --git a/backends/proc_cert/templates/README.adoc b/backends/proc_cert/templates/README.adoc new file mode 100644 index 0000000000..f577b4556c --- /dev/null +++ b/backends/proc_cert/templates/README.adoc @@ -0,0 +1 @@ +This directory contains partial ERB templates shared by multiple processor certification-based backends. diff --git a/backends/proc_cert/templates/glossary.adoc.erb b/backends/proc_cert/templates/glossary.adoc.erb new file mode 100644 index 0000000000..ec2566df22 --- /dev/null +++ b/backends/proc_cert/templates/glossary.adoc.erb @@ -0,0 +1,20 @@ +.Glossary +[%autowidth] +|=== +| Term | Meaning + +| RISC-V | (Reduced Instruction Set Computer) architecture, version 5 +| RVI | RISC-V International (organization that oversees RISC-V) +| RVCP | RISC-V Certification Program +| TSC | Technical Steering Committee (branch of RVI that creates standards) +| CSC | Certification Steering Committee (branch of RVI that oversees the RVCP) +| CRD | Certification Requirements Document +| CTP | Certification Test Plan +| CSR | Control & Status Register (located inside processor, not memory-mapped) +| TBD | To Be Determined +| N/A | “Not Applicable” +| AKA | “Also Known As” +| Must | Indicates a mandatory requirement +| Should | Indicates a recommended requirement +| May | Indicates an optional requirement +|=== diff --git a/backends/proc_cert/templates/priv_modes.adoc.erb b/backends/proc_cert/templates/priv_modes.adoc.erb new file mode 100644 index 0000000000..8c707b9ad3 --- /dev/null +++ b/backends/proc_cert/templates/priv_modes.adoc.erb @@ -0,0 +1,13 @@ +=== Privileged Modes + +|=== +| M | S | U | HS | VS | VU + +| <% if proc_cert_model.in_scope_priv_modes.include?('M') -%> IN-SCOPE <% else -%> OUT-OF-SCOPE <% end -%> +| <% if proc_cert_model.in_scope_priv_modes.include?('S') -%> IN-SCOPE <% else -%> OUT-OF-SCOPE <% end -%> +| <% if proc_cert_model.in_scope_priv_modes.include?('U') -%> IN-SCOPE <% else -%> OUT-OF-SCOPE <% end -%> +| <% if proc_cert_model.in_scope_priv_modes.include?('HS') -%> IN-SCOPE <% else -%> OUT-OF-SCOPE <% end -%> +| <% if proc_cert_model.in_scope_priv_modes.include?('VS') -%> IN-SCOPE <% else -%> OUT-OF-SCOPE <% end -%> +| <% if proc_cert_model.in_scope_priv_modes.include?('VU') -%> IN-SCOPE <% else -%> OUT-OF-SCOPE <% end -%> + +|=== diff --git a/backends/proc_cert/templates/proc_naming_scheme.adoc.erb b/backends/proc_cert/templates/proc_naming_scheme.adoc.erb new file mode 100644 index 0000000000..2cb0120542 --- /dev/null +++ b/backends/proc_cert/templates/proc_naming_scheme.adoc.erb @@ -0,0 +1,14 @@ +RVCP components for processors have the following format for their : + + [<-base>] + +Where: + +* is MC for Microcontroller Class and AC for Apps-processor Class +* is 3-digit integer defined as follows: +** The hundreds's digit indicates the series +** The ten's digit identifies large differences in mandatory extensions (e.g., V, H) within the series +** The one's digit indentifies small/medium differences in mandatory extensions (e.g., Zicond, PMP) within the series +* is optional and is 32 for RV32I, 64 for RV64I, and 32E for RV32E +** If multiple bases are supported and is omitted in a reference, the reference applies to all bases +** If only one base is supported then is generally omitted diff --git a/backends/proc_cert/templates/related_specs.adoc.erb b/backends/proc_cert/templates/related_specs.adoc.erb new file mode 100644 index 0000000000..7816a9b0cf --- /dev/null +++ b/backends/proc_cert/templates/related_specs.adoc.erb @@ -0,0 +1,12 @@ +=== Related Specifications + +[cols="2,2,3,3,3"] +|=== +| Certificate Model | TSC Profile | Unpriv ISA Manual | Priv ISA Manual | Debug Manual + +| <%= proc_cert_model.name %> +| <%= proc_cert_model.tsc_profile_release.nil? ? "No profile" : proc_cert_model.tsc_profile_release.marketing_name %> +| <%= proc_cert_model.unpriv_isa_manual_revision %> +| <%= proc_cert_model.priv_isa_manual_revision %> +| <%= proc_cert_model.debug_manual_revision %> +|=== diff --git a/backends/proc_cert/templates/rev_history.adoc.erb b/backends/proc_cert/templates/rev_history.adoc.erb new file mode 100644 index 0000000000..f8da71d24c --- /dev/null +++ b/backends/proc_cert/templates/rev_history.adoc.erb @@ -0,0 +1,14 @@ +History of documentation changes that eventually lead to releases. + +[cols="1,1,5"] +|=== +| Date | Revision | Changes + +<% proc_cert_model.revision_history.each do |rev| -%> +| <%= rev.date %> +| <%= rev.revision %> +a| <% rev.changes.each do |change| %> +* <%= change %> +<% end -%> +<% end -%> +|=== diff --git a/backends/proc_cert/templates/rvcp_naming_scheme.adoc.erb b/backends/proc_cert/templates/rvcp_naming_scheme.adoc.erb new file mode 100644 index 0000000000..d0ad65289f --- /dev/null +++ b/backends/proc_cert/templates/rvcp_naming_scheme.adoc.erb @@ -0,0 +1,22 @@ +All components of the RVCP share the following naming scheme: + + Format: [v] + +Where: + +* Left & right square braces denote optional. +* Less-than & greater-than signs just separate fields (i.e., they aren't present in the CRD name). +* identifies the type of RISC-V standard (processor, non-processor system IP, or platform) along with + any other information required to identify the variant of that standard. +* identifies a particular release +** Format is [.[.]] +** Inspired by semantic versioning scheme (https://semver.org/) but doesn't follow it exactly + +The rules for updating , , and are defined by the type of RVCP component. +However, the follow these general guidelines: + +* A release of 0 is used for pre-release versions and release versions start with 1. +* The release number is updated when mandatory changes are made. +* The release number is updated when optional changes are made. +* The release number is updated for documentation fixes/improvements that don't affect + certificates already obtained for a particular implementation. diff --git a/backends/proc_cert/templates/typographic.adoc.erb b/backends/proc_cert/templates/typographic.adoc.erb new file mode 100644 index 0000000000..7b1aacdde8 --- /dev/null +++ b/backends/proc_cert/templates/typographic.adoc.erb @@ -0,0 +1,17 @@ +CSR field colors:: + +* Grey fields are reserved (WPRI) +* Green fields are present +* Red fields are defined by the RISC-V ISA but not present + +CSR field types:: + +[%autowidth] +|=== +| Abbreviation | Description + +<% CsrField::TYPE_DESC_MAP.each do |abbreviation, description| -%> +| <%= abbreviation %> +| <%= description %> +<% end -%> +|=== diff --git a/backends/proc_crd/tasks.rake b/backends/proc_crd/tasks.rake new file mode 100644 index 0000000000..a4e0a3969f --- /dev/null +++ b/backends/proc_crd/tasks.rake @@ -0,0 +1,93 @@ +# frozen_string_literal: true +# +# Contains Rake rules to generate adoc, PDF, and HTML for a CRD. + +require "pathname" + +PROC_CRD_DOC_DIR = Pathname.new "#{$root}/backends/proc_crd" +PROC_CRD_GEN_DIR = $root / "gen" / "proc_crd" + +Dir.glob("#{$root}/arch/proc_cert_model/*.yaml") do |f| + model_name = File.basename(f, ".yaml") + model_obj = YAML.load_file(f, permitted_classes: [Date]) + class_name = File.basename(model_obj['class']['$ref'].split("#")[0], ".yaml") + raise "Ill-formed processor certificate model file #{f}: missing 'class' field" if model_obj['class'].nil? + + file "#{PROC_CRD_GEN_DIR}/adoc/#{model_name}-CRD.adoc" => [ + __FILE__, + "#{$root}/arch/proc_cert_class/#{class_name}.yaml", + "#{$root}/arch/proc_cert_model/#{model_name}.yaml", + "#{$root}/lib/arch_obj_models/certificate.rb", + "#{$root}/lib/arch_obj_models/portfolio.rb", + "#{$root}/lib/portfolio_design.rb", + "#{$root}/backends/portfolio/templates/ext_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/inst_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/csr_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/beginning.adoc.erb", + "#{$root}/backends/proc_cert/templates/typographic.adoc.erb", + "#{$root}/backends/proc_cert/templates/rev_history.adoc.erb", + "#{$root}/backends/proc_cert/templates/related_specs.adoc.erb", + "#{$root}/backends/proc_cert/templates/priv_modes.adoc.erb", + "#{$root}/backends/proc_cert/templates/rev_history.adoc.erb", + "#{PROC_CRD_DOC_DIR}/templates/proc_crd.adoc.erb" + ] do |t| + proc_cert_create_adoc("#{PROC_CRD_DOC_DIR}/templates/proc_crd.adoc.erb", t.name, model_name) + end + + file "#{PROC_CRD_GEN_DIR}/pdf/#{model_name}-CRD.pdf" => [ + __FILE__, + "#{PROC_CRD_GEN_DIR}/adoc/#{model_name}-CRD.adoc" + ] do |t| + pf_adoc2pdf("#{PROC_CRD_GEN_DIR}/adoc/#{model_name}-CRD.adoc", t.name) + end + + file "#{PROC_CRD_GEN_DIR}/html/#{model_name}-CRD.html" => [ + __FILE__, + "#{PROC_CRD_GEN_DIR}/adoc/#{model_name}-CRD.adoc" + ] do |t| + pf_adoc2html("#{PROC_CRD_GEN_DIR}/adoc/#{model_name}-CRD.adoc", t.name) + end +end + +namespace :gen do + desc <<~DESC + Generate Processor CRD (Certification Requirements Document) as a PDF. + + Required options: + model_name - The name of the certification model under arch/proc_cert_model + DESC + task :proc_crd_pdf, [:model_name] do |_t, args| + model_name = args[:model_name] + if model_name.nil? + warn "Missing required option: 'model_name'" + exit 1 + end + + unless File.exist?("#{$root}/arch/proc_cert_model/#{model_name}.yaml") + warn "No certification model named '#{model_name}' found in arch/proc_cert_model" + exit 1 + end + + Rake::Task["#{PROC_CRD_GEN_DIR}/pdf/#{model_name}-CRD.pdf"].invoke + end + + desc <<~DESC + Generate Processor CRD (Certification Requirements Document) as an HTML file. + + Required options: + model_name - The name of the certification model under arch/proc_cert_model + DESC + task :proc_crd_html, [:model_name] do |_t, args| + if args[:model_name].nil? + warn "Missing required option: 'model_name'" + exit 1 + end + + unless File.exist?("#{$root}/arch/proc_cert_model/#{args[:model_name]}.yaml") + warn "No certification model named '#{args[:model_name]}' found in arch/proc_cert_model" + exit 1 + end + + Rake::Task["#{PROC_CRD_GEN_DIR}/html/#{args[:model_name]}-CRD.html"].invoke + end +end diff --git a/backends/proc_crd/templates/proc_crd.adoc.erb b/backends/proc_crd/templates/proc_crd.adoc.erb new file mode 100644 index 0000000000..d6a6beddd1 --- /dev/null +++ b/backends/proc_crd/templates/proc_crd.adoc.erb @@ -0,0 +1,361 @@ +<%= portfolio_design.include_erb("beginning.adoc.erb") %> + += <%= proc_cert_model.name %> Processor Certification Requirements Document + +[Preface] +== CRD Revision History + +<%= proc_cert_design.include_erb("rev_history.adoc.erb") %> + +[Preface] +== Typographic Conventions + +<%= proc_cert_design.include_erb("typographic.adoc.erb") %> + +[Preface] +== Glossary + +<%= proc_cert_design.include_erb("glossary.adoc.erb") %> + +== Introduction + +<%= proc_cert_model.introduction %> + +<%= proc_cert_class.introduction %> + +=== What's a CRD? + +Certification Requirements Documents (CRDs) list requirements an implementation must meet +to obtain an associated RVI (RISC-V International) certificate. +CRDs are developed by the RVI CSC (Certification Steering Committee) organization in collaboration +with the RVI TSC (Technical Steering Committee) organization who creates RISC-V standards. + +The CRDs refer to and augment information provided in existing ratified RVI standards. + +There are a variety of certificates offered by RVI to accomodate the various RVI standards. +There are certificates for processors, non-processor system IP (e.g., IOMMU), +and system platforms (processor + system IP) hardware standards. +There are multiple classes of processor certificates available to accomodate the wide range of +RISC-V implementations from basic microcontrollers to advanced Applications-class processors. + +Each CRD has a list of mandatory behaviors along with a list of optional behaviors. +Note that not all behaviors allowed in RISC-V standards are supported by a particular CRD. + +=== Naming Scheme + +==== CRD Naming + +<%= proc_cert_design.include_erb("rvcp_naming_scheme.adoc.erb") %> + +The specific rules for updating the version number of a CRD are as follows: + +* The release number is updated for changes that *could* cause a previously certified + implementation to no longer meet requirements. An example is requiring a new version of a standard. +* The release number is updated for increased support of optional behaviors. +* The release number is updated for documentation fixes/improvements. + These changes *cannot* cause a previously certified implementation to no longer meet requirements. + +==== Processor Naming + +<%= proc_cert_design.include_erb("proc_naming_scheme.adoc.erb") %> + +=== Requirements Terminology + +.Requirement Types +[%autowidth] +|=== +| Term | Meaning + +| MANDATORY | You have to implement it to get a certificate and the certificate tests will cover it +| OPTIONAL | It's up to you if you implement or not. If you claim to implement it, certificate tests will cover it +| IN-SCOPE | Either MANDATORY or OPTIONAL +| OUT-OF-SCOPE | It's up to you if you implement or not. If you implement it, it won't be certified but make sure you don't mess up anything we are certifying. +| INCOMPATIBLE | If you implement it you won't get a certificate +|=== + +.Definition of CSR Fields +[%autowidth] +|=== +| Field Type | Read Value After Writing Illegal Value | Read Value Function Of | Illegal Instruction Exception | Priv ISA Manual Quote + +| WLRL | Any deterministic legal or illegal value | Value before write and illegal value written | Optional +| Implementations are permitted but not required to raise an illegal-instruction exception if an instruction attempts to write a non-supported value to a WLRL field. Implementations can return arbitrary bit patterns on the read of a WLRL field when the last write was of an illegal value, but the value returned should deterministically depend on the illegal written value and the value of the field prior to the write. +| WARL | Any deterministic legal value | Any architectural hart state | Prohibited +| Implementations will not raise an exception on writes of unsupported values to a WARL field. Implementations can return any legal value on the read of a WARL field when the last write was of an illegal value, but the legal value returned should deterministically depend on the illegal written value and the architectural state of the hart. +| WPRI | 0 | Nothing | Not specified +| Some whole read/write fields are reserved for future use. Implementations that do not furnish these fields must make them read-only zero. +|=== + +*WARL (Write Anything, Read Legal)*: + +The Priv ISA requires reads of WARL fields to return some implementation-dependent deterministic legal value +after the field is written with an illegal value. +Certifying such behaviors is expensive and provides low value for a certificate since software can't rely +on a particular behavior from one implementation to another. + +Processor CRDs define writes to WARL fields of illegal values to be OUT-OF-SCOPE unless otherwise stated +(i.e., certification tests will only ever write legal values to WARL fields except for the special cases listed below). +When not OUT-OF-SCOPE, the required behavior is defined as this might be more constrained in implementations than +in the standard. + +The following special cases for WARL are supported when explicitly listed in the corresponding CRD CSR field requirements: + +1. Probing for Field Width + +* Some WARL fields are variable length such as the ASID field in the virtual memory extension. +* Here's the algorithm recommended to discover the ASID width: +** The number of implemented ASID bits, termed ASIDLEN, may be determined by writing one to every bit position in + the ASID field, then reading back the value in the satp CSR to see which bit positions in the ASID field hold a one. +* The RVCP-provided certification materials (certification tests, certification reference models) can map writes of + illegal values to the ASID field to the corresponding read value as long as they are provided the ASIDLEN value + for an implementation. + +2. Probing for Options + +* E.g., Writable misa bits + +3. Allowed values are a function of extension presence and/or their parameters + +* E.g., satp.mode legal write values + +*WLRL (Write Legal, Read Legal)*: + +The Priv ISA requires reads of WLRL fields to return some implementation-dependent deterministic arbitrary value +after the field is written with an illegal value. +Certifying such behaviors is expensive and provides low value for a certificate since software can't rely +on a particular behavior. +Processor CRDs define writes to WLRL fields of illegal values to be OUT-OF-SCOPE unless otherwise stated +(i.e., certification tests will only ever write legal values to WLRL fields). + +*WPRI (Write Preserve, Read Ignore)*: + +The Priv ISA requires reads of WPRI fields to return a value of 0. +Such WPRI fields are always unimplemented by definition. +Certification tests are aware of which fields in the CSRs are WPRI and normally write them with 0 but will +also write them with ~0 (all ones) and ensure that reads return 0 in both cases. +It is OUT-OF-SCOPE for certification tests to write all possible values of WPRI fields +(especially if they are more than just a few bits) and certification tests aren't intended to be comprehensive +verification test suites anyways. + +<%= proc_cert_design.include_erb("related_specs.adoc.erb") %> +<%= proc_cert_design.include_erb("priv_modes.adoc.erb") %> +<<< +== Extensions + +Any RISC-V extensions not listed in this section are OUT-OF-SCOPE. +The <%= proc_cert_model.name %> certificate doesn't cover their behaviors. + +<% Presence.presence_types_obj.each do |presence_obj| -%> + +=== <%= presence_obj.to_s.capitalize %> Extensions + +<% ext_reqs = proc_cert_model.in_scope_ext_reqs(presence_obj) -%> +<% if ext_reqs.empty? -%> +None +<% else -%> +The <%= proc_cert_model.name %> certificate has <%= ext_reqs.size %> <%= presence_obj.to_s %> extensions. + +[%autowidth] +|=== +| Requirement ID | Extension | Version | Long Name | Note + +<% ext_reqs.each do |ext_req| -%> +<% ext = arch.extension(ext_req.name) -%> +| <%= ext_req.req_id %> +| <%= link_to_udb_doc_ext(ext_req.name) %> +| <%= ext_req.requirement_specs.map(&:to_s).join(", ") %> +| <%= ext.nil? ? "" : ext.long_name %> +| <%= ext_req.note.nil? ? "" : ext_req.note %> +<% end # each ext_req -%> +|=== +<% end # if empty ext_reqs -%> + +<% proc_cert_model.extra_notes_for_presence(presence_obj)&.each do |extra_note| -%> +NOTE: <%= extra_note.text %> + +<% end # each extra_note -%> + +<% end # each possible presence -%> + +<% unless proc_cert_model.recommendations.empty? -%> +=== Recommendations + +Recommendations are not strictly mandated but are included to guide implementers. + +<% proc_cert_model.recommendations.each do |recommendation| -%> +<%= recommendation.text %> +<% end # each recommendation -%> +<% end # unless recommendations empty -%> + +<<< +== Implementation-dependencies + +RISC-V standards support many implementation-defined parameters. In many cases, there +are no names associated with these parameters. Names are defined in this section when +not provided in the associated standard. + +=== IN-SCOPE Parameters + +These implementation-dependent options defined by MANDATORY or OPTIONAL extensions are IN-SCOPE. +An implementation must abide by the "Allowed Value(s)" to obtain a certificate. +If the "Allowed Value(s)" is "Any" then any value allowed by the type is acceptable. + +<% if portfolio_design.all_in_scope_params.empty? -%> +None +<% else -%> +The <%= proc_cert_model.name %> certificate has <%= portfolio_design.all_in_scope_params.size %> IN-SCOPE parameters. + +[cols="4,2,1,1,2"] +|=== +| Parameter | Type | Allowed Value(s) | Extension(s) | Note + +<% portfolio_design.all_in_scope_params.each do |in_scope_param| -%> +<% param = in_scope_param.param -%> +<% in_scope_exts = portfolio_design.all_in_scope_exts_with_param(param) -%> +| <%= param.name_potentially_with_link(in_scope_exts) %> +| <%= param.schema_type %> +| <%= in_scope_param.allowed_values %> +| <%= in_scope_exts.map { |ext| link_to_udb_doc_ext_param(ext.name, param.name, ext.name) }.join(", ") %> +a| <%= in_scope_param.note %> +<% end # do -%> +|=== +<% end # if table -%> + +=== OUT-OF-SCOPE Parameters + +These implementation-dependent options defined by MANDATORY or OPTIONAL extensions are OUT-OF-SCOPE. +There are no restrictions on their values for certification purposes because the certificate +doesn't cover the behavior of the associated RISC-V standard as a function of these parameters. + +<% if portfolio_design.all_out_of_scope_params.empty? -%> +None +<% else -%> +The <%= proc_cert_model.name %> certificate has <%= portfolio_design.all_out_of_scope_params.size %> OUT-OF-SCOPE parameters. + +[%autowidth] +|=== +| Parameters | Type | Extension(s) + +<% portfolio_design.all_out_of_scope_params.each do |param| -%> +<% exts = portfolio_design.all_in_scope_exts_without_param(param) -%> +| <%= param.name_potentially_with_link(exts) %> +| <%= param.schema_type %> +| <%= exts.map { |ext| link_to_udb_doc_ext_param(ext.name, param.name, ext.name) }.join(", ") %> + +<% end # do -%> +|=== +<% end # if table -%> + +== Traps + +RISC-V supports both synchronous exceptions and asynchronous interrupts. +TODO: List only traps that exist in this processor certificate model (currently lists all possible in present extensions). +See https://github.com/riscv-software-src/riscv-unified-db/issues/291 and https://github.com/riscv-software-src/riscv-unified-db/issues/324 +TODO: Show traps per privilege mode + +=== Synchronous Exceptions + +|=== +| `xcause.CODE` CSR Field Value | Name +<% portfolio_design.in_scope_exception_codes.sort_by{ |code| code.num }.each do |code| -%> +| <%= code.num %> | <%= code.name %> +<% end -%> +|=== + +=== Asynchronous Interrupts + +|=== +| `xcause.CODE` CSR Field Value | Name +<% portfolio_design.in_scope_interrupt_codes.sort_by{ |code| code.num }.each do |code| -%> +| <%= code.num %> | <%= code.name %> +<% end -%> +|=== + +== Instruction Summary + +The <%= proc_cert_model.name %> certificate has up to <%= portfolio_design.in_scope_instructions.size %> instructions +(exact number depends on an implementation's options). + +[%autowidth] +|=== +| Name | Long Name + +<% portfolio_design.in_scope_instructions.each do |inst| -%> +| <%= link_to_udb_doc_inst(inst.name) %> +| <%= inst.long_name %> +<% end # do -%> +|=== + +== CSR Summary + +The <%= proc_cert_model.name %> certificate has up to <%= portfolio_design.in_scope_csrs.size %> CSRs +(exact number depends on an implementation's options). + +=== By Name + +[%autowidth] +|=== +| Name | Long Name | Address | Mode | Primary Extension + +<% portfolio_design.in_scope_csrs.sort_by!(&:name).each do |csr| -%> +| <%= link_to_udb_doc_csr(csr.name) %> +| <%= csr.long_name %> +| <%= "0x#{csr.address.to_s(16)}" %> +| <%= csr.priv_mode %> +| <%= csr.primary_defined_by %> +<% end # do -%> +|=== + +=== By Address + +[%autowidth] +|=== +| Address | Mode | Name | Long Name | Primary Extension + +<% portfolio_design.in_scope_csrs.sort_by!(&:address).each do |csr| -%> +| <%= "0x#{csr.address.to_s(16)}" %> +| <%= csr.priv_mode %> +| <%= link_to_udb_doc_csr(csr.name) %> +| <%= csr.long_name %> +| <%= csr.primary_defined_by %> +<% end # do -%> +|=== + +<% unless proc_cert_model.requirement_groups.empty? -%> +== Additional Requirements + +This section contains requirements in addition to those already specified related to extensions and parameters. +These additional requirements are organized as groups of related requirements. + +<% proc_cert_model.requirement_groups.each do |group| -%> +=== <%= group.name %> + +<%= group.description %> + +<% unless group.when.nil? -%> +[IMPORTANT] +<%= group.name %> requirements only apply when <%= group.when_pretty %>. +<% end -%> + +[%autowidth] +|=== +| Req Number | Description + +<% group.requirements.each do |req| -%> +| <%= req.name %> +a| <%= req.description %> +<% unless req.when.nil? -%> +[IMPORTANT] +Requirement <%= req.name %> only apply when <%= req.when_pretty %>. +<% end -%> +<% end -%> +|=== + +<% end -%> +<% end # unless requirement_groups.empty? -%> + +// Appendices +<%= portfolio_design.include_erb("ext_appendix.adoc.erb") %> +<%= portfolio_design.include_erb("inst_appendix.adoc.erb") %> +<%= portfolio_design.include_erb("csr_appendix.adoc.erb") %> +<%= portfolio_design.include_erb("idl_func_appendix.adoc.erb") %> diff --git a/backends/proc_ctp/tasks.rake b/backends/proc_ctp/tasks.rake new file mode 100644 index 0000000000..4c8e702add --- /dev/null +++ b/backends/proc_ctp/tasks.rake @@ -0,0 +1,95 @@ +# frozen_string_literal: true +# +# Contains Rake rules to generate adoc, PDF, and HTML for a CTP (Certification Test Plan). + +require "pathname" + +PROC_CTP_DOC_DIR = Pathname.new "#{$root}/backends/proc_ctp" +PROC_CTP_GEN_DIR = $root / "gen" / "proc_ctp" + +Dir.glob("#{$root}/arch/proc_cert_model/*.yaml") do |f| + model_name = File.basename(f, ".yaml") + model_obj = YAML.load_file(f, permitted_classes: [Date]) + class_name = File.basename(model_obj['class']['$ref'].split("#")[0], ".yaml") + raise "Ill-formed processor certificate model file #{f}: missing 'class' field" if model_obj['class'].nil? + + file "#{PROC_CTP_GEN_DIR}/adoc/#{model_name}-CTP.adoc" => [ + __FILE__, + "#{$root}/arch/proc_cert_class/#{class_name}.yaml", + "#{$root}/arch/proc_cert_model/#{model_name}.yaml", + "#{$root}/lib/arch_obj_models/certificate.rb", + "#{$root}/lib/arch_obj_models/portfolio.rb", + "#{$root}/lib/portfolio_design.rb", + "#{$root}/backends/portfolio/templates/ext_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/inst_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/csr_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/beginning.adoc.erb", + "#{$root}/backends/portfolio/templates/normative_rules.adoc.erb", + "#{$root}/backends/portfolio/templates/test_procedures.adoc.erb", + "#{$root}/backends/proc_cert/templates/typographic.adoc.erb", + "#{$root}/backends/proc_cert/templates/rev_history.adoc.erb", + "#{$root}/backends/proc_cert/templates/related_specs.adoc.erb", + "#{$root}/backends/proc_cert/templates/priv_modes.adoc.erb", + "#{PROC_CTP_DOC_DIR}/templates/proc_ctp.adoc.erb" + ] do |t| + pf_get_latest_csc_isa_manual(t.name) + proc_cert_create_adoc("#{PROC_CTP_DOC_DIR}/templates/proc_ctp.adoc.erb", t.name, model_name) + end + + file "#{PROC_CTP_GEN_DIR}/pdf/#{model_name}-CTP.pdf" => [ + __FILE__, + "#{PROC_CTP_GEN_DIR}/adoc/#{model_name}-CTP.adoc" + ] do |t| + pf_adoc2pdf("#{PROC_CTP_GEN_DIR}/adoc/#{model_name}-CTP.adoc", t.name) + end + + file "#{PROC_CTP_GEN_DIR}/html/#{model_name}-CTP.html" => [ + __FILE__, + "#{PROC_CTP_GEN_DIR}/adoc/#{model_name}-CTP.adoc" + ] do |t| + pf_adoc2html("#{PROC_CTP_GEN_DIR}/adoc/#{model_name}-CTP.adoc", t.name) + end +end + +namespace :gen do + desc <<~DESC + Generate Processor CTP (Certification Test Plan) as a PDF. + + Required options: + model_name - The name of the certification model under arch/proc_cert_model + DESC + task :proc_ctp_pdf, [:model_name] do |_t, args| + model_name = args[:model_name] + if model_name.nil? + warn "Missing required option: 'model_name'" + exit 1 + end + + unless File.exist?("#{$root}/arch/proc_cert_model/#{model_name}.yaml") + warn "No certification model named '#{model_name}' found in arch/proc_cert_model" + exit 1 + end + + Rake::Task["#{PROC_CTP_GEN_DIR}/pdf/#{model_name}-CTP.pdf"].invoke + end + + desc <<~DESC + Generate Processor CTP (Certification Test Plan) as an HTML file. + + Required options: + model_name - The name of the certification model under arch/proc_cert_model + DESC + task :proc_ctp_html, [:model_name] do |_t, args| + if args[:model_name].nil? + warn "Missing required option: 'model_name'" + exit 1 + end + + unless File.exist?("#{$root}/arch/proc_cert_model/#{args[:model_name]}.yaml") + warn "No certification model named '#{args[:model_name]}' found in arch/proc_cert_model" + exit 1 + end + + Rake::Task["#{PROC_CTP_GEN_DIR}/html/#{args[:model_name]}-CTP.html"].invoke + end +end diff --git a/backends/proc_ctp/templates/proc_ctp.adoc.erb b/backends/proc_ctp/templates/proc_ctp.adoc.erb new file mode 100644 index 0000000000..8717eee99a --- /dev/null +++ b/backends/proc_ctp/templates/proc_ctp.adoc.erb @@ -0,0 +1,189 @@ +<%= portfolio_design.include_erb("beginning.adoc.erb") %> + +// Book title. Need "":doctype: book" immediately after book title (no blank lines allowed). += <%= proc_cert_model.name %> Processor CTP (Certification Test Plan) +:doctype: book + +[preface] += CTP Book Structure + +A CTP book is composed of 3 book parts as follows: + +* <> is the core CTP documentation including an appendix each for extension, instruction, and CSR + that could be present in a certificate. +* <> is the RISC-V Unprivileged ISA manual, volume I (uses release specified by the certificate) +* <> is the RISC-V Privileged ISA manual, volume II (uses release specified by the certificate) + +// Part 1 title +[#udb:doc] += <%= proc_cert_model.name %> Processor Certification Test Plan: Part 1 + +[Preface] +== CTP Revision History + +<%= proc_cert_design.include_erb("rev_history.adoc.erb") %> + +[Preface] +== Typographic Conventions + +<%= proc_cert_design.include_erb("typographic.adoc.erb") %> + +[Preface] +== Glossary + +<%= proc_cert_design.include_erb("glossary.adoc.erb") %> + +== Introduction + +<%= proc_cert_model.introduction %> + +<%= proc_cert_class.introduction %> + +=== What's a CTP? + +Certification Test Plans (CTPs) list certification normative rules and how they will be tested via +certification test procedures (step by step descriptions of tests). +CTPs are developed by the RVI CSC (Certification Steering Committee) organization in collaboration +with the RVI TSC (Technical Steering Committee) organization who creates RISC-V standards including +the RISC-V Unprivileged and Privileged ISA manuals. + +Each certificate has a corresponding CRD and CTP: + +* The CRD defines the certification requirements an implementation must meet to obtain certification. +* The CTP defines the certification normative rules and certification test procedures followed by the certification + tests that an implementation must pass to obtain certification. + +The certification normative rules reference text in any or all of the following: + +* RISC-V ISA manuals in parts 2 and 3 +* Community-generated documentation located in part 1 (https://github.com/riscv-software-src/riscv-unified-db) +* IDL (ISA Description Language) executable psuedo-code descriptions located in part 1 + +The RISC-V ISA manuals are the preferred reference for certification normative rules since these manuals +represent the ratified RISC-V standards. +However, if the information in the ISA manuals isn't sufficiently clear or complete for certification purposes +the content in Part 1 is used. + +=== Naming Scheme + +==== CTP Naming + +<%= proc_cert_design.include_erb("rvcp_naming_scheme.adoc.erb") %> + +The specific rules for updating the version number for a CTP are as follows: + +* The release number is updated for changes that *could* cause a previously certified + implementation to now fail. An example is increasing coverage. +* The release number is updated when the CRD referenced by a CTP adds support for new optional behaviors. +* The release number is updated for documentation fixes/improvements. + These changes *cannot* cause a previously certified implementation to no longer pass certification. + +==== Processor Naming Scheme + +<%= proc_cert_design.include_erb("proc_naming_scheme.adoc.erb") %> + +<%= proc_cert_design.include_erb("related_specs.adoc.erb") %> +<%= proc_cert_design.include_erb("priv_modes.adoc.erb") %> + +== Normative Rule View + +This section contains a view of the normative rule information organized by kind +(i.e., extension, instruction, or CSR). +This document is generated by a database backend so all views of the information are consistent. + +=== Extension Normative Rules + +<% proc_cert_model.in_scope_extensions.each do |ext| -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => ext, "org" => "sep"}) %> +<% end -%> + +=== Instruction Normative Rules + +<% proc_cert_model.in_scope_instructions(portfolio_design).each do |inst| -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => inst, "org" => "sep"}) %> +<% end -%> + +=== CSR Normative Rules + +<% proc_cert_model.in_scope_csrs(portfolio_design).each do |csr| -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => csr, "org" => "sep" }) %> +<% csr.possible_fields.each do |field| -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => field, "org" => "sep" }) %> +<% end -%> +<% end -%> + +== Test Procedure View + +This section contains just view of the test procedure information organized by kind +(i.e., extension, instruction, or CSR). +This document is generated by a database backend so all views of the information are consistent. + +=== Extension Test Procedures + +<% proc_cert_model.in_scope_extensions.each do |ext| -%> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => ext, "org" => "sep" }) %> +<% end -%> + +=== Instruction Test Procedures + +<% proc_cert_model.in_scope_instructions(portfolio_design).each do |inst| -%> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => inst, "org" => "sep" }) %> +<% end -%> + +=== CSR Test Procedures + +<% proc_cert_model.in_scope_csrs(portfolio_design).each do |csr| -%> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => csr, "org" => "sep" }) %> +<% csr.possible_fields.each do |field| -%> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => field, "org" => "sep" }) %> +<% end -%> +<% end -%> + +== Combined View + +This section contains a combined view of the normative rule and test procedure information organized +by kind (i.e., extension, instruction, or CSR). +This document is generated by a database backend so all views of the information are consistent. + +=== Extension Normative Rules & Test Procedures + +<% proc_cert_model.in_scope_extensions.each do |ext| -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => ext, "org" => "combo"}) %> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => ext, "org" => "combo"}) %> +<% end -%> + +=== Instruction Normative Rules & Test Procedures + +<% proc_cert_model.in_scope_instructions(portfolio_design).each do |inst| -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => inst, "org" => "combo"}) %> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => inst, "org" => "combo"}) %> +<% end -%> + +=== CSR Normative Rules & Test Procedures + +<% proc_cert_model.in_scope_csrs(portfolio_design).each do |csr| -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => csr, "org" => "combo"}) %> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => csr, "org" => "combo"}) %> +<% csr.possible_fields.each do |field| -%> +<%= portfolio_design.include_erb("normative_rules.adoc.erb", { "db_obj" => field, "use_description_list" => true, "org" => "combo"}) %> +<%= portfolio_design.include_erb("test_procedures.adoc.erb", { "db_obj" => field, "use_description_list" => true, "org" => "combo"}) %> +<% end -%> +<% end -%> + +// Appendices +<%= portfolio_design.include_erb("ext_appendix.adoc.erb", { "gen_ctp_content" => true }) %> +<%= portfolio_design.include_erb("inst_appendix.adoc.erb", { "gen_ctp_content" => true }) %> +<%= portfolio_design.include_erb("csr_appendix.adoc.erb", { "gen_ctp_content" => true }) %> +<%= portfolio_design.include_erb("idl_func_appendix.adoc.erb") %> + +<<< +<% puts "UPDATE: Including riscv-unprivileged.adoc" -%> +// Reset chapter numbering +:!chapter-number: +include::ext/riscv-isa-manual/src/riscv-unprivileged.adoc[] + +<<< +<% puts "UPDATE: Including riscv-privileged.adoc" -%> +// Reset chapter numbering +:!chapter-number: +include::ext/riscv-isa-manual/src/riscv-privileged.adoc[] diff --git a/backends/profile/tasks.rake b/backends/profile/tasks.rake new file mode 100644 index 0000000000..867a31faf5 --- /dev/null +++ b/backends/profile/tasks.rake @@ -0,0 +1,137 @@ +# frozen_string_literal: true +# +# Contains Rake rules to generate adoc, PDF, and HTML for a profile release. + +require "pathname" + +PROFILE_DOC_DIR = Pathname.new "#{$root}/backends/profile" +PROFILE_GEN_DIR = $root / "gen" / "profile" + +Dir.glob("#{$root}/arch/profile_release/*.yaml") do |f| + release_name = File.basename(f, ".yaml") + release_obj = YAML.load_file(f, permitted_classes: [Date]) + raise "Can't parse #{f}" if release_obj.nil? + + raise "Ill-formed profile release file #{f}: missing 'class' field" if release_obj['class'].nil? + class_name = File.basename(release_obj['class']['$ref'].split("#")[0], ".yaml") + raise "Ill-formed profile release file #{f}: can't parse class name" if class_name.nil? + + raise "Ill-formed profile release file #{f}: missing 'profiles' field" if release_obj['profiles'].nil? + profile_names = release_obj['profiles'].map {|p| File.basename(p['$ref'].split("#")[0], ".yaml") } + raise "Ill-formed profile release file #{f}: can't parse profile names" if profile_names.nil? + + profile_pathnames = profile_names.map {|profile_name| "#{$root}/arch/profile/#{profile_name}.yaml" } + + file "#{PROFILE_GEN_DIR}/adoc/#{release_name}ProfileRelease.adoc" => [ + __FILE__, + "#{$root}/arch/profile_class/#{class_name}.yaml", + "#{$root}/arch/profile_release/#{release_name}.yaml", + "#{$root}/lib/arch_obj_models/profile.rb", + "#{$root}/lib/arch_obj_models/portfolio.rb", + "#{$root}/lib/portfolio_design.rb", + "#{$root}/lib/backend_helpers.rb", + "#{$root}/backends/portfolio/templates/ext_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/inst_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/csr_appendix.adoc.erb", + "#{$root}/backends/portfolio/templates/beginning.adoc.erb", + "#{PROFILE_DOC_DIR}/templates/profile.adoc.erb" + ].concat(profile_pathnames) do |t| + # Create architecture object without any knowledge of the profile release. + # Just used to get the PortfolioGroup object. + arch = pf_create_arch + + # Create ProfileRelease for specific profile release as specified in its arch YAML file. + # The Architecture object also creates all other portfolio-related class instances from their arch YAML files. + # None of these objects are provided with a AbstractConfig or Design object when created. + puts "UPDATE: Creating ProfileRelease with only an Architecture object for #{release_name}" + profile_release_with_arch = arch.profile_release(release_name) + + # Now create a ConfiguredArchitecture object for the PortfolioDesign. + cfg_arch = pf_create_cfg_arch(profile_release_with_arch.portfolio_grp) + + puts "UPDATE: Creating ProfileRelease with a ConfiguredArchitecture object for #{release_name}" + profile_release_with_cfg_arch = cfg_arch.profile_release(release_name) + profile_class_with_cfg_arch = profile_release_with_cfg_arch.profile_class + + # Create the one PortfolioDesign object required for the ERB evaluation. + # Provide it with all the profiles in this ProfileRelease. + puts "UPDATE: Creating PortfolioDesign object using profile release #{release_name}" + portfolio_design = PortfolioDesign.new( + release_name, + cfg_arch, + PortfolioDesign.profile_release_type, + profile_release_with_cfg_arch.profiles, + profile_release_with_cfg_arch.profile_class + ) + + # Create empty binding and then specify explicitly which variables the ERB template can access. + # Seems to use this method name in stack backtraces (hence its name). + def evaluate_erb + binding + end + erb_binding = evaluate_erb + portfolio_design.init_erb_binding(erb_binding) + erb_binding.local_variable_set(:profile_release, profile_release_with_cfg_arch) + erb_binding.local_variable_set(:profile_class, profile_release_with_cfg_arch.profile_class) + + pf_create_adoc("#{PROFILE_DOC_DIR}/templates/profile.adoc.erb", erb_binding, t.name, portfolio_design) + end + + file "#{PROFILE_GEN_DIR}/pdf/#{release_name}ProfileRelease.pdf" => [ + __FILE__, + "#{PROFILE_GEN_DIR}/adoc/#{release_name}ProfileRelease.adoc" + ] do |t| + pf_adoc2pdf("#{PROFILE_GEN_DIR}/adoc/#{release_name}ProfileRelease.adoc", t.name) + end + + file "#{PROFILE_GEN_DIR}/html/#{release_name}ProfileRelease.html" => [ + __FILE__, + "#{PROFILE_GEN_DIR}/adoc/#{release_name}ProfileRelease.adoc" + ] do |t| + pf_adoc2html("#{PROFILE_GEN_DIR}/adoc/#{release_name}ProfileRelease.adoc", t.name) + end +end + +namespace :gen do + desc <<~DESC + Generate profile documentation for a profile release as a PDF. + + Required options: + release_name - The name of the profile release under arch/profile_release + DESC + task :profile_release_pdf, [:release_name] do |_t, args| + release_name = args[:release_name] + if release_name.nil? + warn "Missing required option: 'release_name'" + exit 1 + end + + unless File.exist?("#{$root}/arch/profile_release/#{release_name}.yaml") + warn "No profile release named '#{release_name}' found in arch/profile_release" + exit 1 + end + + Rake::Task["#{PROFILE_GEN_DIR}/pdf/#{release_name}ProfileRelease.pdf"].invoke + end + + desc <<~DESC + Generate profile documentation for a profile release as an HTML. + + Required options: + release_name - The name of the profile release under arch/profile_release + DESC + task :profile_release_html, [:release_name] do |_t, args| + release_name = args[:release_name] + if release_name.nil? + warn "Missing required option: 'release_name'" + exit 1 + end + + unless File.exist?("#{$root}/arch/profile_release/#{release_name}.yaml") + warn "No profile release named '#{release_name}' found in arch/profile_release" + exit 1 + end + + Rake::Task["#{PROFILE_GEN_DIR}/html/#{release_name}ProfileRelease.html"].invoke + end +end diff --git a/backends/profile_doc/templates/profile.adoc.erb b/backends/profile/templates/profile.adoc.erb similarity index 63% rename from backends/profile_doc/templates/profile.adoc.erb rename to backends/profile/templates/profile.adoc.erb index d4d1d40ada..e46f1e8793 100644 --- a/backends/profile_doc/templates/profile.adoc.erb +++ b/backends/profile/templates/profile.adoc.erb @@ -1,58 +1,9 @@ -[[header]] -:description: <%= profile_release.marketing_name %> Profile -:revdate: <%= profile_release.ratification_date.nil? ? Date.today : profile_release.ratification_date %> +<%= portfolio_design.include_erb("beginning.adoc.erb") %> -// TODO - Figure out what we really want here - Change percent hash to percent equals. -// :revnumber: <%# profile_release.map(&:version).sort.last %> - -:revmark: "TODO: revmark" -:company: <%= profile_class.company.name %> -:url-riscv: https://riscv.org -:doctype: book -:preface-title: Licensing and Acknowledgements -:colophon: -:appendix-caption: Appendix -:title-logo-image: image:risc-v_logo.png["RISC-V International Logo",pdfwidth=3.25in,align=center] +:revdate: <%= profile_release.ratification_date.nil? ? Date.today : profile_release.ratification_date %> <%# unless profile_release.state == "ratified" -%> :page-background-image: image:draft.png[opacity=20%] <%# end -%> -:back-cover-image: image:riscv-horizontal-color.svg[opacity=25%] -// Settings -:experimental: -:reproducible: -:wavedrom: <%= $root %>/node_modules/.bin/wavedrom-cli -// TODO: needs to be changed -:imagesoutdir: images -:icons: font -:lang: en -:example-caption: Example -:listing-caption: Listing -:table-caption: Table -:figure-caption: Figure -:xrefstyle: short -:chapter-refsig: Chapter -:section-refsig: Section -:appendix-refsig: Appendix -:sectnums: -:toc: left -:toclevels: 5 -:source-highlighter: pygments -ifdef::backend-pdf[] -:source-highlighter: rouge -endif::[] -:data-uri: -:hide-uri-scheme: -:stem: -:footnote: -:stem: latexmath -:footnote: -:le: ≤ -:ge: ≥ -:ne: ≠ -:approx: ≈ -:inf: ∞ -:csrname: envcfg -:imagesdir: images = <%= profile_release.name %> Profile Release @@ -225,7 +176,7 @@ A profile may specify that certain conditions will cause a requested trap (such as an `ecall` made in the highest-supported privilege mode) or fatal trap to the enclosing execution environment. The profile does not specify the behavior of the enclosing execution environment -in handling requested or fatal traps. +iusually n handling requested or fatal traps. NOTE: In particular, a profile does not specify the set of ECALLs available in the outer execution environment. This should be @@ -312,10 +263,6 @@ are by definition non-profile extensions. For example, mandatory or optional profile extensions for a new profile might be prototyped as non-profile extensions on an earlier profile. -// XXX - Need to create render() Ruby function. -// See https://github.com/riscv-software-src/riscv-unified-db/issues/59 -// <%# render("#{$root}/backends/portfolio_doc/templates/family_intro.erb", portfolio_class: profile_class) %> - == <%= profile_class.name %> Profile Class <%= profile_class.introduction %> @@ -351,7 +298,7 @@ Ratification date:: <%= profile_release.ratification_date %> <%= profile_release.introduction %> -<%= profile_release.marketing_name %> has <%= profile_release.referenced_extensions.reduce(0) { |sum, ext| sum + ext.params.size } %> +<%= profile_release.marketing_name %> has <%= profile_release.in_scope_extensions.reduce(0) { |sum, ext| sum + ext.params.size } %> associated implementation-defined parameters across all its defined profiles. <% unless profile_release.description.nil? -%> @@ -365,7 +312,7 @@ associated implementation-defined parameters across all its defined profiles. <%= profile.introduction %> -<% ExtensionPresence.presence_types.each do |presence_type| -%> +<% Presence.presence_types.each do |presence_type| -%> ==== <%= presence_type.capitalize %> Extensions @@ -384,10 +331,10 @@ Recommendations are not strictly mandated but are included to guide implementers ==== Implementation-dependencies -<%= profile.marketing_name %> has <%= profile.referenced_extensions.reduce(0) { |sum, ext| sum + ext.params.size } %> +<%= profile.marketing_name %> has <%= profile.in_scope_extensions.reduce(0) { |sum, ext| sum + ext.params.size } %> associated implementation-defined parameters. -<% profile.referenced_extensions.each do |ext| -%> +<% profile.in_scope_extensions.each do |ext| -%> <% ext.params.sort_by { |p| p.name }.each do |param| -%> <%= param.name %>:: + @@ -406,13 +353,13 @@ associated implementation-defined parameters. === <%= profile_class.processor_kind %> Profile Releases The <%= profile_class.processor_kind %> processor kind has <%= profile_class.profile_releases_matching_processor_kind.size %> processor -profile releases that reference a total of <%= profile_class.referenced_extensions_matching_processor_kind.size %> extensions. +profile releases that reference a total of <%= profile_class.in_scope_extensions_matching_processor_kind.size %> extensions. .Extension Presence |=== | Extension | <%= profile_class.profile_releases_matching_processor_kind.map(&:marketing_name).join(" | ") %> -<% profile_class.referenced_extensions_matching_processor_kind.sort_by(&:name).each do |ext| -%> +<% profile_class.in_scope_extensions_matching_processor_kind.sort_by(&:name).each do |ext| -%> | <%= ext.name %> | <%= profile_class.profile_releases_matching_processor_kind.map { |profile_release| profile_release.extension_presence(ext.name) }.join(" | ") %> <% end -%> |=== @@ -420,13 +367,13 @@ profile releases that reference a total of <%= profile_class.referenced_extensio === <%= profile_class.marketing_name %> Profile Releases The <%= profile_class.marketing_name %> Profile Class has <%= profile_class.profile_releases.size %> releases that -reference a total of <%= profile_class.referenced_extensions.size %> extensions. +reference a total of <%= profile_class.in_scope_extensions.size %> extensions. .Extension Presence |=== | Extension | <%= profile_class.profile_releases.map(&:marketing_name).join(" | ") %> -<% profile_class.referenced_extensions.sort_by(&:name).each do |ext| -%> +<% profile_class.in_scope_extensions.each do |ext| -%> | <%= ext.name %> | <%= profile_class.profile_releases.map { |profile_release| profile_release.extension_presence(ext.name) }.join(" | ") %> <% end -%> |=== @@ -434,7 +381,7 @@ reference a total of <%= profile_class.referenced_extensions.size %> extensions. === <%= profile_release.marketing_name %> Profiles The <%= profile_release.marketing_name %> Profile Release has <%= profile_release.profiles.size %> profiles that -reference a total of <%= profile_release.referenced_extensions.size %> extensions. +reference a total of <%= profile_release.in_scope_extensions.size %> extensions. [NOTE] Extensions present in a profile are also present in higher-privileged profiles in the same profile release. @@ -443,300 +390,12 @@ Extensions present in a profile are also present in higher-privileged profiles i |=== | Extension | <%= profile_release.profiles.map(&:marketing_name).join(" | ") %> -<% profile_release.referenced_extensions.sort_by(&:name).each do |ext| -%> +<% profile_release.in_scope_extensions.each do |ext| -%> | <%= ext.name %> | <%= profile_release.profiles.map { |profile| profile.extension_presence(ext.name) }.join(" | ") %> <% end -%> |=== -<<< -[appendix] -== Extension Details - -<% profile_release.referenced_extensions.sort.each do |ext| -%> -<<< -=== <%= ext.name %> Extension -<%= ext.long_name %> - -.<%= ext.name %> Extension Presence -|=== -| Profile | v<%= ext.versions.map { |ext_ver| ext_ver.canonical_version.to_s }.join(" | v") %> - -<% profile_release.profiles.each do |profile| -%> -| <%= profile.marketing_name %> | <%= profile.version_greatest_presence(ext.name, ext.versions).join(" | ") -%> -<% end -%> - -|=== - -<% ext.versions.each do |v| -%> -<%= v.canonical_version %>:: - State::: - <%= v.state %> - <% if v.state == "ratified" && !v.ratification_date.nil? -%> - Ratification date::: - <%= v.ratification_date %> - <% end # if %> - <% unless v.changes.empty? -%> - Changes::: - - <% v.changes.each do |c| -%> - * <%= c %> - <% end -%> - - <% end -%> - <% unless v.url.nil? -%> - Ratification document::: - <%= v.url %> - <% end -%> - <% unless v.implications -%> - Implies::: - <% v.implications.each do |i| -%> - * `<%= i.name %>` version <%= i.version %> - <% end -%> - <% end -%> -<% end -%> - -==== Synopsis - -:leveloffset: +3 - -<%= ext.description %> - -:leveloffset: -3 - -// TODO: GitHub issue 92: Use version specified by each profile and add version info to inst table below. -<%- insts = ext.instructions -%> -<%- unless insts.empty? -%> -==== Instructions - -The following instructions are added by this extension: - -[cols="1,3"] -|=== -<% insts.sort.each do |inst| -%> - | <%= "`#{inst.name}`" %> | *<%= inst.long_name %>* -<% end -%> -|=== -<% end -%> - -<% unless ext.params.empty? -%> -==== Parameters - -This extension has the following implementation options: - -<% ext.params.sort_by { |p| p.name }.each do |param| -%> -<%= param.name %>:: -+ --- -<%= param.desc %> --- -<% end -%> - -<% end -%> -<% end -%> - -<<< -[appendix] -== Instruction Details - -<%= - insts = profile_release.referenced_extensions.map { |ext| ext.instructions }.flatten.uniq - insts.sort_by!(&:name) --%> - -<% insts.each do |inst| -%> -<<< -[[inst-<%=inst.name.gsub('.', '_')%>-def]] -=== <%= inst.name %> - -*<%= inst.long_name %>* - -This instruction is defined by: - -<%= inst.defined_by_condition.to_asciidoc %> - -==== Encoding - -<% if inst.multi_encoding? -%> -[NOTE] -This instruction has different encodings in RV32 and RV64. - -[tabs] -==== -RV32:: -+ -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump inst.wavedrom_desc(32) %> -.... - -RV64:: -+ -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump inst.wavedrom_desc(64) %> -.... -==== -<% else -%> -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump inst.wavedrom_desc(inst.base.nil? ? 32 : inst.base) %> -.... -<% end -%> - -==== Synopsis - -<%= inst.description %> - -==== Access -<% if profile_release.referenced_extensions.any? { |e| e.name == "H" } -%> -[cols="^,^,^,^,^"] -<% else -%> -[cols="^,^,^"] -<% end -%> -|=== -| M | <% if profile_release.referenced_extensions.any? { |e| e.name == "H" } -%>HS<% else -%>S<% end -%> | U <% if profile_release.referenced_extensions.any? { |e| e.name == "H" } -%> | VS | VU <% end -%> - -| [.access-always]#Always# -| [.access-<%=inst.access['s']%>]#<%= inst.access['s'].capitalize %># -| [.access-<%=inst.access['u']%>]#<%= inst.access['u'].capitalize %># -<% if profile_release.referenced_extensions.any? { |e| e.name == "H" } %> -| [.access-<%=inst.access['vs']%>]#<%= inst.access['vs'].capitalize %># -| [.access-<%=inst.access['vu']%>]#<%= inst.access['vu'].capitalize %># -<% end %> -|=== - -<% if inst.access_detail? -%> -<%= inst.access_detail %> -<% end -%> - - -==== Decode Variables - -<% if inst.multi_encoding? -%> -[tabs] -==== -RV32:: -+ -[source.idl] ----- -<% inst.decode_variables(32).each do |d| -%> -<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; -<% end -%> ----- - -RV64:: -+ -[source,idl] ----- -<% inst.decode_variables(64).each do |d| -%> -<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; -<% end -%> ----- -==== -<% else -%> -[source,idl] ----- -<% inst.decode_variables(inst.base.nil? ? 32 : inst.base).each do |d| -%> -<%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; -<% end -%> ----- -<% end -%> - -==== Execution - -<% xlens = inst.base.nil? ? [32, 64] : [inst.base] -%> - -<% if inst.key?("operation()") -%> -[source,idl,subs="specialchars,macros"] ----- -<%= inst.operation_ast.gen_adoc %> ----- -<% end -%> - -==== Exceptions - -<% exception_list = inst.reachable_exceptions_str -%> -<% if exception_list.empty? -%> -This instruction does not generate synchronous exceptions. -<% else -%> -This instruction may result in the following synchronous exceptions: - - <% exception_list.sort.each do |etype| -%> - * <%= etype %> - <% end -%> - -<% end -%> - -<% end -%> - -<<< -[appendix] -== CSR Details - -<% - csrs = profile_release.referenced_extensions.map { |ext| ext.csrs }.flatten.uniq - csrs.sort_by!(&:name) --%> - -<% csrs.each do |csr| -%> -<<< -[[csr-<%= csr.name %>-def]] -=== <%= csr.name %> - -*<%= csr.long_name %>* - -<% unless csr.base.nil? -%> -[NOTE] --- -`<%= csr.name %>` is only defined in RV<%= csr.base %>. --- -<% end -%> - -<%= csr.description %> - -==== Attributes -[%autowidth] -|=== -h| CSR Address | <%= "0x#{csr.address.to_s(16)}" %> -<% if csr.priv_mode == 'VS' -%> -h| Virtual CSR Address | <%= "0x#{csr.virtual_address.to_s(16)}" %> -<% end -%> -h| Defining extension a| <%= csr.defined_by_condition.to_asciidoc %> -<% if csr.dynamic_length? -%> -h| Length | <%= csr.length_pretty %> -<% else -%> -h| Length | <%= csr.length_pretty %> -<% end -%> -h| Privilege Mode | <%= csr.priv_mode %> -|=== - - -==== Format -<% unless csr.dynamic_length? || csr.fields.any? { |f| f.dynamic_location? } -%> -<%# CSR has a known static length, so there is only one format to display -%> -.<%= csr.name %> format -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump csr.wavedrom_desc(cfg_arch, csr.base.nil? ? 32 : csr.base) %> -.... -<% else -%> -<%# CSR has a dynamic length, or a field has a dynamic location, - so there is more than one format to display -%> -This CSR format changes dynamically with XLEN. - -.<%= csr.name %> Format when <%= csr.length_cond32 %> -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump csr.wavedrom_desc(cfg_arch, 32) %> -.... - -.<%= csr.name %> Format when <%= csr.length_cond64 %> -[wavedrom, ,svg,subs='attributes',width="100%"] -.... -<%= JSON.dump csr.wavedrom_desc(cfg_arch, 64) %> -.... - - -<% end -%> - -<% end -%> +<%= portfolio_design.include_erb("ext_appendix.adoc.erb") %> +<%= portfolio_design.include_erb("inst_appendix.adoc.erb") %> +<%= portfolio_design.include_erb("csr_appendix.adoc.erb") %> +<%= portfolio_design.include_erb("idl_func_appendix.adoc.erb") %> diff --git a/backends/profile_doc/tasks.rake b/backends/profile_doc/tasks.rake deleted file mode 100644 index b18fc39939..0000000000 --- a/backends/profile_doc/tasks.rake +++ /dev/null @@ -1,110 +0,0 @@ -# frozen_string_literal: true - -rule %r{#{$root}/gen/profile_doc/adoc/.*\.adoc} => [ - __FILE__, - "#{$root}/lib/arch_obj_models/profile.rb", - "#{$root}/backends/profile_doc/templates/profile.adoc.erb", - Dir.glob("#{$root}/arch/profile_release/**/*.yaml") -].flatten do |t| - profile_release_name = Pathname.new(t.name).basename(".adoc").to_s - profile_release = cfg_arch_for("_").profile_release(profile_release_name) - raise ArgumentError, "No profile release named '#{profile_release_name}'" if profile_release.nil? - - template_path = Pathname.new "#{$root}/backends/profile_doc/templates/profile.adoc.erb" - erb = ERB.new(template_path.read, trim_mode: "-") - erb.filename = template_path.to_s - - # Switch to the generated profile certificate cfg arch and set some variables available to ERB template. - cfg_arch = cfg_arch_for("_") - - # Create empty binding and then specify explicitly which variables the ERB template can access. - def create_empty_binding - binding - end - erb_binding = create_empty_binding - erb_binding.local_variable_set(:cfg_arch, cfg_arch) - erb_binding.local_variable_set(:profile_class, profile_release.profile_class) - erb_binding.local_variable_set(:profile_release, profile_release) - erb_binding.local_variable_set(:portfolio_class, profile_release.profile_class) - - FileUtils.mkdir_p File.dirname(t.name) - File.write t.name, AsciidocUtils.resolve_links(cfg_arch.find_replace_links(erb.result(erb_binding))) - puts "Generated adoc source at #{t.name}" -end - -rule %r{#{$root}/gen/profile_doc/pdf/.*\.pdf} => proc { |tname| - profile_release_name = Pathname.new(tname).basename(".pdf") - [__FILE__, "#{$root}/gen/profile_doc/adoc/#{profile_release_name}.adoc"] -} do |t| - profile_release_name = Pathname.new(t.name).basename(".pdf") - - adoc_filename = "#{$root}/gen/profile_doc/adoc/#{profile_release_name}.adoc" - - FileUtils.mkdir_p File.dirname(t.name) - sh [ - "asciidoctor-pdf", - "-w", - "-v", - "-a toc", - "-a compress", - "-a pdf-theme=#{$root}/ext/docs-resources/themes/riscv-pdf.yml", - "-a pdf-fontsdir=#{$root}/ext/docs-resources/fonts", - "-a imagesdir=#{$root}/ext/docs-resources/images", - "-r asciidoctor-diagram", - "-r #{$root}/backends/ext_pdf_doc/idl_lexer", - "-o #{t.name}", - adoc_filename - ].join(" ") - - puts - puts "SUCCESS! File written to #{t.name}" -end - -rule %r{#{$root}/gen/profile_doc/html/.*\.html} => proc { |tname| - profile_release_name = Pathname.new(tname).basename(".html") - [__FILE__, "#{$root}/gen/profile_doc/adoc/#{profile_release_name}.adoc"] -} do |t| - profile_release_name = Pathname.new(t.name).basename(".html") - - adoc_filename = "#{$root}/gen/profile_doc/adoc/#{profile_release_name}.adoc" - - FileUtils.mkdir_p File.dirname(t.name) - sh [ - "asciidoctor", - "-w", - "-v", - "-a toc", - "-a imagesdir=#{$root}/ext/docs-resources/images", - "-r asciidoctor-diagram", - "-r #{$root}/backends/ext_pdf_doc/idl_lexer", - "-o #{t.name}", - adoc_filename - ].join(" ") - - puts - puts "SUCCESS! File written to #{t.name}" -end - -namespace :gen do - desc "Create a specification PDF for +profile_release+" - task :profile, [:profile_release] do |_t, args| - profile_release_name = args[:profile_release] - raise ArgumentError, "Missing required option +profile_release+" if profile_release_name.nil? - - profile_release = cfg_arch_for("_").profile_release(profile_release_name) - raise ArgumentError, "No profile release named '#{profile_release_name}'" if profile_release.nil? - - Rake::Task["#{$root}/gen/profile_doc/pdf/#{profile_release_name}.pdf"].invoke - end - - desc "Create a specification HTML for +profile_release+" - task :profile_html, [:profile_release] do |_t, args| - profile_release_name = args[:profile_release] - raise ArgumentError, "Missing required option +profile_release+" if profile_release_name.nil? - - profile_release = cfg_arch_for("_").profile_release(profile_release_name) - raise ArgumentError, "No profile release named '#{profile_release_name}" if profile_release.nil? - - Rake::Task["#{$root}/gen/profile_doc/html/#{profile_release_name}.html"].invoke - end -end diff --git a/cert_flow.txt b/cert_flow.txt deleted file mode 100644 index 6d83c5fe3b..0000000000 --- a/cert_flow.txt +++ /dev/null @@ -1,82 +0,0 @@ -backends/certificate_doc/tasks.rake -bootstrap_cfg_arch = cfg_arch_for("rv#{base}") # rv32 or rv64 - Rakefile - Calls ConfiguredArchitecture.new("gen/resolved_arch/rv32") - Calls Architecture.new # Parent class - Calls Config.create("cfgs/rv32/cfg.yaml") # Factory class method - Loads config yaml file into @data # File specifies if fully, partially, or unconfigured - Calls PartialConfig.new(cfg path, @data) # Uses Ruby send() method - @mxlen = @data["params"].xlen - @name = "rv32" -bootstrap_cert_model = bootstrap_cfg_arch.cert_model(cert_model_name = "MC100-32") - Calls self.generate_obj_methods("cert_model", "certificate_model", CertModel) in Architecture # Magic - Calls define_method("cert_model") - Calls define_method("cert_models") - Creates @cert_models array and @cert_model_hash # Per arch_dir - For every certificiate model in the database - Loads yaml under gen/resolved_arch/rv32 into @cert_models hash - Calls cert_model.new() -> DatabaseObject.initialize(yaml, yaml_path, arch=base_cfg_arch) - @data = yaml - @arch = arch # rv32 -cfg_arch = bootstrap_cert_model.to_cfg_arch # In Portfolio class - Creates hash with mandatory extensions (with version requirement) and fully-constrained params (single_value?) - Uses in_scope_ext_reqs() and all_in_scope_ext_params() in Portfolio - Writes hash to yaml file in /tmp/.../MC100-32/cfg.yaml - Passes yaml file to ConfiguredArchitecture.new() - Creates Architecture (base class), Config, and PartialConfig again (see above) -cert_model = cfg_arch.cert_model(cert_model_name) - Creates CertModel for every model in the database and stores it in the real ConfiguredArchitecture object -Calls ERB template -Converts ERB result to ASCIIDOC - - -============================================================================================== -Actual rv32/cfg.yaml ---- -$schema: config_schema.json# -kind: architecture configuration -type: partially configured -name: rv32 -description: A generic RV32 system; only MXLEN is known -params: - XLEN: 32 -mandatory_extensions: - - name: "I" - version: ">= 0" - - name: "Sm" - version: ">= 0" -=============================================================================================== -Bootstrap /tmp/.../MC100-32/cfg.yaml ---- -"$schema": config_schema.json -type: partially configured -kind: architecture configuration -name: MC100-32 -description: A partially configured architecture definition corresponding to the MC100-32 - portfolio. -mandatory_extensions: -- name: I - version: - - "~> 2.1" -- name: C - version: - - "~> 2.2" -- name: M - version: - - "~> 2.0" -- name: Zicsr - version: - - "~> 2.0" -- name: Zicntr - version: - - "~> 2.0" -- name: Sm - version: - - "~> 1.11.0" -params: - MISALIGNED_SPLIT_STRATEGY: by_byte - PRECISE_SYNCHRONOUS_EXCEPTIONS: true - TRAP_ON_ECALL_FROM_M: true - TRAP_ON_EBREAK: true - M_MODE_ENDIANNESS: little - XLEN: 32 diff --git a/do b/do index acaf8d9e52..9caaa2a630 100755 --- a/do +++ b/do @@ -2,6 +2,11 @@ ROOT=$(dirname $(realpath ${BASH_SOURCE[0]})) +[ $# -eq 0 ] && { + ./do --tasks + exit 0 +} + if [ "$1" == "clobber" ]; then ${ROOT}/bin/clobber exit $? diff --git a/docs/ruby/ArchDef.html b/docs/ruby/ArchDef.html index 9f4a97d5cf..fd9937b019 100644 --- a/docs/ruby/ArchDef.html +++ b/docs/ruby/ArchDef.html @@ -488,7 +488,7 @@

  • - #find_replace_links(adoc) ⇒ String + #convert_monospace_to_links(adoc) ⇒ String @@ -1920,9 +1920,9 @@

    -

    +

    - #find_replace_links(adoc) ⇒ String + #convert_monospace_to_links(adoc) ⇒ String @@ -2005,7 +2005,7 @@ 

    # File 'lib/arch_def.rb', line 1552
 
-def find_replace_links(adoc)
+def convert_monospace_to_links(adoc)
   adoc.gsub(/`([\w.]+)`/) do |match|
     name = Regexp.last_match(1)
     csr_name, field_name = name.split(".")
diff --git a/docs/ruby/ArchGen.html b/docs/ruby/ArchGen.html
index 6461895b05..03b70d4f77 100644
--- a/docs/ruby/ArchGen.html
+++ b/docs/ruby/ArchGen.html
@@ -546,7 +546,7 @@ 
    
   @params = @cfg.fetch("params")
 
   unless @params["NAME"] == @name
-    raise "Config name (#{@params['NAME']}) in params.yaml does not match directory path (#{@name})"
+    raise "AbstractConfig name (#{@params['NAME']}) in params.yaml does not match directory path (#{@name})"
   end
 
   @opcode_data = YAML.load_file("#{$root}/ext/riscv-opcodes/instr_dict.yaml")
diff --git a/docs/ruby/Instruction.html b/docs/ruby/Instruction.html
index c343c424e8..ab0ac71c7c 100644
--- a/docs/ruby/Instruction.html
+++ b/docs/ruby/Instruction.html
@@ -314,7 +314,7 @@ 
    
         
  • 
   
     
-      #exists_in_cfg?(possible_xlens, extensions)  ⇒ Boolean 
+      #exists_in_design?(possible_xlens, extensions)  ⇒ Boolean 
     
 
     
@@ -1310,9 +1310,9 @@

    • -

    +

    - #exists_in_cfg?(possible_xlens, extensions) ⇒ Boolean + #exists_in_design?(possible_xlens, extensions) ⇒ Boolean @@ -1398,7 +1398,7 @@ 

    # File 'lib/arch_def.rb', line 1178
 
-def exists_in_cfg?(possible_xlens, extensions)
+def exists_in_design?(possible_xlens, extensions)
   (@data["base"].nil? || (possible_xlens.include?(@data["base"]))) &&
     extensions.any? { |e| defined_by?(e) } &&
     extensions.none? { |e| excluded_by?(e) }
diff --git a/docs/ruby/method_list.html b/docs/ruby/method_list.html
index 25dc25cdb3..fdd92ae571 100644
--- a/docs/ruby/method_list.html
+++ b/docs/ruby/method_list.html
@@ -1142,7 +1142,7 @@ 
    Method List
    
 
   
  • 
     
    
-      #exists_in_cfg?
+      #exists_in_design?
       Instruction
     
    
   
    • 
@@ -1382,7 +1382,7 @@ 
    Method List
    
 
   
  • 
     
    
-      #find_replace_links
+      #convert_monospace_to_links
       ArchDef
     
    
   
    • 
diff --git a/ext/docs-resources b/ext/docs-resources
index a76dd1d390..62576cdd28 160000
--- a/ext/docs-resources
+++ b/ext/docs-resources
@@ -1 +1 @@
-Subproject commit a76dd1d390cba28e3b1ce86313af03ce9b69399d
+Subproject commit 62576cdd285615473c279eb9acecade9e0fe0e1f
diff --git a/lib/arch_obj_models/cert_normative_rule.rb b/lib/arch_obj_models/cert_normative_rule.rb
new file mode 100644
index 0000000000..f027e8f625
--- /dev/null
+++ b/lib/arch_obj_models/cert_normative_rule.rb
@@ -0,0 +1,36 @@
+# frozen_string_literal: true
+
+class CertNormativeRule
+  # @param data [Hash] Data from YAML file
+  # @param db_obj [DatabaseObject] Database object that defines normative rule (Extension, Instruction, CSR, or CSR field)
+  def initialize(data, db_obj)
+    raise ArgumentError, "Need Hash but was passed a #{data.class}" unless data.is_a?(Hash)
+    raise ArgumentError, "Need DatabaseObject but was passed a #{db_obj.class}" unless db_obj.is_a?(DatabaseObject)
+
+    @data = data
+    @db_obj = db_obj
+
+    raise ArgumentError, "Missing certification normative rule description for #{db_obj.name} of kind #{db_obj.kind}" if description.nil?
+    raise ArgumentError, "Missing certification normative rule ID for #{db_obj.name} of kind #{db_obj.kind}" if id.nil?
+  end
+
+  # @return [String] Description of normative rule (could be multiple lines)
+  def description = @data["description"]
+
+  # @return [String] Unique ID of the normative rule
+  def id = @data["id"]
+
+  # @return [Array] List of certification point documentation links
+  def doc_links
+    return @doc_links unless @doc_links.nil?
+
+    @doc_links = []
+    @data["doc_links"]&.each do |dst|
+      @doc_links << DocLink.new(dst, @db_obj)
+    end
+
+    raise "Missing doc_links for certification normative rule ID '#{id}' of kind #{@db_obj.kind}" if @doc_links.empty?
+
+    @doc_links
+  end
+end
diff --git a/lib/arch_obj_models/cert_test_procedure.rb b/lib/arch_obj_models/cert_test_procedure.rb
new file mode 100644
index 0000000000..d99a5c3ec9
--- /dev/null
+++ b/lib/arch_obj_models/cert_test_procedure.rb
@@ -0,0 +1,42 @@
+# frozen_string_literal: true
+
+class CertTestProcedure
+  # @param data [Hash] Data from YAML file
+  # @param db_obj [DatabaseObject] Database object that defines test procedure (Extension, Instruction, CSR, or CSR field)
+  def initialize(data, db_obj)
+    raise ArgumentError, "Need Hash but was passed a #{data.class}" unless data.is_a?(Hash)
+    raise ArgumentError, "Need DatabaseObject but was passed a #{db_obj.class}" unless db_obj.is_a?(DatabaseObject)
+
+    @data = data
+    @db_obj = db_obj
+
+    raise ArgumentError, "Missing certification test procedure ID for #{db_obj.name} of kind #{db_obj.kind}" if id.nil?
+    warn "Warning: Missing test_file_name for certification test procedure description for #{db_obj.name} of kind #{db_obj.kind}" if test_file_name.nil?
+    raise ArgumentError, "Missing certification test procedure description for #{db_obj.name} of kind #{db_obj.kind}" if description.nil?
+  end
+
+  # @return [String] Unique ID of the test procedure
+  def id = @data["id"]
+
+  # @return [String] Name of test file that implements this test procedure. Could be nil.
+  def test_file_name = @data["test_file_name"]
+
+  # @return [String] Description of test procedure (could be multiple lines)
+  def description = @data["description"]
+
+  # @return [Array]
+  def cert_normative_rules
+    return @cert_normative_rules unless @cert_normative_rules.nil?
+
+    @cert_normative_rules = []
+    @data["normative_rules"]&.each do |id|
+      cp = @db_obj.cert_coverage_point(id)
+      raise ArgumentError, "Can't find certification test procedure with ID '#{id}' for '#{@db_obj.name}' of kind #{@db_obj.kind}" if cp.nil?
+      @cert_normative_rules << cp
+    end
+    @cert_normative_rules
+  end
+
+  # @return [String] String (likely multiline) of certification test procedure steps using Asciidoc lists
+  def cert_steps = @data["steps"]
+end
diff --git a/lib/arch_obj_models/certifiable_obj.rb b/lib/arch_obj_models/certifiable_obj.rb
new file mode 100644
index 0000000000..700b54ed64
--- /dev/null
+++ b/lib/arch_obj_models/certifiable_obj.rb
@@ -0,0 +1,64 @@
+# frozen_string_literal: true
+
+require_relative "cert_normative_rule"
+require_relative "cert_test_procedure"
+
+module CertifiableObject
+  # @return [Array]
+  def cert_normative_rules
+    return @cert_normative_rules unless @cert_normative_rules.nil?
+
+    @cert_normative_rules = []
+    @data["cert_normative_rules"]&.each do |cert_data|
+      @cert_normative_rules << CertNormativeRule.new(cert_data, self)
+    end
+    @cert_normative_rules
+  end
+
+  # @return [Hash] Hash with ID as key of all normative rules defined by database object
+  def cert_coverage_point_hash
+    return @cert_coverage_point_hash unless @cert_coverage_point_hash.nil?
+
+    @cert_coverage_point_hash = {}
+    cert_normative_rules.each do |cp|
+      @cert_coverage_point_hash[cp.id] = cp
+    end
+    @cert_coverage_point_hash
+  end
+
+  # @param id [String] Unique ID for the normative rule
+  # @return [CertNormativeRule]
+  # @return [nil] if there is no certification normative ruleed with ID of +id+
+  def cert_coverage_point(id)
+    cert_coverage_point_hash[id]
+  end
+
+  # @return [Array]
+  def cert_test_procedures
+    return @cert_test_procedures unless @cert_test_procedures.nil?
+
+    @cert_test_procedures = []
+    @data["cert_test_procedures"]&.each do |cert_data|
+      @cert_test_procedures << CertTestProcedure.new(cert_data, self)
+    end
+    @cert_test_procedures
+  end
+
+  # @return [Hash] Hash of all normative rules defined by database object
+  def cert_test_procedure_hash
+    return @cert_test_procedure_hash unless @cert_test_procedure_hash.nil?
+
+    @cert_test_procedure_hash = {}
+    cert_test_procedures.each do |tp|
+      @cert_test_procedure_hash[tp.id] = tp
+    end
+    @cert_test_procedure_hash
+  end
+
+  # @param id [String] Unique ID for test procedure
+  # @return [CertTestProcedure]
+  # @return [nil] if there is no certification test procedure with ID +id+
+  def cert_test_procedure(id)
+    cert_test_procedure_hash[id]
+  end
+end # module
diff --git a/lib/arch_obj_models/certificate.rb b/lib/arch_obj_models/certificate.rb
index 68d8a47cf1..acc5820a89 100644
--- a/lib/arch_obj_models/certificate.rb
+++ b/lib/arch_obj_models/certificate.rb
@@ -1,63 +1,55 @@
+# frozen_string_literal: true
+
 # Classes for certificates.
-# Each certificate model is a member of a certificate class.
+# Each processor certificate model is a member of a processor certificate class.
 
 require_relative "portfolio"
 
-###################
-# CertClass Class #
-###################
+#######################
+# ProcCertClass Class #
+#######################
 
-# Holds information from certificate class YAML file.
+# Holds information from processor certificate class YAML file.
 # The inherited "data" member is the database of extensions, instructions, CSRs, etc.
-class CertClass < PortfolioClass
-  def mandatory_priv_modes = @data["mandatory_priv_modes"]
+class ProcCertClass < PortfolioClass
 end
 
-###################
-# CertModel Class #
-###################
+#######################
+# ProcCertModel Class #
+#######################
 
-# Holds information about a certificate model YAML file.
+# Holds information about a processor certificate model YAML file.
 # The inherited "data" member is the database of extensions, instructions, CSRs, etc.
-class CertModel < Portfolio
+class ProcCertModel < Portfolio
   # @param obj_yaml [Hash] Contains contents of Certificate Model yaml file (put in @data)
   # @param data_path [String] Path to yaml file
-  # @param cfg_arch [ConfiguredArchitecture] Architecture for a specific configuration
-  def initialize(obj_yaml, yaml_path, arch: nil)
+  # @param arch [Architecture] Database of RISC-V standards
+  def initialize(obj_yaml, yaml_path, arch)
     super # Calls parent class with the same args I got
-
-    # TODO: XXX: Don't allow Architecture class.
-    #            See https://github.com/riscv-software-src/riscv-unified-db/pull/371
-    unless arch.is_a?(ConfiguredArchitecture) || arch.is_a?(Architecture)
-      raise ArgumentError, "For #{name} arch is a #{arch.class} but must be a ConfiguredArchitecture"
-    end
-
-    # TODO: XXX: Add back in arch.name.
-    #            See https://github.com/riscv-software-src/riscv-unified-db/pull/371
-    #puts "UPDATE:   Creating CertModel object for #{name} using cfg #{cfg_arch.name}"
-    puts "UPDATE:   Creating CertModel object for #{name}"
   end
 
   def unpriv_isa_manual_revision = @data["unpriv_isa_manual_revision"]
   def priv_isa_manual_revision = @data["priv_isa_manual_revision"]
   def debug_manual_revision = @data["debug_manual_revision"]
 
-  def tsc_profile
-    return nil if @data["tsc_profile"].nil?
+  def tsc_profile_release
+    return nil if @data["tsc_profile_release"].nil?
 
-    profile = cfg_arch.profile(@data["tsc_profile"])
+    profile_release = @arch.ref(@data["tsc_profile_release"]['$ref'])
 
-    raise "No profile '#{@data["tsc_profile"]}'" if profile.nil?
+    raise "No profile release called '#{@data["tsc_profile_release"]}' exists" if profile_release.nil?
 
-    profile
+    profile_release
   end
 
-  # @return [CertClass] The certification class that this model belongs to.
-  def cert_class
-    cert_class = @cfg_arch.ref(@data["class"]['$ref'])
-    raise "No certificate class named '#{@data["class"]}'" if cert_class.nil?
+  def in_scope_priv_modes = @data["in_scope_priv_modes"]
+
+  # @return [ProcCertClass] The certification class that this model belongs to.
+  def proc_cert_class
+    proc_cert_class = @arch.ref(@data["class"]['$ref'])
+    raise "No processor certificate class named '#{@data["class"]}'" if proc_cert_class.nil?
 
-    cert_class
+    proc_cert_class
   end
 
   #####################
@@ -66,15 +58,18 @@ def cert_class
 
   # Holds extra requirements not associated with extensions or their parameters.
   class Requirement
-    def initialize(data, cfg_arch)
+    # @param data [Hash] Data from yaml
+    # @param arch [Architecture] Architecture standards
+    def initialize(data, arch)
+      raise ArgumentError, "Bad data" unless data.is_a?(Hash)
+      raise ArgumentError, "Need Architecture class but it's a #{arch.class}" unless arch.is_a?(Architecture)
+
       @data = data
-      @cfg_arch = cfg_arch
+      @arch = arch
     end
 
     def name = @data["name"]
-
     def description = @data["description"]
-
     def when = @data["when"]
 
     def when_pretty
@@ -100,15 +95,18 @@ def when_pretty
   # Holds a group of Requirement objects to provide a one-level group.
   # Can't nest RequirementGroup objects to make multi-level group.
   class RequirementGroup
-    def initialize(data, cfg_arch)
+    # @param data [Hash] Data from yaml
+    # @param arch [Architecture] Architecture standards
+    def initialize(data, arch)
+      raise ArgumentError, "Bad data" unless data.is_a?(Hash) unless data.is_a?(Hash)
+      raise ArgumentError, "Need Architecture class but it's a #{arch.class}" unless arch.is_a?(Architecture)
+
       @data = data
-      @cfg_arch = cfg_arch
+      @arch = arch
     end
 
     def name = @data["name"]
-
     def description = @data["description"]
-
     def when = @data["when"]
 
     def when_pretty
@@ -126,24 +124,183 @@ def when_pretty
       end.flatten.join(" and ")
     end
 
+    # @return [Array] The list of requirements in this group.
     def requirements
       return @requirements unless @requirements.nil?
 
       @requirements = []
       @data["requirements"].each do |req|
-        @requirements << Requirement.new(req, @cfg_arch)
+        @requirements << Requirement.new(req, @arch)
       end
       @requirements
     end
   end
 
+  # @return [Array] The list of requirement groups
   def requirement_groups
     return @requirement_groups unless @requirement_groups.nil?
 
     @requirement_groups = []
-    @data["requirement_groups"]&.each do |req_group|
-      @requirement_groups << RequirementGroup.new(req_group, @cfg_arch)
+    @data["requirement_groups"]&.each do |req_key, req_group|
+      @requirement_groups << RequirementGroup.new(req_group, @arch) unless req_key == "$child_of"
     end
     @requirement_groups
   end
+
+  ###################################
+  # Routines using InScopeParameter #
+  ###################################
+
+  # @return [Array] Sorted list of parameters specified by any extension in portfolio.
+  # These are always IN-SCOPE by definition (since they are listed in the portfolio).
+  # Can have multiple array entries with the same parameter name since multiple extensions may define
+  # the same parameter.
+  def all_in_scope_params
+    return @all_in_scope_params unless @all_in_scope_params.nil?
+
+    @all_in_scope_params = []
+
+    @data["extensions"].each do |ext_name, ext_data|
+      next if ext_name[0] == "$"
+
+      # Find Extension object from database
+      ext = @arch.extension(ext_name)
+      if ext.nil?
+        raise "Cannot find extension named #{ext_name}"
+      end
+
+      ext_data["param_constraints"]&.each do |param_name, param_data|
+        param = ext.params.find { |p| p.name == param_name }
+        raise "There is no param '#{param_name}' in extension '#{ext_name}" if param.nil?
+
+        next unless ext.versions.any? do |ext_ver|
+          ver_req = ext_data["version"] || ">= #{ext.min_version.version_spec}"
+          ExtensionRequirement.new(ext_name, ver_req, arch: @arch).satisfied_by?(ext_ver) &&
+            param.defined_in_extension_version?(ext_ver)
+        end
+
+        @all_in_scope_params << InScopeParameter.new(param, param_data["schema"], param_data["note"])
+      end
+    end
+    @all_in_scope_params.sort!
+  end
+
+  # @param [ExtensionRequirement]
+  # @return [Array] Sorted list of extension parameters from portfolio for given extension.
+  # These are always IN SCOPE by definition (since they are listed in the portfolio).
+  def in_scope_params(ext_req)
+    raise ArgumentError, "Expecting ExtensionRequirement" unless ext_req.is_a?(ExtensionRequirement)
+
+    params = []    # Local variable, no caching
+
+    # Get extension information from portfolio YAML for passed in extension requirement.
+    ext_data = @data["extensions"][ext_req.name]
+    raise "Cannot find extension named #{ext_req.name}" if ext_data.nil?
+
+    # Find Extension object from database
+    ext = @arch.extension(ext_req.name)
+    raise "Cannot find extension named #{ext_req.name}" if ext.nil?
+
+    # Loop through an extension's parameter constraints (hash) from the certificate model.
+    # Note that "&" is the Ruby safe navigation operator (i.e., skip do loop if nil).
+    ext_data["param_constraints"]&.each do |param_name, param_data|
+      # Find Parameter object from database
+      param = ext.params.find { |p| p.name == param_name }
+      raise "There is no param '#{param_name}' in extension '#{ext_req.name}" if param.nil?
+
+      next unless ext.versions.any? do |ext_ver|
+        ext_req.satisfied_by?(ext_ver) && param.defined_in_extension_version?(ext_ver)
+      end
+
+      params << InScopeParameter.new(param, param_data["schema"], param_data["note"])
+    end
+
+    params.sort!
+  end
+
+  # @return [Array] Sorted list of parameters out of scope across all in scope extensions
+  #                                     (those listed as mandatory or optional in the certificate model).
+  def all_out_of_scope_params
+    return @all_out_of_scope_params unless @all_out_of_scope_params.nil?
+
+    @all_out_of_scope_params = []
+    in_scope_ext_reqs.each do |ext_req|
+      ext = @arch.extension(ext_req.name)
+      ext.params.each do |param|
+        next if all_in_scope_params.any? { |c| c.param.name == param.name }
+
+        next unless ext.versions.any? do |ext_ver|
+                      ext_req.satisfied_by?(ext_ver) &&
+                      param.defined_in_extension_version?(ext_ver)
+                    end
+
+        @all_out_of_scope_params << param
+      end
+    end
+    @all_out_of_scope_params.sort!
+  end
+
+  # @param ext_name [String] Extension name
+  # @return [Array] Sorted list of parameters that are out of scope for named extension.
+  def out_of_scope_params(ext_name)
+    all_out_of_scope_params.select{ |param| param.exts.any? { |ext| ext.name == ext_name } }.sort
+  end
+
+  # @param param [Parameter]
+  # @return [Array] Sorted list of all in-scope extensions that define this parameter
+  #                            in the database and the parameter is in-scope.
+  def all_in_scope_exts_with_param(param)
+    raise ArgumentError, "Expecting Parameter" unless param.is_a?(Parameter)
+
+    exts = []
+
+    # Iterate through all the extensions in the architecture database that define this parameter.
+    param.exts.each do |ext|
+      found = false
+
+      in_scope_extensions.each do |potential_ext|
+        if ext.name == potential_ext.name
+          found = true
+          next
+        end
+      end
+
+      if found
+        # Only add extensions that exist in this certificate model.
+        exts << ext
+      end
+    end
+
+    # Return intersection of extension names
+    exts.sort_by!(&:name)
+  end
+
+  # @param param [Parameter]
+  # @return [Array] List of all in-scope extensions that define this parameter in the
+  #                            database but the parameter is out-of-scope.
+  def all_in_scope_exts_without_param(param)
+    raise ArgumentError, "Expecting Parameter" unless param.is_a?(Parameter)
+
+    exts = []   # Local variable, no caching
+
+    # Iterate through all the extensions in the architecture database that define this parameter.
+    param.exts.each do |ext|
+      found = false
+
+      in_scope_extensions.each do |potential_ext|
+        if ext.name == potential_ext.name
+          found = true
+          next
+        end
+      end
+
+      if found
+          # Only add extensions that are in-scope (i.e., exist in this certificate model).
+          exts << ext
+      end
+    end
+
+    # Return intersection of extension names
+    exts.sort_by!(&:name)
+  end
 end
diff --git a/lib/arch_obj_models/csr.rb b/lib/arch_obj_models/csr.rb
index d1fcca74d8..b01bf69f64 100644
--- a/lib/arch_obj_models/csr.rb
+++ b/lib/arch_obj_models/csr.rb
@@ -1,9 +1,13 @@
 # frozen_string_literal: true
 
-require_relative "obj"
+require_relative "database_obj"
+require_relative "certifiable_obj"
 
 # CSR definition
 class Csr < DatabaseObject
+  # Add all methods in this module to this type of database object.
+  include CertifiableObject
+
   def ==(other)
     if other.is_a?(Csr)
       name == other.name
@@ -50,14 +54,15 @@ def defined_in_all_bases? = @data["base"].nil?
   # @param xlen [32,64] base
   def defined_in_base?(xlen) = @data["base"].nil? || @data["base"] == xlen
 
-  # @param cfg_arch [ConfiguredArchitecture] A configuration
   # @return [Boolean] Whether or not the format of this CSR changes when the effective XLEN changes in some mode
   def format_changes_with_xlen?
     dynamic_length? || possible_fields.any?(&:dynamic_location?)
   end
 
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   # @return [Array] List of functions reachable from this CSR's sw_read or a field's sw_write function
   def reachable_functions(effective_xlen = nil)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
     return @reachable_functions unless @reachable_functions.nil?
 
     fns = []
@@ -139,11 +144,9 @@ def min_length
     end
   end
 
-  # @param cfg_arch [ConfiguredArchitecture] A configuration (can be nil if the length is not dependent on a config parameter)
-  # @param effective_xlen [Integer] The effective xlen, needed since some fields change location with XLEN. If the field location is not determined by XLEN, then this parameter can be nil
-  # @return [Integer] Length, in bits, of the CSR, given effective_xlen
-  # @return [nil] if the length cannot be determined from the cfg_arch (e.g., because SXLEN is unknown and +effective_xlen+ was not provided)
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   def length(effective_xlen = nil)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
     case @data["length"]
     when "MXLEN"
       return cfg_arch.mxlen unless cfg_arch.mxlen.nil?
@@ -293,9 +296,10 @@ def length_cond64
     end
   end
 
-  # @param cfg_arch [ConfiguredArchitecture] A configuration
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   # @return [String] Pretty-printed length string
   def length_pretty(effective_xlen=nil)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
     if dynamic_length?
       cond =
         case @data["length"]
@@ -347,10 +351,11 @@ def description_html
     Asciidoctor.convert description
   end
 
-  # @param cfg_arch [ConfiguredArchitecture] A configuration
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   # @return [Array] All implemented fields for this CSR at the given effective XLEN, sorted by location (smallest location first)
   #                           Excluded any fields that are defined by unimplemented extensions or a base that is not effective_xlen
   def possible_fields_for(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
     @possible_fields_for ||=
       possible_fields.select do |f|
         !f.key?("base") || f.base == effective_xlen
@@ -372,9 +377,11 @@ def fields
     @fields = @data["fields"].map { |field_name, field_data| CsrField.new(self, field_name, field_data) }
   end
 
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   # @return [Array] All known fields of this CSR when XLEN == +effective_xlen+
   # equivalent to {#fields} if +effective_xlen+ is nil
   def fields_for(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
     fields.select { |f| effective_xlen.nil? || !f.key?("base") || f.base == effective_xlen }
   end
 
@@ -400,8 +407,7 @@ def field(field_name)
     field_hash[field_name.to_s]
   end
 
-  # @param cfg_arch [ConfiguredArchitecture] A configuration
-  # @param effective_xlen [Integer] The effective XLEN to apply, needed when field locations change with XLEN in some mode
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   # @return [Idl::BitfieldType] A bitfield type that can represent all fields of the CSR
   def bitfield_type(cfg_arch, effective_xlen = nil)
     Idl::BitfieldType.new(
@@ -417,8 +423,9 @@ def has_custom_sw_read?
     @data.key?("sw_read()") && !@data["sw_read()"].empty?
   end
 
-  # @param symtab [Idl::SymbolTable] Symbol table with globals
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   def type_checked_sw_read_ast(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
     @type_checked_sw_read_asts ||= {}
     ast = @type_checked_sw_read_asts[effective_xlen.nil? ? :none : effective_xlen]
     return ast unless ast.nil?
@@ -506,7 +513,9 @@ def fill_symtab(ast, effective_xlen)
     symtab
   end
 
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   def pruned_sw_read_ast(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
     @pruned_sw_read_ast ||= {}
     return @pruned_sw_read_ast[effective_xlen] unless @pruned_sw_read_ast[effective_xlen].nil?
 
@@ -544,6 +553,11 @@ def pruned_sw_read_ast(effective_xlen)
   # @param optional_type [Integer] Wavedrom type (Fill color) for fields that are optional (not mandatory) in a partially-specified cfg_arch
   # @return [Hash] A representation of the WaveDrom drawing for the CSR (should be turned into JSON for wavedrom)
   def wavedrom_desc(cfg_arch, effective_xlen, exclude_unimplemented: false, optional_type: 2)
+    unless cfg_arch.is_a?(ConfiguredArchitecture)
+      raise ArgumentError, "cfg_arch is a class #{cfg_arch.class} but must be a ConfiguredArchitecture"
+    end
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     desc = {
       "reg" => []
     }
@@ -586,6 +600,8 @@ def wavedrom_desc(cfg_arch, effective_xlen, exclude_unimplemented: false, option
   # @param cfg_arch [ConfiguredArchitecture] Architecture def
   # @return [Boolean] whether or not the CSR is possibly implemented given the supplied config options
   def exists_in_cfg?(cfg_arch)
+    raise ArgumentError, "cfg_arch is a class #{cfg_arch.class} but must be a ConfiguredArchitecture" unless cfg_arch.is_a?(ConfiguredArchitecture)
+
     @exists_in_cfg ||=
       cfg_arch.possible_csrs.include?(self)
   end
@@ -593,6 +609,9 @@ def exists_in_cfg?(cfg_arch)
   # @param cfg_arch [ConfiguredArchitecture] Architecture def
   # @return [Boolean] whether or not the CSR is optional in the config
   def optional_in_cfg?(cfg_arch)
+    unless cfg_arch.is_a?(ConfiguredArchitecture)
+      raise ArgumentError, "cfg_arch is a class #{cfg_arch.class} but must be a ConfiguredArchitecture"
+    end
     raise "optional_in_cfg? should only be used by a partially-specified arch def" unless cfg_arch.partially_configured?
 
     # exists in config and isn't satisfied by some combo of mandatory extensions
diff --git a/lib/arch_obj_models/csr_field.rb b/lib/arch_obj_models/csr_field.rb
index 581d75d8d1..eb92f3822b 100644
--- a/lib/arch_obj_models/csr_field.rb
+++ b/lib/arch_obj_models/csr_field.rb
@@ -1,11 +1,14 @@
 # frozen_string_literal: true
 
-require_relative "obj"
-
+require_relative "database_obj"
 require_relative "../idl/passes/gen_option_adoc"
+require_relative "certifiable_obj"
 
 # A CSR field object
 class CsrField < DatabaseObject
+  # Add all methods in this module to this type of database object.
+  include CertifiableObject
+
   # @return [Csr] The Csr that defines this field
   attr_reader :parent
 
@@ -24,7 +27,7 @@ def base
   # @param parent_csr [Csr] The Csr that defined this field
   # @param field_data [Hash] Field data from the arch spec
   def initialize(parent_csr, field_name, field_data)
-    super(field_data, parent_csr.data_path, arch: parent_csr.arch)
+    super(field_data, parent_csr.data_path, parent_csr.arch)
     @name = field_name
     @parent = parent_csr
   end
@@ -104,6 +107,8 @@ def type_ast
   # @return [nil] if the type property is not a function
   # @param effective_xlen [32, 64] The effective xlen to evaluate for
   def type_checked_type_ast(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     @type_checked_type_ast ||= { 32 => nil, 64 => nil }
     return @type_checked_type_ast[effective_xlen] unless @type_checked_type_ast[effective_xlen].nil?
 
@@ -130,8 +135,9 @@ def type_checked_type_ast(effective_xlen)
 
   # @return [Idl::FunctionBodyAst] Abstract syntax tree of the type() function, after it has been type checked and pruned
   # @return [nil] if the type property is not a function
-  # @param effective_xlen [32, 64] The effective xlen to evaluate for
   def pruned_type_ast(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     @pruned_type_ast ||= { 32 => nil, 64 => nil }
     return @pruned_type_ast[effective_xlen] unless @pruned_type_ast[effective_xlen].nil?
 
@@ -173,6 +179,8 @@ def pruned_type_ast(effective_xlen)
   #      'RW-H'  => Read-write, with a hardware update
   #      'RW-RH' => Read-write, with a hardware update and a restricted set of legal values
   def type(effective_xlen = nil)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     @type ||= { 32 => nil, 64 => nil }
     return @type[effective_xlen] unless @type[effective_xlen].nil?
 
@@ -229,7 +237,7 @@ def type(effective_xlen = nil)
   # @return [String] A pretty-printed type string
   # @param effective_xlen [32, 64] The effective xlen to evaluate for
   def type_pretty(effective_xlen = nil)
-    raise ArgumentError, "Expecting Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
 
     str = nil
     value_result = Idl::AstNode.value_try do
@@ -273,6 +281,8 @@ def alias
   # @param cfg_arch [ConfiguredArchitecture] a configuration
   # @Param effective_xlen [Integer] 32 or 64; needed because fields can change in different XLENs
   def reachable_functions(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     return @reachable_functions unless @reachable_functions.nil?
 
     fns = []
@@ -428,10 +438,12 @@ def has_custom_sw_write?
     @data.key?("sw_write(csr_value)") && !@data["sw_write(csr_value)"].empty?
   end
 
-  # @return [FunctionBodyAst] The abstract syntax tree of the sw_write() function, after being type checked
   # @param effective_xlen [Integer] 32 or 64; the effective XLEN to evaluate this field in (relevant when fields move in different XLENs)
   # @param symtab [Idl::SymbolTable] Symbol table with globals
+  # @return [FunctionBodyAst] The abstract syntax tree of the sw_write() function, after being type checked
   def type_checked_sw_write_ast(symtab, effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     @type_checked_sw_write_asts ||= {}
     ast = @type_checked_sw_write_asts[symtab.hash]
     return ast unless ast.nil?
@@ -523,6 +535,8 @@ def fill_symtab_for_sw_write(effective_xlen, ast)
   end
 
   def fill_symtab_for_type(effective_xlen, ast)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     symtab = cfg_arch.symtab.global_clone
     symtab.push(ast)
 
@@ -569,6 +583,8 @@ def fill_symtab_for_reset(ast)
   # @return [nil] if there is no sw_write() function
   # @param effective_xlen [Integer] effective xlen, needed because fields can change in different bases
   def pruned_sw_write_ast(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     return @pruned_sw_write_ast unless @pruned_sw_write_ast.nil?
 
     return nil unless @data.key?("sw_write(csr_value)")
@@ -600,6 +616,8 @@ def pruned_sw_write_ast(effective_xlen)
   # @param effective_xlen [Integer] The effective xlen, needed since some fields change location with XLEN. If the field location is not determined by XLEN, then this parameter can be nil
   # @return [Range] the location within the CSR as a range (single bit fields will be a range of size 1)
   def location(effective_xlen = nil)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     key =
       if @data.key?("location")
         "location"
@@ -658,6 +676,8 @@ def defined_in_all_bases? = @data["base"].nil?
   # @param effective_xlen [Integer] The effective xlen, needed since some fields change location with XLEN. If the field location is not determined by XLEN, then this parameter can be nil
   # @return [Integer] Number of bits in the field
   def width(effective_xlen)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     location(effective_xlen).size
   end
 
@@ -700,8 +720,10 @@ def location_cond64
     end
   end
 
+  # @param effective_xlen [Integer or nil] 32 or 64 for fixed xlen, nil for dynamic
   # @return [String] Pretty-printed location string
   def location_pretty(effective_xlen = nil)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
     derangeify = proc { |loc|
       next loc.min.to_s if loc.size == 1
 
@@ -785,6 +807,8 @@ def location_pretty(effective_xlen = nil)
 
   # @return [String] Long description of the field type
   def type_desc(effective_xlen=nil)
+    raise ArgumentError, "effective_xlen is non-nil and is a #{effective_xlen.class} but must be an Integer" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     TYPE_DESC_MAP[type(effective_xlen)]
   end
 end
diff --git a/lib/arch_obj_models/obj.rb b/lib/arch_obj_models/database_obj.rb
similarity index 89%
rename from lib/arch_obj_models/obj.rb
rename to lib/arch_obj_models/database_obj.rb
index b41291d56d..e1e5af5952 100644
--- a/lib/arch_obj_models/obj.rb
+++ b/lib/arch_obj_models/database_obj.rb
@@ -1,6 +1,6 @@
 # frozen_string_literal: true
 
-# base for any object representation of the Architecture Definition
+# Base class for any object representation of the Architecture.
 # does two things:
 #
 #  1. Makes the raw data for the object accessible via []
@@ -24,8 +24,104 @@
 # Subclasses may override the accessors when a more complex data structure
 # is warranted, e.g., the CSR Field 'alias' returns a CsrFieldAlias object
 # instead of a simple string
+
+require_relative "doc_link"
+
 class DatabaseObject
-  # Exception raised when there is a problem with a schema file
+  attr_reader :data, :data_path, :name, :long_name
+
+  # @return [Architecture] If only a specification (no config) is known
+  # @return [ConfiguredArchitecture] If a specification and config is known
+  # @return [nil] If neither is known
+  attr_reader :arch       # Use when Architecture class is sufficient
+
+  # @return [ConfiguredArchitecture] If a specification and config is known
+  # @return [nil] Otherwise
+  attr_reader :cfg_arch   # Use when extra stuff provided by ConfiguredArchitecture is required
+
+  def kind = @data["kind"]
+
+  # @param data [Hash] Hash with fields to be added
+  # @param data_path [Pathname] Path to the data file
+  # @param arch [Architecture or ConfiguredArchitecture] The RISC-V database with or without a specific configuration
+  def initialize(data, data_path, arch)
+    raise ArgumentError, "Need Architecture class but it's a #{arch.class}" unless arch.is_a?(Architecture)
+    raise ArgumentError, "Bad data" unless data.is_a?(Hash)
+
+    @data = data
+    @data_path = data_path
+    @arch = arch
+    if arch.is_a?(ConfiguredArchitecture)
+      @cfg_arch = arch
+    else
+      @cfg_arch = nil
+    end
+    @name = data["name"]
+    @long_name = data["long_name"]
+
+    @sem = Concurrent::Semaphore.new(1)
+    @cache = Concurrent::Hash.new
+  end
+
+  # @return [Array]
+  def cert_normative_rules
+    return @cert_normative_rules unless @cert_normative_rules.nil?
+
+    @cert_normative_rules = []
+    @data["cert_normative_rules"]&.each do |cert_data|
+      @cert_normative_rules << CertNormativeRule.new(cert_data, self)
+    end
+    @cert_normative_rules
+  end
+
+  # @return [Hash] Hash with ID as key of all normative rules defined by database object
+  def cert_coverage_point_hash
+    return @cert_coverage_point_hash unless @cert_coverage_point_hash.nil?
+
+    @cert_coverage_point_hash = {}
+    cert_normative_rules.each do |cp|
+      @cert_coverage_point_hash[cp.id] = cp
+    end
+    @cert_coverage_point_hash
+  end
+
+  # @param id [String] Unique ID for the normative rule
+  # @return [CertNormativeRule]
+  # @return [nil] if there is no certification normative ruleed with ID of +id+
+  def cert_coverage_point(id)
+    cert_coverage_point_hash[id]
+  end
+
+  # @return [Array]
+  def cert_test_procedures
+    return @cert_test_procedures unless @cert_test_procedures.nil?
+
+    @cert_test_procedures = []
+    @data["cert_test_procedures"]&.each do |cert_data|
+      @cert_test_procedures << CertTestProcedure.new(cert_data, self)
+    end
+    @cert_test_procedures
+  end
+
+  # @return [Hash] Hash of all normative rules defined by database object
+  def cert_test_procedure_hash
+    return @cert_test_procedure_hash unless @cert_test_procedure_hash.nil?
+
+    @cert_test_procedure_hash = {}
+    cert_test_procedures.each do |tp|
+      @cert_test_procedure_hash[tp.id] = tp
+    end
+    @cert_test_procedure_hash
+  end
+
+  # @param id [String] Unique ID for test procedure
+  # @return [CertTestProcedure]
+  # @return [nil] if there is no certification test procedure with ID +id+
+  def cert_test_procedure(id)
+    cert_test_procedure_hash[id]
+  end
+
+ # Exception raised when there is a problem with a schema file
   class SchemaError < ::StandardError
     # result from JsonSchemer.validate
     attr_reader :result
@@ -253,8 +349,11 @@ def description(
 
   # @param data [Hash] Hash with fields to be added
   # @param data_path [Pathname] Path to the data file
-  def initialize(data, data_path, arch: nil)
-    raise ArgumentError, "Bad data" unless data.is_a?(Hash)
+  # @param arch [Architecture] The RISC-V standard (can optionally be a ConfiguredArchitecture too)
+  def initialize(data, data_path, arch)
+    raise ArgumentError, "data is a #{data.class} but needs to be a Hash" unless data.is_a?(Hash)
+    raise ArgumentError, "data_path is a #{data_path.class} but needs to be a Pathname" unless data_path.is_a?(Pathname)
+    raise ArgumentError, "arch is a #{arch.class} but needs to be an Architecture" unless arch.is_a?(Architecture)
 
     @data = data
     @data_path = data_path
@@ -270,7 +369,7 @@ def initialize(data, data_path, arch: nil)
   end
 
   def inspect
-    self.class.name
+    self.class.name + "##{name}"
   end
 
   # make the underlying YAML description available with []
@@ -293,7 +392,8 @@ def defer(fn_name, &block)
     @cache[fn_name] ||= yield
   end
 
-  # @return [ExtensionRequirementExpression] Extension(s) that define the instruction. If *any* requirement is met, the instruction is defined.
+  # @return [ExtensionRequirementExpression] Extension(s) that define the database object (e.g., Instruction, CSR).
+  #                                          If *any* requirement is met, the object is defined.
   def defined_by_condition
     @defined_by_condition ||=
       begin
@@ -511,7 +611,9 @@ def initialize(composition_hash, cfg_arch)
       raise ArgumentError, "Expecting a JSON schema comdition (got #{composition_hash})"
     end
 
-    raise ArgumentError, "Must provide a cfg_arch" unless cfg_arch.is_a?(ConfiguredArchitecture)
+    unless cfg_arch.is_a?(ConfiguredArchitecture)
+      raise ArgumentError, "Must provide a cfg_arch"
+    end
 
     @hsh = composition_hash
     @arch = cfg_arch
@@ -614,6 +716,12 @@ def to_asciidoc(cond = @hsh, indent = 0, join: "\n")
     end
   end
 
+  # @overload is_a_condition?(hsh)
+  #   @param hsh [String] Extension name (case sensitive)
+  #   @return [Boolean] True
+  # @overload is_a_condition?(hsh)
+  #   @param hsh [Hash] Extension name (case sensitive)
+  #   @return [Boolean] True if hash is a JSON schema condition
   def is_a_condition?(hsh)
     case hsh
     when String
@@ -828,8 +936,8 @@ def eval(term_values)
         @children.all? { |child| child.eval(term_values) }
       elsif @type == :or
         @children.any? { |child| child.eval(term_values) }
-      end
-    end
+  end
+end
 
     def to_s
       if @type == :term
@@ -946,7 +1054,7 @@ def to_logic_tree(hsh = @hsh, term_idx: [0], expand: true)
                 else
                   LogicNode.new(:and, [root, LogicNode.new(:not, [to_logic_tree(hsh[key][i], term_idx:, expand:)])])
                 end
-             end
+            end
             roots << root
           end
           root = LogicNode.new(:or, [roots[0], roots[1]])
diff --git a/lib/arch_obj_models/doc_link.rb b/lib/arch_obj_models/doc_link.rb
new file mode 100644
index 0000000000..4a9c5b58f1
--- /dev/null
+++ b/lib/arch_obj_models/doc_link.rb
@@ -0,0 +1,46 @@
+# frozen_string_literal: true
+
+# Creates links into RISC-V documentation with the following formats for the destination link:
+#
+#   Documenation  Format
+#   ============  ===============================================================
+#   ISA manuals   manual:ext::
+#                 manual:inst::
+#                 manual:insts:[-]+:
+#                 manual:inst_group::
+#                 manual:csr::
+#                 manual:csr_field:::
+#                 manual:param:::
+#                   where  is a string that describes the tagged text
+#   UDB doc       udb:doc:ext:
+#                 udb:doc:ext_param::
+#                 udb:doc:inst:
+#                 udb:doc:csr:
+#                 udb:doc:csr_field::
+#                 udb:doc:func:  (Documentation of common/built-in IDL functions)
+#                 udb:doc:cov_pt::
+#                   where  is:
+#                      sep for UDB documentation that "separates" normative rules from test plans
+#                      combo for UDB documentation that "combines" normative rules with test plans
+#                      appendix for UDB documentation that has normative rules and test plans in appendices
+#                   where  is the ID of the normative rule
+#   IDL code      idl:code:inst::
+#                 TODO for CSR and CSR Fields
+class DocLink
+  # @param dst_link [String] The documentation link provided in the YAML
+  # @param db_obj [String] Database object
+  def initialize(dst_link, db_obj)
+    raise ArgumentError, "Need String but was passed a #{data.class}" unless dst_link.is_a?(String)
+    @dst_link = dst_link
+
+    raise ArgumentError, "Missing documentation link for #{db_obj.name} of kind #{db_obj.kind}" if @dst_link.nil?
+  end
+
+  # @return [String] Unique ID of the linked to normative rule
+  def dst_link = @dst_link
+
+  # @return [String] Asciidoc to create desired link.
+  def to_adoc
+    "<<#{@dst_link},#{@dst_link}>>"
+  end
+end
diff --git a/lib/arch_obj_models/extension.rb b/lib/arch_obj_models/extension.rb
index 36ffd2cfac..d25c708533 100644
--- a/lib/arch_obj_models/extension.rb
+++ b/lib/arch_obj_models/extension.rb
@@ -1,145 +1,39 @@
 # frozen_string_literal: true
 
-require_relative "obj"
+require_relative "database_obj"
+require_relative "certifiable_obj"
+require_relative "parameter"
 require_relative "schema"
+require_relative "../presence"
 require_relative "../version"
 
-# A parameter (AKA option, AKA implementation-defined value) supported by an extension
-class ExtensionParameter
-  # @return [Architecture] The defining architecture
-  attr_reader :arch
-
-  # @return [String] Parameter name
-  attr_reader :name
-
-  # @return [String] Asciidoc description
-  attr_reader :desc
-
-  # @return [Schema] JSON Schema for this param
-  attr_reader :schema
-
-  # @return [String] Ruby code to perform validation above and beyond JSON schema
-  # @return [nil] If there is no extra validation
-  attr_reader :extra_validation
-
-  # @return [Array] The extension(s) that define this parameter
-  #
-  # Some parameters are defined by multiple extensions (e.g., CACHE_BLOCK_SIZE by Zicbom and Zicboz).
-  # When defined in multiple places, the parameter *must* mean the exact same thing.
-  attr_reader :exts
-
-  # @returns [Idl::Type] Type of the parameter
-  attr_reader :idl_type
+# Extension definition
+class Extension < DatabaseObject
+  # Add all methods in this module to this type of database object.
+  include CertifiableObject
 
-  # Pretty convert extension schema to a string.
-  def schema_type
-    @schema.to_pretty_s
-  end
+  # @return [String] Long name of the extension
+  def long_name = @data["long_name"]
 
-  def default
-    if @data["schema"].key?("default")
-      @data["schema"]["default"]
-    end
-  end
+  # @return [String] Either unprivileged or privileged
+  def priv_type = @data["type"]
 
-  # @param ext [Extension]
-  # @param name [String]
-  # @param data [Hash>"
-    else
-      name
-    end
-  end
-
-  # sorts by name
-  def <=>(other)
-    raise ArgumentError, "ExtensionParameters are only comparable to other extension parameters" unless other.is_a?(ExtensionParameter)
-
-    @name <=> other.name
-  end
-end
-
-class ExtensionParameterWithValue
-  # @return [Object] The parameter value
-  attr_reader :value
-
-  # @return [String] Parameter name
-  def name = @param.name
-
-  # @return [String] Asciidoc description
-  def desc = @param.desc
-
-  # @return [Hash] JSON Schema for the parameter value
-  def schema = @param.schema
-
-  # @return [String] Ruby code to perform validation above and beyond JSON schema
-  # @return [nil] If there is no extra validatino
-  def extra_validation = @param.extra_validation
-
-  # @return [Extension] The extension that defines this parameter
-  def exts = @param.exts
-
-  def idl_type = @param.idl_type
-
-  def initialize(param, value)
-    @param = param
-    @value = value
-  end
-end
-
-# Extension definition
-class Extension < DatabaseObject
-  # @return [String] Long name of the extension
-  def long_name = @data["long_name"]
-
   # @return [String] Company that developed the extension
   # @return [nil] if the company isn't known
   def company
@@ -168,6 +62,9 @@ def ratified_versions
     versions.select { |v| v.state == "ratified" }
   end
 
+  # @return [Boolean] Any version ratified?
+  def ratified = ratified_versions.any?
+
   # @return [ExtensionVersion] Mimumum defined version of this extension
   def min_version
     versions.min { |a, b| a.version_spec <=> b.version_spec }
@@ -186,14 +83,14 @@ def min_ratified_version
     ratified_versions.min { |a, b| a.version_spec <=> b.version_spec }
   end
 
-  # @return [Array] List of parameters added by this extension
+  # @return [Array] List of parameters added by this extension
   def params
     return @params unless @params.nil?
 
     @params = []
     if @data.key?("params")
       @data["params"].each do |param_name, param_data|
-        @params << ExtensionParameter.new(self, param_name, param_data)
+        @params << Parameter.new(self, param_name, param_data)
       end
     end
     @params
@@ -359,7 +256,7 @@ def contributors
     @contributors
   end
 
-  # @return [Array] The list of parameters for this extension version
+  # @return [Array] The list of parameters for this extension version
   def params
     @ext.params.select { |p| p.defined_in_extension_version?(self) }
   end
@@ -404,7 +301,7 @@ def conflicts_condition
   # under which it is in the list (which may be an AlwaysTrueExtensionRequirementExpression)
   #
   # @example
-  #   ext_ver.implicaitons #=> { :ext_ver => ExtensionVersion.new(:A, "2.1.0"), :cond => ExtensionRequirementExpression.new(...) }
+  #   ext_ver.implications #=> { :ext_ver => ExtensionVersion.new(:A, "2.1.0"), :cond => ExtensionRequirementExpression.new(...) }
   #
   # @return [Array ExtensionVersion, ExtensionRequirementExpression}>]
   #      List of extension versions that this ExtensionVersion implies
@@ -461,13 +358,6 @@ def implied_by_with_condition
     @implied_by_with_condition
   end
 
-  # @param ext_name [String] Extension name
-  # @param ext_version_requirements [String,Array] Extension version requirements
-  # @return [Boolean] whether or not this ExtensionVersion is named `ext_name` and satisfies the version requirements
-  def satisfies?(ext_name, *ext_version_requirements)
-    ExtensionRequirement.new(ext_name, ext_version_requirements).satisfied_by?(self)
-  end
-
   # sorts extension by name, then by version
   def <=>(other)
     unless other.is_a?(ExtensionVersion)
@@ -510,150 +400,34 @@ def implemented_instructions
       inst.defined_by_condition.possibly_satisfied_by?(self)
     end
   end
-end
-
-# Is the extension mandatory, optional, various kinds of optional, etc.
-# Accepts two kinds of YAML schemas:
-#   String
-#     Example => presence: mandatory
-#   Hash
-#     Must have the key "optional" with a String value
-#     Example => presence:
-#                  optional: development
-class ExtensionPresence
-  attr_reader :presence
-  attr_reader :optional_type
-
-  # @param data [Hash, String] The presence data from the architecture spec
-  def initialize(data)
-    if data.is_a?(String)
-      raise "Unknown extension presence of #{data}" unless ["mandatory","optional"].include?(data)
-
-      @presence = data
-      @optional_type = nil
-    elsif data.is_a?(Hash)
-      data.each do |key, value|
-        if key == "optional"
-          raise ArgumentError, "Extension presence hash #{data} missing type of optional" if value.nil?
-          raise ArgumentError, "Unknown extension presence optional #{value} for type of optional" unless
-            ["localized", "development", "expansion", "transitory"].include?(value)
-
-          @presence = key
-          @optional_type = value
-        else
-          raise ArgumentError, "Extension presence hash #{data} has unsupported key of #{key}"
-        end
-      end
-    else
-      raise ArgumentError, "Extension presence is a #{data.class} but only String or Hash are supported"
-    end
-  end
 
-  def mandatory? = (@presence == "mandatory")
-  def optional? = (@presence == "optional")
+  # @param design [Design] The design
+  # @return [Array] List of CSRs in-scope for this design for this extension version (may be empty).
+  #                      Factors in effect of design's xlen in the appropriate mode for the CSR.
+  def in_scope_csrs(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
 
-  # Class methods
-  def self.mandatory = "mandatory"
-  def self.optional = "optional"
-  def self.optional_type_localized = "localized"
-  def self.optional_type_development = "development"
-  def self.optional_type_expansion = "expansion"
-  def self.optional_type_transitory = "transitory"
+    return @in_scope_csrs unless @in_scope_csrs.nil?
 
-  def self.presence_types = [mandatory, optional]
-  def self.optional_types = [
-        optional_type_localized,
-        optional_type_development,
-        optional_type_expansion,
-        optional_type_transitory]
-
-  def self.presence_types_obj
-    return @presence_types_obj unless @presence_types_obj.nil?
-
-    @presence_types_obj = []
-
-    presence_types.each do |presence_type|
-      @presence_types_obj << ExtensionPresence.new(presence_type)
-    end
-
-    @presence_types_obj
-  end
-
-  def self.optional_types_obj
-    return @optional_types_obj unless @optional_types_obj.nil?
-
-    @optional_types_obj = []
-
-    optional_types.each do |optional_type|
-      @optional_types_obj << ExtensionPresence.new({ self.optional => optional_type })
+    @in_scope_csrs = @arch.csrs.select do |csr|
+      csr.defined_by_condition.possibly_satisfied_by?(self) &&
+      (csr.base.nil? || (design.possible_xlens.include?(csr.base)))
     end
-
-    @optional_types_obj
   end
 
-  def to_s
-    @optional_type.nil? ? "#{presence}" : "#{presence} (#{optional_type})"
-  end
+  # @param design [Design] The design
+  # @return [Array] List of instructions in-scope for this design for this extension version (may be empty).
+  #                              Factors in effect of design's xlen in the appropriate mode for the instruction.
+  def in_scope_instructions(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
 
-  def to_s_concise
-    "#{presence}"
-  end
+    return @in_scope_instructions unless @in_scope_instructions.nil?
 
-  # @overload ==(other)
-  #   @param other [String] A presence string
-  #   @return [Boolean] whether or not this ExtensionPresence has the same presence (ignores optional_type)
-  # @overload ==(other)
-  #   @param other [ExtensionPresence] An extension presence object
-  #   @return [Boolean] whether or not this ExtensionPresence has the exact same presence and optional_type as other
-  def ==(other)
-    case other
-    when String
-      @presence == other
-    when ExtensionPresence
-      @presence == other.presence && @optional_type == other.optional_type
-    else
-      raise "Unexpected comparison"
+    @in_scope_instructions = @arch.instructions.select do |inst|
+      inst.defined_by_condition.possibly_satisfied_by?(self) &&
+      (inst.base.nil? || (design.possible_xlens.include?(inst.base)))
     end
   end
-
-  ######################################################
-  # Following comparison operators follow these rules:
-  #   - "mandatory" is greater than "optional"
-  #   - optional_types all have same rank
-  #   - equals compares presence and then optional_type
-  ######################################################
-
-  # @overload >(other)
-  #   @param other [ExtensionPresence] An extension presence object
-  #   @return [Boolean] Whether or not this ExtensionPresence is greater-than the other
-  def >(other)
-    raise ArgumentError, "ExtensionPresence is only comparable to other ExtensionPresence classes" unless other.is_a?(ExtensionPresence)
-    (self.mandatory? && other.optional?)
-  end
-
-  # @overload >=(other)
-  #   @param other [ExtensionPresence] An extension presence object
-  #   @return [Boolean] Whether or not this ExtensionPresence is greater-than or equal to the other
-  def >=(other)
-    raise ArgumentError, "ExtensionPresence is only comparable to other ExtensionPresence classes" unless other.is_a?(ExtensionPresence)
-    (self > other) || (self == other)
-  end
-
-  # @overload <(other)
-  #   @param other [ExtensionPresence] An extension presence object
-  #   @return [Boolean] Whether or not this ExtensionPresence is less-than the other
-  def <(other)
-    raise ArgumentError, "ExtensionPresence is only comparable to other ExtensionPresence classes" unless other.is_a?(ExtensionPresence)
-    (self.optional? && other.mandatory?)
-  end
-
-  # @overload <=(other)
-  #   @param other [ExtensionPresence] An extension presence object
-  #   @return [Boolean] Whether or not this ExtensionPresence is less-than or equal to the other
-  def <=(other)
-    raise ArgumentError, "ExtensionPresence is only comparable to other ExtensionPresence classes" unless other.is_a?(ExtensionPresence)
-    (self < other) || (self == other)
-  end
 end
 
 # Represents an extension requirement, that is an extension name paired with version requirement(s)
@@ -690,26 +464,12 @@ def extension
     @extension = @arch.extension(@name)
   end
 
-  def self.create(yaml_req, arch)
-    if yaml_req.is_a?(String)
-      ExtensionRequirement.new(yaml_req, ">= #{arch.extension(yaml_req).versions.min}")
-    elsif yaml_req.is_a?(Hash)
-      raise "schema error" unless yaml_req.key?("name")
-
-      req = yaml_req.key?("version") ? yaml_req["version"] : ">= #{arch.extension(yaml_req['name']).versions.min}"
-      ExtensionRequirement.new(yaml_req["name"], req, arch:)
-    else
-      raise "unexpected"
-    end
-  end
-
   # @param name [#to_s] Extension name
   # @param requirements [String] Single requirement
   # @param requirements [Array] List of requirements, all of which must hold
   # @param arch [Architecture]
   def initialize(name, *requirements, arch: nil, note: nil, req_id: nil, presence: nil)
-    raise ArgumentError, "For #{name}, arch not allowed to be nil" if arch.nil?
-    raise ArgumentError, "For #{name}, Architecture is required" unless arch.is_a?(Architecture)
+    raise ArgumentError, "For #{name}, got class #{arch.class} but need Architecture" unless arch.is_a?(Architecture)
 
     @name = name.to_s.freeze
     @arch = arch
@@ -741,6 +501,25 @@ def satisfying_versions
     ext.versions.select { |v| satisfied_by?(v) }
   end
 
+  # @return [ExtensionVersion] The minimum extension version that satifies this extension requirement.
+  #                            If none, raises an error.
+  def min_satisfying_ext_ver
+    if satisfying_versions.empty?
+      warn "Extension requirement '#{self}' cannot be met by any available extension version. Available versions:"
+      if @ext.versions.empty?
+        warn "  none"
+      else
+        @ext.versions.each do |ext_ver|
+          warn "  #{ext_ver}"
+        end
+      end
+
+      raise "Cannot satisfy extension requirement '#{self}'"
+    end
+
+    satisfying_versions.min
+  end
+
   # @overload
   #   @param extension_version [ExtensionVersion] A specific extension version
   #   @return [Boolean] whether or not the extension_version meets this requirement
diff --git a/lib/arch_obj_models/instruction.rb b/lib/arch_obj_models/instruction.rb
index 92045a3286..7da36a1e39 100644
--- a/lib/arch_obj_models/instruction.rb
+++ b/lib/arch_obj_models/instruction.rb
@@ -2,17 +2,21 @@
 
 require 'ruby-prof-flamegraph'
 
-require_relative "obj"
+require_relative "database_obj"
+require_relative "certifiable_obj"
+require_relative "../presence"
 require "awesome_print"
 
 # model of a specific instruction in a specific base (RV32/RV64)
 class Instruction < DatabaseObject
-    def processed_wavedrom_desc(base)
-      data = wavedrom_desc(base)
-      processed_data = process_wavedrom(data)
-      TemplateHelpers.fix_entities(json_dump_with_hex_literals(processed_data))
-    end
+  # Add all methods in this module to this type of database object.
+  include CertifiableObject
 
+  def processed_wavedrom_desc(base)
+    data = wavedrom_desc(base)
+    processed_data = process_wavedrom(data)
+    TemplateHelpers.fix_entities(json_dump_with_hex_literals(processed_data))
+  end
 
   def self.ary_from_location(location_str_or_int)
     return [location_str_or_int] if location_str_or_int.is_a?(Integer)
@@ -145,10 +149,8 @@ def pruned_operation_ast(effective_xlen)
       return nil unless @data.key?("operation()")
 
       type_checked_ast = type_checked_operation_ast(effective_xlen)
-      print "Pruning #{name} operation()..."
       symtab = fill_symtab(effective_xlen, type_checked_ast)
       pruned_ast = type_checked_ast.prune(symtab)
-      puts "done"
       pruned_ast.freeze_tree(symtab)
 
       symtab.release
@@ -165,10 +167,8 @@ def reachable_functions(effective_xlen)
     else
       # RubyProf.start
       ast = type_checked_operation_ast(effective_xlen)
-      print "Determining reachable funcs from #{name} (#{effective_xlen})..."
       symtab = fill_symtab(effective_xlen, ast)
       fns = ast.reachable_functions(symtab)
-      puts "done"
       # result = RubyProf.stop
       # RubyProf::FlatPrinter.new(result).print($stdout)
       # exit
@@ -209,6 +209,8 @@ def mask_to_array(int)
   # @param effective_xlen [Integer] Effective XLEN to evaluate against. If nil, evaluate against all valid XLENs
   # @return [Array] List of all exceptions that can be reached from operation()
   def reachable_exceptions_str(effective_xlen=nil)
+    raise ArgumentError, "effective_xlen is a #{effective_xlen.class} but must be an Integer or nil" unless effective_xlen.nil? || effective_xlen.is_a?(Integer)
+
     if @data["operation()"].nil?
       []
     else
@@ -219,56 +221,47 @@ def reachable_exceptions_str(effective_xlen=nil)
           if base.nil?
             (
               pruned_ast = pruned_operation_ast(32)
-              print "Determining reachable exceptions from #{name}#RV32..."
               symtab = fill_symtab(32, pruned_ast)
               e32 = mask_to_array(pruned_ast.reachable_exceptions(symtab)).map { |code|
                 etype.element_name(code)
               }
               symtab.release
-              puts "done"
               pruned_ast = pruned_operation_ast(64)
-              print "Determining reachable exceptions from #{name}#RV64..."
               symtab = fill_symtab(64, pruned_ast)
               e64 = mask_to_array(pruned_ast.reachable_exceptions(symtab)).map { |code|
                 etype.element_name(code)
               }
               symtab.release
-              puts "done"
               e32 + e64
             ).uniq
           else
             pruned_ast = pruned_operation_ast(base)
-            print "Determining reachable exceptions from #{name}..."
             symtab = fill_symtab(base, pruned_ast)
             e = mask_to_array(pruned_ast.reachable_exceptions(symtab)).map { |code|
               etype.element_name(code)
             }
             symtab.release
-            puts "done"
             e
           end
         else
           effective_xlen = cfg_arch.mxlen
           pruned_ast = pruned_operation_ast(effective_xlen)
-          print "Determining reachable exceptions from #{name}..."
+          puts " #{name}..."
           symtab = fill_symtab(effective_xlen, pruned_ast)
           e = mask_to_array(pruned_ast.reachable_exceptions(symtab)).map { |code|
             etype.element_name(code)
           }
           symtab.release
-          puts "done"
           e
         end
       else
         pruned_ast = pruned_operation_ast(effective_xlen)
 
-        print "Determining reachable exceptions from #{name}..."
         symtab = fill_symtab(effective_xlen, pruned_ast)
         e = mask_to_array(pruned_ast.reachable_exceptions(symtab)).map { |code|
           etype.element_name(code)
         }
         symtab.release
-        puts "done"
         e
       end
     end
diff --git a/lib/arch_obj_models/instructions_appendix.rb b/lib/arch_obj_models/instructions_appendix.rb
index f4baa7bb71..3c9812e266 100755
--- a/lib/arch_obj_models/instructions_appendix.rb
+++ b/lib/arch_obj_models/instructions_appendix.rb
@@ -1,6 +1,6 @@
 # frozen_string_literal: true
 
-require_relative "obj"  # Adjust this require if your obj.rb is in the same folder.
+require_relative "database_obj"  # Adjust this require if your obj.rb is in the same folder.
 
 # The InstructionIndex class aggregates instructions from the architecture.
 # It merges instructions available directly from the architecture (if any)
diff --git a/lib/arch_obj_models/manual.rb b/lib/arch_obj_models/manual.rb
index 58d3ff3c02..74f440fbdf 100644
--- a/lib/arch_obj_models/manual.rb
+++ b/lib/arch_obj_models/manual.rb
@@ -2,7 +2,7 @@
 
 require "asciidoctor"
 
-require_relative "obj"
+require_relative "database_obj"
 
 class Manual < DatabaseObject
   def versions
diff --git a/lib/arch_obj_models/parameter.rb b/lib/arch_obj_models/parameter.rb
new file mode 100644
index 0000000000..a3d7d1a2ae
--- /dev/null
+++ b/lib/arch_obj_models/parameter.rb
@@ -0,0 +1,136 @@
+# frozen_string_literal: true
+
+require_relative "database_obj"
+require_relative "schema"
+require_relative "../version"
+
+# A parameter (AKA option, AKA implementation-defined value) supported by an extension
+class Parameter
+  # @return [Architecture] The defining architecture
+  attr_reader :arch
+
+  # @return [String] Parameter name
+  attr_reader :name
+
+  # @return [String] Asciidoc description
+  attr_reader :desc
+
+  # @return [Schema] JSON Schema for this param
+  attr_reader :schema
+
+  # @return [String] Ruby code to perform validation above and beyond JSON schema
+  # @return [nil] If there is no extra validation
+  attr_reader :extra_validation
+
+  # Some parameters are defined by multiple extensions (e.g., CACHE_BLOCK_SIZE by Zicbom and Zicboz).
+  # When defined in multiple places, the parameter *must* mean the exact same thing.
+  #
+  # @return [Array] The extension(s) that define this parameter
+  attr_reader :exts
+
+  # @returns [Idl::Type] Type of the parameter
+  attr_reader :idl_type
+
+  # Pretty convert extension schema to a string.
+  def schema_type
+    @schema.to_pretty_s
+  end
+
+  # @param ext [Extension]
+  # @param name [String]
+  # @param data [Hash] List of all in-scope extensions that define this parameter.
+  # @return [String] Text to create a link to the parameter definition with the link text the parameter name.
+  #                  if only one extension defines the parameter, otherwise just the parameter name.
+  def name_potentially_with_link(in_scope_exts)
+    raise ArgumentError, "Expecting Array but got #{in_scope_exts.class}" unless in_scope_exts.is_a?(Array)
+    raise ArgumentError, "Expecting Array[Extension]" unless in_scope_exts[0].is_a?(Extension)
+
+    if in_scope_exts.size == 1
+      link_to_udb_doc_ext_param(in_scope_exts[0].name, name, name)
+    else
+      name
+    end
+  end
+
+  # sorts by name
+  def <=>(other)
+    raise ArgumentError, "Parameters are only comparable to other extension parameters" unless other.is_a?(Parameter)
+
+    @name <=> other.name
+  end
+end
+
+class ParameterWithValue
+  # @return [Object] The parameter value
+  attr_reader :value
+
+  # @return [String] Parameter name
+  def name = @param.name
+
+  # @return [String] Asciidoc description
+  def desc = @param.desc
+
+  # @return [Hash] JSON Schema for the parameter value
+  def schema = @param.schema
+
+  # @return [String] Ruby code to perform validation above and beyond JSON schema
+  # @return [nil] If there is no extra validatino
+  def extra_validation = @param.extra_validation
+
+  # @return [Extension] The extension that defines this parameter
+  def exts = @param.exts
+
+  def initialize(param, value)
+    @param = param
+    @value = value
+  end
+end
diff --git a/lib/arch_obj_models/portfolio.rb b/lib/arch_obj_models/portfolio.rb
index 5a2978aba3..2a3c9ea970 100644
--- a/lib/arch_obj_models/portfolio.rb
+++ b/lib/arch_obj_models/portfolio.rb
@@ -1,3 +1,5 @@
+# frozen_string_literal: true
+
 # Classes for Portfolios which form a common base class for profiles and certificates.
 # A "Portfolio" is a named & versioned grouping of extensions (each with a name and version).
 # Each Portfolio is a member of a Portfolio Class:
@@ -9,16 +11,16 @@
 #
 # A variable name with a "_data" suffix indicates it is the raw hash data from the portfolio YAML file.
 
-require "tmpdir"
+require "forwardable"
 
-require_relative "obj"
+require_relative "database_obj"
 require_relative "schema"
 
 ##################
 # PortfolioClass #
 ##################
 
-# Holds information from Portfolio class YAML file (certificate class or profile class).
+# Holds information from Portfolio class YAML file (processor certificate class or profile class).
 # The inherited "data" member is the database of extensions, instructions, CSRs, etc.
 class PortfolioClass < DatabaseObject
   # @return [String] What kind of processor portfolio is this?
@@ -42,17 +44,312 @@ def portfolio_classes_matching_portfolio_kind_and_processor_kind
   end
 end
 
+##################
+# PortfolioGroup #
+##################
+
+# A portfolio group consists of a one or more profiles.
+# Contains common code to aggregrate multiple portfolios for Profile Releases and PortfolioDesign classes.
+# This not the base class for ProfileRelease but it does contain one of these.
+# This is not a DatabaseObject.
+class PortfolioGroup
+  extend Forwardable
+
+  attr_reader :name
+
+  # Calls to these methods on PortfolioGroup are handled by the Array class.
+  # Avoids having to call portfolio_grp.portfolios. (just call portfolio_grp.).
+  def_delegators :@portfolios, :each, :map, :select
+
+  # @param portfolios [Array]
+  def initialize(name, portfolios)
+    raise ArgumentError, "name is a class #{name.class} but must be a String" unless name.is_a?(String)
+    raise ArgumentError, "Need at least one portfolio" if portfolios.empty?
+
+    @name = name
+    @portfolios = portfolios
+  end
+
+  # @return [Array] All portfolios in this portfolio group
+  def portfolios = @portfolios
+
+  # @return [Hash] Fully-constrained parameter values (those with just one possible value for this design).
+  def param_values
+    return @param_values unless @param_values.nil?
+
+    @param_values = {}
+    portfolios.each do |portfolio|
+      @param_values.merge!(portfolio.all_in_scope_params.select(&:single_value?).map { |p| [p.name, p.value] }.to_h)
+    end
+
+    @param_values
+  end
+
+  # @return [Integer] Maximum base value (32 or 64) of all portfolios in group.
+  def max_base
+    base = portfolios.map(&:base).max
+
+    raise "All portfolios in config have a nil base" if base.nil?
+    raise ArgumentError, "Calculated maximum base of #{base} across portfolios is not 32 or 64" unless base == 32 || base == 64
+
+    return base
+  end
+
+  # @return [Array] Sorted list of all extension requirements listed by the group.
+  def in_scope_ext_reqs
+    return @in_scope_ext_reqs unless @in_scope_ext_reqs.nil?
+
+    @in_scope_ext_reqs = []
+    portfolios.each do |portfolio|
+      @in_scope_ext_reqs += portfolio.in_scope_ext_reqs
+    end
+
+    @in_scope_ext_reqs = @in_scope_ext_reqs.uniq(&:name).sort_by(&:name)
+  end
+
+  # @return [Array] Sorted list of all mandatory extension requirements listed by the group.
+  def mandatory_ext_reqs
+    return @mandatory_ext_reqs unless @mandatory_ext_reqs.nil?
+
+    @mandatory_ext_reqs = []
+    portfolios.each do |portfolio|
+      @mandatory_ext_reqs += portfolio.mandatory_ext_reqs
+    end
+
+    @mandatory_ext_reqs = @mandatory_ext_reqs.uniq(&:name).sort_by(&:name)
+  end
+
+  # @return [Array] Sorted list of all optional extension requirements listed by the group.
+  def optional_ext_reqs
+    return @optional_ext_reqs unless @optional_ext_reqs.nil?
+
+    @optional_ext_reqs = []
+    portfolios.each do |portfolio|
+      @optional_ext_reqs += portfolio.optional_ext_reqs
+    end
+
+    @optional_ext_reqs = @optional_ext_reqs.uniq(&:name).sort_by(&:name)
+  end
+
+  # @return [Array] Sorted list of all mandatory or optional extensions referenced by the group.
+  def in_scope_extensions
+    return @in_scope_extensions unless @in_scope_extensions.nil?
+
+    @in_scope_extensions = []
+    portfolios.each do |portfolio|
+      @in_scope_extensions += portfolio.in_scope_extensions
+    end
+
+    @in_scope_extensions = @in_scope_extensions.uniq(&:name).sort_by(&:name)
+
+  end
+
+  # @param design [Design] The design
+  # @return [Array] Sorted list of all instructions associated with extensions listed as
+  #                              mandatory or optional in portfolio. Uses instructions provided by the
+  #                              minimum version of the extension that meets the extension requirement.
+  def in_scope_instructions(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
+
+    return @in_scope_instructions unless @in_scope_instructions.nil?
+
+    @in_scope_instructions = []
+    portfolios.each do |portfolio|
+      @in_scope_instructions += portfolio.in_scope_instructions(design)
+    end
+
+    @in_scope_instructions =
+      @in_scope_instructions.uniq(&:name).sort_by(&:name)
+  end
+
+  # @param design [Design] The design
+  # @return [Array] Unsorted list of all CSRs associated with extensions listed as
+  #                      mandatory or optional in portfolio. Uses CSRs provided by the
+  #                      minimum version of the extension that meets the extension requirement.
+  def in_scope_csrs(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
+
+    return @in_scope_csrs unless @in_scope_csrs.nil?
+
+    @in_scope_csrs = []
+    portfolios.each do |portfolio|
+      @in_scope_csrs += portfolio.in_scope_csrs(design)
+    end
+
+    @in_scope_csrs.uniq(&:name)
+  end
+
+  # @param design [Design] The design
+  # @return [Array] Unsorted list of all in-scope exception codes.
+  def in_scope_exception_codes(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
+
+    return @in_scope_exception_codes unless @in_scope_exception_codes.nil?
+
+    @in_scope_exception_codes = []
+    portfolios.each do |portfolio|
+      @in_scope_exception_codes += portfolio.in_scope_exception_codes(design)
+    end
+
+    @in_scope_exception_codes.uniq(&:name)
+  end
+
+  # @param design [Design] The design
+  # @return [Array] Unsorted list of all in-scope interrupt codes.
+  def in_scope_interrupt_codes(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
+
+    return @in_scope_interrupt_codes unless @in_scope_interrupt_codes.nil?
+
+    @in_scope_interrupt_codes = []
+    portfolios.each do |portfolio|
+      @in_scope_interrupt_codes += portfolio.in_scope_interrupt_codes(design)
+    end
+
+    @in_scope_interrupt_codes.uniq(&:name)
+  end
+
+  # @return [String] Given an extension +ext_name+, return the presence as a string.
+  #                  Returns the greatest presence string across all profiles in the group.
+  #                  If the extension name isn't found in the release, return "-".
+  def extension_presence(ext_name)
+    greatest_presence = nil
+
+    portfolios.each do |portfolio|
+      presence = portfolio.extension_presence_obj(ext_name)
+
+      unless presence.nil?
+        if greatest_presence.nil?
+          greatest_presence = presence
+        elsif presence > greatest_presence
+          greatest_presence = presence
+        end
+      end
+    end
+
+    greatest_presence.nil? ? "-" : greatest_presence.to_s_concise
+  end
+
+  # @return [String] Given an instruction +inst_name+, return the presence as a string.
+  #                  Returns the greatest presence string across all profiles in the group.
+  #                  If the instruction name isn't found in the release, return "-".
+  def instruction_presence(inst_name)
+    greatest_presence = nil
+
+    portfolios.each do |portfolio|
+      presence = portfolio.instruction_presence_obj(inst_name)
+
+      unless presence.nil?
+        if greatest_presence.nil?
+          greatest_presence = presence
+        elsif presence > greatest_presence
+          greatest_presence = presence
+        end
+      end
+    end
+
+    greatest_presence.nil? ? "-" : greatest_presence.to_s_concise
+  end
+
+  # @return [String] Given an CSR +csr_name+, return the presence as a string.
+  #                  Returns the greatest presence string across all profiles in the group.
+  #                  If the CSR name isn't found in the release, return "-".
+  def csr_presence(csr_name)
+    greatest_presence = nil
+
+    portfolios.each do |portfolio|
+      presence = portfolio.csr_presence_obj(csr_name)
+
+      unless presence.nil?
+        if greatest_presence.nil?
+          greatest_presence = presence
+        elsif presence > greatest_presence
+          greatest_presence = presence
+        end
+      end
+    end
+
+    greatest_presence.nil? ? "-" : greatest_presence.to_s_concise
+  end
+
+  # @return [Array] Sorted list of parameters specified by any extension in portfolio.
+  def all_in_scope_params
+    @ret = []
+    portfolios.each do |portfolio|
+      @ret += portfolio.all_in_scope_params
+    end
+
+    @ret = @ret.uniq.sort
+  end
+
+  # @param [ExtensionRequirement]
+  # @return [Array] Sorted list of extension parameters from portfolio for given extension.
+  def in_scope_params(ext_req)
+    @ret = []
+    portfolios.each do |portfolio|
+      @ret += portfolio.in_scope_params(ext_req)
+    end
+
+    @ret = @ret.uniq.sort
+  end
+
+  # @return [Array] Sorted list of parameters out of scope across all in scope extensions.
+  def all_out_of_scope_params
+    @ret = []
+    portfolios.each do |portfolio|
+      @ret += portfolio.all_out_of_scope_params
+    end
+
+    @ret = @ret.uniq.sort
+  end
+
+  # @param ext_name [String] Extension name
+  # @return [Array] Sorted list of parameters that are out of scope for named extension.
+  def out_of_scope_params(ext_name)
+    @ret = []
+    portfolios.each do |portfolio|
+      @ret += portfolio.out_of_scope_params(ext_name)
+    end
+
+    @ret = @ret.uniq.sort
+  end
+
+  # @param param [Parameter]
+  # @return [Array] Sorted list of all in-scope extensions that define this parameter
+  #                            in the database and the parameter is in-scope.
+  def all_in_scope_exts_with_param(param)
+    @ret = []
+    portfolios.each do |portfolio|
+      @ret += portfolio.all_in_scope_exts_with_param(param)
+    end
+
+    @ret = @ret.uniq.sort
+  end
+
+  # @param param [Parameter]
+  # @return [Array] List of all in-scope extensions that define this parameter in the
+  #                            database but the parameter is out-of-scope.
+  def all_in_scope_exts_without_param(param)
+    @ret = []
+    portfolios.each do |portfolio|
+      @ret += portfolio.all_in_scope_exts_without_param(param)
+    end
+
+    @ret = @ret.uniq.sort
+  end
+end
+
 #############
 # Portfolio #
 #############
 
 # Holds information about a Portfolio (certificate or profile).
-# The inherited "data" member is the database of extensions, instructions, CSRs, etc.
+# The inherited "data" member is YAML data from the architecture for this portfolio object.
 class Portfolio < DatabaseObject
   # @param obj_yaml [Hash] Contains contents of Portfolio yaml file (put in @data)
   # @param data_path [String] Path to yaml file
   # @param arch [Architecture] Entire database of RISC-V architecture standards
-  def initialize(obj_yaml, yaml_path, arch: nil)
+  def initialize(obj_yaml, yaml_path, arch)
     super # Calls parent class with same args I got
   end
 
@@ -62,24 +359,95 @@ def introduction = @data["introduction"]
   # @return [String] Large enough to need its own heading (generally one level deeper than the "introduction").
   def description = @data["description"]
 
+  # @return [Integer] 32 or 64
+  def base = @data["base"]
+
   # @return [Gem::Version] Semantic version of the Portfolio
   def version = Gem::Version.new(@data["version"])
 
-  # @return [ExtensionPresence] Given an extension +ext_name+, return the presence.
-  #                             If the extension name isn't found in the portfolio, return nil.
+  # @return [Presence] Given an extension +ext_name+, return the presence.
+  #                    If the extension name isn't found in the portfolio, return nil.
   def extension_presence_obj(ext_name)
     # Get extension information from YAML for passed in extension name.
     ext_data = @data["extensions"][ext_name]
 
-    ext_data.nil? ? nil : ExtensionPresence.new(ext_data["presence"])
+    ext_data.nil? ? nil : Presence.new(ext_data["presence"])
   end
 
   # @return [String] Given an extension +ext_name+, return the presence as a string.
   #                  If the extension name isn't found in the portfolio, return "-".
   def extension_presence(ext_name)
-    ext_presence_obj = extension_presence_obj(ext_name)
+    presence_obj = extension_presence_obj(ext_name)
+
+    presence_obj.nil? ? "-" : presence_obj.to_s
+  end
+
+  # @return [Presence] Given an instruction +inst_name+, return the presence.
+  #                    If the instruction name isn't found in the portfolio, return nil.
+  def instruction_presence_obj(inst_name)
+    inst = arch.instruction(inst_name)
+
+    raise "Can't find instruction object '#{inst_name}' in arch class" if inst.nil?
+
+    is_mandatory = mandatory_ext_reqs.any? do |ext_req|
+      ext_versions = ext_req.satisfying_versions
+      ext_versions.any? { |ext_ver| inst.defined_by_condition.possibly_satisfied_by?(ext_ver) }
+    end
+
+    is_optional = optional_ext_reqs.any? do |ext_req|
+      ext_versions = ext_req.satisfying_versions
+      ext_versions.any? { |ext_ver| inst.defined_by_condition.possibly_satisfied_by?(ext_ver) }
+    end
+
+    if is_mandatory
+      Presence.new(Presence.mandatory)
+    elsif is_optional
+      Presence.new(Presence.optional)
+    else
+      nil
+    end
+  end
+
+  # @return [String] Given an instruction +inst_name+, return the presence as a string.
+  #                  If the instruction name isn't found in the portfolio, return "-".
+  def instruction_presence(inst_name)
+    presence_obj = instruction_presence_obj(inst_name)
+
+    presence_obj.nil? ? "-" : presence_obj.to_s
+  end
+
+  # @return [Presence] Given an CSR +csr_name+, return the presence.
+  #                    If the CSR name isn't found in the portfolio, return nil.
+  def csr_presence_obj(csr_name)
+    csr = arch.csr(csr_name)
+
+    raise "Can't find CSR object '#{csr_name}' in arch class" if csr.nil?
+
+    is_mandatory = mandatory_ext_reqs.any? do |ext_req|
+      ext_versions = ext_req.satisfying_versions
+      ext_versions.any? { |ext_ver| csr.defined_by_condition.possibly_satisfied_by?(ext_ver) }
+    end
+
+    is_optional = optional_ext_reqs.any? do |ext_req|
+      ext_versions = ext_req.satisfying_versions
+      ext_versions.any? { |ext_ver| csr.defined_by_condition.possibly_satisfied_by?(ext_ver) }
+    end
+
+    if is_mandatory
+      Presence.new(Presence.mandatory)
+    elsif is_optional
+      Presence.new(Presence.optional)
+    else
+      nil
+    end
+  end
 
-    ext_presence_obj.nil? ? "-" : ext_presence_obj.to_s
+  # @return [String] Given an CSR +csr_name+, return the presence as a string.
+  #                  If the CSR name isn't found in the portfolio, return "-".
+  def csr_presence(csr_name)
+    presence_obj = csr_presence_obj(csr_name)
+
+    presence_obj.nil? ? "-" : presence_obj.to_s
   end
 
   # Returns the greatest presence string for each of the specified versions.
@@ -123,23 +491,23 @@ def extension_note(ext_name)
     return ext_data["note"] unless ext_data.nil?
   end
 
-  def mandatory_ext_reqs = in_scope_ext_reqs(ExtensionPresence.mandatory)
-  def optional_ext_reqs = in_scope_ext_reqs(ExtensionPresence.optional)
-  def optional_type_ext_reqs = in_scope_ext_reqs(ExtensionPresence.optional)
+  def mandatory_ext_reqs = in_scope_ext_reqs(Presence.mandatory)
+  def optional_ext_reqs = in_scope_ext_reqs(Presence.optional)
+  def optional_type_ext_reqs = in_scope_ext_reqs(Presence.optional)
 
-  # @param desired_presence [String, Hash, ExtensionPresence]
-  # @return [Array] - # Extensions with their portfolio information.
+  # @param desired_presence [String, Hash, Presence]
+  # @return [Array] Sorted list of extensions with their portfolio information.
   # If desired_presence is provided, only returns extensions with that presence.
-  # If desired_presence is a String, only the presence portion of an ExtensionPresence is compared.
+  # If desired_presence is a String, only the presence portion of an Presence is compared.
   def in_scope_ext_reqs(desired_presence = nil)
     in_scope_ext_reqs = []
 
-    # Convert desired_present argument to ExtensionPresence object if not nil.
+    # Convert desired_present argument to Presence object if not nil.
     desired_presence_converted =
       desired_presence.nil?                     ? nil :
       desired_presence.is_a?(String)            ? desired_presence :
-      desired_presence.is_a?(ExtensionPresence) ? desired_presence :
-      ExtensionPresence.new(desired_presence)
+      desired_presence.is_a?(Presence) ? desired_presence :
+      Presence.new(desired_presence)
 
     missing_ext = false
 
@@ -157,7 +525,7 @@ def in_scope_ext_reqs(desired_presence = nil)
         raise "Missing extension presence for extension #{ext_name}" if actual_presence.nil?
 
         # Convert presence String or Hash to object.
-        actual_presence_obj = ExtensionPresence.new(actual_presence)
+        actual_presence_obj = Presence.new(actual_presence)
 
         match =
           if desired_presence.nil?
@@ -183,31 +551,96 @@ def in_scope_ext_reqs(desired_presence = nil)
 
     raise "One or more extensions referenced by #{name} missing in database" if missing_ext
 
-    in_scope_ext_reqs
+    in_scope_ext_reqs.sort_by!(&:name)
   end
 
+  # @return [Array] Sorted list of all mandatory or optional extensions in portfolio.
+  #                            Each extension can have multiple versions (contains ExtensionVersion array).
+  def in_scope_extensions
+    return @in_scope_extensions unless @in_scope_extensions.nil?
+
+    @in_scope_extensions = in_scope_ext_reqs.map do |ext_req|
+      ext_req.extension
+    end.reject(&:nil?)  # Filter out extensions that don't exist yet.
+
+    @in_scope_extensions.sort_by!(&:name)
+  end
+
+  # @return [ExtensionVersion] List of all mandatory or optional extensions listed in portfolio.
+  #                            The minimum version of each extension that satisfies the extension requirements is provided.
+  def in_scope_min_satisfying_extension_versions
+    return @in_scope_min_satisfying_extension_versions unless @in_scope_min_satisfying_extension_versions.nil?
+
+    @in_scope_min_satisfying_extension_versions = in_scope_ext_reqs.map do |ext_req|
+      ext_req.satisfying_versions.min
+    end.reject(&:nil?)  # Filter out extensions that don't exist yet.
+
+    @in_scope_min_satisfying_extension_versions
+  end
+
+  # @param design [Design] The design
   # @return [Array] Sorted list of all instructions associated with extensions listed as
-  #                              mandatory or optional in portfolio. Uses minimum version of
-  #                              extension version that meets extension requirement specified in portfolio.
-  def in_scope_instructions
+  #                              mandatory or optional in portfolio. Uses instructions provided by the
+  #                              minimum version of the extension that meets the extension requirement.
+  def in_scope_instructions(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
+
     return @in_scope_instructions unless @in_scope_instructions.nil?
 
-    # XXX
-    # @in_scope_instructions = in_scope_ext_reqs.map { |ext_req| ext_req.instructions }.flatten.uniq.sort
-    @in_scope_instructions = in_scope_extensions.map { |ext| ext.instructions }.flatten.uniq.sort
+    @in_scope_instructions =
+      in_scope_min_satisfying_extension_versions.map {|ext_ver| ext_ver.in_scope_instructions(design) }.flatten.uniq.sort
   end
 
-  # @return [Array] List of all extensions listed in portfolio.
-  def in_scope_extensions
-    return @in_scope_extensions unless @in_scope_extensions.nil?
+  # @param design [Design] The design
+  # @return [Array] Unsorted list of all CSRs associated with extensions listed as
+  #                      mandatory or optional in portfolio. Uses CSRs provided by the
+  #                      minimum version of the extension that meets the extension requirement.
+  def in_scope_csrs(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
 
-    @in_scope_extensions = in_scope_ext_reqs.map do |ext_req|
-      arch.extension(ext_req.name)
-    end.reject(&:nil?)  # Filter out extensions that don't exist yet.
+    return @in_scope_csrs unless @in_scope_csrs.nil?
 
-    @in_scope_extensions
+    @in_scope_csrs =
+      in_scope_min_satisfying_extension_versions.map {|ext_ver| ext_ver.in_scope_csrs(design) }.flatten.uniq
   end
 
+  # @param design [Design] The design
+  # @return [Array] Unsorted list of all in-scope exception codes.
+  # TODO: See https://github.com/riscv-software-src/riscv-unified-db/issues/291
+  # TODO: Still needs work and haven't created in_scope_interrupt_codes yet.
+  # TODO: Extensions should provide conditional information ("when" statements?)
+  #       that we evaluate here to determine if a particular exception code can
+  #       actually be generated in a design.
+  #       Also, probably shouldn't be calling "ext?" since that doesn't the in_scope lists of extensions.
+  def in_scope_exception_codes(design)
+    raise ArgumentError, "Require an PortfolioDesign object but got a #{design.class} object" unless design.is_a?(PortfolioDesign)
+
+    return @in_scope_exception_codes unless @in_scope_exception_codes.nil?
+
+    @in_scope_exception_codes =
+      in_scope_min_satisfying_extension_versions.reduce([]) do |list, ext_version|
+        ecodes = ext_version.ext["exception_codes"]
+        next list if ecodes.nil?
+
+        ecodes.each do |ecode|
+          # Require all exception codes be unique in a given portfolio.
+          raise "Duplicate exception code" if list.any? { |e| e.num == ecode["num"] || e.name == ecode["name"] || e.var == ecode["var"] }
+
+          unless ecode.dig("when", "version").nil?
+            # check version
+            next unless design.ext?(ext_version.name.to_sym, ecode["when"]["version"])
+          end
+          list << ExceptionCode.new(ecode["name"], ecode["var"], ecode["num"], arch)
+        end
+        list
+      end
+  end
+
+  # @param design [Design] The design
+  # @return [Array] Unsorted list of all in-scope interrupt codes.
+  # TODO: Actually implement this to use Design. See in_scope_exception_codes() above.
+  def in_scope_interrupt_codes(design) = arch.interrupt_codes
+
   # @return [Boolean] Does the profile differentiate between different types of optional.
   def uses_optional_types?
     return @uses_optional_types unless @uses_optional_types.nil?
@@ -215,7 +648,7 @@ def uses_optional_types?
     @uses_optional_types = false
 
     # Iterate through different kinds of optional using the "object" version (not the string version).
-    ExtensionPresence.optional_types_obj.each do |optional_type_obj|
+    Presence.optional_types_obj.each do |optional_type_obj|
       # See if any extension reqs have this type of optional.
       unless in_scope_ext_reqs(optional_type_obj).empty?
         @uses_optional_types = true
@@ -225,48 +658,48 @@ def uses_optional_types?
     @uses_optional_types
   end
 
-  # Called by rakefile when generating a portfolio.
-  # Creates an in-memory data structure used by all portfolio routines that access a cfg_arch.
-  #
-  # @return [ConfiguredArchitecture] A partially-configured architecture definition corresponding to this portfolio.
-  def to_cfg_arch
-    return @generated_cfg_arch unless @generated_cfg_arch.nil?
-
-    # build up a config for the portfolio
-    config_data = {
-      "$schema" => "config_schema.json",
-      "type" => "partially configured",
-      "kind" => "architecture configuration",
-      "name" => name,
-      "description" => "A partially configured architecture definition corresponding to the #{name} portfolio.",
-      "mandatory_extensions" => mandatory_ext_reqs.map do |ext_req|
-        {
-          "name" => ext_req.name,
-          "version" => ext_req.requirement_specs.map(&:to_s)
-        }
-      end,
-      "params" => all_in_scope_ext_params.select(&:single_value?).map { |p| [p.name, p.value] }.to_h
-    }
-
-    # TODO: Add list of prohibited_extensions
-    gen_dir = $root / "gen" / "cfgs"
-    FileUtils.mkdir_p gen_dir
-    File.write("#{gen_dir}/#{name}.yaml", YAML.safe_dump(config_data, permitted_classes: [Date]))
-
-    @generated_cfg_arch = ConfiguredArchitecture.new(name, @arch.path)
-  end
-
-  ###################################
-  # InScopeExtensionParameter Class #
-  ###################################
-
-  # Holds extension parameter information from the portfolio.
-  class InScopeExtensionParameter
-    attr_reader :param  # ExtensionParameter object (from the architecture database)
+  ###########################################################################
+  # Portfolio types that supported the concept of in-scope and out-of-scope #
+  # parameter have to override the following methods.                       #
+  ###########################################################################
+
+  # @return [Array] List of parameters specified by any extension in portfolio.
+  def all_in_scope_params = []
+
+  # @param [ExtensionRequirement]
+  # @return [Array] Sorted list of extension parameters from portfolio for given extension.
+  def in_scope_params(ext_req) = []
+
+  # @return [Array] Sorted list of parameters out of scope across all in scope extensions.
+  def all_out_of_scope_params = []
+
+  # @param ext_name [String] Extension name
+  # @return [Array] Sorted list of parameters that are out of scope for named extension.
+  def out_of_scope_params(ext_name) = []
+
+  # @param param [Parameter]
+  # @return [Array] Sorted list of all in-scope extensions that define this parameter
+  #                            in the database and the parameter is in-scope.
+  def all_in_scope_exts_with_param(param) = []
+
+  # @param param [Parameter]
+  # @return [Array] List of all in-scope extensions that define this parameter in the
+  #                            database but the parameter is out-of-scope.
+  def all_in_scope_exts_without_param(param) = []
+
+  ##########################
+  # InScopeParameter Class #
+  ##########################
+
+  class InScopeParameter
+    # @return [Parameter] Parameter object (from the architecture database)
+    attr_reader :param
+
+    # @return [String] Optional note associated with the parameter
     attr_reader :note
 
     def initialize(param, schema_hash, note)
-      raise ArgumentError, "Expecting ExtensionParameter" unless param.is_a?(ExtensionParameter)
+      raise ArgumentError, "Expecting Parameter" unless param.is_a?(Parameter)
 
       if schema_hash.nil?
         schema_hash = {}
@@ -307,146 +740,10 @@ def allowed_values
     # sorts by name
     def <=>(other)
       raise ArgumentError,
-        "InScopeExtensionParameter are only comparable to other parameter constraints" unless other.is_a?(InScopeExtensionParameter)
+        "InScopeParameter are only comparable to other parameter constraints" unless other.is_a?(InScopeParameter)
       @param.name <=> other.param.name
     end
-  end # class InScopeExtensionParameter
-
-  ############################################
-  # Routines using InScopeExtensionParameter #
-  ############################################
-
-  # @return [Array] List of parameters specified by any extension in portfolio.
-  # These are always IN-SCOPE by definition (since they are listed in the portfolio).
-  # Can have multiple array entries with the same parameter name since multiple extensions may define
-  # the same parameter.
-  def all_in_scope_ext_params
-    return @all_in_scope_ext_params unless @all_in_scope_ext_params.nil?
-
-    @all_in_scope_ext_params = []
-
-    @data["extensions"].each do |ext_name, ext_data|
-      next if ext_name[0] == "$"
-
-      # Find Extension object from database
-      ext = @arch.extension(ext_name)
-      raise "Cannot find extension named #{ext_name}" if ext.nil?
-
-      ext_data["parameters"]&.each do |param_name, param_data|
-        param = ext.params.find { |p| p.name == param_name }
-        raise "There is no param '#{param_name}' in extension '#{ext_name}" if param.nil?
-
-        next unless ext.versions.any? do |ext_ver|
-                      ver_req = ext_data["version"] || ">= #{ext.min_version.version_spec}"
-                      ExtensionRequirement.new(ext_name, ver_req, arch: @arch).satisfied_by?(ext_ver) &&
-                      param.defined_in_extension_version?(ext_ver)
-                    end
-
-        @all_in_scope_ext_params <<
-          InScopeExtensionParameter.new(param, param_data["schema"], param_data["note"])
-      end
-    end
-    @all_in_scope_ext_params
-  end
-
-  # @return [Array] List of extension parameters from portfolio for given extension.
-  # These are always IN SCOPE by definition (since they are listed in the portfolio).
-  def in_scope_ext_params(ext_req)
-    raise ArgumentError, "Expecting ExtensionRequirement" unless ext_req.is_a?(ExtensionRequirement)
-
-    ext_params = []    # Local variable, no caching
-
-    # Get extension information from portfolio YAML for passed in extension requirement.
-    ext_data = @data["extensions"][ext_req.name]
-    raise "Cannot find extension named #{ext_req.name}" if ext_data.nil?
-
-    # Find Extension object from database
-    ext = @arch.extension(ext_req.name)
-    raise "Cannot find extension named #{ext_req.name}" if ext.nil?
-
-    # Loop through an extension's parameter constraints (hash) from the portfolio.
-    # Note that "&" is the Ruby safe navigation operator (i.e., skip do loop if nil).
-    ext_data["parameters"]&.each do |param_name, param_data|
-      # Find ExtensionParameter object from database
-      ext_param = ext.params.find { |p| p.name == param_name }
-      raise "There is no param '#{param_name}' in extension '#{ext_req.name}" if ext_param.nil?
-
-      next unless ext.versions.any? do |ext_ver|
-                    ext_req.satisfied_by?(ext_ver) &&
-                    ext_param.defined_in_extension_version?(ext_ver)
-                  end
-
-      ext_params <<
-        InScopeExtensionParameter.new(ext_param, param_data["schema"], param_data["note"])
-    end
-
-    ext_params
-  end
-
-  # @return [Array] Parameters out of scope across all in scope extensions (those listed in the portfolio).
-  def all_out_of_scope_params
-    return @all_out_of_scope_params unless @all_out_of_scope_params.nil?
-
-    @all_out_of_scope_params = []
-    in_scope_ext_reqs.each do |ext_req|
-      ext = @arch.extension(ext_req.name)
-      ext.params.each do |param|
-        next if all_in_scope_ext_params.any? { |c| c.param.name == param.name }
-
-        next unless ext.versions.any? do |ext_ver|
-                      ext_req.satisfied_by?(ext_ver) &&
-                      param.defined_in_extension_version?(ext_ver)
-                    end
-
-        @all_out_of_scope_params << param
-      end
-    end
-    @all_out_of_scope_params
-  end
-
-  # @return [Array] Parameters that are out of scope for named extension.
-  def out_of_scope_params(ext_name)
-    all_out_of_scope_params.select{ |param| param.exts.any? { |ext| ext.name == ext_name } }
-  end
-
-  # @return [Array]
-  # All the in-scope extensions (those in the portfolio) that define this parameter in the database
-  # and the parameter is in-scope (listed in that extension's list of parameters in the portfolio).
-  def all_in_scope_exts_with_param(param)
-    raise ArgumentError, "Expecting ExtensionParameter" unless param.is_a?(ExtensionParameter)
-
-    # Iterate through all the extensions in the architecture database that define this parameter.
-    param.exts.select { |ext| in_scope_extensions.include?(ext) }
-  end
-
-  # @return [Array]
-  # All the in-scope extensions (those in the portfolio) that define this parameter in the database
-  # but the parameter is out-of-scope (not listed in that extension's list of parameters in the portfolio).
-  def all_in_scope_exts_without_param(param)
-    raise ArgumentError, "Expecting ExtensionParameter" unless param.is_a?(ExtensionParameter)
-
-    exts = []   # Local variable, no caching
-
-    # Iterate through all the extensions in the architecture database that define this parameter.
-    param.exts.each do |ext|
-      found = false
-
-      in_scope_extensions.each do |in_scope_ext|
-        if ext.name == in_scope_ext.name
-          found = true
-          next
-        end
-      end
-
-      if found
-          # Only add extensions that are in-scope (i.e., exist in this portfolio).
-          exts << ext
-      end
-    end
-
-    # Return intersection of extension names
-    exts
-  end
+  end # class InScopeParameter
 
   ############################
   # RevisionHistory Subclass #
@@ -483,7 +780,7 @@ class ExtraNote
     def initialize(data)
       @data = data
 
-      @presence_obj = ExtensionPresence.new(@data["presence"])
+      @presence_obj = Presence.new(@data["presence"])
     end
 
     def presence_obj = @presence_obj
@@ -500,11 +797,11 @@ def extra_notes
     @extra_notes
   end
 
-  # @param desired_presence [ExtensionPresence]
+  # @param desired_presence [Presence]
   # @return [String] Note for desired_presence
   # @return [nil] No note for desired_presence
   def extra_notes_for_presence(desired_presence_obj)
-    raise ArgumentError, "Expecting ExtensionPresence but got a #{desired_presence_obj.class}" unless desired_presence_obj.is_a?(ExtensionPresence)
+    raise ArgumentError, "Expecting Presence but got a #{desired_presence_obj.class}" unless desired_presence_obj.is_a?(Presence)
 
     extra_notes.select {|extra_note| extra_note.presence_obj == desired_presence_obj}
   end
diff --git a/lib/arch_obj_models/profile.rb b/lib/arch_obj_models/profile.rb
index 05acb3433f..c08a2ea3c3 100644
--- a/lib/arch_obj_models/profile.rb
+++ b/lib/arch_obj_models/profile.rb
@@ -25,7 +25,7 @@ def doc_license
   def profile_releases
     return @profile_releases unless @profile_releases.nil?
 
-    @profile_releases = @cfg_arch.profile_releases.select { |pr| pr.profile_class.name == name }
+    @profile_releases = @arch.profile_releases.select { |pr| pr.profile_class.name == name }
 
     @profile_releases
   end
@@ -37,7 +37,7 @@ def profile_releases_matching_processor_kind
     matching_classes = portfolio_classes_matching_portfolio_kind_and_processor_kind
 
     # Look for all profile releases that are from any of the matching classes.
-    @profile_releases_matching_processor_kind = @cfg_arch.profile_releases.select { |pr|
+    @profile_releases_matching_processor_kind = @arch.profile_releases.select { |pr|
       matching_classes.any? { |matching_class| matching_class.name == pr.profile_class.name }
     }
 
@@ -48,48 +48,46 @@ def profile_releases_matching_processor_kind
   def profiles
     return @profiles unless @profiles.nil?
 
-    @profiles = @cfg_arch.profiles.select {|profile| profile.profile_class.name == name}
+    @profiles = @arch.profiles.select {|profile| profile.profile_class.name == name}
   end
 
   # @return [Array] All profiles in database matching my processor kind
   def profiles_matching_processor_kind
     return @profiles_matching_processor_kind unless @profiles_matching_processor_kind.nil?
 
-    @profiles_matching_processor_kind = @cfg_arch.profiles.select {|profile| profile.profile_class.processor_kind == processor_kind}
+    @profiles_matching_processor_kind = @arch.profiles.select {|profile| profile.profile_class.processor_kind == processor_kind}
   end
 
-  # @return [Array] List of all extensions referenced by the profile class
-  def referenced_extensions
-    return @referenced_extensions unless @referenced_extensions.nil?
+  # @return [Array] Sorted list of all mandatory or optional extensions across the profile releases belonging
+  #                            to the profile class
+  def in_scope_extensions
+    return @in_scope_extensions unless @in_scope_extensions.nil?
 
-    @referenced_extensions = []
+    @in_scope_extensions = []
     profiles.each do |profile|
-      @referenced_extensions += profile.in_scope_extensions
+      @in_scope_extensions += profile.in_scope_extensions
     end
 
-    @referenced_extensions.uniq!(&:name)
-
-    @referenced_extensions
+    @in_scope_extensions = @in_scope_extensions.uniq(&:name).sort_by(&:name)
   end
 
-  # @return [Array] List of all extensions referenced by any profile class in the database with my processor kind
-  def referenced_extensions_matching_processor_kind
-    return @reference_extensions_matching_processor_kind unless @reference_extensions_matching_processor_kind.nil?
+  # @return [Array] Sorted list of all potential extensions with my processor kind
+  def in_scope_extensions_matching_processor_kind
+    return @in_scope_extensions_matching_processor_kind unless @in_scope_extensions_matching_processor_kind.nil?
 
-    @reference_extensions_matching_processor_kind = []
+    @in_scope_extensions_matching_processor_kind = []
     profiles_matching_processor_kind.each do |profile|
-      @reference_extensions_matching_processor_kind += profile.in_scope_extensions
+      @in_scope_extensions_matching_processor_kind += profile.in_scope_extensions
     end
 
-    @reference_extensions_matching_processor_kind.uniq!(&:name)
-
-    @reference_extensions_matching_processor_kind
+    @in_scope_extensions_matching_processor_kind =
+      @in_scope_extensions_matching_processor_kind.uniq(&:name).sort_by(&:name)
   end
 end
 
 # A profile release consists of a number of releases each with one or more profiles.
 # For example, the RVA20 profile release has profiles RVA20U64 and RVA20S64.
-# Note there is no Portfolio* base class for a ProfileRelease to inherit from since there is no
+# Note there is no Portfolio base class for a ProfileRelease to inherit from since there is no
 # equivalent to a ProfileRelease in a Certificate so no potential for a shared base class.
 class ProfileRelease < DatabaseObject
   def marketing_name = @data["marketing_name"]
@@ -116,7 +114,7 @@ def contributors
 
   # @return [ProfileClass] Profile Class that this ProfileRelease belongs to
   def profile_class
-    profile_class = @cfg_arch.profile_class(@data["class"])
+    profile_class = @arch.ref(@data["class"]['$ref'])
     raise "No profile class named '#{@data["class"]}'" if profile_class.nil?
 
     profile_class
@@ -128,45 +126,39 @@ def profiles
 
     @profiles = []
     @data["profiles"].each do |profile_ref|
-      @profiles << @cfg_arch.ref(profile_ref["$ref"])
+      @profiles << @arch.ref(profile_ref["$ref"])
     end
     @profiles
   end
 
-  # @return [Array] List of all extensions referenced by the release
-  def referenced_extensions
-    return @referenced_extensions unless @referenced_extensions.nil?
+  # @return [PortfolioGroup] All portfolios in this profile release
+  def portfolio_grp
+    return @portfolio_grp unless @portfolio_grp.nil?
 
-    @referenced_extensions = []
-    profiles.each do |profile|
-      @referenced_extensions += profile.in_scope_extensions
-    end
+    @portfolio_grp = PortfolioGroup.new(marketing_name, profiles)
+  end
 
-    @referenced_extensions.uniq!(&:name)
+  #####################################
+  # METHODS HANDLED BY PortfolioGroup #
+  #####################################
 
-    @referenced_extensions
-  end
+  # @return [Array] List of all mandatory or optional extensions referenced by this profile release.
+  def in_scope_extensions = portfolio_grp.in_scope_extensions
 
   # @return [String] Given an extension +ext_name+, return the presence as a string.
   #                  Returns the greatest presence string across all profiles in the release.
   #                  If the extension name isn't found in the release, return "-".
-  def extension_presence(ext_name)
-    greatest_presence = nil
+  def extension_presence(ext_name) = portfolio_grp.extension_presence(ext_name)
 
-    profiles.each do |profile|
-      presence = profile.extension_presence_obj(ext_name)
-
-      unless presence.nil?
-        if greatest_presence.nil?
-          greatest_presence = presence
-        elsif presence > greatest_presence
-          greatest_presence = presence
-        end
-      end
-    end
+  # @return [String] Given an instruction +inst_name+, return the presence as a string.
+  #                  Returns the greatest presence string across all profiles in the release.
+  #                  If the instruction name isn't found in the release, return "-".
+  def instruction_presence(inst_name) = portfolio_grp.instruction_presence(inst_name)
 
-    greatest_presence.nil? ? "-" : greatest_presence.to_s_concise
-  end
+  # @return [String] Given a CSR +csr_name+, return the presence as a string.
+  #                  Returns the greatest presence string across all profiles in the release.
+  #                  If the CSR name isn't found in the release, return "-".
+  def csr_presence(csr_name) = portfolio_grp.csr_presence(csr_name)
 end
 
 # Representation of a specific profile in a profile release.
@@ -176,7 +168,7 @@ def marketing_name = @data["marketing_name"]
 
   # @return [ProfileRelease] The profile release this profile belongs to
   def profile_release
-    profile_release = @cfg_arch.ref(@data["release"]["$ref"])
+    profile_release = @arch.ref(@data["release"]["$ref"])
     raise "No profile release named '#{@data["release"]["$ref"]}'" if profile_release.nil?
 
     profile_release
@@ -195,9 +187,6 @@ def base
     @data["base"]
   end
 
-  # @return [Array] List of all extensions referenced by the profile
-  def referenced_extensions = in_scope_extensions
-
   # Too complicated to put in profile ERB template.
   # @param presence_type [String]
   # @param heading_level [Integer]
@@ -211,10 +200,10 @@ def extensions_to_adoc(presence_type, heading_level)
     ret << ""
 
     unless presence_ext_reqs.empty?
-      if (presence_type == ExtensionPresence.optional) && uses_optional_types?
+      if (presence_type == Presence.optional) && uses_optional_types?
         # Iterate through each optional type. Use object version (not string) to get
         # precise comparisons (i.e., presence string and optional type string).
-        ExtensionPresence.optional_types_obj.each do |optional_type_obj|
+        Presence.optional_types_obj.each do |optional_type_obj|
           optional_type_ext_reqs = in_scope_ext_reqs(optional_type_obj)
           unless optional_type_ext_reqs.empty?
             ret << ""
@@ -242,7 +231,7 @@ def extensions_to_adoc(presence_type, heading_level)
     # Add extra notes that just belong to this presence.
     # Use object version (not string) of presence to avoid adding extra notes
     # already added for optional types if they are in use.
-    extra_notes_for_presence(ExtensionPresence.new(presence_type))&.each do |extra_note|
+    extra_notes_for_presence(Presence.new(presence_type))&.each do |extra_note|
       ret << "NOTE: #{extra_note.text}"
       ret << ""
     end # each extra_note
@@ -255,7 +244,7 @@ def extensions_to_adoc(presence_type, heading_level)
   def ext_req_to_adoc(ext_req)
     ret = []
 
-    ext = cfg_arch.extension(ext_req.name)
+    ext = arch.extension(ext_req.name)
     ret << "* *#{ext_req.name}* " + (ext.nil? ? "" : ext.long_name)
     ret << "+"
     ret << "Version #{ext_req.requirement_specs_to_s}"
diff --git a/lib/architecture.rb b/lib/architecture.rb
index 2e1b90a3e5..c157a1c2ec 100644
--- a/lib/architecture.rb
+++ b/lib/architecture.rb
@@ -1,10 +1,12 @@
 # frozen_string_literal: true
 
-# Contains the "database" of RISC-V standards including extensions, instructions,
-# CSRs, Profiles, and Certificates.  Could be either the standard spec (defined by RISC-V International)
-# of a custom spec (defined as an arch_overlay in /cfgs dir).
+# The Architecture class is the API to the architecture database.
+# The "database" contains RISC-V standards including extensions, instructions,
+# CSRs, Profiles, and Certificates.
+# The Architecture class is used by backends to export the information in the
+# architecture database to create various outputs.
 #
-# Creates Ruby functions at runtime (see generate_obj_methods() and OBJS array).
+# The Architecture class creates Ruby functions at runtime (see generate_obj_methods() and OBJS array).
 #   1) Function to return Array              (every klass in database)
 #   2) Function to return Hash  (hash entry is nil if name doesn't exist)
 #   3) Function to return Klass given name          (nil if name doesn't exist)
@@ -14,8 +16,8 @@
 #   Extension       extensions()        extension_hash()        extension(name)
 #   Instruction     instructions()      instruction_hash()      instruction(name)
 #   Csr             csrs()              csr_hash()              csr(name)
-#   CertClass       cert_classes()      cert_class_hash()       cert_class(name)
-#   CertModel       cert_models()       cert_model_hash()       cert_model(name)
+#   ProcCertClass   proc_cert_classes() proc_cert_class_hash()  proc_cert_class(name)
+#   ProcCertModel   proc_cert_models()  proc_cert_model_hash()  proc_cert_model(name)
 #   ProfileClass    profile_classes()   profile_class_hash()    profile_class(name)
 #   ProfileRelease  profile_releases()  profile_release_hash()  profile_release(name)
 #   Profile         profiles()          profile_hash()          profile(name)
@@ -26,7 +28,7 @@
 #
 #   klass               Array        Hash Klass func(String name)
 #   ==================  ==================  ======================= =========================
-#   ExtensionParameter  params()            param_hash()            param(name)
+#   Parameter           params()            param_hash()            param(name)
 #   PortfolioClass      portfolio_classes() portfolio_class_hash()  portfolio_class(name)
 #   Portfolio           portfolios()        portfolio_hash()        portfolio(name)
 #   ExceptionCodes      exception_codes()
@@ -78,6 +80,11 @@ def validate(show_progress: true)
     end
   end
 
+  # These instance methods are create when this Architecture class is first loaded.
+  # This is a Ruby "class" method and so self is the entire Architecture class, not an instance it.
+  # However, this class method creates normal instance methods and when they are called
+  # self is an instance of the Architecture class.
+  #
   # @!macro [attach] generate_obj_methods
   #   @method $1s
   #   @return [Array<$3>] List of all $1s defined in the standard
@@ -102,7 +109,7 @@ def self.generate_obj_methods(fn_name, arch_dir, obj_class)
         f.flock(File::LOCK_EX)
         obj_yaml = YAML.load(f.read, filename: obj_path, permitted_classes: [Date])
         f.flock(File::LOCK_UN)
-        @objects[arch_dir] << obj_class.new(obj_yaml, Pathname.new(obj_path).realpath, arch: self)
+        @objects[arch_dir] << obj_class.new(obj_yaml, Pathname.new(obj_path).realpath, self)
         @object_hashes[arch_dir][@objects[arch_dir].last.name] = @objects[arch_dir].last
       end
       @objects[arch_dir]
@@ -142,14 +149,14 @@ def self.generate_obj_methods(fn_name, arch_dir, obj_class)
       klass: Csr
     },
     {
-      fn_name: "cert_class",
-      arch_dir: "certificate_class",
-      klass: CertClass
+      fn_name: "proc_cert_class",
+      arch_dir: "proc_cert_class",
+      klass: ProcCertClass
     },
     {
-      fn_name: "cert_model",
-      arch_dir: "certificate_model",
-      klass: CertModel
+      fn_name: "proc_cert_model",
+      arch_dir: "proc_cert_model",
+      klass: ProcCertModel
     },
     {
       fn_name: "manual",
@@ -193,14 +200,14 @@ def objs
     @objs.freeze
   end
 
-  # @return [Array] Alphabetical list of all parameters defined in the architecture
+  # @return [Array] Alphabetical list of all parameters defined in the architecture
   def params
     return @params unless @params.nil?
 
     @params = extensions.map(&:params).flatten.uniq(&:name).sort_by!(&:name)
   end
 
-  # @return [Hash] Hash of all extension parameters defined in the architecture
+  # @return [Hash] Hash of all extension parameters defined in the architecture
   def param_hash
     return @param_hash unless @param_hash.nil?
 
@@ -211,7 +218,7 @@ def param_hash
     @param_hash
   end
 
-  # @return [ExtensionParameter] Parameter named +name+
+  # @return [Parameter] Parameter named +name+
   # @return [nil] if there is no parameter named +name+
   def param(name)
     param_hash[name]
@@ -221,7 +228,7 @@ def param(name)
   def portfolio_classes
     return @portfolio_classes unless @portfolio_classes.nil?
 
-    @portfolio_classes = profile_classes.concat(cert_classes).sort_by!(&:name)
+    @portfolio_classes = profile_classes.concat(proc_cert_classes).sort_by!(&:name)
   end
 
   # @return [Hash] Hash of all portfolio classes defined in the architecture
@@ -313,12 +320,12 @@ def ref(uri)
     file_path, obj_path = uri.split("#")
     obj =
       case file_path
-      when /^certificate_class.*/
-        cert_class_name = File.basename(file_path, ".yaml")
-        cert_class(cert_class_name)
-      when /^certificate_model.*/
-        cert_model_name = File.basename(file_path, ".yaml")
-        cert_model(cert_model_name)
+      when /^proc_cert_class.*/
+       proc_cert_class_name = File.basename(file_path, ".yaml")
+        proc_cert_class(proc_cert_class_name)
+      when /^proc_cert_model.*/
+        proc_cert_model_name = File.basename(file_path, ".yaml")
+        proc_cert_model(proc_cert_model_name)
       when /^csr.*/
         csr_name = File.basename(file_path, ".yaml")
         csr(csr_name)
diff --git a/lib/backend_helpers.rb b/lib/backend_helpers.rb
new file mode 100644
index 0000000000..5726b4e799
--- /dev/null
+++ b/lib/backend_helpers.rb
@@ -0,0 +1,380 @@
+# frozen_string_literal: true
+#
+# Collection of "helper" functions that can be called from backends and/or ERB templates.
+
+require "erb"
+require "pathname"
+require "ostruct"
+
+# Add to standard String class.
+class String
+  # Should be called on all RISC-V extension, instruction, CSR, and CSR field names.
+  # Parameters never have periods in their names so they don't need to be sanitized.
+  #
+  # @param name [String] Some RISC-V name which might have periods in it or ampersand
+  # @return [String] New String with periods replaced with underscores and ampersands replaced with "_and_"
+  def sanitize = String.new(self).gsub(".", "_").gsub("&", "_and_")
+end
+
+# This module is included in the CfgArch and Design classes so its methods are available to be called directly
+# from them without having to prefix a method with the module name.
+module TemplateHelpers
+  # Include a partial ERB template into a full ERB template.
+  #
+  # @param template_pname [String] Path to template file relative to "backends" directory.
+  # @param inputs [Hash] Input objects to pass into template
+  # @return [String] Result of ERB evaluation of the template file
+  def partial(template_pname, inputs = {})
+    template_path = Pathname.new($root / "backends" / template_pname)
+    raise ArgumentError, "Template '#{template_path} not found" unless template_path.exist?
+
+    erb = ERB.new(template_path.read, trim_mode: "-")
+    erb.filename = template_path.realpath.to_s
+
+    erb.result(OpenStruct.new(inputs).instance_eval { binding })
+  end
+
+  #########
+  # LINKS #
+  #########
+
+  # Links are created with this proprietary format so that they can be converted
+  # later into either AsciiDoc or Antora links (see the two implementations of "resolve_links").
+  #   %%UDB_DOC_LINK%;;%%
+  #
+  # Documentation:
+  #   - How to make cross-references: https://docs.asciidoctor.org/asciidoc/latest/macros/xref/
+  #   - How to create anchors: https://docs.asciidoctor.org/asciidoc/latest/attributes/id/
+  #   - See https://github.com/riscv/riscv-isa-manual/issues/1397#issuecomment-2515109936 for
+  #     discussion about using [#anchor] instead of [[anchor]] due to Antora's support.
+
+  # @return [String] A hyperlink to UDB extension documentation
+  # @param ext_name [String] Name of the extension
+  def link_to_udb_doc_ext(ext_name)
+    "%%UDB_DOC_LINK%ext;#{ext_name.sanitize};#{ext_name}%%"
+  end
+
+  # @return [String] A hyperlink to UDB parameter documentation
+  # @param ext_name [String] Name of the extension
+  # @param param_name [String] Name of the parameter
+  # @param link_text [String] What to put in the link text (don't assume param_name)
+  def link_to_udb_doc_ext_param(ext_name, param_name, link_text)
+    check_no_periods(param_name)
+    "%%UDB_DOC_LINK%ext_param;#{ext_name.sanitize}.#{param_name};#{link_text}%%"
+  end
+
+  # @return [String] A hyperlink to UDB instruction documentation
+  # @param inst_name [String] Name of the instruction
+  def link_to_udb_doc_inst(inst_name)
+    "%%UDB_DOC_LINK%inst;#{inst_name.sanitize};#{inst_name}%%"
+  end
+
+  # @return [String] A hyperlink to UDB CSR documentation
+  # @param csr_name [String] Name of the CSR
+  def link_to_udb_doc_csr(csr_name)
+    "%%UDB_DOC_LINK%csr;#{csr_name.sanitize};#{csr_name}%%"
+  end
+
+  # @return [String] A hyperlink to UDB CSR field documentation
+  # @param csr_name [String] Name of the CSR
+  # @param field_name [String] Name of the CSR field
+  def link_to_udb_doc_csr_field(csr_name, field_name)
+    "%%UDB_DOC_LINK%csr_field;#{csr_name.sanitize}.#{field_name.sanitize};#{csr_name}.#{field_name}%%"
+  end
+
+  # @return [String] A hyperlink to UDB IDL function documentation
+  # @param func_name [String] Name of the IDL function
+  def link_to_udb_doc_idl_func(func_name)
+    "%%UDB_DOC_LINK%func;#{func_name.sanitize};#{func_name}%%"
+  end
+
+  # @return [String] A hyperlink to a UDB certification normative rule (separate chapters for cov pts and test procs)
+  # @param org [String] Organization of normative rules and test procedures (sep=separate chapters, combo=combined chapters, appendix=appendix)
+  # @param id [String] ID of the normative rule
+  def link_to_udb_doc_cov_pt(org, id)
+    raise ArgumentError, "Unknown org value of '#{org}' for ID '#{id}'" unless org == "sep" || org == "combo" || org == "appendix"
+    "%%UDB_DOC_COV_PT_LINK%#{org};#{id.sanitize};#{id}%%"
+  end
+
+  # @return [String] A hyperlink into IDL instruction code
+  # @param func_name [String] Name of the instruction
+  # @param id [String] ID within the instruction code
+  def link_into_idl_inst_code(inst_name, id)
+    "%%IDL_CODE_LINK%inst;#{inst_name.sanitize}.#{id.sanitize};#{inst_name}.#{id}%%"
+  end
+  # TODO: Add csr and csr_field support
+
+  ###########
+  # ANCHORS #
+  ###########
+
+  # @return [String] An anchor for UDB extension documentation
+  # @param ext_name [String] Name of the extension
+  def anchor_for_udb_doc_ext(ext_name)
+    "[#udb:doc:ext:#{ext_name.sanitize}]"
+  end
+
+  # @return [String] An anchor for UDB parameter documentation
+  # @param ext_name [String] Name of the extension
+  # @param param_name [String] Name of the parameter
+  def anchor_for_udb_doc_ext_param(ext_name, param_name)
+    check_no_periods(param_name)
+    "[#udb:doc:ext_param:#{ext_name.sanitize}:#{param_name}]"
+  end
+
+  # @return [String] An anchor for UDB instruction documentation
+  # @param name [String] Name of the instruction
+  def anchor_for_udb_doc_inst(name)
+    "[#udb:doc:inst:#{name.sanitize}]"
+  end
+
+  # @return [String] An anchor for UDB CSR documentation
+  # @param name [String] Name of the CSR
+  def anchor_for_udb_doc_csr(name)
+    "[#udb:doc:csr:#{name.sanitize}]"
+  end
+
+  # @return [String] An anchor for UDB CSR field documentation
+  # @param csr_name [String] Name of the CSR
+  # @param field_name [String] Name of the CSR field
+  def anchor_for_udb_doc_csr_field(csr_name, field_name)
+    "[#udb:doc:csr_field:#{csr_name.sanitize}:#{field_name.sanitize}]"
+  end
+
+  # @return [String] An anchor for an IDL function documentation
+  # @param name [String] Name of the function
+  def anchor_for_udb_doc_idl_func(name)
+    "[#udb:doc:func:#{name.sanitize}]"
+  end
+
+  # @return [String] An anchor for a UDB normative rule documentation
+  # @param org [String] Document organization of normative rules and test procedures (sep=separate chapters, combo=combined chapters, appendix=appendix)
+  # @param id [String] ID of the normative rule
+  # Have to use [[anchor]] instead of [#anchor] since only the former works when in a table cell.
+  def anchor_for_udb_doc_cov_pt(org, id)
+    raise ArgumentError, "Unknown org value of '#{org}' for ID '#{id}'" unless org == "sep" || org == "combo" || org == "appendix"
+    "[[udb:doc:cov_pt:#{org}:#{id.sanitize}]]"
+  end
+
+  # @return [String] An anchor inside IDL instruction code
+  # @param func_name [String] Name of the instruction
+  # @param id [String] ID within the instruction code
+  def anchor_inside_idl_inst_code(inst_name, id)
+    "[#idl:code:inst:#{inst_name.sanitize}:#{id.sanitize}]"
+  end
+  # TODO: Add csr and csr_field support
+
+  #@ param s [String]
+  def check_no_periods(s)
+    raise ArgumentError, "Periods are not allowed in '#{s}'" if s.include?(".")
+  end
+  private :check_no_periods
+
+  def fix_entities(text)
+    text.to_s.gsub("≠", "≠")
+             .gsub("±", "±")
+             .gsub("-∞", "−∞")
+             .gsub("+∞", "+∞")
+  end
+
+  # Custom JSON converter for wavedrom that handles hexadecimal literals
+  def json_dump_with_hex_literals(data)
+    # First convert to standard JSON
+    json_string = JSON.dump(data)
+
+    # Replace string hex values with actual hex literals
+    json_string.gsub(/"0x([0-9a-fA-F]+)"/) do |match|
+      # Remove the quotes, leaving just the hex literal
+      "0x#{$1}"
+    end.gsub(/"name":/, '"name": ') # Add space after colon for name field
+  end
+
+  # Helper to process wavedrom data
+  def process_wavedrom(json_data)
+    result = json_data.dup
+
+    # Process reg array if it exists
+    if result["reg"].is_a?(Array)
+      result["reg"].each do |item|
+        # For fields that are likely opcodes or immediates (type 2)
+        if item["type"] == 2
+
+          # Convert to number first (if it's a string)
+          if item["name"].is_a?(String)
+            if item["name"].start_with?("0x")
+              # Already hexadecimal
+              numeric_value = item["name"].to_i(16)
+            elsif item["name"] =~ /^[01]+$/
+              # Binary string without prefix
+              numeric_value = item["name"].to_i(2)
+            elsif item["name"] =~ /^\d+$/
+              # Decimal
+              numeric_value = item["name"].to_i
+            else
+              # Not a number, leave it alone
+              next
+            end
+          else
+            # Already a number
+            numeric_value = item["name"]
+          end
+
+          # Convert to hexadecimal string
+          hex_str = numeric_value.to_s(16).downcase
+
+          # Set the name to a specially formatted string that will be converted
+          # to a hex literal in our custom JSON converter
+          item["name"] = "0x" + hex_str
+        end
+
+        # Ensure bits is a number
+        if item["bits"].is_a?(String) && item["bits"] =~ /^\d+$/
+          item["bits"] = item["bits"].to_i
+        end
+      end
+    end
+
+    result
+  end
+end
+
+# Utilities for a backend to generate AsciiDoc.
+module AsciidocUtils
+  # The syntax "class << self" causes all methods to be treated as class methods.
+  class << self
+    # Convert proprietary link format to legal AsciiDoc links.
+    # They are converted to AsciiDoc internal cross references (i.e., <>).
+    # For example,
+    #   %%UDB_DOC_LINK%inst;add;add instruction%%
+    # is converted to:
+    #   <>
+    #
+    # @param path_or_str [Pathname or String]
+    # @return [String]
+    def resolve_links(path_or_str)
+      str =
+        if path_or_str.is_a?(Pathname)
+          path_or_str.read
+        else
+          path_or_str
+        end
+      str.gsub(/%%UDB_DOC_LINK%([^;%]+)\s*;\s*([^;%]+)\s*;\s*([^%]+)%%/) do
+        type = Regexp.last_match[1]
+        name = Regexp.last_match[2]
+        link_text = Regexp.last_match[3]
+
+        case type
+        when "ext"
+          "<>"
+        when "ext_param"
+          ext_name, param_name = name.split('.')
+          "<>"
+        when "inst"
+          "<>"
+        when "csr"
+          "<>"
+        when "csr_field"
+          csr_name, field_name = name.split('.')
+          "<>"
+        when "func"
+          "<>"
+        else
+          raise "Unhandled link type of '#{type}' for '#{name}' with link_text '#{link_text}'"
+        end
+      end.gsub(/%%UDB_DOC_COV_PT_LINK%([^;%]+)\s*;\s*([^;%]+)\s*;\s*([^%]+)%%/) do
+        org = Regexp.last_match[1] # "sep", "combo", or "appendix"
+        id = Regexp.last_match[2]
+        link_text = Regexp.last_match[3]
+
+        raise "Unhandled link org of '#{org}' for ID '#{id}' with link_text '#{link_text}'" unless org == "sep" || org == "combo" || org == "appendix"
+
+        "<>"
+      end.gsub(/%%IDL_CODE_LINK%([^;%]+)\s*;\s*([^;%]+)\s*;\s*([^%]+)%%/) do
+        type = Regexp.last_match[1]
+        name = Regexp.last_match[2]
+        link_text = Regexp.last_match[3]
+
+        case type
+        when "inst"
+          inst_name, id = name.split('.')
+          "<>"
+        # TODO: Add csr and csr_field support
+        else
+          raise "Unhandled link type of '#{type}' for '#{name}' with link_text '#{link_text}'"
+        end
+      end
+    end
+  end
+end
+
+# Utilities for a backend to generate an Antora web-site.
+module AntoraUtils
+  # The syntax "class << self" causes all methods to be treated as class methods.
+  class << self
+    # Convert proprietary link format to legal AsciiDoc links.
+    #
+    # They are converted to AsciiDoc external cross references in the form:
+    #   xref::.adoc:#[])
+    # where <> don't appear in the actual cross reference (just there to indicate variable content).
+    #
+    # For example,
+    #   %%UDB_DOC_LINK%inst;add;add instruction%%
+    # is converted to:
+    #   xref:insts:add.adoc#udb:doc:add[add instruction]
+    #
+    # Antora supports the module name after the "xref:". In the example above, it the module name is "insts"
+    # and corresponds to the directory name the add.adoc file is located in. For more details, see:
+    #    https://docs.antora.org/antora/latest/page/xref/
+    # and then
+    #    https://docs.antora.org/antora/latest/page/resource-id-coordinates/
+    #
+    # @param path_or_str [Pathname or String]
+    # @return [String]
+    def resolve_links(path_or_str)
+      str =
+        if path_or_str.is_a?(Pathname)
+          path_or_str.read
+        else
+          path_or_str
+        end
+      str.gsub(/%%UDB_DOC_LINK%([^;%]+)\s*;\s*([^;%]+)\s*;\s*([^%]+)%%/) do
+        type = Regexp.last_match[1]
+        name = Regexp.last_match[2]
+        link_text = Regexp.last_match[3]
+
+        case type
+        when "ext"
+          "xref:exts:#{name}.adoc#udb:doc:ext:#{name}[#{link_text}]"
+        when "ext_param"
+          ext_name, param_name = name.split('.')
+          "xref:exts:#{ext_name}.adoc#udb:doc:ext_param:#{ext_name}:#{param_name}[#{link_text}]"
+        when "inst"
+          "xref:insts:#{name}.adoc#udb:doc:inst:#{name}[#{link_text}]"
+        when "csr"
+          "xref:csrs:#{name}.adoc#udb:doc:csr:#{name}[#{link_text}]"
+        when "csr_field"
+          csr_name, field_name = name.split('.')
+          "xref:csrs:#{csr_name}.adoc#udb:doc:csr_field:#{csr_name}:#{field_name}[#{link_text}]"
+        when "func"
+          # All functions are in the same file called "funcs.adoc".
+          "xref:funcs:funcs.adoc#udb:doc:func:#{name}[#{link_text.gsub(']', '\]')}]"
+        else
+          raise "Unhandled link type of '#{type}' for '#{name}' with link_text '#{link_text}'"
+        end
+      end.gsub(/%%IDL_CODE_LINK%([^;%]+)\s*;\s*([^;%]+)\s*;\s*([^%]+)%%/) do
+        type = Regexp.last_match[1]
+        name = Regexp.last_match[2]
+        link_text = Regexp.last_match[3]
+
+        case type
+        when "inst"
+          inst_name, id = name.split('.')
+          "xref:insts:#{inst_name}.adoc#idl:code:inst:#{inst_name}:#{id}[#{link_text}]"
+        # TODO: Add csr and csr_field support
+        else
+          raise "Unhandled link type of '#{type}' for '#{name}' with link_text '#{link_text}'"
+        end
+      end
+    end
+  end
+end
diff --git a/lib/cfg_arch.rb b/lib/cfg_arch.rb
index b95cccb6c3..e30aa3ad2a 100644
--- a/lib/cfg_arch.rb
+++ b/lib/cfg_arch.rb
@@ -2,7 +2,7 @@
 
 # Many classes include DatabaseObject have an "cfg_arch" member which is a ConfiguredArchitecture class.
 # It combines knowledge of the RISC-V Architecture with a particular configuration.
-# A configuration is an instance of the Config object either located in the /cfg directory
+# A configuration is an instance of the AbstractConfig object either located in the /cfg directory
 # or created at runtime for things like profiles and certificate models.
 
 require "concurrent"
@@ -20,7 +20,7 @@
 require_relative "idl/passes/reachable_exceptions"
 require_relative "idl/passes/reachable_functions"
 
-require_relative "template_helpers"
+require_relative "backend_helpers"
 
 include TemplateHelpers
 
@@ -165,30 +165,34 @@ def config_type = @config.type
 
   # Initialize a new configured architecture definition
   #
-  # @param config_name [#to_s] The name of a configuration, which must correspond
-  #                            to a folder name under cfg_path
-  def initialize(config_name, arch_path)
+  # @param name [:to_s]      The name associated with this ConfiguredArchitecture
+  # @param config [AbstractConfig]   The configuration object
+  # @param arch_path [:to_s] Path to the resolved architecture directory corresponding to the configuration
+  def initialize(name, config, arch_path)
+    raise ArgumentError, "name needs to be a String but is a #{name.class}" unless name.to_s.is_a?(String)
+    raise ArgumentError, "config needs to be a AbstractConfig but is a #{config.class}" unless config.is_a?(AbstractConfig)
+    raise ArgumentError, "arch_path needs to be a String but is a #{arch_path.class}" unless arch_path.to_s.is_a?(String)
     super(arch_path)
 
-    @name = config_name.to_s.freeze
+    @name = name.to_s.freeze
     @name_sym = @name.to_sym.freeze
 
     @obj_cache = {}
 
-    @config = Config.create("#{$root}/gen/cfgs/#{config_name}.yaml")
-    @mxlen = @config.mxlen
+    @config = config
+    @mxlen = config.mxlen
     @mxlen.freeze
 
     @idl_compiler = Idl::Compiler.new
 
     @symtab = Idl::SymbolTable.new(self)
     overlay_path =
-      if @config.arch_overlay.nil?
+      if config.arch_overlay.nil?
         "/does/not/exist"
-      elsif File.exist?(@config.arch_overlay)
-        File.realpath(@config.arch_overlay)
+      elsif File.exist?(config.arch_overlay)
+        File.realpath(config.arch_overlay)
       else
-        "#{$root}/arch_overlay/#{@config.arch_overlay}"
+        "#{$root}/arch_overlay/#{config.arch_overlay}"
       end
 
     custom_globals_path = Pathname.new "#{overlay_path}/isa/globals.isa"
@@ -207,12 +211,12 @@ def inspect = "ConfiguredArchitecture##{name}"
 
   # type check all IDL, including globals, instruction ops, and CSR functions
   #
-  # @param config [Config] Configuration
+  # @param config [AbstractConfig] Configuration
   # @param show_progress [Boolean] whether to show progress bars
   # @param io [IO] where to write progress bars
   # @return [void]
   def type_check(show_progress: true, io: $stdout)
-    io.puts "Type checking IDL code for #{@config.name}..."
+    io.puts "Type checking IDL code for #{@config.name}..." if show_progress
     progressbar =
       if show_progress
         ProgressBar.create(title: "Instructions", total: instructions.size)
@@ -277,7 +281,7 @@ def type_check(show_progress: true, io: $stdout)
     puts "done" if show_progress
   end
 
-  # @return [Array] List of all parameters with one known value in the config
+  # @return [Array] List of all parameters with one known value in the config
   def params_with_value
     return @params_with_value unless @params_with_value.nil?
 
@@ -290,7 +294,7 @@ def params_with_value
         ext.params.each do |ext_param|
           next unless @config.param_values.key?(ext_param.name)
 
-          @params_with_value << ExtensionParameterWithValue.new(
+          @params_with_value << ParameterWithValue.new(
             ext_param,
             @config.param_values[ext_param.name]
           )
@@ -303,7 +307,7 @@ def params_with_value
           # Params listed in the config always only have one value.
           next unless @config.param_values.key?(ext_param.name)
 
-          @params_with_value << ExtensionParameterWithValue.new(
+          @params_with_value << ParameterWithValue.new(
             ext_param,
             @config.param_values[ext_param.name]
           )
@@ -315,7 +319,7 @@ def params_with_value
     @params_with_value
   end
 
-  # @return [Array] List of all available parameters without one known value in the config
+  # @return [Array] List of all available parameters without one known value in the config
   def params_without_value
     return @params_without_value unless @params_without_value.nil?
 
@@ -405,7 +409,7 @@ def not_prohibited_extensions
 
     @not_prohibited_extensions ||=
       if @config.fully_configured?
-        transitive_implemented_extension_versions.map { |ext_ver| ext_ver.extension }.uniq
+        transitive_implemented_extension_versions.map { |ext_ver| ext_ver.ext }.uniq
       elsif @config.partially_configured?
         # reject any extension in which all of the extension versions are prohibited
         extensions.reject { |ext| (ext.versions - transitive_prohibited_extension_versions).empty? }
@@ -810,24 +814,25 @@ def reachable_functions
     @reachable_functions
   end
 
-  # given an adoc string, find names of CSR/Instruction/Extension enclosed in `monospace`
-  # and replace them with links to the relevant object page
+  # Given an adoc string, find names of CSR/Instruction/Extension enclosed in `monospace`
+  # and replace them with links to the relevant object page.
+  # See backend_helpers.rb for a definition of the proprietary link format.
   #
   # @param adoc [String] Asciidoc source
   # @return [String] Asciidoc source, with link placeholders
-  def find_replace_links(adoc)
+  def convert_monospace_to_links(adoc)
     adoc.gsub(/`([\w.]+)`/) do |match|
       name = Regexp.last_match(1)
       csr_name, field_name = name.split(".")
-      csr = csr(csr_name)
+      csr = not_prohibited_csrs.find { |c| c.name == csr_name }
       if !field_name.nil? && !csr.nil? && csr.field?(field_name)
-        "%%LINK%csr_field;#{csr_name}.#{field_name};#{csr_name}.#{field_name}%%"
+        link_to_udb_doc_csr_field(csr_name, field_name)
       elsif !csr.nil?
-        "%%LINK%csr;#{csr_name};#{csr_name}%%"
-      elsif instruction(name)
-        "%%LINK%inst;#{name};#{name}%%"
-      elsif extension(name)
-        "%%LINK%ext;#{name};#{name}%%"
+        link_to_udb_doc_csr(csr_name)
+      elsif not_prohibited_instructions.any? { |inst| inst.name == name }
+        link_to_udb_doc_inst(name)
+      elsif not_prohibited_extensions.any? { |ext| ext.name == name }
+        link_to_udb_doc_ext(name)
       else
         match
       end
@@ -845,8 +850,9 @@ def erb_env
 
     @env = Class.new
     @env.instance_variable_set(:@cfg, @cfg)
-    @env.instance_variable_set(:@cfg_arch, self)
     @env.instance_variable_set(:@params, @params)
+    @env.instance_variable_set(:@cfg_arch, self)
+    @env.instance_variable_set(:@arch, self) # For backwards-compatibility
 
     # add each parameter, either as a method (lowercase) or constant (uppercase)
     params_with_value.each do |param|
@@ -872,16 +878,6 @@ def possible_xlens
         @cfg_arch.possible_xlens
       end
 
-      # insert a hyperlink to an object
-      # At this point, we insert a placeholder since it will be up
-      # to the backend to create a specific link
-      #
-      # @params type [Symbol] Type (:section, :csr, :inst, :ext)
-      # @params name [#to_s] Name of the object
-      def link_to(type, name)
-        "%%LINK%#{type};#{name}%%"
-      end
-
       # info on interrupt and exception codes
 
       # @returns [Hash] architecturally-defined exception codes and their names
diff --git a/lib/config.rb b/lib/config.rb
index 7c02685558..8ba36219c1 100644
--- a/lib/config.rb
+++ b/lib/config.rb
@@ -1,37 +1,97 @@
 # frozen_string_literal: true
 
 require "pathname"
+require "forwardable"
+require_relative "arch_obj_models/portfolio"
+
+# This class represents a configuration. Is is coded as an abstract base class (must be inherited by a child).
+#
+# There are child classes derived from AbstractConfig to handle:
+#   - Configurations specified by YAML files in the /cfg directory
+#   - Configurations specified by portfolio groups (certificates and profile releases)
+class AbstractConfig
+  ####################
+  # ABSTRACT METHODS #
+  ####################
 
-# This class represents a configuration file (e.g., cfgs/*/cfg.yaml), independent of the Architecture.
-# Can either be in the /cfg directory or created at runtime in memory by the certificate tasks.rake file.
-class Config
   # @return [Hash] A hash mapping parameter name to value for any parameter that has
   #                                been configured with a value. May be empty.
-  attr_reader :param_values
+  def param_values = raise "Abstract Method: Must be provided in child class"
 
-  def overlay? = !(@data["arch_overlay"].nil? || @data["arch_overlay"].empty?)
+  # @return [Boolean] Is an overlay present?
+  def overlay? = raise "Abstract Method: Must be provided in child class"
 
   # @return [String] Either a path to an overlay directory, or the name of a folder under arch_overlay/
   # @return [nil] No arch_overlay for this config
-  def arch_overlay = @data["arch_overlay"]
+  def arch_overlay = raise "Abstract Method: Must be provided in child class"
 
   # @return [String] Absolute path to the arch_overlay
   # @return [nil] No arch_overlay for this config
-  def arch_overlay_abs
-    return nil unless @data.key?("arch_overlay")
+  def arch_overlay_abs = raise "Abstract Method: Must be provided in child class"
 
-    if File.directory?("#{$root}/arch_overlay/#{@data['arch_overlay']}")
-      "#{$root}/arch_overlay/#{@data['arch_overlay']}"
-    elsif File.directory?(@data['arch_overlay'])
-      @data['arch_overlay']
-    else
-      raise "Cannot find arch_overlay '#{@data['arch_overlay']}'"
-    end
+  def mxlen = raise "Abstract Method: Must be provided in child class"
+
+  def fully_configured? = raise "Abstract Method: Must be provided in child class"
+  def partially_configured? = raise "Abstract Method: Must be provided in child class"
+  def unconfigured? = raise "Abstract Method: Must be provided in child class"
+
+  # @return [Array>] List of all extensions known to be implemented by the configuration.
+  def implemented_extensions = raise "Abstract Method: Must be provided in child class"
+
+  # @return [Array String,Array]
+  #    List of all extensions that must be implemented by the configuration
+  #    The first entry in the nested array is an Extension name.
+  #    The second entry in the nested array is an Extension version requirement.
+  #
+  # @example
+  #   mandatory_extensions =>
+  #     [{ "name" => "A", "version" => ["~> 2.0"] }, { "name" => "B", "version" => ["~> 1.0"] }, ...]
+  def mandatory_extensions = raise "Abstract Method: Must be provided in child class"
+
+  # @return [Array String,Array]
+  #   List of all extensions that are explicitly prohibited by the configuration.
+  #   The first entry in the nested array is an Extension name.
+  #   The second entry in the nested array is an Extension version requirement.
+  #
+  # @example
+  #   partial_config.prohibited_extensions =>
+  #     [{ "name" => "F", "version" => [">= 2.0"] }, { "name" => "Zfa", "version" => ["> = 1.0"] }, ...]
+  def prohibited_extensions = raise "Abstract Method: Must be provided in child class"
+
+  # Whether or not a compliant instance of this partial config can have more extensions than those listed
+  # in mandatory_extensions/non_mandatory_extensions.
+  def additional_extensions_allowed? = raise "Abstract Method: Must be provided in child class"
+
+  ########################
+  # NON-ABSTRACT METHODS #
+  ########################
+
+  def initialize(name)
+    @name = name
   end
 
-  # use Config#create instead
+  def name = @name
+  def configured? = !unconfigured
+end
+
+# This class represents a configuration as specified by YAML files in the /cfg directory.
+# Is is coded as an abstract base class (must be inherited by a child).
+class FileConfig < AbstractConfig
+  ########################
+  # NON-ABSTRACT METHODS #
+  ########################
+
+  # use FileConfig#create instead
   private_class_method :new
 
+  def initialize(cfg_file_path, data)
+    super(data["name"])
+    @cfg_file_path = cfg_file_path
+    @data = data
+  end
+
+  def type = @data["type"]
+
   def self.freeze_data(obj)
     if obj.is_a?(Hash)
       obj.each do |k, v|
@@ -45,9 +105,10 @@ def self.freeze_data(obj)
   end
   private_class_method :freeze_data
 
-  # factory method to create a FullConfig, PartialConfig, or Unconfig based on the contents of cfg_filename
+  # Factory method to create a FullConfig, PartialConfig, or UnConfig based
+  # on the contents of cfg_filename.
   #
-  # @return [Config] A new Config
+  # @return [FileConfig] A new FileConfig object
   def self.create(cfg_filename)
     cfg_file_path = Pathname.new(cfg_filename)
     raise ArgumentError, "Cannot find #{cfg_filename}" unless cfg_file_path.exist?
@@ -63,32 +124,45 @@ def self.create(cfg_filename)
     when "partially configured"
       PartialConfig.send(:new, cfg_file_path, data)
     when "unconfigured"
-      Unconfig.send(:new, cfg_file_path, data)
+      UnConfig.send(:new, cfg_file_path, data)
     else
       raise "Unexpected type in config"
     end
   end
 
-  def initialize(cfg_file_path, data)
-    @cfg_file_path = cfg_file_path
-    @data = data
-  end
+  ###############################
+  # ABSTRACT METHODS OVERRIDDEN #
+  ###############################
 
-  def name = @data["name"]
+  def overlay? = !(@data["arch_overlay"].nil? || @data["arch_overlay"].empty?)
 
-  def fully_configured? = @data["type"] == "fully configured"
-  def partially_configured? = @data["type"] == "partially configured"
-  def unconfigured? = @data["type"] == "unconfigured"
-  def configured? = @data["type"] != "unconfigured"
-  def type = @data["type"]
+  # @return [String] Either a path to an overlay directory, or the name of a folder under arch_overlay/
+  # @return [nil] No arch_overlay for this config
+  def arch_overlay = @data["arch_overlay"]
+
+  # @return [String] Absolute path to the arch_overlay
+  # @return [nil] No arch_overlay for this config
+  def arch_overlay_abs
+    return nil unless @data.key?("arch_overlay")
+
+    if File.directory?("#{$root}/arch_overlay/#{@data['arch_overlay']}")
+      "#{$root}/arch_overlay/#{@data['arch_overlay']}"
+    elsif File.directory?(@data['arch_overlay'])
+      @data['arch_overlay']
+    else
+      raise "Cannot find arch_overlay '#{@data['arch_overlay']}'"
+    end
+  end
 end
 
 #################################################################
 # This class represents a configuration that is "unconfigured". #
 # It doesn't know anything about extensions or parameters.      #
 #################################################################
-class Unconfig < Config
-  attr_reader :param_values
+class UnConfig < FileConfig
+  ########################
+  # NON-ABSTRACT METHODS #
+  ########################
 
   def initialize(cfg_file_path, data)
     super(cfg_file_path, data)
@@ -96,19 +170,31 @@ def initialize(cfg_file_path, data)
     @param_values = {}.freeze
   end
 
+  ###############################
+  # ABSTRACT METHODS OVERRIDDEN #
+  ###############################
+
+  def param_values = @param_values
   def mxlen = nil
 
+  def fully_configured? = false
+  def partially_configured? = false
+  def unconfigured? = true
+
   def implemented_extensions = raise "implemented_extensions is only available for a FullConfig"
   def mandatory_extensions = raise "mandatory_extensions is only available for a PartialConfig"
   def prohibited_extensions = raise "prohibited_extensions is only available for a PartialConfig"
+  def additional_extensions_allowed? = raise "additional_extensions_allowed? is only available for a PartialConfig"
 end
 
 ##############################################################################################################
 # This class represents a configuration that is "partially-configured" (e.g., portfolio or configurable IP). #
 # It only lists mandatory & prohibited extensions and fully-constrained parameters (single value).
 ##############################################################################################################
-class PartialConfig < Config
-  attr_reader :param_values, :mxlen
+class PartialConfig < FileConfig
+  ########################
+  # NON-ABSTRACT METHODS #
+  ########################
 
   def initialize(cfg_file_path, data)
     super(cfg_file_path, data)
@@ -116,23 +202,26 @@ def initialize(cfg_file_path, data)
     @param_values = @data.key?("params") ? @data["params"] : [].freeze
 
     @mxlen = @data.dig("params", "MXLEN")
-    raise "Must set MXLEN for a configured config" if @mxlen.nil?
+    if @mxlen.nil?
+      raise "Must set MXLEN for a configured config"
+    end
 
     @mxlen.freeze
   end
 
-  def additional_extensions_allowed? = @data.key?("additional_extensions") ? @data["additional_extensions"] : true
+  ###############################
+  # ABSTRACT METHODS OVERRIDDEN #
+  ###############################
+
+  def param_values = @param_values
+  def mxlen = @mxlen
+
+  def fully_configured? = false
+  def partially_configured? = true
+  def unconfigured? = false
 
   def implemented_extensions = raise "implemented_extensions is only available for a FullConfig"
 
-  # @return [Array String,Array]
-  #    List of all extensions that must be implemented, as specified in the config file
-  #    The first entry in the nested array is an Extension name.
-  #    The second entry in the nested array is an Extension version requirement
-  #
-  # @example
-  #   partial_config.mandatory_extensions =>
-  #     [{ "name" => "A", "version" => ["~> 2.0"] }, { "name" => "B", "version" => ["~> 1.0"] }, ...]
   def mandatory_extensions
     @mandatory_extensions ||=
       if @data["mandatory_extensions"].nil?
@@ -145,14 +234,6 @@ def mandatory_extensions
       end
   end
 
-  # @return [Array String,Array]
-  #   List of all extensions that are explicitly prohibited.
-  #   The first entry in the nested array is an Extension name.
-  #   The second entry in the nested array is an Extension version requirement.
-  #
-  # @example
-  #   partial_config.prohibited_extensions =>
-  #     [{ "name" => "F", "version" => [">= 2.0"] }, { "name" => "Zfa", "version" => ["> = 1.0"] }, ...]
   def prohibited_extensions
     @prohibited_extensions ||=
       if @data["prohibited_extensions"].nil?
@@ -165,17 +246,19 @@ def prohibited_extensions
       end
   end
 
-  # def prohibited_ext?(ext_name, cfg_arch) = prohibited_extensions(cfg_arch).any? { |e| e.name == ext_name.to_s }
-
-  # def ext?(ext_name, cfg_arch) = mandatory_extensions(cfg_arch).any? { |e| e.name == ext_name.to_s }
+  # Whether or not a compliant instance of this partial config can have more extensions than those listed
+  # in mandatory_extensions/non_mandatory_extensions.
+  def additional_extensions_allowed? = @data.key?("additional_extensions") ? @data["additional_extensions"] : true
 end
 
 ################################################################################################################
 # This class represents a configuration that is "fully-configured" (e.g., SoC tapeout or fully-configured IP). #
 # It has a complete list of extensions and parameters (all are a single value at this point).                  #
 ################################################################################################################
-class FullConfig < Config
-  attr_reader :param_values, :mxlen
+class FullConfig < FileConfig
+  ########################
+  # NON-ABSTRACT METHODS #
+  ########################
 
   def initialize(cfg_file_path, data)
     super(cfg_file_path, data)
@@ -186,7 +269,17 @@ def initialize(cfg_file_path, data)
     raise "Must set MXLEN for a configured config" if @mxlen.nil?
   end
 
-  # @return [Array>] List of all extensions known to be implemented in this architecture
+  ###############################
+  # ABSTRACT METHODS OVERRIDDEN #
+  ###############################
+
+  def param_values = @param_values
+  def mxlen = @mxlen
+
+  def fully_configured? = true
+  def partially_configured? = false
+  def unconfigured? = false
+
   def implemented_extensions
     @implemented_extensions ||=
       if @data["implemented_extensions"].nil?
@@ -204,7 +297,92 @@ def implemented_extensions
 
   def mandatory_extensions = raise "mandatory_extensions is only available for a PartialConfig"
   def prohibited_extensions = raise "prohibited_extensions is only available for a PartialConfig"
+  def additional_extensions_allowed? = raise "additional_extensions_allowed? is only available for a PartialConfig"
+end
+
+########################
+# PortfolioGroupConfig #
+########################
+
+# A PortfolioGroupConfig provides an implementation of the AbstractConfig API using a PortfolioGroup object.
+# This object contains information from one or more portfolios.
+# A certificate has just one portfolio and a profile release has one or more portfolios.
+class PortfolioGroupConfig < AbstractConfig
+  ########################
+  # NON-ABSTRACT METHODS #
+  ########################
+
+  def initialize(portfolio_grp)
+    raise ArgumentError, "portfolio_grp is a class #{portfolio_grp.class} but must be a PortfolioGroup" unless portfolio_grp.is_a?(PortfolioGroup)
+
+    super(portfolio_grp.name)
+
+    @portfolio_grp = portfolio_grp
+
+    portfolio_grp.portfolios.each do |portfolio|
+      raise "Portfolio #{portfolio.name} shouldn't have a non-nil cfg_arch member" unless portfolio.cfg_arch.nil?
+      raise "Portfolio #{portfolio.name} shouldn't have a an arch member of type ConfiguredArchitecture" if portfolio.arch.is_a?(ConfiguredArchitecture)
+    end
+  end
+
+  ###############################
+  # ABSTRACT METHODS OVERRIDDEN #
+  ###############################
+
+  # @return [Hash] A hash mapping parameter name to value for any parameter that has
+  #                                been configured with a value. May be empty.
+  def param_values = @portfolio_grp.param_values
+
+  # @return [Boolean] Is an overlay present?
+  def overlay? = false
+
+  # @return [String] Either a path to an overlay directory, or the name of a folder under arch_overlay/
+  # @return [nil] No arch_overlay for this config
+  def arch_overlay = nil
+
+  # @return [String] Absolute path to the arch_overlay
+  # @return [nil] No arch_overlay for this config
+  def arch_overlay_abs = nil
+
+  # 32, 64, or nil if dynamic (not yet supported in portfolio)
+  def mxlen = @portfolio_grp.max_base
+
+  # Portfolios are always considered partially configured.
+  def fully_configured? = false
+  def partially_configured? = true
+  def unconfigured? = false
+
+  # @return [Array>] List of all extensions known to be implemented by the configuration.
+  def implemented_extensions = raise "Attempt to invoke implemented_extensions in PorfolioGroup #{name}"
+
+  # @return [Array String,Array]
+  #    List of all extensions that must be implemented by the configuration
+  #    The first entry in the nested array is an Extension name.
+  #    The second entry in the nested array is an Extension version requirement.
+  #
+  # @example
+  #   mandatory_extensions =>
+  #     [{ "name" => "A", "version" => ["~> 2.0"] }, { "name" => "B", "version" => ["~> 1.0"] }, ...]
+  def mandatory_extensions
+    @portfolio_grp.mandatory_ext_reqs.map do |ext_req|
+      {
+        "name" => ext_req.name,
+        "version" => ext_req.requirement_specs.map(&:to_s)
+      }
+    end
+  end
+
+  # @return [Array String,Array]
+  #   List of all extensions that are explicitly prohibited by the configuration.
+  #   The first entry in the nested array is an Extension name.
+  #   The second entry in the nested array is an Extension version requirement.
+  #
+  # @example
+  #   partial_config.prohibited_extensions =>
+  #     [{ "name" => "F", "version" => [">= 2.0"] }, { "name" => "Zfa", "version" => ["> = 1.0"] }, ...]
+  def prohibited_extensions = []    # No prohibited_extensions in a portfolio group
 
-  # def prohibited_ext?(ext_name, cfg_arch) = !ext?(ext_name, cfg_arch)
-  # def ext?(ext_name, cfg_arch) = implemented_extensions(cfg_arch).any? { |e| e.name == ext_name.to_s }
+  # Whether or not a compliant instance of this partial config can have more extensions than those listed
+  # in mandatory_extensions/non_mandatory_extensions.
+  def additional_extensions_allowed? = true
 end
diff --git a/lib/deploy.sh b/lib/deploy.sh
old mode 100644
new mode 100755
index 74b7224477..683dd390c7
--- a/lib/deploy.sh
+++ b/lib/deploy.sh
@@ -2,6 +2,8 @@
 
 # deploy artifacts to a directory, in preparation for GitHub deployment
 
+echo "DEPLOY: Starting"
+
 ROOT=$(dirname $(dirname $(realpath ${BASH_SOURCE[0]})))
 
 DEPLOY_DIR="$ROOT/_site"
@@ -9,82 +11,78 @@ PAGES_URL="https://riscv-software-src.github.io/riscv-unified-db"
 
 mkdir -p $DEPLOY_DIR
 
-echo "Create _site/example_cfg"
+echo "DEPLOY: Create _site/example_cfg"
 mkdir -p $DEPLOY_DIR/example_cfg
 
-echo "Create _site/manual"
+echo "DEPLOY: Create _site/manual"
 mkdir -p $DEPLOY_DIR/manual
 
-echo "Create _site/pdfs"
+echo "DEPLOY: Create _site/pdfs"
 mkdir -p $DEPLOY_DIR/pdfs
 
+echo "DEPLOY: Create _site/htmls"
+mkdir mkdir -p $DEPLOY_DIR/htmls
 
-
-echo "Resolve / Create Index"
+echo "DEPLOY: Resolve / Create Index"
 ./do gen:resolved_arch
 cp -R gen/resolved_arch/_ $DEPLOY_DIR/resolved_arch
 
-echo "Build manual"
+echo "DEPLOY: Create _site/isa_explorer"
+mkdir -p $DEPLOY_DIR/isa_explorer
+echo "DEPLOY: Create isa_explorer_browser_ext"
+./do gen:isa_explorer_browser_ext
+echo "DEPLOY: Create isa_explorer_browser_inst"
+./do gen:isa_explorer_browser_inst
+echo "DEPLOY: Create isa_explorer_browser_csr"
+./do gen:isa_explorer_browser_csr
+echo "DEPLOY: Copy isa_explorer_browser"
+cp -R gen/isa_explorer/browser $DEPLOY_DIR/isa_explorer
+echo "DEPLOY: Create isa_explorer_spreadsheet"
+./do gen:isa_explorer_spreadsheet
+echo "DEPLOY: Copy isa_explorer_spreadsheet"
+cp -R gen/isa_explorer/spreadsheet $DEPLOY_DIR/isa_explorer
+
+echo "DEPLOY: Build manual"
 ./do gen:html_manual MANUAL_NAME=isa VERSIONS=all
-
-echo "Copy manual html"
+echo "DEPLOY: Copy manual html"
 cp -R gen/manual/isa/top/all/html $DEPLOY_DIR/manual
-
-echo "Build html documentation for example_rv64_with_overlay"
+echo "DEPLOY: Build html documentation for example_rv64_with_overlay"
 ./do gen:html[example_rv64_with_overlay]
 
-echo "Generate YARD docs"
-./do gen:tool_doc
-
-echo "Create _site/htmls"
-mkdir mkdir -p $DEPLOY_DIR/htmls
+# Filling up my root dir with a "doc" directory when I run this script.
+#echo "DEPLOY: Generate YARD docs"
+#./do gen:tool_doc
 
-echo "Copy cfg html"
+echo "DEPLOY: Copy cfg html"
 cp -R gen/cfg_html_doc/example_rv64_with_overlay/html $DEPLOY_DIR/example_cfg
 
-echo "Create RVA20 Profile Release PDF Spec"
-./do gen:profile[RVA20]
-
-echo "Copy RVA20 Profile Release PDF"
-cp gen/profile_doc/pdf/RVA20.pdf $DEPLOY_DIR/pdfs/RVA20.pdf
-
-echo "Create RVA22 Profile Release PDF Spec"
-./do gen:profile[RVA22]
-
-echo "Copy RVA22 Profile Release PDF"
-cp gen/profile_doc/pdf/RVA22.pdf $DEPLOY_DIR/pdfs/RVA22.pdf
-
-echo "Create RVI20 Profile Release PDF Spec"
-./do gen:profile[RVI20]
-
-echo "Copy RVI20 Profile Release PDF"
-cp gen/profile_doc/pdf/RVA20.pdf $DEPLOY_DIR/pdfs/RVI20.pdf
-
-echo "Create MC100-32 PDF Spec"
-./do gen:cert_model_pdf[MC100-32]
-
-echo "Copy MC100-32 PDF"
-cp gen/certificate_doc/pdf/MC100-32.pdf $DEPLOY_DIR/pdfs/MC100-32.pdf
-
-echo "Create MC100-32 HTML Spec"
-./do gen:cert_model_html[MC100-32]
-
-echo "Copy MC100-32 HTML"
-cp gen/certificate_doc/html/MC100-32.html $DEPLOY_DIR/htmls/MC100-32.html
-
-echo "Create MC100-64 PDF Spec"
-./do gen:cert_model_pdf[MC100-64]
-
-echo "Copy MC100-64 PDF"
-cp gen/certificate_doc/pdf/MC100-64.pdf $DEPLOY_DIR/pdfs/MC100-64.pdf
-
-echo "Create MC100-64 HTML Spec"
-./do gen:cert_model_html[MC100-64]
-
-echo "Copy MC100-64 HTML"
-cp gen/certificate_doc/html/MC100-64.html $DEPLOY_DIR/htmls/MC100-64.html
-
-echo "Create index"
+for profile in RVI20 RVA20 RVA22 RVA23 RVB23; do
+  echo "DEPLOY: Create $profile Profile Release PDF Spec"
+  ./do gen:profile_release_pdf[$profile]
+  echo "DEPLOY: Copy $profile Profile Release PDF Spec"
+  cp gen/profile/pdf/${profile}ProfileRelease.pdf $DEPLOY_DIR/pdfs
+done
+
+for crd in AC100 AC200 MC100-32 MC100-64 MC200-32 MC200-64 MC300-32 MC300-64; do
+  echo "DEPLOY: Create $profile Profile Release PDF Spec"
+  ./do gen:profile_release_pdf[$profile]
+  echo "DEPLOY: Copy $profile Profile Release PDF Spec"
+  cp gen/profile/pdf/${profile}ProfileRelease.pdf $DEPLOY_DIR/pdfs
+
+  echo "DEPLOY: Create ${crd}-CRD PDF Spec"
+  ./do gen:proc_crd_pdf[$crd]
+  echo "DEPLOY: Copy ${crd}-CRD PDF"
+  cp gen/proc_crd/pdf/${crd}-CRD.pdf $DEPLOY_DIR/pdfs
+done
+
+for ctp in MC100-32 MockProcessor; do
+  echo "DEPLOY: Create ${ctp}-CTP PDF Spec"
+  ./do gen:proc_ctp_pdf[$ctp]
+  echo "DEPLOY: Copy ${ctp}-CTP PDF"
+  cp gen/proc_ctp/pdf/${ctp}-CTP.pdf $DEPLOY_DIR/pdfs
+done
+
+echo "DEPLOY: Create index"
 cat <<- EOF > $DEPLOY_DIR/index.html
 
 
@@ -109,18 +107,44 @@ cat <<- EOF > $DEPLOY_DIR/index.html
     
 
     
    
-    
    Profiles
    
+    
    RISC-V ISA Explorer
    
+    Candidate replacement for Profiles & Bases & Extensions Google Sheet
+    using data in riscv-unified-db.
     
 
     
    
-    
    Certification Requirements Documents
    
+    
    Profile Releases
    
     
+
+    
    
+    
    CSC CRDs (Certification Requirements Documents)
    
+    
+
+    
    
+    
    CSC CTPs (Certification Test Plans)
    
+    
 
     
    
@@ -138,3 +162,5 @@ cat <<- EOF > $DEPLOY_DIR/index.html
   
 
 EOF
+
+echo "DEPLOY: Complete"
diff --git a/lib/idl/ast.rb b/lib/idl/ast.rb
index 4bdafd8af5..2b1e1a83d6 100644
--- a/lib/idl/ast.rb
+++ b/lib/idl/ast.rb
@@ -2671,7 +2671,7 @@ def type(symtab)
         if (etype.csr.is_a?(Symbol) && etype.csr == :unknown) || etype.csr.dynamic_length?
           Type.new(:bits, width: :unknown)
         else
-          Type.new(:bits, width: etype.csr.length(symtab.cfg_arch))
+          Type.new(:bits, width: etype.csr.length)
         end
       else
         type_error "$bits cast is only defined for CSRs and Enum references"
@@ -6233,7 +6233,7 @@ def value(symtab)
       else
         value_error "CSR is not defined" unless symtab.cfg_arch.csrs.any? { |icsr| icsr.name == cd.name }
       end
-      cd.fields.each { |f| value_error "#{csr_name(symtab)}.#{f.name} not RO" unless f.type(symtab) == "RO" }
+      cd.fields.each { |f| value_error "#{csr_name(symtab)}.#{f.name} not RO" unless f.type == "RO" }
 
       csr_def(symtab).fields.reduce(0) { |val, f| val | (f.value << f.location.begin) }
     end
@@ -6374,7 +6374,7 @@ def value(symtab)
       when "sw_read"
         value_error "CSR not knowable" unless csr_known?(symtab)
         cd = csr_def(symtab)
-        cd.fields.each { |f| value_error "#{csr_name(symtab)}.#{f.name} not RO" unless f.type(symtab) == "RO" }
+        cd.fields.each { |f| value_error "#{csr_name(symtab)}.#{f.name} not RO" unless f.type == "RO" }
 
         value_error "TODO: CSRs with sw_read function"
       when "address"
diff --git a/lib/idl/symbol_table.rb b/lib/idl/symbol_table.rb
index d59ee0422f..4465d9bcfe 100644
--- a/lib/idl/symbol_table.rb
+++ b/lib/idl/symbol_table.rb
@@ -102,11 +102,6 @@ def hash
     end
 
     def initialize(cfg_arch)
-      raise "Must provide cfg_arch" if cfg_arch.nil?
-      # TODO: XXX: Put this check back in when replaced by Design class.
-      #            See https://github.com/riscv-software-src/riscv-unified-db/pull/371
-      #raise "The cfg_arch must be a ConfiguredArchitecture but is a #{cfg_arch.class}" unless (cfg_arch.is_a?(ConfiguredArchitecture) || cfg_arch.is_a?(MockConfiguredArchitecture))
-
       @mutex = Thread::Mutex.new
       @cfg_arch = cfg_arch
       @mxlen = cfg_arch.unconfigured? ? nil : cfg_arch.mxlen
diff --git a/lib/portfolio_design.rb b/lib/portfolio_design.rb
new file mode 100644
index 0000000000..cb57c65a64
--- /dev/null
+++ b/lib/portfolio_design.rb
@@ -0,0 +1,250 @@
+# frozen_string_literal: true
+
+# Combines knowledge of the architecture database with one or more portfolios (profile or certificate).
+#
+# Used in portfolio-based ERB templates to gather information about the "portfolio_design".
+# The "portfolio_design" corresponds to the file being created by the ERB template and facilitates
+# sharing ERB template fragments between different kinds of portfolios (mostly in the appendices).
+# For example, a processor certificate model has one portfolio but a profile release has multiple portfolios
+# but they both have just one PortfolioDesign object.
+
+require "ruby-prof"
+require "forwardable"
+
+require_relative "cfg_arch"
+require_relative "arch_obj_models/portfolio"
+
+require_relative "backend_helpers"
+include TemplateHelpers
+
+class PortfolioDesign
+  extend Forwardable
+
+  # Calls to these methods on Design are handled by the ConfiguredArchitecture object.
+  # Avoids having to call design.cfg_arch. (just call design.).
+  def_delegators :@cfg_arch,
+    :ext?,
+    :multi_xlen?,
+    :multi_xlen_in_mode?,
+    :mxlen,
+    :params_without_value,
+    :possible_xlens,
+    :type_check,
+    :transitive_implemented_extension_versions,
+    :prohibited_ext?,
+    :implemented_exception_codes,
+    :implemented_interrupt_codes,
+    :functions,
+    :transitive_implemented_csrs,
+    :transitive_implemented_instructions,
+    :symtab,
+    :implemented_functions,
+    :convert_monospace_to_links
+
+  # @return [String] Name of design
+  attr_reader :name
+
+  # @return [PortfolioClass] Portfolio class for all the portfolios in this design
+  attr_reader :portfolio_class
+
+  # @return [String] Kind of portfolio for all portfolios in this design
+  attr_reader :portfolio_kind
+
+  # @return [String] Type of design suitable for human readers.
+  attr_reader :portfolio_design_type
+
+  # @return [ConfiguredArchitecture] The RISC-V architecture
+  attr_reader :cfg_arch
+
+  # Provided for backwards-compatibility
+  def arch = @cfg_arch
+
+  # Class methods
+  def self.profile_release_type = "Profile Release"
+  def self.proc_crd_type = "Certification Requirements Document"
+  def self.proc_ctp_type = "Certification Test Plan"
+  def self.portfolio_design_types = [profile_release_type, proc_crd_type, proc_ctp_type]
+
+  # @param name [#to_s] The name of the portfolio design (i.e., backend filename without a suffix)
+  # @param cfg_arch [ConfiguredArchitecture] The database of RISC-V standards for a particular configuration
+  # @param portfolio_design_type [String] Type of portfolio design associated with this design
+  # @param portfolios [Array] Portfolios being converted to adoc
+  # @param portfolio_class [PortfolioClass] PortfolioClass for all the Portfolios
+  def initialize(name, cfg_arch, portfolio_design_type, portfolios, portfolio_class)
+    raise ArgumentError, "cfg_arch must be an ConfiguredArchitecture but is a #{cfg_arch.class}" unless cfg_arch.is_a?(ConfiguredArchitecture)
+    raise ArgumentError, "portfolio_design_type of #{portfolio_design_type} unknown" unless PortfolioDesign.portfolio_design_types.include?(portfolio_design_type)
+    raise ArgumentError, "portfolios must be an Array but is a #{portfolios.class}" unless portfolios.is_a?(Array)
+    raise ArgumentError, "portfolio_class must be a PortfolioClass but is a #{portfolio_class.class}" unless portfolio_class.is_a?(PortfolioClass)
+
+    @name = name.to_s.freeze
+    @name_sym = @name.to_sym.freeze
+    @cfg_arch = cfg_arch
+    @portfolio_design_type = portfolio_design_type
+
+    # The PortfolioGroup has an Array inside it and forwards common Array methods to its internal Array.
+    # Can call @portfolio_grp.each or @portfolio_grp.map and they are handled by the normal Array methods.
+    @portfolio_grp = PortfolioGroup.new(name, portfolios)
+
+    @portfolio_class = portfolio_class
+    @portfolio_kind = portfolios[0].kind
+  end
+
+  # Returns a string representation of the object, suitable for debugging.
+  # @return [String] A string representation of the object.
+  def inspect = "PortfolioDesign##{name}"
+
+  ##################################
+  # METHODS REQUIRED BY BASE CLASS #
+  ##################################
+
+  # @return [Array] List of all parameters fully-constrained to one specific value
+  def params_with_value
+    return @params_with_value unless @params_with_value.nil?
+
+    @params_with_value = []
+
+    in_scope_ext_reqs.each do |ext_req|
+      ext_req.extension.params.each do |param|
+        next unless param_values.key?(param.name)
+
+        @params_with_value << ParameterWithValue.new(param, param_values[param.name])
+      end
+    end
+
+    @params_with_value
+  end
+
+  def implemented_ext_vers
+    # Only supported by fully-configured configurations and a portfolio corresponds to a
+    # partially-configured configuration. See the AbstractConfig class for details.
+    raise "Not supported for portfolio #{name}"
+  end
+
+  # A Portfolio corresponds to a partially-configured design.
+  # See the AbstractConfig class for details.
+  #
+  # @return [Boolean] True if all parameters are fully-constrained in the design
+  def fully_configured? = false
+
+  # @return [Boolean] True if some parameters aren't fully-constrained yet in the design
+  def partially_configured? = true
+
+  # @return [Boolean] True if all parameters aren't constrained at all in the design
+  def unconfigured? = false
+
+  #####################################
+  # METHODS HANDLED BY PortfolioGroup #
+  #####################################
+
+  # @return [Array] List of all mandatory extension requirements
+  def mandatory_ext_reqs = @portfolio_grp.mandatory_ext_reqs
+
+  # @return [Hash] Fully-constrained parameter values (those with just one possible value for this design).
+  def param_values = @portfolio_grp.param_values
+
+  # @return [Array] List of all mandatory or optional extensions referenced by this design.
+  def in_scope_extensions = @portfolio_grp.in_scope_extensions
+
+  # @return [Array] List of all mandatory or optional extension requirements referenced by this design.
+  def in_scope_ext_reqs = @portfolio_grp.in_scope_ext_reqs
+
+  # @return [Array] Sorted list of all instructions associated with extensions listed as
+  #                              mandatory or optional in portfolio. Uses instructions provided by the
+  #                              minimum version of the extension that meets the extension requirement.
+  #                              Factors in things like XLEN in design.
+  def in_scope_instructions = @portfolio_grp.in_scope_instructions(self)
+
+  # @return [Array] Unsorted list of all CSRs associated with extensions listed as
+  #                      mandatory or optional in portfolio. Uses CSRs provided by the
+  #                      minimum version of the extension that meets the extension requirement.
+  #                      Factors in things like XLEN in design.
+  def in_scope_csrs = @portfolio_grp.in_scope_csrs(self)
+
+  # @return [Array] Unsorted list of all in-scope exception codes.
+  def in_scope_exception_codes = @portfolio_grp.in_scope_exception_codes(self)
+
+  # @return [Array] Unsorted list of all in-scope interrupt codes.
+  def in_scope_interrupt_codes = @portfolio_grp.in_scope_interrupt_codes(self)
+
+  # @return [String] Given an extension +ext_name+, return the presence as a string.
+  #                  Returns the greatest presence string across all portfolios in this design.
+  #                  If the extension name isn't found in this design, return "-".
+  def extension_presence(ext_name) = @portfolio_grp.extension_presence(ext_name)
+
+  # @return [String] Given an instruction +ext_name+, return the presence as a string.
+  #                  Returns the greatest presence string across all portfolios in this design.
+  #                  If the instruction name isn't found in this design, return "-".
+  def instruction_presence(inst_name) = @portfolio_grp.instruction_presence(inst_name)
+
+  # @return [String] Given an CSR +ext_name+, return the presence as a string.
+  #                  Returns the greatest presence string across all portfolios in this design.
+  #                  If the CSR name isn't found in this design, return "-".
+  def csr_presence(csr_name) = @portfolio_grp.csr_presence(csr_name)
+
+  # @return [Array] Sorted list of parameters specified by any extension in portfolio.
+  def all_in_scope_params = @portfolio_grp.all_in_scope_params
+
+  # @param [ExtensionRequirement]
+  # @return [Array] Sorted list of extension parameters from portfolio for given extension.
+  def in_scope_params(ext_req) = @portfolio_grp.in_scope_params(ext_req)
+
+  # @return [Array] Sorted list of parameters out of scope across all in scope extensions.
+  def all_out_of_scope_params = @portfolio_grp.all_out_of_scope_params
+
+  # @param ext_name [String] Extension name
+  # @return [Array] Sorted list of parameters that are out of scope for named extension.
+  def out_of_scope_params(ext_name) = @portfolio_grp.out_of_scope_params(ext_name)
+
+  # @param param [Parameter]
+  # @return [Array] Sorted list of all in-scope extensions that define this parameter
+  #                            in the database and the parameter is in-scope.
+  def all_in_scope_exts_with_param(param) = @portfolio_grp.all_in_scope_exts_with_param(param)
+
+  # @param param [Parameter]
+  # @return [Array] List of all in-scope extensions that define this parameter in the
+  #                            database but the parameter is out-of-scope.
+  def all_in_scope_exts_without_param(param) = @portfolio_grp.all_in_scope_exts_without_param(param)
+
+  #################
+  # EXTRA METHODS #
+  #################
+
+  # @param extra_inputs [Hash] Any extra inputs to be passed to ERB template.
+  # @return [Hash] Hash of objects available to ERB templates and
+  #                                ERB fragments included in the main ERB template.
+  # Put this in a method so it can be easily overridden by subclasses.
+  def erb_env(extra_inputs = {})
+    raise ArgumentError, "extra_inputs must be an Hash but is a #{extra_inputs.class}" unless extra_inputs.is_a?(Hash)
+
+    h = {
+      arch: cfg_arch,
+      design: self,
+      portfolio_design: self,
+      portfolio_design_type: @portfolio_design_type,
+      portfolio_class: @portfolio_class,
+      portfolio_kind: @portfolio_kind,
+      portfolios: @portfolio_grp.portfolios
+    }
+
+    h.merge!(extra_inputs)
+  end
+
+  # Called from tasks.rake file to add standard set of objects available to ERB templates.
+  def init_erb_binding(erb_binding)
+    raise ArgumentError, "Expected Binding object but got #{erb_binding.class}" unless erb_binding.is_a?(Binding)
+
+    erb_env.each do |key, obj|
+      erb_binding.local_variable_set(key, obj)
+    end
+  end
+
+  # Include a partial ERB template into a full ERB template.
+  #
+  # @param template_path [String] Name of template file located in backends/portfolio/templates
+  # @param extra_inputs [Hash] Any extra inputs to be passed to ERB template.
+  # @return [String] Result of ERB evaluation of the template file
+  def include_erb(template_name, extra_inputs = {})
+    template_pname = "portfolio/templates/#{template_name}"
+    partial(template_pname, erb_env(extra_inputs))
+  end
+end
diff --git a/lib/presence.rb b/lib/presence.rb
new file mode 100644
index 0000000000..1e584c1391
--- /dev/null
+++ b/lib/presence.rb
@@ -0,0 +1,148 @@
+# frozen_string_literal: true
+
+require_relative "version"
+
+# Is the extension mandatory, optional, various kinds of optional, etc.
+# Accepts two kinds of YAML schemas:
+#   String
+#     Example => presence: mandatory
+#   Hash
+#     Must have the key "optional" with a String value
+#     Example => presence:
+#                  optional: development
+class Presence
+  attr_reader :presence
+  attr_reader :optional_type
+
+  # @param data [Hash, String] The presence data from the architecture spec
+  def initialize(data)
+    if data.is_a?(String)
+      raise "Unknown extension presence of #{data}" unless ["mandatory","optional"].include?(data)
+
+      @presence = data
+      @optional_type = nil
+    elsif data.is_a?(Hash)
+      data.each do |key, value|
+        if key == "optional"
+          raise ArgumentError, "Extension presence hash #{data} missing type of optional" if value.nil?
+          raise ArgumentError, "Unknown extension presence optional #{value} for type of optional" unless
+            ["localized", "development", "expansion", "transitory"].include?(value)
+
+          @presence = key
+          @optional_type = value
+        else
+          raise ArgumentError, "Extension presence hash #{data} has unsupported key of #{key}"
+        end
+      end
+    else
+      raise ArgumentError, "Extension presence is a #{data.class} but only String or Hash are supported"
+    end
+  end
+
+  def mandatory? = (@presence == "mandatory")
+  def optional? = (@presence == "optional")
+
+  # Class methods
+  def self.mandatory = "mandatory"
+  def self.optional = "optional"
+  def self.optional_type_localized = "localized"
+  def self.optional_type_development = "development"
+  def self.optional_type_expansion = "expansion"
+  def self.optional_type_transitory = "transitory"
+
+  def self.presence_types = [mandatory, optional]
+  def self.optional_types = [
+        optional_type_localized,
+        optional_type_development,
+        optional_type_expansion,
+        optional_type_transitory]
+
+  def self.presence_types_obj
+    return @presence_types_obj unless @presence_types_obj.nil?
+
+    @presence_types_obj = []
+
+    presence_types.each do |presence_type|
+      @presence_types_obj << Presence.new(presence_type)
+    end
+
+    @presence_types_obj
+  end
+
+  def self.optional_types_obj
+    return @optional_types_obj unless @optional_types_obj.nil?
+
+    @optional_types_obj = []
+
+    optional_types.each do |optional_type|
+      @optional_types_obj << Presence.new({ self.optional => optional_type })
+    end
+
+    @optional_types_obj
+  end
+
+  def to_s
+    @optional_type.nil? ? "#{presence}" : "#{presence} (#{optional_type})"
+  end
+
+  def to_s_concise
+    "#{presence}"
+  end
+
+  # @overload ==(other)
+  #   @param other [String] A presence string
+  #   @return [Boolean] whether or not this Presence has the same presence (ignores optional_type)
+  # @overload ==(other)
+  #   @param other [Presence] An extension presence object
+  #   @return [Boolean] whether or not this Presence has the exact same presence and optional_type as other
+  #                     Ignores optional_type if either self or other have it as nil.
+  def ==(other)
+    case other
+    when String
+      @presence == other
+    when Presence
+      @presence == other.presence && (@optional_type.nil? || other.optional_type.nil? || @optional_type == other.optional_type)
+    else
+      raise "Unexpected comparison"
+    end
+  end
+
+  ######################################################
+  # Following comparison operators follow these rules:
+  #   - "mandatory" is greater than "optional"
+  #   - optional_types all have same rank
+  #   - equals compares presence and then optional_type
+  ######################################################
+
+  # @overload >(other)
+  #   @param other [Presence] An extension presence object
+  #   @return [Boolean] Whether or not this Presence is greater-than the other
+  def >(other)
+    raise ArgumentError, "Presence is only comparable to other Presence classes" unless other.is_a?(Presence)
+    (self.mandatory? && other.optional?)
+  end
+
+  # @overload >=(other)
+  #   @param other [Presence] An extension presence object
+  #   @return [Boolean] Whether or not this Presence is greater-than or equal to the other
+  def >=(other)
+    raise ArgumentError, "Presence is only comparable to other Presence classes" unless other.is_a?(Presence)
+    (self > other) || (self == other)
+  end
+
+  # @overload <(other)
+  #   @param other [Presence] An extension presence object
+  #   @return [Boolean] Whether or not this Presence is less-than the other
+  def <(other)
+    raise ArgumentError, "Presence is only comparable to other Presence classes" unless other.is_a?(Presence)
+    (self.optional? && other.mandatory?)
+  end
+
+  # @overload <=(other)
+  #   @param other [Presence] An extension presence object
+  #   @return [Boolean] Whether or not this Presence is less-than or equal to the other
+  def <=(other)
+    raise ArgumentError, "Presence is only comparable to other Presence classes" unless other.is_a?(Presence)
+    (self < other) || (self == other)
+  end
+end
diff --git a/lib/proc_cert_design.rb b/lib/proc_cert_design.rb
new file mode 100644
index 0000000000..efc11410a2
--- /dev/null
+++ b/lib/proc_cert_design.rb
@@ -0,0 +1,71 @@
+# frozen_string_literal: true
+#
+# Inherits from PortfolioDesign and contains content shared by
+# all processor certificate-based designs.
+
+require_relative "portfolio_design"
+
+class ProcCertDesign < PortfolioDesign
+  # @return [ProcCertModel] The processor certificate model object from the architecture database
+  attr_reader :proc_cert_model
+
+  # @return [ProcCertClass] The processor certificate class object from the architecture database
+  attr_reader :proc_cert_class
+
+  # @param name [#to_s] The name of the portfolio design (i.e., backend filename without a suffix)
+  # @param cfg_arch [ConfiguredArchitecture] The database of RISC-V standards for a particular configuration
+  # @param portfolio_design_type [String] Type of portfolio design associated with this design
+  # @param portfolios [Array] Portfolios being converted to adoc
+  # @param portfolio_class [PortfolioClass] PortfolioClass for all the Portfolios
+  def initialize(name, cfg_arch, portfolio_design_type, proc_cert_model, proc_cert_class)
+    raise ArgumentError, "proc_cert_model must be a ProcCertModel" unless proc_cert_model.is_a?(ProcCertModel)
+    raise ArgumentError, "proc_cert_class must be a ProcCertClass" unless proc_cert_class.is_a?(ProcCertClass)
+    @proc_cert_model = proc_cert_model
+    @proc_cert_class = proc_cert_class
+    super(name, cfg_arch, portfolio_design_type, [proc_cert_model], proc_cert_class)
+  end
+
+  # Returns a string representation of the object, suitable for debugging.
+  # @return [String] A string representation of the object.
+  def inspect = "ProcCertDesign##{name}"
+
+  # @param extra_inputs [Array] Any extra inputs to be passed to ERB template.
+  # @return [Hash] Hash of objects to be used in ERB templates
+  # Add certificate-specific objects to the parent hash.
+  def erb_env(*extra_inputs)
+    raise ArgumentError, "extra_inputs must be an Array but is a #{extra_inputs.class}" unless extra_inputs.is_a?(Array)
+
+    h = super   # Call parent method with whatever args I got
+
+    h[:proc_cert_design] = self
+    h[:proc_cert_model] = proc_cert_model
+    h[:proc_cert_class] = proc_cert_class
+
+    h
+  end
+
+  # Include a partial ERB template into a full ERB template. Can be either in
+  # the portfolio or proc_cert backends (but not both).
+  #
+  # @param template_path [String] Name of template file located in backends/portfolio/templates
+  #                               or in backends/proc_cert/templates
+  # @param extra_inputs [Hash] Any extra inputs to be passed to ERB template.
+  # @return [String] Result of ERB evaluation of the template file
+  def include_erb(template_name, extra_inputs = {})
+    proc_cert_template_pname = "proc_cert/templates/#{template_name}"
+    proc_cert_template_path = Pathname.new($root / "backends" / proc_cert_template_pname)
+
+    portfolio_template_pname = "portfolio/templates/#{template_name}"
+    portfolio_template_path = Pathname.new($root / "backends" / portfolio_template_pname)
+
+    if proc_cert_template_path.exist? && portfolio_template_path.exist?
+      raise "Both #{proc_cert_template_pname} and #{portfolio_template_pname} exist. Need unique names."
+    elsif proc_cert_template_path.exist?
+      partial(proc_cert_template_pname, erb_env(extra_inputs))
+    elsif portfolio_template_path.exist?
+      partial(portfolio_template_pname, erb_env(extra_inputs))
+    else
+      raise "Can't find file #{template_name} in either #{proc_cert_template_pname} or #{portfolio_template_pname}."
+    end
+  end
+end
diff --git a/lib/template_helpers.rb b/lib/template_helpers.rb
deleted file mode 100644
index a9949a41f2..0000000000
--- a/lib/template_helpers.rb
+++ /dev/null
@@ -1,152 +0,0 @@
-# frozen_string_literal: true
-
-# At this point, we insert a placeholder since it will be up
-# to the backend to create a specific link.
-
-require "erb"
-require "pathname"
-require "ostruct"
-
-# collection of functions that can be used inside ERB templates
-module TemplateHelpers
-
-  def fix_entities(text)
-    text.to_s.gsub("≠", "≠")
-             .gsub("±", "±")
-             .gsub("-∞", "−∞")
-             .gsub("+∞", "+∞")
-  end
-
-  # Custom JSON converter for wavedrom that handles hexadecimal literals
-  def json_dump_with_hex_literals(data)
-    # First convert to standard JSON
-    json_string = JSON.dump(data)
-
-    # Replace string hex values with actual hex literals
-    json_string.gsub(/"0x([0-9a-fA-F]+)"/) do |match|
-      # Remove the quotes, leaving just the hex literal
-      "0x#{$1}"
-    end.gsub(/"name":/, '"name": ') # Add space after colon for name field
-  end
-
-  # Helper to process wavedrom data
-  def process_wavedrom(json_data)
-    result = json_data.dup
-
-    # Process reg array if it exists
-    if result["reg"].is_a?(Array)
-      result["reg"].each do |item|
-        # For fields that are likely opcodes or immediates (type 2)
-        if item["type"] == 2
-          # Convert to number first (if it's a string)
-          if item["name"].is_a?(String)
-            if item["name"].start_with?("0x")
-              # Already hexadecimal
-              numeric_value = item["name"].to_i(16)
-            elsif item["name"] =~ /^[01]+$/
-              # Binary string without prefix
-              numeric_value = item["name"].to_i(2)
-            elsif item["name"] =~ /^\d+$/
-              # Decimal
-              numeric_value = item["name"].to_i
-            else
-              # Not a number, leave it alone
-              next
-            end
-          else
-            # Already a number
-            numeric_value = item["name"]
-          end
-
-          # Convert to hexadecimal string
-          hex_str = numeric_value.to_s(16).downcase
-
-          # Set the name to a specially formatted string that will be converted
-          # to a hex literal in our custom JSON converter
-          item["name"] = "0x" + hex_str
-        end
-
-        # Ensure bits is a number
-        if item["bits"].is_a?(String) && item["bits"] =~ /^\d+$/
-          item["bits"] = item["bits"].to_i
-        end
-      end
-    end
-
-    result
-  end
-
-  # Insert a hyperlink to an extension.
-  # @param name [#to_s] Name of the extension
-  def link_to_ext(name)
-    "%%LINK%ext;#{name};#{name}%%"
-  end
-
-  # Insert a hyperlink to an extension parameter.
-  # @param ext_name [#to_s] Name of the extension
-  # @param param_name [#to_s] Name of the parameter
-  def link_to_ext_param(ext_name, param_name)
-    "<>"
-  end
-
-  # Insert a hyperlink to an instruction.
-  # @param name [#to_s] Name of the instruction
-  def link_to_inst(name)
-    "%%LINK%inst;#{name};#{name}%%"
-  end
-
-  # Insert a hyperlink to a CSR.
-  # @param name [#to_s] Name of the CSR
-  def link_to_csr(name)
-    "%%LINK%csr;#{name};#{name}%%"
-  end
-
-  # Insert a hyperlink to a CSR field.
-  # @param csr_name [#to_s] Name of the CSR
-  # @param field_name [#to_s] Name of the CSR field
-  def link_to_csr_field(csr_name, field_name)
-    "%%LINK%csr_field;#{csr_name}.#{field_name};#{csr_name}.#{field_name}%%"
-  end
-
-  # Insert anchor to an extension.
-  # @param name [#to_s] Name of the extension
-  def anchor_for_ext(name)
-    "[[ext-#{name.gsub(".", "_")}-def]]"
-  end
-
-  # Insert anchor to an extension parameter.
-  # @param ext_name [#to_s] Name of the extension
-  # @param param_name [#to_s] Name of the parameter
-  def anchor_for_ext_param(ext_name, param_name)
-    "[[ext-#{ext_name.gsub(".", "_")}-param-#{param_name}-def]]"
-  end
-
-  # Insert anchor to an instruction.
-  # @param name [#to_s] Name of the instruction
-  def anchor_for_inst(name)
-    "[[inst-#{name.gsub(".", "_")}-def]]"
-  end
-
-  # Insert anchor to a CSR.
-  # @param name [#to_s] Name of the CSR
-  def anchor_for_csr(name)
-    "[[csr-#{name.gsub(".", "_")}-def]]"
-  end
-
-  # Insert anchor to a CSR field.
-  # @param csr_name [#to_s] Name of the CSR
-  # @param field_name [#to_s] Name of the CSR field
-  def anchor_for_csr_field(csr_name, field_name)
-    "[[csr_field-#{csr_name.gsub(".", "_")}-#{field_name.gsub(".", "_")}-def]]"
-  end
-
-  def partial(template_path, locals = {})
-    template_path = Pathname.new($root / "backends" / "common_templates" / template_path)
-    raise ArgumentError, "Template '#{template_path} not found" unless template_path.exist?
-
-    erb = ERB.new(template_path.read, trim_mode: "-")
-    erb.filename = template_path.realpath.to_s
-
-    erb.result(OpenStruct.new(locals).instance_eval { binding })
-  end
-end
diff --git a/lib/test/test_backend_helpers.rb b/lib/test/test_backend_helpers.rb
new file mode 100644
index 0000000000..0d63840f26
--- /dev/null
+++ b/lib/test/test_backend_helpers.rb
@@ -0,0 +1,152 @@
+# frozen_string_literal: true
+
+require "English"
+require "minitest/autorun"
+require "backend_helpers"
+
+include TemplateHelpers
+
+$root ||= (Pathname.new(__FILE__) / ".." / ".." / "..").realpath
+
+class TestBackendHelpers < Minitest::Test
+  def test_ext
+    assert_equal("%%UDB_DOC_LINK%ext;foo;foo%%", link_to_udb_doc_ext("foo"))
+    assert_equal("[#udb:doc:ext:foo]", anchor_for_udb_doc_ext("foo"))
+    assert_equal("%%UDB_DOC_LINK%ext;fo_o;fo.o%%", link_to_udb_doc_ext("fo.o"))
+    assert_equal("[#udb:doc:ext:fo_o]", anchor_for_udb_doc_ext("fo.o"))
+  end
+
+  def test_ext_param
+    assert_equal("%%UDB_DOC_LINK%ext_param;foo.bar;zort%%", link_to_udb_doc_ext_param("foo","bar","zort"))
+    assert_equal("[#udb:doc:ext_param:foo:bar]", anchor_for_udb_doc_ext_param("foo","bar"))
+    assert_equal("%%UDB_DOC_LINK%ext_param;fo_o.bar;fluffy%%", link_to_udb_doc_ext_param("fo.o","bar","fluffy"))
+    assert_equal("[#udb:doc:ext_param:fo_o:bar]", anchor_for_udb_doc_ext_param("fo.o","bar"))
+    assert_raises(ArgumentError) { link_to_udb_doc_ext_param("foo","ba.r","fluffy") }
+    assert_raises(ArgumentError) { anchor_for_udb_doc_ext_param("foo","ba.r") }
+  end
+
+  def test_inst
+    assert_equal("%%UDB_DOC_LINK%inst;foo;foo%%", link_to_udb_doc_inst("foo"))
+    assert_equal("[#udb:doc:inst:foo]", anchor_for_udb_doc_inst("foo"))
+    assert_equal("%%UDB_DOC_LINK%inst;fo_o;fo.o%%", link_to_udb_doc_inst("fo.o"))
+    assert_equal("[#udb:doc:inst:fo_o]", anchor_for_udb_doc_inst("fo.o"))
+  end
+
+  def test_csr
+    assert_equal("%%UDB_DOC_LINK%csr;foo;foo%%", link_to_udb_doc_csr("foo"))
+    assert_equal("[#udb:doc:csr:foo]", anchor_for_udb_doc_csr("foo"))
+    assert_equal("%%UDB_DOC_LINK%csr;fo_o;fo.o%%", link_to_udb_doc_csr("fo.o"))
+    assert_equal("[#udb:doc:csr:fo_o]", anchor_for_udb_doc_csr("fo.o"))
+  end
+
+  def test_csr_field
+    assert_equal("%%UDB_DOC_LINK%csr_field;foo.bar;foo.bar%%", link_to_udb_doc_csr_field("foo","bar"))
+    assert_equal("[#udb:doc:csr_field:foo:bar]", anchor_for_udb_doc_csr_field("foo","bar"))
+    assert_equal("%%UDB_DOC_LINK%csr_field;fo_o.ba_r;fo.o.ba.r%%", link_to_udb_doc_csr_field("fo.o","ba.r"))
+    assert_equal("[#udb:doc:csr_field:fo_o:ba_r]", anchor_for_udb_doc_csr_field("fo.o","ba.r"))
+  end
+
+  def test_cov_pt
+    assert_equal("%%UDB_DOC_COV_PT_LINK%sep;foo_and_bar;foo&bar%%", link_to_udb_doc_cov_pt("sep", "foo&bar"))
+    assert_equal("[[udb:doc:cov_pt:sep:foo]]", anchor_for_udb_doc_cov_pt("sep", "foo"))
+    assert_equal("%%UDB_DOC_COV_PT_LINK%combo;fo_o;fo.o%%", link_to_udb_doc_cov_pt("combo", "fo.o"))
+    assert_equal("[[udb:doc:cov_pt:combo:fo_o]]", anchor_for_udb_doc_cov_pt("combo", "fo.o"))
+    assert_raises(ArgumentError) { link_to_udb_doc_cov_pt("bad-org-value","abc") }
+  end
+
+  def test_idl_func
+    assert_equal("%%UDB_DOC_LINK%func;foo;foo%%", link_to_udb_doc_idl_func("foo"))
+    assert_equal("[#udb:doc:func:foo]", anchor_for_udb_doc_idl_func("foo"))
+    assert_equal("%%UDB_DOC_LINK%func;fo_o;fo.o%%", link_to_udb_doc_idl_func("fo.o"))
+    assert_equal("[#udb:doc:func:fo_o]", anchor_for_udb_doc_idl_func("fo.o"))
+  end
+
+  def test_idl_code
+    assert_equal("%%IDL_CODE_LINK%inst;foo.bar;foo.bar%%", link_into_idl_inst_code("foo","bar"))
+    assert_equal("[#idl:code:inst:foo:bar]", anchor_inside_idl_inst_code("foo","bar"))
+    assert_equal("%%IDL_CODE_LINK%inst;fo_o.ba_r;fo.o.ba.r%%", link_into_idl_inst_code("fo.o","ba.r"))
+    assert_equal("[#idl:code:inst:fo_o:ba_r]", anchor_inside_idl_inst_code("fo.o","ba.r"))
+  end
+
+end
+
+class TestAsciidocUtils < Minitest::Test
+  def test_resolve_links_ext
+    assert_equal("<>", AsciidocUtils.resolve_links("%%UDB_DOC_LINK%ext;foo;bar%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_to_udb_doc_ext("foo")))
+  end
+
+  def test_resolve_links_ext_param
+    assert_equal("<>", AsciidocUtils.resolve_links("%%UDB_DOC_LINK%ext_param;foo.bar;zort%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_to_udb_doc_ext_param("foo","bar","bob")))
+  end
+
+  def test_resolve_links_inst
+    assert_equal("<>", AsciidocUtils.resolve_links("%%UDB_DOC_LINK%inst;foo;bar%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_to_udb_doc_inst("foo")))
+  end
+
+  def test_resolve_links_csr
+    assert_equal("<>", AsciidocUtils.resolve_links("%%UDB_DOC_LINK%csr;foo;bar%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_to_udb_doc_csr("foo")))
+  end
+
+  def test_resolve_links_csr_field
+    assert_equal("<>", AsciidocUtils.resolve_links("%%UDB_DOC_LINK%csr_field;foo.bar;zort%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_to_udb_doc_csr_field("foo","bar")))
+  end
+
+  def test_resolve_links_func
+    assert_equal("<>", AsciidocUtils.resolve_links("%%UDB_DOC_LINK%func;foo;bar%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_to_udb_doc_idl_func("foo")))
+  end
+
+  def test_resolve_links_cov_pt
+    assert_equal("<>", AsciidocUtils.resolve_links("%%UDB_DOC_COV_PT_LINK%sep;foo;bar%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_to_udb_doc_cov_pt("sep", "foo")))
+    assert_equal("<>", AsciidocUtils.resolve_links("%%UDB_DOC_COV_PT_LINK%combo;foo;bar%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_to_udb_doc_cov_pt("combo", "foo")))
+  end
+
+  def test_resolve_links_idl_code
+    assert_equal("<>", AsciidocUtils.resolve_links("%%IDL_CODE_LINK%inst;foo.bar;zort%%"))
+    assert_equal("<>", AsciidocUtils.resolve_links(link_into_idl_inst_code("foo","bar")))
+  end
+end
+
+class TestAntoraUtils < Minitest::Test
+  def test_resolve_links_ext
+    assert_equal("xref:exts:foo.adoc#udb:doc:ext:foo[bar]", AntoraUtils.resolve_links("%%UDB_DOC_LINK%ext;foo;bar%%"))
+    assert_equal("xref:exts:foo.adoc#udb:doc:ext:foo[foo]", AntoraUtils.resolve_links(link_to_udb_doc_ext("foo")))
+  end
+
+  def test_resolve_links_ext_param
+    assert_equal("xref:exts:foo.adoc#udb:doc:ext_param:foo:bar[[zort]]", AntoraUtils.resolve_links("%%UDB_DOC_LINK%ext_param;foo.bar;[zort]%%"))
+    assert_equal("xref:exts:foo.adoc#udb:doc:ext_param:foo:bar[bob]", AntoraUtils.resolve_links(link_to_udb_doc_ext_param("foo","bar","bob")))
+  end
+
+  def test_resolve_links_inst
+    assert_equal("xref:insts:foo.adoc#udb:doc:inst:foo[bar]", AntoraUtils.resolve_links("%%UDB_DOC_LINK%inst;foo;bar%%"))
+    assert_equal("xref:insts:foo.adoc#udb:doc:inst:foo[foo]", AntoraUtils.resolve_links(link_to_udb_doc_inst("foo")))
+  end
+
+  def test_resolve_links_csr
+    assert_equal("xref:csrs:foo.adoc#udb:doc:csr:foo[bar]", AntoraUtils.resolve_links("%%UDB_DOC_LINK%csr;foo;bar%%"))
+    assert_equal("xref:csrs:foo.adoc#udb:doc:csr:foo[foo]", AntoraUtils.resolve_links(link_to_udb_doc_csr("foo")))
+  end
+
+  def test_resolve_links_csr_field
+    assert_equal("xref:csrs:foo.adoc#udb:doc:csr_field:foo:bar[zort]", AntoraUtils.resolve_links("%%UDB_DOC_LINK%csr_field;foo.bar;zort%%"))
+    assert_equal("xref:csrs:foo.adoc#udb:doc:csr_field:foo:bar[foo.bar]", AntoraUtils.resolve_links(link_to_udb_doc_csr_field("foo","bar")))
+  end
+
+  def test_resolve_links_func
+    assert_equal("xref:funcs:funcs.adoc#udb:doc:func:foo[bar]", AntoraUtils.resolve_links("%%UDB_DOC_LINK%func;foo;bar%%"))
+    assert_equal("xref:funcs:funcs.adoc#udb:doc:func:foo[foo]", AntoraUtils.resolve_links(link_to_udb_doc_idl_func("foo")))
+  end
+
+  def test_resolve_links_idl_code
+    assert_equal("xref:insts:foo.adoc#idl:code:inst:foo:bar[zort]", AntoraUtils.resolve_links("%%IDL_CODE_LINK%inst;foo.bar;zort%%"))
+    assert_equal("xref:insts:foo.adoc#idl:code:inst:foo:bar[foo.bar]", AntoraUtils.resolve_links(link_into_idl_inst_code("foo","bar")))
+  end
+end
diff --git a/lib/version.rb b/lib/version.rb
index 9df3ed11a5..a111044b13 100644
--- a/lib/version.rb
+++ b/lib/version.rb
@@ -209,12 +209,12 @@ def satisfied_by?(version, ext)
       matching_ver = ext.versions.find { |v| v.version_spec == v_spec }
       raise "Can't find version?" if matching_ver.nil?
 
-      matching_ver.compatible?(ExtensionVersion.new(ext.name, v_spec.to_s, ext.cfg_arch))
+      matching_ver.compatible?(ExtensionVersion.new(ext.name, v_spec.to_s, ext.arch))
     when "!~>" # not a legal spec, but used for inversion
       matching_ver = ext.versions.find { |v| v.version_spec == v_spec }
       raise "Can't find version?" if matching_ver.nil?
 
-      !matching_ver.compatible?(ExtensionVersion.new(ext.name, v_spec.to_s, ext.cfg_arch))
+      !matching_ver.compatible?(ExtensionVersion.new(ext.name, v_spec.to_s, ext.arch))
     end
   end
 end
diff --git a/schemas/csr_schema.json b/schemas/csr_schema.json
index 13ecc70f1d..f6dc20b5a8 100644
--- a/schemas/csr_schema.json
+++ b/schemas/csr_schema.json
@@ -109,6 +109,12 @@
             }
           ],
           "description": "Extension(s) that affect the definition of the field beyond the extension (or base) the field is originally defined in"
+        },
+        "cert_normative_rules": {
+          "$ref": "schema_defs.json#/$defs/cert_normative_rules"
+        },
+        "cert_test_procedures": {
+          "$ref": "schema_defs.json#/$defs/cert_test_procedures"
         }
       },
 
@@ -258,6 +264,12 @@
         "$source": {
           "description": "Path to the source file this definition came from; used by downstream tooling -- not expected to be in handwritten files",
           "type": "string"
+        },
+        "cert_normative_rules": {
+          "$ref": "schema_defs.json#/$defs/cert_normative_rules"
+        },
+        "cert_test_procedures": {
+          "$ref": "schema_defs.json#/$defs/cert_test_procedures"
         }
       },
       "additionalProperties": false,
diff --git a/schemas/ext_schema.json b/schemas/ext_schema.json
index 7393577e00..307b04c409 100644
--- a/schemas/ext_schema.json
+++ b/schemas/ext_schema.json
@@ -73,6 +73,7 @@
         "$schema",
         "kind",
         "name",
+        "type",
         "description",
         "long_name",
         "versions"
@@ -109,7 +110,10 @@
         "doc_license": {
           "$ref": "schema_defs.json#/$defs/license"
         },
-        "type": { "enum": ["unprivileged", "privileged"] },
+        "type": {
+          "enum": ["unprivileged", "privileged"],
+          "description": "Either unprivileged or privileged"
+        },
         "conflicts": {
           "description": "Extension(s) that conflict with this extension; both cannot be implemented at the same time",
           "$ref": "schema_defs.json#/$defs/requires_entry"
@@ -312,6 +316,12 @@
         "$source": {
           "type": "string",
           "description": "Source file where this extension was defined"
+        },
+        "cert_normative_rules": {
+          "$ref": "schema_defs.json#/$defs/cert_normative_rules"
+        },
+        "cert_test_procedures": {
+          "$ref": "schema_defs.json#/$defs/cert_test_procedures"
         }
       },
       "additionalProperties": false
diff --git a/schemas/inst_schema.json b/schemas/inst_schema.json
index e3359c1f27..d6fbdf222a 100644
--- a/schemas/inst_schema.json
+++ b/schemas/inst_schema.json
@@ -270,6 +270,12 @@
           "type": "string",
           "description": "Functional description of the instruction using Sail"
         },
+        "cert_normative_rules": {
+          "$ref": "schema_defs.json#/$defs/cert_normative_rules"
+        },
+        "cert_test_procedures": {
+          "$ref": "schema_defs.json#/$defs/cert_test_procedures"
+        },
         "assembly": {
           "type": "string",
           "description": "Assembly format of the instruction. Can use decode variables"
diff --git a/schemas/cert_class_schema.json b/schemas/proc_cert_class_schema.json
similarity index 73%
rename from schemas/cert_class_schema.json
rename to schemas/proc_cert_class_schema.json
index a816c4333c..af59daed7f 100644
--- a/schemas/cert_class_schema.json
+++ b/schemas/proc_cert_class_schema.json
@@ -7,11 +7,11 @@
   "properties": {
     "$schema": {
       "type": "string",
-      "const": "cert_class_schema.json#"
+      "const": "proc_cert_class_schema.json#"
     },
     "kind": {
       "type": "string",
-      "const": "Processor CRD"
+      "const": "processor certificate class"
     },
     "name": {
       "type": "string",
@@ -31,16 +31,6 @@
       "type": "string",
       "description": "Asciidoc text containing the introduction prose for the class"
     },
-    "mandatory_priv_modes": {
-      "type": "array",
-      "items": {
-        "type": "string",
-        "enum": ["M", "S", "U", "VS", "VU"]
-      },
-      "uniqueItems": true,
-      "minItems": 1,
-      "description": "List of mandatory privilege modes for the class"
-    },
     "$source": {
       "$ref": "schema_defs.json#/$defs/$source"
     }
diff --git a/schemas/cert_model_schema.json b/schemas/proc_cert_model_schema.json
similarity index 56%
rename from schemas/cert_model_schema.json
rename to schemas/proc_cert_model_schema.json
index 65383a4e20..83e3b13e7f 100644
--- a/schemas/cert_model_schema.json
+++ b/schemas/proc_cert_model_schema.json
@@ -2,20 +2,20 @@
   "$schema": "http://json-schema.org/draft-07/schema#",
 
   "type": "object",
-  "required": ["$schema", "kind", "name", "long_name"],
+  "required": ["$schema", "kind", "name", "long_name", "base"],
   "additionalProperties": false,
   "properties": {
     "$inherits": {
       "oneOf": [
         {
           "type": "string",
-          "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+          "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
         },
         {
           "type": "array",
           "items": {
             "type": "string",
-            "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+            "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
           },
           "uniqueItems": true
         }
@@ -25,13 +25,13 @@
       "oneOf": [
         {
           "type": "string",
-          "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+          "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
         },
         {
           "type": "array",
           "items": {
             "type": "string",
-            "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+            "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
           },
           "uniqueItems": true
         }
@@ -41,13 +41,13 @@
       "oneOf": [
         {
           "type": "string",
-          "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+          "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
         },
         {
           "type": "array",
           "items": {
             "type": "string",
-            "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+            "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
           },
           "uniqueItems": true
         }
@@ -55,11 +55,11 @@
     },
     "$schema": {
       "type": "string",
-      "const": "cert_model_schema.json#"
+      "const": "proc_cert_model_schema.json#"
     },
     "kind": {
       "type": "string",
-      "const": "certificate model"
+      "const": "processor certificate model"
     },
     "name": {
       "type": "string",
@@ -75,7 +75,7 @@
       "properties": {
         "$ref": {
           "type": "string",
-          "pattern": "^certificate_class/[A-Z][a-zA-Z0-9_]*\\.yaml#"
+          "pattern": "^proc_cert_class/[A-Z][a-zA-Z0-9_]*\\.yaml#"
         }
       },
       "description": "Reference to the class this model belongs to"
@@ -112,7 +112,7 @@
       "type": "string",
       "description": "Asciidoc text containing the introduction prose for the model"
     },
-    "tsc_profile": {
+    "tsc_profile_release": {
       "oneOf": [
         {
           "type": "null"
@@ -123,13 +123,13 @@
           "properties": {
             "$ref": {
               "type": "string",
-              "pattern": "^profile_release|certificate_model/[A-Z][a-zA-Z0-9_]*\\.yaml#"
+              "pattern": "^profile_release/[A-Z][a-zA-Z0-9_]*\\.yaml#"
             }
           },
           "additionalProperties": false
         }
       ],
-      "description": "Profile certified by this model"
+      "description": "Profile release associated with this certificate"
     },
     "unpriv_isa_manual_revision": {
       "type": "string"
@@ -140,6 +140,16 @@
     "debug_manual_revision": {
       "type": "string"
     },
+    "in_scope_priv_modes": {
+      "type": "array",
+      "items": {
+        "type": "string",
+        "enum": ["M", "S", "U", "HS", "VS", "VU"]
+      },
+      "uniqueItems": true,
+      "minItems": 1,
+      "description": "List of in-scope privilege modes for the certificate"
+    },
     "extensions": {
       "type": "object",
       "additionalProperties": false,
@@ -148,13 +158,13 @@
           "oneOf": [
             {
               "type": "string",
-              "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+              "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
             },
             {
               "type": "array",
               "items": {
                 "type": "string",
-                "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+                "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
               },
               "uniqueItems": true
             }
@@ -164,13 +174,29 @@
           "oneOf": [
             {
               "type": "string",
-              "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+              "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
+            },
+            {
+              "type": "array",
+              "items": {
+                "type": "string",
+                "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
+              },
+              "uniqueItems": true
+            }
+          ]
+        },
+        "\\$parent_of": {
+          "oneOf": [
+            {
+              "type": "string",
+              "pattern": "^proc_cert_model/.*\\.yaml#.*"
             },
             {
               "type": "array",
               "items": {
                 "type": "string",
-                "pattern": "^(profile|certificate_model)/.*\\.yaml#.*"
+                "pattern": "^proc_cert_model/.*\\.yaml#.*"
               },
               "uniqueItems": true
             }
@@ -185,7 +211,7 @@
             "presence": {
               "$ref": "schema_defs.json#/$defs/extension_presence"
             },
-            "parameters": {
+            "param_constraints": {
               "type": "object",
               "patternProperties": {
                 "^[A-Z][A-Z0-9_]+$": {
@@ -202,29 +228,80 @@
       }
     },
     "requirement_groups": {
-      "type": "array",
-      "items": {
-        "type": "object",
-        "properties": {
-          "name": {
-            "type": "string"
-          },
-          "requirements": {
-            "type": "array",
-            "items": {
-              "type": "object",
-              "properties": {
-                "name": {
-                  "type": "string"
-                },
-                "description": {
-                  "type": "string"
-                },
-                "when": {
-                  "$ref": "schema_defs.json#/$defs/when_condition"
-                }
+      "type": "object",
+      "additionalProperties": false,
+      "patternProperties": {
+        "\\$inherits": {
+          "oneOf": [
+            {
+              "type": "string",
+              "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
+            },
+            {
+              "type": "array",
+              "items": {
+                "type": "string",
+                "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
               },
-              "additionalProperties": false
+              "uniqueItems": true
+            }
+          ]
+        },
+        "\\$child_of": {
+          "oneOf": [
+            {
+              "type": "string",
+              "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
+            },
+            {
+              "type": "array",
+              "items": {
+                "type": "string",
+                "pattern": "^(profile|proc_cert_model)/.*\\.yaml#.*"
+              },
+              "uniqueItems": true
+            }
+          ]
+        },
+        "\\$parent_of": {
+          "oneOf": [
+            {
+              "type": "string",
+              "pattern": "^proc_cert_model/.*\\.yaml#.*"
+            },
+            {
+              "type": "array",
+              "items": {
+                "type": "string",
+                "pattern": "^proc_cert_model/.*\\.yaml#.*"
+              },
+              "uniqueItems": true
+            }
+          ]
+        },
+        "^[A-Za-z0-9_-]+$": {
+          "type": "object",
+          "properties": {
+            "name": {
+              "type": "string"
+            },
+            "requirements": {
+              "type": "array",
+              "items": {
+                "type": "object",
+                "properties": {
+                  "name": {
+                    "type": "string"
+                  },
+                  "description": {
+                    "type": "string"
+                  },
+                  "when": {
+                    "$ref": "schema_defs.json#/$defs/when_condition"
+                  }
+                },
+                "additionalProperties": false
+              }
             }
           }
         }
diff --git a/schemas/profile_schema.json b/schemas/profile_schema.json
index 40e6f2e882..62c82c9717 100644
--- a/schemas/profile_schema.json
+++ b/schemas/profile_schema.json
@@ -2,7 +2,7 @@
   "$schema": "http://json-schema.org/draft-07/schema#",
 
   "type": "object",
-  "required": ["$schema", "kind", "name"],
+  "required": ["$schema", "kind", "name", "base"],
   "properties": {
     "$schema": {
       "type": "string",
@@ -15,6 +15,16 @@
     "name": {
       "type": "string",
       "description": "Name (database key) of this Profile"
+    },
+    "base": {
+      "type": "integer",
+      "description": "32 for RV32I or 64 for RV64I"
+    },
+    "cert_normative_rules": {
+      "$ref": "schema_defs.json#/$defs/cert_normative_rules"
+    },
+    "cert_test_procedures": {
+      "$ref": "schema_defs.json#/$defs/cert_test_procedures"
     }
   }
 }
diff --git a/schemas/schema_defs.json b/schemas/schema_defs.json
index 154f0505fe..47e70e66cb 100644
--- a/schemas/schema_defs.json
+++ b/schemas/schema_defs.json
@@ -307,6 +307,58 @@
           "$ref": "#/$defs/when_condition"
         }
       }
+    },
+    "cert_normative_rules": {
+      "description": "Architecturally visible behaviors requiring validation by certification tests",
+      "type": "array",
+      "required": ["id", "name", "links", "description"],
+      "properties": {
+        "id": {
+          "type": "string"
+        },
+        "name": {
+          "type": "string"
+        },
+        "doc_links": {
+          "description": "Link to UDB documentation, ISA manual, Sail code, or IDL code",
+          "type": "array",
+          "items": {
+            "type": "string"
+          }
+        },
+        "description": {
+          "type": "string"
+        }
+      },
+      "additionalProperties": false
+    },
+    "cert_test_procedures": {
+      "description": "Procedure test must follow to test certification normative rules",
+      "type": "array",
+      "required": ["id", "name", "description", "normative_rules"],
+      "properties": {
+        "id": {
+          "type": "string"
+        },
+        "test_file_name": {
+          "type": "string"
+        },
+        "description": {
+          "type": "string"
+        },
+        "normative_rules": {
+          "type": "array",
+          "description": "List of certification normative rule IDs to be validated",
+          "items": {
+            "type": "string"
+          }
+        },
+        "steps": {
+          "description": "List of steps typically using Asciidoc unordered lists",
+          "type": "string"
+        },
+        "additionalProperties": false
+      }
     }
   }
 }

From 6185367771a70be5279176ce14b97a32160b0cd1 Mon Sep 17 00:00:00 2001
From: Jordan Carlin 
Date: Fri, 18 Apr 2025 07:17:42 -0700
Subject: [PATCH 035/207] Fix Zawrs extension version (1.0.1 vs 1.1.0) (#634)

* Fix Zawrs extension version (1.0.1 vs 1.1.0)

Signed-off-by: Jordan Carlin 

* Add Zawrs ratification date

Signed-off-by: Jordan Carlin 

---------

Signed-off-by: Jordan Carlin 
---
 arch/ext/Zawrs.yaml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/ext/Zawrs.yaml b/arch/ext/Zawrs.yaml
index 26bf97203e..478943563b 100644
--- a/arch/ext/Zawrs.yaml
+++ b/arch/ext/Zawrs.yaml
@@ -17,6 +17,6 @@ description: |
     accelerator device indicating completion of a job previously submitted to the device.
 type: unprivileged
 versions:
-  - version: "1.1.0"
+  - version: "1.0.1"
     state: ratified
-    ratification_date: null
+    ratification_date: 2022-11

From de77b7bb2d3c97b86bead3dc2b4e00358779c55e Mon Sep 17 00:00:00 2001
From: james-ball-qualcomm 
Date: Fri, 18 Apr 2025 07:36:01 -0700
Subject: [PATCH 036/207] Fix for #633 - pages.yml duplicating artifact
 building in deploy.sh and was out-of-date and still using "generic_rv64"
 which has been renamed. (#635)

---
 .github/workflows/pages.yml | 92 +------------------------------------
 1 file changed, 1 insertion(+), 91 deletions(-)

diff --git a/.github/workflows/pages.yml b/.github/workflows/pages.yml
index 922045a787..1df852b36d 100644
--- a/.github/workflows/pages.yml
+++ b/.github/workflows/pages.yml
@@ -24,98 +24,8 @@ jobs:
         uses: actions/checkout@v4
       - name: singularity setup
         uses: ./.github/actions/singularity-setup
-      - name: Create deploy dir
+      - name: Create many artifacts in the _site directory
         run: /bin/bash lib/deploy.sh
-      - name: Create _site/isa_explorer
-        run: mkdir -p _site/isa_explorer
-      - name: Create isa_explorer_browser
-        run: ./do gen:isa_explorer_browser
-      - name: Copy isa_explorer_browser
-        run: cp -R gen/isa_explorer/browser _site/isa_explorer
-      - name: Create isa_explorer_spreadsheet
-        run: ./do gen:isa_explorer_spreadsheet
-      - name: Copy isa_explorer_spreadsheet
-        run: cp -R gen/isa_explorer/spreadsheet _site/isa_explorer
-      - name: Build manual
-        run: ./do gen:html_manual MANUAL_NAME=isa VERSIONS=all
-      - name: Build html documentation for generic_rv64
-        run: ./do gen:html[generic_rv64]
-      - name: Generate YARD docs
-        run: ./do gen:tool_doc
-      - name: Create _site/example_cfg
-        run: mkdir -p _site/example_cfg
-      - name: Create _site/manual
-        run: mkdir -p _site/manual
-      - name: Create _site/pdfs
-        run: mkdir -p _site/pdfs
-      - name: Create _site/htmls
-        run: mkdir -p _site/htmls
-      - name: Copy cfg html
-        run: cp -R gen/cfg_html_doc/generic_rv64/html _site/example_cfg
-      - name: Copy top-level index.html with links to portfolio artifacts
-        run: cp index.html _site
-      - name: Create RVI20 Profile Release PDF Spec
-        run: ./do gen:profile_release_pdf[RVI20]
-      - name: Copy RVI20 Profile Release PDF
-        run: cp gen/profile/pdf/RVI20ProfileRelease.pdf _site/pdfs
-      - name: Create RVA20 Profile Release PDF Spec
-        run: ./do gen:profile_release_pdf[RVA20]
-      - name: Copy RVA20 Profile Release PDF
-        run: cp gen/profile/pdf/RVA20ProfileRelease.pdf _site/pdfs
-      - name: Create RVA22 Profile Release PDF Spec
-        run: ./do gen:profile_release_pdf[RVA22]
-      - name: Copy RVA22 Profile Release PDF
-        run: cp gen/profile/pdf/RVA22ProfileRelease.pdf _site/pdfs
-      - name: Create RVA23 Profile Release PDF Spec
-        run: ./do gen:profile_release_pdf[RVA23]
-      - name: Copy RVA23 Profile Release PDF
-        run: cp gen/profile/pdf/RVA23ProfileRelease.pdf _site/pdfs
-      - name: Create RVB23 Profile Release PDF Spec
-        run: ./do gen:profile_release_pdf[RVB23]
-      - name: Copy RVB23 Profile Release PDF
-        run: cp gen/profile/pdf/RVB23ProfileRelease.pdf _site/pdfs
-      - name: Create AC100-CRD PDF Spec
-        run: ./do gen:proc_crd_pdf[AC100]
-      - name: Copy AC100-CRD PDF
-        run: cp gen/proc_crd/pdf/AC100-CRD.pdf _site/pdfs
-      - name: Create AC200-CRD PDF Spec
-        run: ./do gen:proc_crd_pdf[AC200]
-      - name: Copy AC200-CRD PDF
-        run: cp gen/proc_crd/pdf/AC200-CRD.pdf _site/pdfs
-      - name: Create MC100-32-CRD PDF Spec
-        run: ./do gen:proc_crd_pdf[MC100-32]
-      - name: Copy MC100-32-CRD PDF
-        run: cp gen/proc_crd/pdf/MC100-32-CRD.pdf _site/pdfs
-      - name: Create MC100-64-CRD PDF Spec
-        run: ./do gen:proc_crd_pdf[MC100-64]
-      - name: Copy MC100-64-CRD PDF
-        run: cp gen/proc_crd/pdf/MC100-64-CRD.pdf _site/pdfs
-      - name: Create MC200-32-CRD PDF Spec
-        run: ./do gen:proc_crd_pdf[MC200-32]
-      - name: Copy MC200-32-CRD PDF
-        run: cp gen/proc_crd/pdf/MC200-32-CRD.pdf _site/pdfs
-      - name: Create MC200-64-CRD PDF Spec
-        run: ./do gen:proc_crd_pdf[MC200-64]
-      - name: Copy MC200-64-CRD PDF
-        run: cp gen/proc_crd/pdf/MC200-64-CRD.pdf _site/pdfs
-      - name: Create MC300-32-CRD PDF Spec
-        run: ./do gen:proc_crd_pdf[MC300-32]
-      - name: Copy MC300-32-CRD PDF
-        run: cp gen/proc_crd/pdf/MC300-32-CRD.pdf _site/pdfs
-      - name: Create MC300-64-CRD PDF Spec
-        run: ./do gen:proc_crd_pdf[MC300-64]
-      - name: Copy MC300-64-CRD PDF
-        run: cp gen/proc_crd/pdf/MC300-64-CRD.pdf _site/pdfs
-      - name: Create MC100-32-CTP PDF Spec
-        run: ./do gen:proc_ctp_pdf[MC100-32]
-      - name: Copy MC100-32-CTP PDF
-        run: cp gen/proc_ctp/pdf/MC100-32-CTP.pdf _site/pdfs
-      - name: Create MockProcessor-CTP PDF Spec
-        run: ./do gen:proc_ctp_pdf[MockProcessor]
-      - name: Copy MockProcessor-CTP PDF
-        run: cp gen/proc_ctp/pdf/MockProcessor-CTP.pdf _site/pdfs
-      - name: Copy manual html
-        run: cp -R gen/manual/isa/top/all/html _site/manual
       - name: Setup Pages
         uses: actions/configure-pages@v5
       - name: Upload artifact

From ca77a9995d8573f77b2bbc2baefa2b442e55716a Mon Sep 17 00:00:00 2001
From: Kevin Broch <86068473+kbroch-rivosinc@users.noreply.github.com>
Date: Fri, 18 Apr 2025 10:18:20 -0700
Subject: [PATCH 037/207] POC using reuse tool to express multi-license (#424)

* task: initial make UDB reuse copyright/license compliant

relates to #414: use reuse.toml file to express multiple
licenses and copyright.  Also setup pre-commit to check that
compliance is maintained

* legal: update Qualcomm copyright

---------

Co-authored-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com>
---
 .pre-commit-config.yaml                   |   7 +-
 LICENSE-BSD-2-Clause.txt                  |   9 +
 LICENSE => LICENSE-BSD-3-Clause-Clear.txt |   2 +-
 LICENSE-CC-BY.txt                         | 395 ++++++++++++++++++++++
 LICENSE-MIT.txt                           |  18 +
 LICENSES/BSD-2-Clause.txt                 |   1 +
 LICENSES/BSD-3-Clause-Clear.txt           |   1 +
 LICENSES/CC-BY-4.0.txt                    |   1 +
 LICENSES/MIT.txt                          |   1 +
 REUSE.toml                                |  49 +++
 10 files changed, 482 insertions(+), 2 deletions(-)
 create mode 100644 LICENSE-BSD-2-Clause.txt
 rename LICENSE => LICENSE-BSD-3-Clause-Clear.txt (95%)
 create mode 100644 LICENSE-CC-BY.txt
 create mode 100644 LICENSE-MIT.txt
 create mode 120000 LICENSES/BSD-2-Clause.txt
 create mode 120000 LICENSES/BSD-3-Clause-Clear.txt
 create mode 120000 LICENSES/CC-BY-4.0.txt
 create mode 120000 LICENSES/MIT.txt
 create mode 100644 REUSE.toml

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 3e635835d7..4ceb74ea6b 100755
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -26,7 +26,7 @@ repos:
     rev: v3.5.3
     hooks:
       - id: prettier
-        files: \.(json|yml|yaml)$
+        files: \.(json|toml|yml|yaml)$
         exclude: schemas/json-schema-draft-07.json
 
   - repo: https://github.com/python-jsonschema/check-jsonschema
@@ -91,3 +91,8 @@ repos:
           - --indent
           - "2"
           - --case-indent
+
+  - repo: https://github.com/fsfe/reuse-tool
+    rev: v5.0.2
+    hooks:
+      - id: reuse
diff --git a/LICENSE-BSD-2-Clause.txt b/LICENSE-BSD-2-Clause.txt
new file mode 100644
index 0000000000..eb3c575b88
--- /dev/null
+++ b/LICENSE-BSD-2-Clause.txt
@@ -0,0 +1,9 @@
+Copyright (c)  
+
+Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/LICENSE b/LICENSE-BSD-3-Clause-Clear.txt
similarity index 95%
rename from LICENSE
rename to LICENSE-BSD-3-Clause-Clear.txt
index c61afe2393..f529f8a94b 100644
--- a/LICENSE
+++ b/LICENSE-BSD-3-Clause-Clear.txt
@@ -1,6 +1,6 @@
 SPDX-License-Identifier: BSD-3-Clause-Clear
 
-Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
+Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
 
 Redistribution and use in source and binary forms, with or without modification, are permitted
 (subject to the limitations in the disclaimer below) provided that the following conditions are
diff --git a/LICENSE-CC-BY.txt b/LICENSE-CC-BY.txt
new file mode 100644
index 0000000000..2f244ac814
--- /dev/null
+++ b/LICENSE-CC-BY.txt
@@ -0,0 +1,395 @@
+Attribution 4.0 International
+
+=======================================================================
+
+Creative Commons Corporation ("Creative Commons") is not a law firm and
+does not provide legal services or legal advice. Distribution of
+Creative Commons public licenses does not create a lawyer-client or
+other relationship. Creative Commons makes its licenses and related
+information available on an "as-is" basis. Creative Commons gives no
+warranties regarding its licenses, any material licensed under their
+terms and conditions, or any related information. Creative Commons
+disclaims all liability for damages resulting from their use to the
+fullest extent possible.
+
+Using Creative Commons Public Licenses
+
+Creative Commons public licenses provide a standard set of terms and
+conditions that creators and other rights holders may use to share
+original works of authorship and other material subject to copyright
+and certain other rights specified in the public license below. The
+following considerations are for informational purposes only, are not
+exhaustive, and do not form part of our licenses.
+
+     Considerations for licensors: Our public licenses are
+     intended for use by those authorized to give the public
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+     Licensors should also secure all rights necessary before
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+
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+          6(a).
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+     contents in a database in which You have Sui Generis Database
+     Rights, then the database in which You have Sui Generis Database
+     Rights (but not its individual contents) is Adapted Material; and
+
+  c. You must comply with the conditions in Section 3(a) if You Share
+     all or a substantial portion of the contents of the database.
+
+For the avoidance of doubt, this Section 4 supplements and does not
+replace Your obligations under this Public License where the Licensed
+Rights include other Copyright and Similar Rights.
+
+
+Section 5 -- Disclaimer of Warranties and Limitation of Liability.
+
+  a. UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
+     EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
+     AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
+     ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
+     IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
+     WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
+     PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
+     ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
+     KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
+     ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.
+
+  b. TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
+     TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
+     NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
+     INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
+     COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
+     USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
+     ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
+     DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
+     IN PART, THIS LIMITATION MAY NOT APPLY TO YOU.
+
+  c. The disclaimer of warranties and limitation of liability provided
+     above shall be interpreted in a manner that, to the extent
+     possible, most closely approximates an absolute disclaimer and
+     waiver of all liability.
+
+
+Section 6 -- Term and Termination.
+
+  a. This Public License applies for the term of the Copyright and
+     Similar Rights licensed here. However, if You fail to comply with
+     this Public License, then Your rights under this Public License
+     terminate automatically.
+
+  b. Where Your right to use the Licensed Material has terminated under
+     Section 6(a), it reinstates:
+
+       1. automatically as of the date the violation is cured, provided
+          it is cured within 30 days of Your discovery of the
+          violation; or
+
+       2. upon express reinstatement by the Licensor.
+
+     For the avoidance of doubt, this Section 6(b) does not affect any
+     right the Licensor may have to seek remedies for Your violations
+     of this Public License.
+
+  c. For the avoidance of doubt, the Licensor may also offer the
+     Licensed Material under separate terms or conditions or stop
+     distributing the Licensed Material at any time; however, doing so
+     will not terminate this Public License.
+
+  d. Sections 1, 5, 6, 7, and 8 survive termination of this Public
+     License.
+
+
+Section 7 -- Other Terms and Conditions.
+
+  a. The Licensor shall not be bound by any additional or different
+     terms or conditions communicated by You unless expressly agreed.
+
+  b. Any arrangements, understandings, or agreements regarding the
+     Licensed Material not stated herein are separate from and
+     independent of the terms and conditions of this Public License.
+
+
+Section 8 -- Interpretation.
+
+  a. For the avoidance of doubt, this Public License does not, and
+     shall not be interpreted to, reduce, limit, restrict, or impose
+     conditions on any use of the Licensed Material that could lawfully
+     be made without permission under this Public License.
+
+  b. To the extent possible, if any provision of this Public License is
+     deemed unenforceable, it shall be automatically reformed to the
+     minimum extent necessary to make it enforceable. If the provision
+     cannot be reformed, it shall be severed from this Public License
+     without affecting the enforceability of the remaining terms and
+     conditions.
+
+  c. No term or condition of this Public License will be waived and no
+     failure to comply consented to unless expressly agreed to by the
+     Licensor.
+
+  d. Nothing in this Public License constitutes or may be interpreted
+     as a limitation upon, or waiver of, any privileges and immunities
+     that apply to the Licensor or You, including from the legal
+     processes of any jurisdiction or authority.
+
+
+=======================================================================
+
+Creative Commons is not a party to its public
+licenses. Notwithstanding, Creative Commons may elect to apply one of
+its public licenses to material it publishes and in those instances
+will be considered the “Licensor.” The text of the Creative Commons
+public licenses is dedicated to the public domain under the CC0 Public
+Domain Dedication. Except for the limited purpose of indicating that
+material is shared under a Creative Commons public license or as
+otherwise permitted by the Creative Commons policies published at
+creativecommons.org/policies, Creative Commons does not authorize the
+use of the trademark "Creative Commons" or any other trademark or logo
+of Creative Commons without its prior written consent including,
+without limitation, in connection with any unauthorized modifications
+to any of its public licenses or any other arrangements,
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+the avoidance of doubt, this paragraph does not form part of the
+public licenses.
+
+Creative Commons may be contacted at creativecommons.org.
diff --git a/LICENSE-MIT.txt b/LICENSE-MIT.txt
new file mode 100644
index 0000000000..d817195dad
--- /dev/null
+++ b/LICENSE-MIT.txt
@@ -0,0 +1,18 @@
+MIT License
+
+Copyright (c)  
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of this software and
+associated documentation files (the "Software"), to deal in the Software without restriction, including
+without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the
+following conditions:
+
+The above copyright notice and this permission notice shall be included in all copies or substantial
+portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT
+LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO
+EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+USE OR OTHER DEALINGS IN THE SOFTWARE.
diff --git a/LICENSES/BSD-2-Clause.txt b/LICENSES/BSD-2-Clause.txt
new file mode 120000
index 0000000000..93f00d892c
--- /dev/null
+++ b/LICENSES/BSD-2-Clause.txt
@@ -0,0 +1 @@
+../LICENSE-BSD-2-Clause.txt
\ No newline at end of file
diff --git a/LICENSES/BSD-3-Clause-Clear.txt b/LICENSES/BSD-3-Clause-Clear.txt
new file mode 120000
index 0000000000..9c2a120061
--- /dev/null
+++ b/LICENSES/BSD-3-Clause-Clear.txt
@@ -0,0 +1 @@
+../LICENSE-BSD-3-Clause-Clear.txt
\ No newline at end of file
diff --git a/LICENSES/CC-BY-4.0.txt b/LICENSES/CC-BY-4.0.txt
new file mode 120000
index 0000000000..cad35f8db7
--- /dev/null
+++ b/LICENSES/CC-BY-4.0.txt
@@ -0,0 +1 @@
+../LICENSE-CC-BY.txt
\ No newline at end of file
diff --git a/LICENSES/MIT.txt b/LICENSES/MIT.txt
new file mode 120000
index 0000000000..170bf8adbe
--- /dev/null
+++ b/LICENSES/MIT.txt
@@ -0,0 +1 @@
+../LICENSE-MIT.txt
\ No newline at end of file
diff --git a/REUSE.toml b/REUSE.toml
new file mode 100644
index 0000000000..0d04ede11a
--- /dev/null
+++ b/REUSE.toml
@@ -0,0 +1,49 @@
+version = 1
+
+# For original UDB code
+[[annotations]]
+path = [
+    ".**",
+    "arch_def.yardopts",
+    "backends/**",
+    "bin/**",
+    "cert_flow.txt",
+    "cfgs/**",
+    "container.def",
+    "do",
+    "docs/**",
+    "Gemfile.lock",
+    "Gemfile",
+    "idl.yardopts",
+    "lib/**",
+    "package-lock.json",
+    "package.json",
+    "Rakefile",
+    "README.adoc",
+    "requirements.txt",
+    "schemas/**",
+]
+SPDX-FileCopyrightText = [
+    "Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.",
+    "2024-2025 Contributors to the RISCV UnifiedDB ",
+]
+SPDX-License-Identifier = "BSD-3-Clause-Clear"
+
+
+[[annotations]]
+path = [
+    "arch/**",
+    "arch_overlay/**",
+]
+precedence = "aggregate"
+SPDX-FileCopyrightText = [
+    "Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.  ",
+    "2024-2025 Contributors to the RISCV UnifiedDB ",
+    # For import isa-manual docs: https://github.com/riscv/riscv-isa-manual
+    "2017-2025 Contributors to the RISCV ISA Manual ",
+]
+SPDX-License-Identifier = [
+    "BSD-3-Clause-Clear",
+    # For import isa-manual docs: https://github.com/riscv/riscv-isa-manual
+    "CC-BY-4.0",
+]

From 30a6c4115bd434cde82dc418b593a39f38c19d73 Mon Sep 17 00:00:00 2001
From: Paul Clarke 
Date: Sat, 19 Apr 2025 14:34:52 -0500
Subject: [PATCH 038/207] Umbrella extensions shouldn't define instructions
 (#435)

* Extension A doesn't define any instructions (anymore)

Some instructions claim to be defined by the "A" extension or another
extension. Extension A was split into two "sub-extensions", "Zaamo"
and "Zalrsc", then defined to simply encompass both sub-extensions.

Since these instructions are actually now defined by the sub-extensions,
the instructions should only claim to be defined by them.

Also, move the instruction YAML files from `arch/inst/A` to their
new respective directories `arch/inst/{Zaamo,Zalrsc}`.

* Extension B doesn't define any instructions (anymore)

Some instructions claim to be defined by the "B" extension.
Extension B was split into four "sub-extensions": "Zba", "Zbb",
and "Zbs", then defined to simply encompass these sub-extensions.

Additionally, ratified extensions "Zbc", "Zbkb", "Zbkc", and "Zbkx" are
under the "B" umbrella (at least in the ISA 20240411, these are all
in Chapter 28 "B" Extension for Bit Manipulation, Version 1.0.0",
but these 3 extensions are shown only as "frozen").

Since these instructions are actually now defined by the sub-extensions,
the instructions should only claim to be defined by them.

Also, move the instruction YAML files from `arch/inst/B` to their
new respective directories `arch/inst/{Zba,Zbb,Zbc,Zbs,Zbkb,Zbkc,Zbkx}`,
when there is only one defining extension.

Some instructions are defined by multiple extensions. These are
left in the `arch/inst/B` directory, for lack of an unambiguously
better location.

* Extensions Zk, Zkn, Zks don't define any instructions

Some instructions claim to be defined by the "Zk/Zkn/Zks" extensions.
Remove these claims.

Also, move the instruction YAML files from `arch/inst/Zk` to their
new respective directories `arch/inst/{Zknd,Zkne,Zbkb}`,
when there is only one defining extension.

Some instructions are defined by multiple extensions. These are
moved to the `arch/inst/Zkn` directory, for lack of an unambiguously
better location.

* Extensions Zvkn, Zvks don't define any instructions

Some instructions claim to be defined by the "Zvkn/Zvks" extensions.
Remove these claims.

Also, move some instruction YAML files to their
new respective directories `arch/inst/{Zvkned,Zvknha}`.
---
 arch/inst/B/andn.yaml                      | 2 +-
 arch/inst/B/clmul.yaml                     | 2 +-
 arch/inst/B/clmulh.yaml                    | 2 +-
 arch/inst/B/orn.yaml                       | 2 +-
 arch/inst/B/rev8.yaml                      | 2 +-
 arch/inst/B/rol.yaml                       | 2 +-
 arch/inst/B/rolw.yaml                      | 2 +-
 arch/inst/B/ror.yaml                       | 2 +-
 arch/inst/B/rori.yaml                      | 2 +-
 arch/inst/B/roriw.yaml                     | 2 +-
 arch/inst/B/rorw.yaml                      | 2 +-
 arch/inst/B/xnor.yaml                      | 2 +-
 arch/inst/{A => Zaamo}/amoadd.d.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amoadd.w.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amoand.d.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amoand.w.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amomax.d.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amomax.w.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amomaxu.d.yaml      | 3 +--
 arch/inst/{A => Zaamo}/amomaxu.w.yaml      | 3 +--
 arch/inst/{A => Zaamo}/amomin.d.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amomin.w.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amominu.d.yaml      | 3 +--
 arch/inst/{A => Zaamo}/amominu.w.yaml      | 3 +--
 arch/inst/{A => Zaamo}/amoor.d.yaml        | 3 +--
 arch/inst/{A => Zaamo}/amoor.w.yaml        | 3 +--
 arch/inst/{A => Zaamo}/amoswap.d.yaml      | 3 +--
 arch/inst/{A => Zaamo}/amoswap.w.yaml      | 3 +--
 arch/inst/{A => Zaamo}/amoxor.d.yaml       | 3 +--
 arch/inst/{A => Zaamo}/amoxor.w.yaml       | 3 +--
 arch/inst/{A => Zalrsc}/lr.d.yaml          | 3 +--
 arch/inst/{A => Zalrsc}/lr.w.yaml          | 3 +--
 arch/inst/{A => Zalrsc}/sc.d.yaml          | 3 +--
 arch/inst/{A => Zalrsc}/sc.w.yaml          | 3 +--
 arch/inst/{B => Zba}/add.uw.yaml           | 3 +--
 arch/inst/{B => Zba}/sh1add.uw.yaml        | 3 +--
 arch/inst/{B => Zba}/sh1add.yaml           | 3 +--
 arch/inst/{B => Zba}/sh2add.uw.yaml        | 3 +--
 arch/inst/{B => Zba}/sh2add.yaml           | 3 +--
 arch/inst/{B => Zba}/sh3add.uw.yaml        | 3 +--
 arch/inst/{B => Zba}/sh3add.yaml           | 3 +--
 arch/inst/{B => Zba}/slli.uw.yaml          | 3 +--
 arch/inst/{B => Zbb}/clz.yaml              | 3 +--
 arch/inst/{B => Zbb}/clzw.yaml             | 3 +--
 arch/inst/{B => Zbb}/cpop.yaml             | 3 +--
 arch/inst/{B => Zbb}/cpopw.yaml            | 3 +--
 arch/inst/{B => Zbb}/ctz.yaml              | 3 +--
 arch/inst/{B => Zbb}/ctzw.yaml             | 3 +--
 arch/inst/{B => Zbb}/max.yaml              | 3 +--
 arch/inst/{B => Zbb}/maxu.yaml             | 3 +--
 arch/inst/{B => Zbb}/min.yaml              | 3 +--
 arch/inst/{B => Zbb}/minu.yaml             | 3 +--
 arch/inst/{B => Zbb}/orc.b.yaml            | 3 +--
 arch/inst/{B => Zbb}/sext.b.yaml           | 3 +--
 arch/inst/{B => Zbb}/sext.h.yaml           | 3 +--
 arch/inst/{B => Zbb}/zext.h.yaml           | 7 +++----
 arch/inst/{B => Zbc}/clmulr.yaml           | 0
 arch/inst/{Zk => Zbkb}/pack.yaml           | 3 +--
 arch/inst/{Zk => Zbkb}/packh.yaml          | 3 +--
 arch/inst/{Zk => Zbkb}/packw.yaml          | 3 +--
 arch/inst/{B => Zbs}/bclr.yaml             | 3 +--
 arch/inst/{B => Zbs}/bclri.yaml            | 3 +--
 arch/inst/{B => Zbs}/bext.yaml             | 3 +--
 arch/inst/{B => Zbs}/bexti.yaml            | 3 +--
 arch/inst/{B => Zbs}/binv.yaml             | 3 +--
 arch/inst/{B => Zbs}/binvi.yaml            | 3 +--
 arch/inst/{B => Zbs}/bset.yaml             | 3 +--
 arch/inst/{B => Zbs}/bseti.yaml            | 3 +--
 arch/inst/{Zk => Zkn}/aes64ks1i.yaml       | 2 +-
 arch/inst/{Zk => Zkn}/aes64ks2.yaml        | 2 +-
 arch/inst/{Zk => Zknd}/aes32dsi.yaml       | 4 +---
 arch/inst/{Zk => Zknd}/aes32dsmi.yaml      | 3 +--
 arch/inst/{Zk => Zknd}/aes64ds.yaml        | 3 +--
 arch/inst/{Zk => Zknd}/aes64dsm.yaml       | 3 +--
 arch/inst/{Zk => Zknd}/aes64im.yaml        | 3 +--
 arch/inst/{Zk => Zkne}/aes32esi.yaml       | 3 +--
 arch/inst/{Zk => Zkne}/aes32esmi.yaml      | 3 +--
 arch/inst/{Zk => Zkne}/aes64es.yaml        | 3 +--
 arch/inst/{Zk => Zkne}/aes64esm.yaml       | 3 +--
 arch/inst/{Zk => Zknh}/sha256sig0.yaml     | 3 +--
 arch/inst/{Zk => Zknh}/sha256sig1.yaml     | 3 +--
 arch/inst/{Zk => Zknh}/sha256sum0.yaml     | 3 +--
 arch/inst/{Zk => Zknh}/sha256sum1.yaml     | 3 +--
 arch/inst/{Zk => Zknh}/sha512sig0.yaml     | 3 +--
 arch/inst/{Zk => Zknh}/sha512sig0h.yaml    | 3 +--
 arch/inst/{Zk => Zknh}/sha512sig0l.yaml    | 3 +--
 arch/inst/{Zk => Zknh}/sha512sig1.yaml     | 3 +--
 arch/inst/{Zk => Zknh}/sha512sig1h.yaml    | 3 +--
 arch/inst/{Zk => Zknh}/sha512sig1l.yaml    | 3 +--
 arch/inst/{Zk => Zknh}/sha512sum0.yaml     | 3 +--
 arch/inst/{Zk => Zknh}/sha512sum0r.yaml    | 3 +--
 arch/inst/{Zk => Zknh}/sha512sum1.yaml     | 3 +--
 arch/inst/{Zk => Zknh}/sha512sum1r.yaml    | 3 +--
 arch/inst/Zvbb/vandn.vv.yaml               | 3 +--
 arch/inst/Zvbb/vandn.vx.yaml               | 3 +--
 arch/inst/Zvbb/vbrev.v.yaml                | 3 +--
 arch/inst/Zvbb/vbrev8.v.yaml               | 3 +--
 arch/inst/Zvbb/vclz.v.yaml                 | 3 +--
 arch/inst/Zvbb/vcpop.v.yaml                | 3 +--
 arch/inst/Zvbb/vctz.v.yaml                 | 3 +--
 arch/inst/Zvbb/vrev8.v.yaml                | 3 +--
 arch/inst/Zvbb/vrol.vv.yaml                | 3 +--
 arch/inst/Zvbb/vrol.vx.yaml                | 3 +--
 arch/inst/Zvbb/vror.vi.yaml                | 3 +--
 arch/inst/Zvbb/vror.vv.yaml                | 3 +--
 arch/inst/Zvbb/vror.vx.yaml                | 3 +--
 arch/inst/Zvbb/vwsll.vi.yaml               | 3 +--
 arch/inst/Zvbb/vwsll.vv.yaml               | 3 +--
 arch/inst/Zvbb/vwsll.vx.yaml               | 3 +--
 arch/inst/Zvbc/vclmul.vv.yaml              | 3 +--
 arch/inst/Zvbc/vclmul.vx.yaml              | 3 +--
 arch/inst/Zvbc/vclmulh.vv.yaml             | 3 +--
 arch/inst/Zvbc/vclmulh.vx.yaml             | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesdf.vs.yaml  | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesdf.vv.yaml  | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesdm.vs.yaml  | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesdm.vv.yaml  | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesef.vs.yaml  | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesef.vv.yaml  | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesem.vs.yaml  | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesem.vv.yaml  | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaeskf1.vi.yaml | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaeskf2.vi.yaml | 3 +--
 arch/inst/{Zvkn => Zvkned}/vaesz.vs.yaml   | 3 +--
 arch/inst/{Zvkn => Zvknha}/vsha2ch.vv.yaml | 3 +--
 arch/inst/{Zvkn => Zvknha}/vsha2cl.vv.yaml | 3 +--
 arch/inst/{Zvkn => Zvknha}/vsha2ms.vv.yaml | 3 +--
 127 files changed, 128 insertions(+), 241 deletions(-)
 rename arch/inst/{A => Zaamo}/amoadd.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoadd.w.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoand.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoand.w.yaml (99%)
 rename arch/inst/{A => Zaamo}/amomax.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amomax.w.yaml (99%)
 rename arch/inst/{A => Zaamo}/amomaxu.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amomaxu.w.yaml (99%)
 rename arch/inst/{A => Zaamo}/amomin.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amomin.w.yaml (99%)
 rename arch/inst/{A => Zaamo}/amominu.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amominu.w.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoor.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoor.w.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoswap.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoswap.w.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoxor.d.yaml (99%)
 rename arch/inst/{A => Zaamo}/amoxor.w.yaml (99%)
 rename arch/inst/{A => Zalrsc}/lr.d.yaml (99%)
 rename arch/inst/{A => Zalrsc}/lr.w.yaml (99%)
 rename arch/inst/{A => Zalrsc}/sc.d.yaml (99%)
 rename arch/inst/{A => Zalrsc}/sc.w.yaml (99%)
 rename arch/inst/{B => Zba}/add.uw.yaml (97%)
 rename arch/inst/{B => Zba}/sh1add.uw.yaml (98%)
 rename arch/inst/{B => Zba}/sh1add.yaml (97%)
 rename arch/inst/{B => Zba}/sh2add.uw.yaml (98%)
 rename arch/inst/{B => Zba}/sh2add.yaml (97%)
 rename arch/inst/{B => Zba}/sh3add.uw.yaml (98%)
 rename arch/inst/{B => Zba}/sh3add.yaml (97%)
 rename arch/inst/{B => Zba}/slli.uw.yaml (97%)
 rename arch/inst/{B => Zbb}/clz.yaml (97%)
 rename arch/inst/{B => Zbb}/clzw.yaml (97%)
 rename arch/inst/{B => Zbb}/cpop.yaml (98%)
 rename arch/inst/{B => Zbb}/cpopw.yaml (98%)
 rename arch/inst/{B => Zbb}/ctz.yaml (98%)
 rename arch/inst/{B => Zbb}/ctzw.yaml (98%)
 rename arch/inst/{B => Zbb}/max.yaml (98%)
 rename arch/inst/{B => Zbb}/maxu.yaml (98%)
 rename arch/inst/{B => Zbb}/min.yaml (98%)
 rename arch/inst/{B => Zbb}/minu.yaml (98%)
 rename arch/inst/{B => Zbb}/orc.b.yaml (98%)
 rename arch/inst/{B => Zbb}/sext.b.yaml (97%)
 rename arch/inst/{B => Zbb}/sext.h.yaml (97%)
 rename arch/inst/{B => Zbb}/zext.h.yaml (91%)
 rename arch/inst/{B => Zbc}/clmulr.yaml (100%)
 rename arch/inst/{Zk => Zbkb}/pack.yaml (93%)
 rename arch/inst/{Zk => Zbkb}/packh.yaml (92%)
 rename arch/inst/{Zk => Zbkb}/packw.yaml (93%)
 rename arch/inst/{B => Zbs}/bclr.yaml (98%)
 rename arch/inst/{B => Zbs}/bclri.yaml (98%)
 rename arch/inst/{B => Zbs}/bext.yaml (98%)
 rename arch/inst/{B => Zbs}/bexti.yaml (98%)
 rename arch/inst/{B => Zbs}/binv.yaml (98%)
 rename arch/inst/{B => Zbs}/binvi.yaml (98%)
 rename arch/inst/{B => Zbs}/bset.yaml (98%)
 rename arch/inst/{B => Zbs}/bseti.yaml (98%)
 rename arch/inst/{Zk => Zkn}/aes64ks1i.yaml (94%)
 rename arch/inst/{Zk => Zkn}/aes64ks2.yaml (94%)
 rename arch/inst/{Zk => Zknd}/aes32dsi.yaml (95%)
 rename arch/inst/{Zk => Zknd}/aes32dsmi.yaml (96%)
 rename arch/inst/{Zk => Zknd}/aes64ds.yaml (93%)
 rename arch/inst/{Zk => Zknd}/aes64dsm.yaml (93%)
 rename arch/inst/{Zk => Zknd}/aes64im.yaml (92%)
 rename arch/inst/{Zk => Zkne}/aes32esi.yaml (93%)
 rename arch/inst/{Zk => Zkne}/aes32esmi.yaml (93%)
 rename arch/inst/{Zk => Zkne}/aes64es.yaml (93%)
 rename arch/inst/{Zk => Zkne}/aes64esm.yaml (93%)
 rename arch/inst/{Zk => Zknh}/sha256sig0.yaml (92%)
 rename arch/inst/{Zk => Zknh}/sha256sig1.yaml (92%)
 rename arch/inst/{Zk => Zknh}/sha256sum0.yaml (92%)
 rename arch/inst/{Zk => Zknh}/sha256sum1.yaml (92%)
 rename arch/inst/{Zk => Zknh}/sha512sig0.yaml (92%)
 rename arch/inst/{Zk => Zknh}/sha512sig0h.yaml (93%)
 rename arch/inst/{Zk => Zknh}/sha512sig0l.yaml (93%)
 rename arch/inst/{Zk => Zknh}/sha512sig1.yaml (92%)
 rename arch/inst/{Zk => Zknh}/sha512sig1h.yaml (93%)
 rename arch/inst/{Zk => Zknh}/sha512sig1l.yaml (93%)
 rename arch/inst/{Zk => Zknh}/sha512sum0.yaml (92%)
 rename arch/inst/{Zk => Zknh}/sha512sum0r.yaml (93%)
 rename arch/inst/{Zk => Zknh}/sha512sum1.yaml (92%)
 rename arch/inst/{Zk => Zknh}/sha512sum1r.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesdf.vs.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesdf.vv.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesdm.vs.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesdm.vv.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesef.vs.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesef.vv.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesem.vs.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesem.vv.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaeskf1.vi.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaeskf2.vi.yaml (93%)
 rename arch/inst/{Zvkn => Zvkned}/vaesz.vs.yaml (93%)
 rename arch/inst/{Zvkn => Zvknha}/vsha2ch.vv.yaml (92%)
 rename arch/inst/{Zvkn => Zvknha}/vsha2cl.vv.yaml (92%)
 rename arch/inst/{Zvkn => Zvknha}/vsha2ms.vv.yaml (92%)

diff --git a/arch/inst/B/andn.yaml b/arch/inst/B/andn.yaml
index 1d2828ddbe..2163cf10dc 100644
--- a/arch/inst/B/andn.yaml
+++ b/arch/inst/B/andn.yaml
@@ -8,7 +8,7 @@ description: |
   This instruction performs the bitwise logical AND operation between `rs1` and the
   bitwise inversion of `rs2`.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0100000----------111-----0110011
diff --git a/arch/inst/B/clmul.yaml b/arch/inst/B/clmul.yaml
index 81d46380f7..3e3c3cb66d 100644
--- a/arch/inst/B/clmul.yaml
+++ b/arch/inst/B/clmul.yaml
@@ -7,7 +7,7 @@ long_name: Carry-less multiply (low-part)
 description: |
   `clmul` produces the lower half of the 2*XLEN carry-less product
 definedBy:
-  anyOf: [Zbc, Zbkc, Zk, Zkn, Zks]
+  anyOf: [Zbc, Zbkc]
 assembly: xd, xs1, xs2
 encoding:
   match: 0000101----------001-----0110011
diff --git a/arch/inst/B/clmulh.yaml b/arch/inst/B/clmulh.yaml
index 7e98366e5f..c2475f8439 100644
--- a/arch/inst/B/clmulh.yaml
+++ b/arch/inst/B/clmulh.yaml
@@ -7,7 +7,7 @@ long_name: Carry-less multiply (high-part)
 description: |
   `clmulh` produces the upper half of the 2*XLEN carry-less product
 definedBy:
-  anyOf: [Zbc, Zbkc, Zk, Zkn, Zks]
+  anyOf: [Zbc, Zbkc]
 assembly: xd, xs1, xs2
 encoding:
   match: 0000101----------011-----0110011
diff --git a/arch/inst/B/orn.yaml b/arch/inst/B/orn.yaml
index f320161e2f..c7e9212b82 100644
--- a/arch/inst/B/orn.yaml
+++ b/arch/inst/B/orn.yaml
@@ -7,7 +7,7 @@ long_name: OR with inverted operand
 description: |
   This instruction performs the bitwise logical OR operation between rs1 and the bitwise inversion of rs2.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0100000----------110-----0110011
diff --git a/arch/inst/B/rev8.yaml b/arch/inst/B/rev8.yaml
index 2cf78d88a6..6dc6e25ec3 100644
--- a/arch/inst/B/rev8.yaml
+++ b/arch/inst/B/rev8.yaml
@@ -15,7 +15,7 @@ description: |
   and halfword-sized byte-reversal, perform a `rev8 rd,rs` followed by a `srai rd,rd,K`, where K
   is XLEN-32 and XLEN-16, respectively.
 definedBy:
-  anyOf: [B, Zbb, Zbkb]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1
 encoding:
   RV32:
diff --git a/arch/inst/B/rol.yaml b/arch/inst/B/rol.yaml
index 9c4ebd2fb9..c25e7c2199 100644
--- a/arch/inst/B/rol.yaml
+++ b/arch/inst/B/rol.yaml
@@ -7,7 +7,7 @@ long_name: Rotate left (Register)
 description: |
   This instruction performs a rotate left of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0110000----------001-----0110011
diff --git a/arch/inst/B/rolw.yaml b/arch/inst/B/rolw.yaml
index 3e97c78b18..8744044515 100644
--- a/arch/inst/B/rolw.yaml
+++ b/arch/inst/B/rolw.yaml
@@ -8,7 +8,7 @@ description: |
   This instruction performs a rotate left of the least-significant word of rs1 by the amount in least-significant 5 bits of rs2.
   The resulting word value is sign-extended by copying bit 31 to all of the more-significant bits.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 base: 64
 encoding:
diff --git a/arch/inst/B/ror.yaml b/arch/inst/B/ror.yaml
index d11401788c..140c273a10 100644
--- a/arch/inst/B/ror.yaml
+++ b/arch/inst/B/ror.yaml
@@ -7,7 +7,7 @@ long_name: Rotate right (Register)
 description: |
   This instruction performs a rotate right of rs1 by the amount in least-significant `log2(XLEN)` bits of rs2.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0110000----------101-----0110011
diff --git a/arch/inst/B/rori.yaml b/arch/inst/B/rori.yaml
index 93b1fc00fd..a32f464366 100644
--- a/arch/inst/B/rori.yaml
+++ b/arch/inst/B/rori.yaml
@@ -8,7 +8,7 @@ description: |
   This instruction performs a rotate right of rs1 by the amount in the least-significant log2(XLEN) bits of shamt.
   For RV32, the encodings corresponding to shamt[5]=1 are reserved.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, shamt
 encoding:
   RV32:
diff --git a/arch/inst/B/roriw.yaml b/arch/inst/B/roriw.yaml
index 345036599c..750ed06695 100644
--- a/arch/inst/B/roriw.yaml
+++ b/arch/inst/B/roriw.yaml
@@ -9,7 +9,7 @@ description: |
   the least-significant log2(XLEN) bits of shamt. The resulting word value is sign-extended by
   copying bit 31 to all of the more-significant bits.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, shamt
 base: 64
 encoding:
diff --git a/arch/inst/B/rorw.yaml b/arch/inst/B/rorw.yaml
index 90d60811d0..2b2d2e0fe7 100644
--- a/arch/inst/B/rorw.yaml
+++ b/arch/inst/B/rorw.yaml
@@ -9,7 +9,7 @@ description: |
   least-significant 5 bits of rs2. The resultant word is sign-extended by copying bit 31 to all
   of the more-significant bits.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 base: 64
 encoding:
diff --git a/arch/inst/B/xnor.yaml b/arch/inst/B/xnor.yaml
index c826537417..a1284f87e6 100644
--- a/arch/inst/B/xnor.yaml
+++ b/arch/inst/B/xnor.yaml
@@ -7,7 +7,7 @@ long_name: Exclusive NOR
 description: |
   This instruction performs the bit-wise exclusive-NOR operation on rs1 and rs2.
 definedBy:
-  anyOf: [B, Zbb, Zbkb, Zk, Zkn, Zks]
+  anyOf: [Zbb, Zbkb]
 assembly: xd, xs1, xs2
 encoding:
   match: 0100000----------100-----0110011
diff --git a/arch/inst/A/amoadd.d.yaml b/arch/inst/Zaamo/amoadd.d.yaml
similarity index 99%
rename from arch/inst/A/amoadd.d.yaml
rename to arch/inst/Zaamo/amoadd.d.yaml
index 9f80e32b30..754137d548 100644
--- a/arch/inst/A/amoadd.d.yaml
+++ b/arch/inst/Zaamo/amoadd.d.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Add the value of register _rs2_ to the loaded value
     * Write the sum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xs1)
 encoding:
diff --git a/arch/inst/A/amoadd.w.yaml b/arch/inst/Zaamo/amoadd.w.yaml
similarity index 99%
rename from arch/inst/A/amoadd.w.yaml
rename to arch/inst/Zaamo/amoadd.w.yaml
index c78119aaef..3cc77637d8 100644
--- a/arch/inst/A/amoadd.w.yaml
+++ b/arch/inst/Zaamo/amoadd.w.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Add the least-significant word of register _rs2_ to the loaded value
     * Write the sum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 00000------------010-----0101111
diff --git a/arch/inst/A/amoand.d.yaml b/arch/inst/Zaamo/amoand.d.yaml
similarity index 99%
rename from arch/inst/A/amoand.d.yaml
rename to arch/inst/Zaamo/amoand.d.yaml
index a620c98443..6b115efc62 100644
--- a/arch/inst/A/amoand.d.yaml
+++ b/arch/inst/Zaamo/amoand.d.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * AND the value of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:
diff --git a/arch/inst/A/amoand.w.yaml b/arch/inst/Zaamo/amoand.w.yaml
similarity index 99%
rename from arch/inst/A/amoand.w.yaml
rename to arch/inst/Zaamo/amoand.w.yaml
index 9fcfb1c408..07871ff604 100644
--- a/arch/inst/A/amoand.w.yaml
+++ b/arch/inst/Zaamo/amoand.w.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * AND the least-significant word of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 01100------------010-----0101111
diff --git a/arch/inst/A/amomax.d.yaml b/arch/inst/Zaamo/amomax.d.yaml
similarity index 99%
rename from arch/inst/A/amomax.d.yaml
rename to arch/inst/Zaamo/amomax.d.yaml
index 1810b7709d..fb7e5e0db5 100644
--- a/arch/inst/A/amomax.d.yaml
+++ b/arch/inst/Zaamo/amomax.d.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Signed compare the value of register _rs2_ to the loaded value, and select the maximum value
     * Write the maximum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:
diff --git a/arch/inst/A/amomax.w.yaml b/arch/inst/Zaamo/amomax.w.yaml
similarity index 99%
rename from arch/inst/A/amomax.w.yaml
rename to arch/inst/Zaamo/amomax.w.yaml
index e1816abc6d..ca6f5c7999 100644
--- a/arch/inst/A/amomax.w.yaml
+++ b/arch/inst/Zaamo/amomax.w.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Signed compare the least-significant word of register _rs2_ to the loaded value, and select the maximum value
     * Write the maximum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 10100------------010-----0101111
diff --git a/arch/inst/A/amomaxu.d.yaml b/arch/inst/Zaamo/amomaxu.d.yaml
similarity index 99%
rename from arch/inst/A/amomaxu.d.yaml
rename to arch/inst/Zaamo/amomaxu.d.yaml
index 405b32c005..d5ffa16932 100644
--- a/arch/inst/A/amomaxu.d.yaml
+++ b/arch/inst/Zaamo/amomaxu.d.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Unsigned compare the value of register _rs2_ to the loaded value, and select the maximum value
     * Write the maximum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:
diff --git a/arch/inst/A/amomaxu.w.yaml b/arch/inst/Zaamo/amomaxu.w.yaml
similarity index 99%
rename from arch/inst/A/amomaxu.w.yaml
rename to arch/inst/Zaamo/amomaxu.w.yaml
index 525c3ace6f..0109bf18d0 100644
--- a/arch/inst/A/amomaxu.w.yaml
+++ b/arch/inst/Zaamo/amomaxu.w.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Unsigned compare the least-significant word of register _rs2_ to the loaded value, and select the maximum value
     * Write the maximum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 11100------------010-----0101111
diff --git a/arch/inst/A/amomin.d.yaml b/arch/inst/Zaamo/amomin.d.yaml
similarity index 99%
rename from arch/inst/A/amomin.d.yaml
rename to arch/inst/Zaamo/amomin.d.yaml
index ab944ba93f..e87b6f135c 100644
--- a/arch/inst/A/amomin.d.yaml
+++ b/arch/inst/Zaamo/amomin.d.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Signed compare the value of register _rs2_ to the loaded value, and select the minimum value
     * Write the minimum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:
diff --git a/arch/inst/A/amomin.w.yaml b/arch/inst/Zaamo/amomin.w.yaml
similarity index 99%
rename from arch/inst/A/amomin.w.yaml
rename to arch/inst/Zaamo/amomin.w.yaml
index 0265ca2701..abeea97ffd 100644
--- a/arch/inst/A/amomin.w.yaml
+++ b/arch/inst/Zaamo/amomin.w.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Signed compare the least-significant word of register _rs2_ to the loaded value, and select the minimum value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 10000------------010-----0101111
diff --git a/arch/inst/A/amominu.d.yaml b/arch/inst/Zaamo/amominu.d.yaml
similarity index 99%
rename from arch/inst/A/amominu.d.yaml
rename to arch/inst/Zaamo/amominu.d.yaml
index 126d7e7b3a..4b7bf9b7fc 100644
--- a/arch/inst/A/amominu.d.yaml
+++ b/arch/inst/Zaamo/amominu.d.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * Unsigned compare the value of register _rs2_ to the loaded value, and select the minimum value
     * Write the minimum to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:
diff --git a/arch/inst/A/amominu.w.yaml b/arch/inst/Zaamo/amominu.w.yaml
similarity index 99%
rename from arch/inst/A/amominu.w.yaml
rename to arch/inst/Zaamo/amominu.w.yaml
index 07da0f3b41..7d46e25dac 100644
--- a/arch/inst/A/amominu.w.yaml
+++ b/arch/inst/Zaamo/amominu.w.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * Unsigned compare the least-significant word of register _rs2_ to the loaded word, and select the minimum value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 11000------------010-----0101111
diff --git a/arch/inst/A/amoor.d.yaml b/arch/inst/Zaamo/amoor.d.yaml
similarity index 99%
rename from arch/inst/A/amoor.d.yaml
rename to arch/inst/Zaamo/amoor.d.yaml
index ae08f92550..10d22a4411 100644
--- a/arch/inst/A/amoor.d.yaml
+++ b/arch/inst/Zaamo/amoor.d.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * OR the value of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:
diff --git a/arch/inst/A/amoor.w.yaml b/arch/inst/Zaamo/amoor.w.yaml
similarity index 99%
rename from arch/inst/A/amoor.w.yaml
rename to arch/inst/Zaamo/amoor.w.yaml
index 61e168d7fe..b67e900688 100644
--- a/arch/inst/A/amoor.w.yaml
+++ b/arch/inst/Zaamo/amoor.w.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * OR the least-significant word of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 01000------------010-----0101111
diff --git a/arch/inst/A/amoswap.d.yaml b/arch/inst/Zaamo/amoswap.d.yaml
similarity index 99%
rename from arch/inst/A/amoswap.d.yaml
rename to arch/inst/Zaamo/amoswap.d.yaml
index 2870a1def0..354c36933d 100644
--- a/arch/inst/A/amoswap.d.yaml
+++ b/arch/inst/Zaamo/amoswap.d.yaml
@@ -10,8 +10,7 @@ description: |
     * Load the doubleword at address _rs1_
     * Write the value into _rd_
     * Store the value of register _rs2_ to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:
diff --git a/arch/inst/A/amoswap.w.yaml b/arch/inst/Zaamo/amoswap.w.yaml
similarity index 99%
rename from arch/inst/A/amoswap.w.yaml
rename to arch/inst/Zaamo/amoswap.w.yaml
index aa65fe46ad..bcdfb86e6e 100644
--- a/arch/inst/A/amoswap.w.yaml
+++ b/arch/inst/Zaamo/amoswap.w.yaml
@@ -10,8 +10,7 @@ description: |
     * Load the word at address _rs1_
     * Write the sign-extended value into _rd_
     * Store the least-significant word of register _rs2_ to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 00001------------010-----0101111
diff --git a/arch/inst/A/amoxor.d.yaml b/arch/inst/Zaamo/amoxor.d.yaml
similarity index 99%
rename from arch/inst/A/amoxor.d.yaml
rename to arch/inst/Zaamo/amoxor.d.yaml
index 33c913edc3..c0112d6715 100644
--- a/arch/inst/A/amoxor.d.yaml
+++ b/arch/inst/Zaamo/amoxor.d.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the loaded value into _rd_
     * XOR the value of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 base: 64
 assembly: xd, xs2, (xrs1)
 encoding:
diff --git a/arch/inst/A/amoxor.w.yaml b/arch/inst/Zaamo/amoxor.w.yaml
similarity index 99%
rename from arch/inst/A/amoxor.w.yaml
rename to arch/inst/Zaamo/amoxor.w.yaml
index a1cf2fe6d6..e66519a076 100644
--- a/arch/inst/A/amoxor.w.yaml
+++ b/arch/inst/Zaamo/amoxor.w.yaml
@@ -11,8 +11,7 @@ description: |
     * Write the sign-extended value into _rd_
     * XOR the least-significant word of register _rs2_ to the loaded value
     * Write the result to the address in _rs1_
-definedBy:
-  anyOf: [A, Zaamo]
+definedBy: Zaamo
 assembly: xd, xs2, (xrs1)
 encoding:
   match: 00100------------010-----0101111
diff --git a/arch/inst/A/lr.d.yaml b/arch/inst/Zalrsc/lr.d.yaml
similarity index 99%
rename from arch/inst/A/lr.d.yaml
rename to arch/inst/Zalrsc/lr.d.yaml
index cbfa86455f..9cba02f125 100644
--- a/arch/inst/A/lr.d.yaml
+++ b/arch/inst/Zalrsc/lr.d.yaml
@@ -42,8 +42,7 @@ description: |
   Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
   LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
   with both bits clear, but may result in lower performance.
-definedBy:
-  anyOf: [A, Zalrsc]
+definedBy: Zalrsc
 base: 64
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/A/lr.w.yaml b/arch/inst/Zalrsc/lr.w.yaml
similarity index 99%
rename from arch/inst/A/lr.w.yaml
rename to arch/inst/Zalrsc/lr.w.yaml
index 5de757e58a..15645d1edf 100644
--- a/arch/inst/A/lr.w.yaml
+++ b/arch/inst/Zalrsc/lr.w.yaml
@@ -47,8 +47,7 @@ description: |
   Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
   LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
   with both bits clear, but may result in lower performance.
-definedBy:
-  anyOf: [A, Zalrsc]
+definedBy: Zalrsc
 assembly: xd, xs1
 encoding:
   match: 00010--00000-----010-----0101111
diff --git a/arch/inst/A/sc.d.yaml b/arch/inst/Zalrsc/sc.d.yaml
similarity index 99%
rename from arch/inst/A/sc.d.yaml
rename to arch/inst/Zalrsc/sc.d.yaml
index 1816673511..5c54d4b761 100644
--- a/arch/inst/A/sc.d.yaml
+++ b/arch/inst/Zalrsc/sc.d.yaml
@@ -98,8 +98,7 @@ description: |
   Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
   LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
   with both bits clear, but may result in lower performance.
-definedBy:
-  anyOf: [A, Zalrsc]
+definedBy: Zalrsc
 base: 64
 assembly: xd, xs2, xs1
 encoding:
diff --git a/arch/inst/A/sc.w.yaml b/arch/inst/Zalrsc/sc.w.yaml
similarity index 99%
rename from arch/inst/A/sc.w.yaml
rename to arch/inst/Zalrsc/sc.w.yaml
index 019f8de403..67d8bc0a35 100644
--- a/arch/inst/A/sc.w.yaml
+++ b/arch/inst/Zalrsc/sc.w.yaml
@@ -104,8 +104,7 @@ description: |
   Software should not set the _rl_ bit on an LR instruction unless the _aq_ bit is also set.
   LR.rl and SC.aq instructions are not guaranteed to provide any stronger ordering than those
   with both bits clear, but may result in lower performance.
-definedBy:
-  anyOf: [A, Zalrsc]
+definedBy: Zalrsc
 assembly: xd, xs2, xs1
 encoding:
   match: 00011------------010-----0101111
diff --git a/arch/inst/B/add.uw.yaml b/arch/inst/Zba/add.uw.yaml
similarity index 97%
rename from arch/inst/B/add.uw.yaml
rename to arch/inst/Zba/add.uw.yaml
index 280009ffc0..2ce32623b9 100644
--- a/arch/inst/B/add.uw.yaml
+++ b/arch/inst/Zba/add.uw.yaml
@@ -8,8 +8,7 @@ base: 64
 description: |
   This instruction performs an XLEN-wide addition between rs2 and the
   zero-extended least-significant word of rs1.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
   match: 0000100----------000-----0111011
diff --git a/arch/inst/B/sh1add.uw.yaml b/arch/inst/Zba/sh1add.uw.yaml
similarity index 98%
rename from arch/inst/B/sh1add.uw.yaml
rename to arch/inst/Zba/sh1add.uw.yaml
index 9904ec0d84..58fb301233 100644
--- a/arch/inst/B/sh1add.uw.yaml
+++ b/arch/inst/Zba/sh1add.uw.yaml
@@ -8,8 +8,7 @@ description: |
   This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 1 place.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 base: 64
 encoding:
   match: 0010000----------010-----0111011
diff --git a/arch/inst/B/sh1add.yaml b/arch/inst/Zba/sh1add.yaml
similarity index 97%
rename from arch/inst/B/sh1add.yaml
rename to arch/inst/Zba/sh1add.yaml
index 4e7c7c0918..9361be33ae 100644
--- a/arch/inst/B/sh1add.yaml
+++ b/arch/inst/Zba/sh1add.yaml
@@ -6,8 +6,7 @@ name: sh1add
 long_name: Shift left by 1 and add
 description: |
   This instruction shifts `rs1` to the left by 1 bit and adds it to `rs2`.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
   match: 0010000----------010-----0110011
diff --git a/arch/inst/B/sh2add.uw.yaml b/arch/inst/Zba/sh2add.uw.yaml
similarity index 98%
rename from arch/inst/B/sh2add.uw.yaml
rename to arch/inst/Zba/sh2add.uw.yaml
index f50b38d660..b6dbddfc99 100644
--- a/arch/inst/B/sh2add.uw.yaml
+++ b/arch/inst/Zba/sh2add.uw.yaml
@@ -8,8 +8,7 @@ description: |
   This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 2 places.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 base: 64
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/B/sh2add.yaml b/arch/inst/Zba/sh2add.yaml
similarity index 97%
rename from arch/inst/B/sh2add.yaml
rename to arch/inst/Zba/sh2add.yaml
index bd27c41858..3f2bac8c7c 100644
--- a/arch/inst/B/sh2add.yaml
+++ b/arch/inst/Zba/sh2add.yaml
@@ -6,8 +6,7 @@ name: sh2add
 long_name: Shift left by 2 and add
 description: |
   This instruction shifts `rs1` to the left by 2 places and adds it to `rs2`.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
   match: 0010000----------100-----0110011
diff --git a/arch/inst/B/sh3add.uw.yaml b/arch/inst/Zba/sh3add.uw.yaml
similarity index 98%
rename from arch/inst/B/sh3add.uw.yaml
rename to arch/inst/Zba/sh3add.uw.yaml
index 6299b8c202..a5e1c9e597 100644
--- a/arch/inst/B/sh3add.uw.yaml
+++ b/arch/inst/Zba/sh3add.uw.yaml
@@ -8,8 +8,7 @@ description: |
   This instruction performs an XLEN-wide addition of two addends. The first addend is rs2.
   The second addend is the unsigned value formed by extracting the least-significant word of rs1
   and shifting it left by 3 places.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 base: 64
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/B/sh3add.yaml b/arch/inst/Zba/sh3add.yaml
similarity index 97%
rename from arch/inst/B/sh3add.yaml
rename to arch/inst/Zba/sh3add.yaml
index c4a67e1aa6..2c9a9a7bef 100644
--- a/arch/inst/B/sh3add.yaml
+++ b/arch/inst/Zba/sh3add.yaml
@@ -6,8 +6,7 @@ name: sh3add
 long_name: Shift left by 3 and add
 description: |
   This instruction shifts `rs1` to the left by 3 places and adds it to `rs2`.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 assembly: xd, xs1, xs2
 encoding:
   match: 0010000----------110-----0110011
diff --git a/arch/inst/B/slli.uw.yaml b/arch/inst/Zba/slli.uw.yaml
similarity index 97%
rename from arch/inst/B/slli.uw.yaml
rename to arch/inst/Zba/slli.uw.yaml
index 330294c336..1040cbc988 100644
--- a/arch/inst/B/slli.uw.yaml
+++ b/arch/inst/Zba/slli.uw.yaml
@@ -10,8 +10,7 @@ description: |
 
   [NOTE]
   This instruction is the same as `slli` with `zext.w` performed on rs1 before shifting.
-definedBy:
-  anyOf: [B, Zba]
+definedBy: Zba
 base: 64
 encoding:
   match: 000010-----------001-----0011011
diff --git a/arch/inst/B/clz.yaml b/arch/inst/Zbb/clz.yaml
similarity index 97%
rename from arch/inst/B/clz.yaml
rename to arch/inst/Zbb/clz.yaml
index 1918c58ef2..51a0490897 100644
--- a/arch/inst/B/clz.yaml
+++ b/arch/inst/Zbb/clz.yaml
@@ -9,8 +9,7 @@ description: |
   starting at the most-significant bit (i.e., XLEN-1) and progressing to bit 0.
   Accordingly, if the input is 0, the output is XLEN, and if the most-significant
   bit of the input is a 1, the output is 0.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1
 encoding:
   match: 011000000000-----001-----0010011
diff --git a/arch/inst/B/clzw.yaml b/arch/inst/Zbb/clzw.yaml
similarity index 97%
rename from arch/inst/B/clzw.yaml
rename to arch/inst/Zbb/clzw.yaml
index 4e981b498b..a35f0fc390 100644
--- a/arch/inst/B/clzw.yaml
+++ b/arch/inst/Zbb/clzw.yaml
@@ -9,8 +9,7 @@ description: |
   Accordingly, if the least-significant word is 0, the output is 32, and if the most-significant
   bit of the word (_i.e._, bit 31) is a 1, the output is 0.
 base: 64
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1
 encoding:
   match: 011000000000-----001-----0011011
diff --git a/arch/inst/B/cpop.yaml b/arch/inst/Zbb/cpop.yaml
similarity index 98%
rename from arch/inst/B/cpop.yaml
rename to arch/inst/Zbb/cpop.yaml
index ce2cddcfc2..f04b8ff7ad 100644
--- a/arch/inst/B/cpop.yaml
+++ b/arch/inst/Zbb/cpop.yaml
@@ -18,8 +18,7 @@ description: |
   function `__builtin_popcountl (unsigned long x)` for LP64 is
   implemented by cpop on RV64.
   ----
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1
 encoding:
   match: 011000000010-----001-----0010011
diff --git a/arch/inst/B/cpopw.yaml b/arch/inst/Zbb/cpopw.yaml
similarity index 98%
rename from arch/inst/B/cpopw.yaml
rename to arch/inst/Zbb/cpopw.yaml
index 8c4a4a876f..fa26c81c92 100644
--- a/arch/inst/B/cpopw.yaml
+++ b/arch/inst/Zbb/cpopw.yaml
@@ -18,8 +18,7 @@ description: |
   function `__builtin_popcountl (unsigned long x)` for LP64 is
   implemented by cpop on RV64.
   ----
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 base: 64
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/B/ctz.yaml b/arch/inst/Zbb/ctz.yaml
similarity index 98%
rename from arch/inst/B/ctz.yaml
rename to arch/inst/Zbb/ctz.yaml
index 94acf5e6ae..fa1d024a38 100644
--- a/arch/inst/B/ctz.yaml
+++ b/arch/inst/Zbb/ctz.yaml
@@ -10,8 +10,7 @@ description: |
   to the most-significant bit (i.e., XLEN-1). Accordingly, if the
   input is 0, the output is XLEN, and if the least-significant bit
   of the input is a 1, the output is 0.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1
 encoding:
   match: 011000000001-----001-----0010011
diff --git a/arch/inst/B/ctzw.yaml b/arch/inst/Zbb/ctzw.yaml
similarity index 98%
rename from arch/inst/B/ctzw.yaml
rename to arch/inst/Zbb/ctzw.yaml
index 7671c70399..5790200176 100644
--- a/arch/inst/B/ctzw.yaml
+++ b/arch/inst/Zbb/ctzw.yaml
@@ -10,8 +10,7 @@ description: |
   to the most-significant bit of the least-significant word (i.e., 31). Accordingly, if the
   least-significant word is 0, the output is 32, and if the least-significant bit
   of the input is a 1, the output is 0.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 base: 64
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/B/max.yaml b/arch/inst/Zbb/max.yaml
similarity index 98%
rename from arch/inst/B/max.yaml
rename to arch/inst/Zbb/max.yaml
index cc64f2ea63..d37094d7cd 100644
--- a/arch/inst/B/max.yaml
+++ b/arch/inst/Zbb/max.yaml
@@ -14,8 +14,7 @@ description: |
   common sequence, it is suggested that they are scheduled with no intervening
   instructions so that implementations that are so optimized can fuse them
   together.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1, xs2
 encoding:
   match: 0000101----------110-----0110011
diff --git a/arch/inst/B/maxu.yaml b/arch/inst/Zbb/maxu.yaml
similarity index 98%
rename from arch/inst/B/maxu.yaml
rename to arch/inst/Zbb/maxu.yaml
index c7659e253e..499a422f13 100644
--- a/arch/inst/B/maxu.yaml
+++ b/arch/inst/Zbb/maxu.yaml
@@ -6,8 +6,7 @@ name: maxu
 long_name: Unsigned maximum
 description: |
   This instruction returns the larger of two unsigned integers.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1, xs2
 encoding:
   match: 0000101----------111-----0110011
diff --git a/arch/inst/B/min.yaml b/arch/inst/Zbb/min.yaml
similarity index 98%
rename from arch/inst/B/min.yaml
rename to arch/inst/Zbb/min.yaml
index b9c0dc07c2..8f9f9c212e 100644
--- a/arch/inst/B/min.yaml
+++ b/arch/inst/Zbb/min.yaml
@@ -6,8 +6,7 @@ name: min
 long_name: Minimum
 description: |
   This instruction returns the smaller of two signed integers.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1, xs2
 encoding:
   match: 0000101----------100-----0110011
diff --git a/arch/inst/B/minu.yaml b/arch/inst/Zbb/minu.yaml
similarity index 98%
rename from arch/inst/B/minu.yaml
rename to arch/inst/Zbb/minu.yaml
index 8803843877..33844561d3 100644
--- a/arch/inst/B/minu.yaml
+++ b/arch/inst/Zbb/minu.yaml
@@ -6,8 +6,7 @@ name: minu
 long_name: Unsigned minimum
 description: |
   This instruction returns the smaller of two unsigned integers.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1, xs2
 encoding:
   match: 0000101----------101-----0110011
diff --git a/arch/inst/B/orc.b.yaml b/arch/inst/Zbb/orc.b.yaml
similarity index 98%
rename from arch/inst/B/orc.b.yaml
rename to arch/inst/Zbb/orc.b.yaml
index f1f93539ee..9749ea2492 100644
--- a/arch/inst/B/orc.b.yaml
+++ b/arch/inst/Zbb/orc.b.yaml
@@ -8,8 +8,7 @@ description: |
   Combines the bits within each byte using bitwise logical OR. This sets the bits
   of each byte in the result rd to all zeros if no bit within the respective byte
   of rs is set, or to all ones if any bit within the respective byte of rs is set.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1, xs2
 encoding:
   match: 001010000111-----101-----0010011
diff --git a/arch/inst/B/sext.b.yaml b/arch/inst/Zbb/sext.b.yaml
similarity index 97%
rename from arch/inst/B/sext.b.yaml
rename to arch/inst/Zbb/sext.b.yaml
index 7b75c57a25..6c3816e42d 100644
--- a/arch/inst/B/sext.b.yaml
+++ b/arch/inst/Zbb/sext.b.yaml
@@ -7,8 +7,7 @@ long_name: Sign-extend byte
 description: |
   This instruction sign-extends the least-significant byte in the source to XLEN by copying the
   most-significant bit in the byte (i.e., bit 7) to all of the more-significant bits.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1
 encoding:
   match: 011000000100-----001-----0010011
diff --git a/arch/inst/B/sext.h.yaml b/arch/inst/Zbb/sext.h.yaml
similarity index 97%
rename from arch/inst/B/sext.h.yaml
rename to arch/inst/Zbb/sext.h.yaml
index fb35680f9e..e58497c98b 100644
--- a/arch/inst/B/sext.h.yaml
+++ b/arch/inst/Zbb/sext.h.yaml
@@ -7,8 +7,7 @@ long_name: Sign-extend halfword
 description: |
   This instruction sign-extends the least-significant halfword in the source to XLEN by copying the
   most-significant bit in the halfword (i.e., bit 15) to all of the more-significant bits.
-definedBy:
-  anyOf: [B, Zbb]
+definedBy: Zbb
 assembly: xd, xs1
 encoding:
   match: 011000000101-----001-----0010011
diff --git a/arch/inst/B/zext.h.yaml b/arch/inst/Zbb/zext.h.yaml
similarity index 91%
rename from arch/inst/B/zext.h.yaml
rename to arch/inst/Zbb/zext.h.yaml
index 083639854a..a1e0006188 100644
--- a/arch/inst/B/zext.h.yaml
+++ b/arch/inst/Zbb/zext.h.yaml
@@ -14,11 +14,10 @@ description: |
   [NOTE]
   The *zext.h* instruction is a pseudo-op for `packw` when `Zbkb` is implemented and XLEN == 64.
 definedBy:
-  # when The bitmanip cryptography extensions are implemented, then zext.h is an alias
+  # When The Bit-manipulation for Cryptography extension (Zbkb) is implemented, then zext.h is an alias of pack.
   allOf:
-    - not:
-        anyOf: [Zbkb, Zk, Zkn, Zks]
-    - anyOf: [B, Zbb]
+    - Zbb
+    - not: Zbkb
 encoding:
   RV32:
     match: 000010000000-----100-----0110011
diff --git a/arch/inst/B/clmulr.yaml b/arch/inst/Zbc/clmulr.yaml
similarity index 100%
rename from arch/inst/B/clmulr.yaml
rename to arch/inst/Zbc/clmulr.yaml
diff --git a/arch/inst/Zk/pack.yaml b/arch/inst/Zbkb/pack.yaml
similarity index 93%
rename from arch/inst/Zk/pack.yaml
rename to arch/inst/Zbkb/pack.yaml
index c54a9a24ac..9d7b2e1bb3 100644
--- a/arch/inst/Zk/pack.yaml
+++ b/arch/inst/Zbkb/pack.yaml
@@ -6,8 +6,7 @@ name: pack
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zbkb, Zk, Zkn, Zks]
+definedBy: Zbkb
 assembly: xd, xs1, xs2
 encoding:
   match: 0000100----------100-----0110011
diff --git a/arch/inst/Zk/packh.yaml b/arch/inst/Zbkb/packh.yaml
similarity index 92%
rename from arch/inst/Zk/packh.yaml
rename to arch/inst/Zbkb/packh.yaml
index a2b058ffda..d4af912243 100644
--- a/arch/inst/Zk/packh.yaml
+++ b/arch/inst/Zbkb/packh.yaml
@@ -6,8 +6,7 @@ name: packh
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zbkb, Zk, Zkn, Zks]
+definedBy: Zbkb
 assembly: xd, xs1, xs2
 encoding:
   match: 0000100----------111-----0110011
diff --git a/arch/inst/Zk/packw.yaml b/arch/inst/Zbkb/packw.yaml
similarity index 93%
rename from arch/inst/Zk/packw.yaml
rename to arch/inst/Zbkb/packw.yaml
index 2005a5f04d..6c3829ac9d 100644
--- a/arch/inst/Zk/packw.yaml
+++ b/arch/inst/Zbkb/packw.yaml
@@ -6,8 +6,7 @@ name: packw
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zbkb, Zk, Zkn, Zks]
+definedBy: Zbkb
 base: 64
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/B/bclr.yaml b/arch/inst/Zbs/bclr.yaml
similarity index 98%
rename from arch/inst/B/bclr.yaml
rename to arch/inst/Zbs/bclr.yaml
index b8565583c9..9643e0ab38 100644
--- a/arch/inst/B/bclr.yaml
+++ b/arch/inst/Zbs/bclr.yaml
@@ -7,8 +7,7 @@ long_name: Single-Bit clear (Register)
 description: |
   This instruction returns rs1 with a single bit cleared at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of rs2.
-definedBy:
-  anyOf: [B, Zbs]
+definedBy: Zbs
 assembly: xd, xs1, xs2
 encoding:
   match: 0100100----------001-----0110011
diff --git a/arch/inst/B/bclri.yaml b/arch/inst/Zbs/bclri.yaml
similarity index 98%
rename from arch/inst/B/bclri.yaml
rename to arch/inst/Zbs/bclri.yaml
index ec66a8cebc..90686768bf 100644
--- a/arch/inst/B/bclri.yaml
+++ b/arch/inst/Zbs/bclri.yaml
@@ -8,8 +8,7 @@ description: |
   This instruction returns rs1 with a single bit cleared at the index specified in shamt. The
   index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding
   to shamt[5]=1 are reserved.
-definedBy:
-  anyOf: [B, Zbs]
+definedBy: Zbs
 assembly: xd, xs1, shamt
 encoding:
   RV32:
diff --git a/arch/inst/B/bext.yaml b/arch/inst/Zbs/bext.yaml
similarity index 98%
rename from arch/inst/B/bext.yaml
rename to arch/inst/Zbs/bext.yaml
index 7b69ce0f73..717ce7c1fc 100644
--- a/arch/inst/B/bext.yaml
+++ b/arch/inst/Zbs/bext.yaml
@@ -7,8 +7,7 @@ long_name: Single-Bit extract (Register)
 description: |
   This instruction returns a single bit extracted from rs1 at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of rs2.
-definedBy:
-  anyOf: [B, Zbs]
+definedBy: Zbs
 assembly: xd, xs1, xs2
 encoding:
   match: 0100100----------101-----0110011
diff --git a/arch/inst/B/bexti.yaml b/arch/inst/Zbs/bexti.yaml
similarity index 98%
rename from arch/inst/B/bexti.yaml
rename to arch/inst/Zbs/bexti.yaml
index 1f1a898bab..90b0e04964 100644
--- a/arch/inst/B/bexti.yaml
+++ b/arch/inst/Zbs/bexti.yaml
@@ -8,8 +8,7 @@ description: |
   This instruction returns a single bit extracted from rs1 at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings
   corresponding to shamt[5]=1 are reserved.
-definedBy:
-  anyOf: [B, Zbs]
+definedBy: Zbs
 assembly: xd, xs1, shamt
 encoding:
   RV32:
diff --git a/arch/inst/B/binv.yaml b/arch/inst/Zbs/binv.yaml
similarity index 98%
rename from arch/inst/B/binv.yaml
rename to arch/inst/Zbs/binv.yaml
index d7022ebd04..038d9201cd 100644
--- a/arch/inst/B/binv.yaml
+++ b/arch/inst/Zbs/binv.yaml
@@ -7,8 +7,7 @@ long_name: Single-Bit invert (Register)
 description: |
   This instruction returns rs1 with a single bit inverted at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of rs2.
-definedBy:
-  anyOf: [B, Zbs]
+definedBy: Zbs
 assembly: xd, xs1, xs2
 encoding:
   match: 0110100----------001-----0110011
diff --git a/arch/inst/B/binvi.yaml b/arch/inst/Zbs/binvi.yaml
similarity index 98%
rename from arch/inst/B/binvi.yaml
rename to arch/inst/Zbs/binvi.yaml
index 58c3def7ff..0a3febe056 100644
--- a/arch/inst/B/binvi.yaml
+++ b/arch/inst/Zbs/binvi.yaml
@@ -8,8 +8,7 @@ description: |
   This instruction returns rs1 with a single bit inverted at the index specified in shamt.
   The index is read from the lower log2(XLEN) bits of shamt.
   For RV32, the encodings corresponding to shamt[5]=1 are reserved.
-definedBy:
-  anyOf: [B, Zbs]
+definedBy: Zbs
 assembly: xd, xs1, shamt
 encoding:
   RV32:
diff --git a/arch/inst/B/bset.yaml b/arch/inst/Zbs/bset.yaml
similarity index 98%
rename from arch/inst/B/bset.yaml
rename to arch/inst/Zbs/bset.yaml
index 0e840376d7..72cbd79366 100644
--- a/arch/inst/B/bset.yaml
+++ b/arch/inst/Zbs/bset.yaml
@@ -7,8 +7,7 @@ long_name: Single-Bit set (Register)
 description: |
   This instruction returns rs1 with a single bit set at the index specified in rs2.
   The index is read from the lower log2(XLEN) bits of rs2.
-definedBy:
-  anyOf: [B, Zbs]
+definedBy: Zbs
 assembly: xd, xs1, xs2
 encoding:
   match: 0010100----------001-----0110011
diff --git a/arch/inst/B/bseti.yaml b/arch/inst/Zbs/bseti.yaml
similarity index 98%
rename from arch/inst/B/bseti.yaml
rename to arch/inst/Zbs/bseti.yaml
index 7359dcd673..04886d55c3 100644
--- a/arch/inst/B/bseti.yaml
+++ b/arch/inst/Zbs/bseti.yaml
@@ -8,8 +8,7 @@ description: |
   This instruction returns rs1 with a single bit set at the index specified in shamt.
   The index is read from the lower log2(XLEN) bits of shamt.
   For RV32, the encodings corresponding to shamt[5]=1 are reserved.
-definedBy:
-  anyOf: [B, Zbs]
+definedBy: Zbs
 assembly: xd, xs1, shamt
 encoding:
   RV32:
diff --git a/arch/inst/Zk/aes64ks1i.yaml b/arch/inst/Zkn/aes64ks1i.yaml
similarity index 94%
rename from arch/inst/Zk/aes64ks1i.yaml
rename to arch/inst/Zkn/aes64ks1i.yaml
index d311a22b2c..49d448825d 100644
--- a/arch/inst/Zk/aes64ks1i.yaml
+++ b/arch/inst/Zkn/aes64ks1i.yaml
@@ -7,7 +7,7 @@ long_name: No synopsis available.
 description: |
   No description available.
 definedBy:
-  anyOf: [Zk, Zkn, Zknd, Zkne]
+  anyOf: [Zknd, Zkne]
 base: 64
 assembly: xd, xs1, rnum
 encoding:
diff --git a/arch/inst/Zk/aes64ks2.yaml b/arch/inst/Zkn/aes64ks2.yaml
similarity index 94%
rename from arch/inst/Zk/aes64ks2.yaml
rename to arch/inst/Zkn/aes64ks2.yaml
index 686f53dfba..f39602b14a 100644
--- a/arch/inst/Zk/aes64ks2.yaml
+++ b/arch/inst/Zkn/aes64ks2.yaml
@@ -7,7 +7,7 @@ long_name: No synopsis available.
 description: |
   No description available.
 definedBy:
-  anyOf: [Zk, Zkn, Zknd, Zkne]
+  anyOf: [Zknd, Zkne]
 base: 64
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/aes32dsi.yaml b/arch/inst/Zknd/aes32dsi.yaml
similarity index 95%
rename from arch/inst/Zk/aes32dsi.yaml
rename to arch/inst/Zknd/aes32dsi.yaml
index 2dd956f586..b970c0a0f3 100644
--- a/arch/inst/Zk/aes32dsi.yaml
+++ b/arch/inst/Zknd/aes32dsi.yaml
@@ -8,9 +8,7 @@ description: |
   This instruction sources a single byte from `rs2` according to `bs`. To this it applies the inverse AES
   SBox operation, and XOR's the result with `rs1`. This instruction must always be implemented such
   that its execution latency does not depend on the data being operated on.
-
-definedBy:
-  anyOf: [Zk, Zkn, Zknd]
+definedBy: Zknd
 base: 32
 assembly: xd, xs1, xs2, bs
 encoding:
diff --git a/arch/inst/Zk/aes32dsmi.yaml b/arch/inst/Zknd/aes32dsmi.yaml
similarity index 96%
rename from arch/inst/Zk/aes32dsmi.yaml
rename to arch/inst/Zknd/aes32dsmi.yaml
index 1bd5eaee09..db01a5e18e 100644
--- a/arch/inst/Zk/aes32dsmi.yaml
+++ b/arch/inst/Zknd/aes32dsmi.yaml
@@ -9,8 +9,7 @@ description: |
   SBox operation, and a partial inverse MixColumn, before XOR'ing the result with `rs1`. This
   instruction must always be implemented such that its execution latency does not depend on the
   data being operated on.
-definedBy:
-  anyOf: [Zk, Zkn, Zknd]
+definedBy: Zknd
 base: 32
 assembly: xd, xs1, xs2, bs
 encoding:
diff --git a/arch/inst/Zk/aes64ds.yaml b/arch/inst/Zknd/aes64ds.yaml
similarity index 93%
rename from arch/inst/Zk/aes64ds.yaml
rename to arch/inst/Zknd/aes64ds.yaml
index 6248ebfd12..03e4b910fe 100644
--- a/arch/inst/Zk/aes64ds.yaml
+++ b/arch/inst/Zknd/aes64ds.yaml
@@ -6,8 +6,7 @@ name: aes64ds
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknd]
+definedBy: Zknd
 base: 64
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/aes64dsm.yaml b/arch/inst/Zknd/aes64dsm.yaml
similarity index 93%
rename from arch/inst/Zk/aes64dsm.yaml
rename to arch/inst/Zknd/aes64dsm.yaml
index 99c004352d..a6928403a9 100644
--- a/arch/inst/Zk/aes64dsm.yaml
+++ b/arch/inst/Zknd/aes64dsm.yaml
@@ -6,8 +6,7 @@ name: aes64dsm
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknd]
+definedBy: Zknd
 base: 64
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/aes64im.yaml b/arch/inst/Zknd/aes64im.yaml
similarity index 92%
rename from arch/inst/Zk/aes64im.yaml
rename to arch/inst/Zknd/aes64im.yaml
index ea3c8050b6..f3a3245b51 100644
--- a/arch/inst/Zk/aes64im.yaml
+++ b/arch/inst/Zknd/aes64im.yaml
@@ -6,8 +6,7 @@ name: aes64im
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknd]
+definedBy: Zknd
 base: 64
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/Zk/aes32esi.yaml b/arch/inst/Zkne/aes32esi.yaml
similarity index 93%
rename from arch/inst/Zk/aes32esi.yaml
rename to arch/inst/Zkne/aes32esi.yaml
index e0c5713759..04f4f39b7f 100644
--- a/arch/inst/Zk/aes32esi.yaml
+++ b/arch/inst/Zkne/aes32esi.yaml
@@ -6,8 +6,7 @@ name: aes32esi
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zkne]
+definedBy: Zkne
 base: 32
 assembly: xd, xs1, xs2, bs
 encoding:
diff --git a/arch/inst/Zk/aes32esmi.yaml b/arch/inst/Zkne/aes32esmi.yaml
similarity index 93%
rename from arch/inst/Zk/aes32esmi.yaml
rename to arch/inst/Zkne/aes32esmi.yaml
index 1b875fbe6a..9c4c4cd247 100644
--- a/arch/inst/Zk/aes32esmi.yaml
+++ b/arch/inst/Zkne/aes32esmi.yaml
@@ -6,8 +6,7 @@ name: aes32esmi
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zkne]
+definedBy: Zkne
 base: 32
 assembly: xd, xs1, xs2, bs
 encoding:
diff --git a/arch/inst/Zk/aes64es.yaml b/arch/inst/Zkne/aes64es.yaml
similarity index 93%
rename from arch/inst/Zk/aes64es.yaml
rename to arch/inst/Zkne/aes64es.yaml
index 7f3d1b259d..cbe12f6ccd 100644
--- a/arch/inst/Zk/aes64es.yaml
+++ b/arch/inst/Zkne/aes64es.yaml
@@ -6,8 +6,7 @@ name: aes64es
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zkne]
+definedBy: Zkne
 base: 64
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/aes64esm.yaml b/arch/inst/Zkne/aes64esm.yaml
similarity index 93%
rename from arch/inst/Zk/aes64esm.yaml
rename to arch/inst/Zkne/aes64esm.yaml
index d46b1d9cad..b223d4daec 100644
--- a/arch/inst/Zk/aes64esm.yaml
+++ b/arch/inst/Zkne/aes64esm.yaml
@@ -6,8 +6,7 @@ name: aes64esm
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zkne]
+definedBy: Zkne
 base: 64
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/sha256sig0.yaml b/arch/inst/Zknh/sha256sig0.yaml
similarity index 92%
rename from arch/inst/Zk/sha256sig0.yaml
rename to arch/inst/Zknh/sha256sig0.yaml
index 47d1b88db0..4f9f876f39 100644
--- a/arch/inst/Zk/sha256sig0.yaml
+++ b/arch/inst/Zknh/sha256sig0.yaml
@@ -6,8 +6,7 @@ name: sha256sig0
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 assembly: xd, xs1
 encoding:
   match: 000100000010-----001-----0010011
diff --git a/arch/inst/Zk/sha256sig1.yaml b/arch/inst/Zknh/sha256sig1.yaml
similarity index 92%
rename from arch/inst/Zk/sha256sig1.yaml
rename to arch/inst/Zknh/sha256sig1.yaml
index 84b3b88275..cf8533015d 100644
--- a/arch/inst/Zk/sha256sig1.yaml
+++ b/arch/inst/Zknh/sha256sig1.yaml
@@ -6,8 +6,7 @@ name: sha256sig1
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 assembly: xd, xs1
 encoding:
   match: 000100000011-----001-----0010011
diff --git a/arch/inst/Zk/sha256sum0.yaml b/arch/inst/Zknh/sha256sum0.yaml
similarity index 92%
rename from arch/inst/Zk/sha256sum0.yaml
rename to arch/inst/Zknh/sha256sum0.yaml
index d46b5b9365..9070930c2c 100644
--- a/arch/inst/Zk/sha256sum0.yaml
+++ b/arch/inst/Zknh/sha256sum0.yaml
@@ -6,8 +6,7 @@ name: sha256sum0
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 assembly: xd, xs1
 encoding:
   match: 000100000000-----001-----0010011
diff --git a/arch/inst/Zk/sha256sum1.yaml b/arch/inst/Zknh/sha256sum1.yaml
similarity index 92%
rename from arch/inst/Zk/sha256sum1.yaml
rename to arch/inst/Zknh/sha256sum1.yaml
index 0fa39a82eb..5abbe3d7f8 100644
--- a/arch/inst/Zk/sha256sum1.yaml
+++ b/arch/inst/Zknh/sha256sum1.yaml
@@ -6,8 +6,7 @@ name: sha256sum1
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 assembly: xd, xs1
 encoding:
   match: 000100000001-----001-----0010011
diff --git a/arch/inst/Zk/sha512sig0.yaml b/arch/inst/Zknh/sha512sig0.yaml
similarity index 92%
rename from arch/inst/Zk/sha512sig0.yaml
rename to arch/inst/Zknh/sha512sig0.yaml
index 231ed7343f..261a3992bf 100644
--- a/arch/inst/Zk/sha512sig0.yaml
+++ b/arch/inst/Zknh/sha512sig0.yaml
@@ -6,8 +6,7 @@ name: sha512sig0
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 64
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/Zk/sha512sig0h.yaml b/arch/inst/Zknh/sha512sig0h.yaml
similarity index 93%
rename from arch/inst/Zk/sha512sig0h.yaml
rename to arch/inst/Zknh/sha512sig0h.yaml
index 87afa16555..f12cf609bd 100644
--- a/arch/inst/Zk/sha512sig0h.yaml
+++ b/arch/inst/Zknh/sha512sig0h.yaml
@@ -6,8 +6,7 @@ name: sha512sig0h
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 32
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/sha512sig0l.yaml b/arch/inst/Zknh/sha512sig0l.yaml
similarity index 93%
rename from arch/inst/Zk/sha512sig0l.yaml
rename to arch/inst/Zknh/sha512sig0l.yaml
index 334ee2dd4b..fe680cd5a6 100644
--- a/arch/inst/Zk/sha512sig0l.yaml
+++ b/arch/inst/Zknh/sha512sig0l.yaml
@@ -6,8 +6,7 @@ name: sha512sig0l
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 32
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/sha512sig1.yaml b/arch/inst/Zknh/sha512sig1.yaml
similarity index 92%
rename from arch/inst/Zk/sha512sig1.yaml
rename to arch/inst/Zknh/sha512sig1.yaml
index 3718f078a2..f51a5ce217 100644
--- a/arch/inst/Zk/sha512sig1.yaml
+++ b/arch/inst/Zknh/sha512sig1.yaml
@@ -6,8 +6,7 @@ name: sha512sig1
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 64
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/Zk/sha512sig1h.yaml b/arch/inst/Zknh/sha512sig1h.yaml
similarity index 93%
rename from arch/inst/Zk/sha512sig1h.yaml
rename to arch/inst/Zknh/sha512sig1h.yaml
index 24b35db5f8..4a5f782539 100644
--- a/arch/inst/Zk/sha512sig1h.yaml
+++ b/arch/inst/Zknh/sha512sig1h.yaml
@@ -6,8 +6,7 @@ name: sha512sig1h
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 32
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/sha512sig1l.yaml b/arch/inst/Zknh/sha512sig1l.yaml
similarity index 93%
rename from arch/inst/Zk/sha512sig1l.yaml
rename to arch/inst/Zknh/sha512sig1l.yaml
index bc4b7957c7..36380530cd 100644
--- a/arch/inst/Zk/sha512sig1l.yaml
+++ b/arch/inst/Zknh/sha512sig1l.yaml
@@ -6,8 +6,7 @@ name: sha512sig1l
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 32
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/sha512sum0.yaml b/arch/inst/Zknh/sha512sum0.yaml
similarity index 92%
rename from arch/inst/Zk/sha512sum0.yaml
rename to arch/inst/Zknh/sha512sum0.yaml
index 991dd57c4f..2a2c20a320 100644
--- a/arch/inst/Zk/sha512sum0.yaml
+++ b/arch/inst/Zknh/sha512sum0.yaml
@@ -6,8 +6,7 @@ name: sha512sum0
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 64
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/Zk/sha512sum0r.yaml b/arch/inst/Zknh/sha512sum0r.yaml
similarity index 93%
rename from arch/inst/Zk/sha512sum0r.yaml
rename to arch/inst/Zknh/sha512sum0r.yaml
index b73a79036b..08392e637f 100644
--- a/arch/inst/Zk/sha512sum0r.yaml
+++ b/arch/inst/Zknh/sha512sum0r.yaml
@@ -6,8 +6,7 @@ name: sha512sum0r
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 32
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zk/sha512sum1.yaml b/arch/inst/Zknh/sha512sum1.yaml
similarity index 92%
rename from arch/inst/Zk/sha512sum1.yaml
rename to arch/inst/Zknh/sha512sum1.yaml
index 320f1dab51..b267bb740a 100644
--- a/arch/inst/Zk/sha512sum1.yaml
+++ b/arch/inst/Zknh/sha512sum1.yaml
@@ -6,8 +6,7 @@ name: sha512sum1
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 64
 assembly: xd, xs1
 encoding:
diff --git a/arch/inst/Zk/sha512sum1r.yaml b/arch/inst/Zknh/sha512sum1r.yaml
similarity index 93%
rename from arch/inst/Zk/sha512sum1r.yaml
rename to arch/inst/Zknh/sha512sum1r.yaml
index 5ecc1074b2..145a2b07d0 100644
--- a/arch/inst/Zk/sha512sum1r.yaml
+++ b/arch/inst/Zknh/sha512sum1r.yaml
@@ -6,8 +6,7 @@ name: sha512sum1r
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zk, Zkn, Zknh]
+definedBy: Zknh
 base: 32
 assembly: xd, xs1, xs2
 encoding:
diff --git a/arch/inst/Zvbb/vandn.vv.yaml b/arch/inst/Zvbb/vandn.vv.yaml
index 44aee74722..3655e0a76c 100644
--- a/arch/inst/Zvbb/vandn.vv.yaml
+++ b/arch/inst/Zvbb/vandn.vv.yaml
@@ -6,8 +6,7 @@ name: vandn.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vs1, vd
 encoding:
   match: 000001-----------000-----1010111
diff --git a/arch/inst/Zvbb/vandn.vx.yaml b/arch/inst/Zvbb/vandn.vx.yaml
index 494371e1d2..1ab945e10d 100644
--- a/arch/inst/Zvbb/vandn.vx.yaml
+++ b/arch/inst/Zvbb/vandn.vx.yaml
@@ -6,8 +6,7 @@ name: vandn.vx
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, xs1, vd
 encoding:
   match: 000001-----------100-----1010111
diff --git a/arch/inst/Zvbb/vbrev.v.yaml b/arch/inst/Zvbb/vbrev.v.yaml
index b37df247cb..16f6772aad 100644
--- a/arch/inst/Zvbb/vbrev.v.yaml
+++ b/arch/inst/Zvbb/vbrev.v.yaml
@@ -6,8 +6,7 @@ name: vbrev.v
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vd
 encoding:
   match: 010010------01010010-----1010111
diff --git a/arch/inst/Zvbb/vbrev8.v.yaml b/arch/inst/Zvbb/vbrev8.v.yaml
index dc0896bae2..9f34fcc50a 100644
--- a/arch/inst/Zvbb/vbrev8.v.yaml
+++ b/arch/inst/Zvbb/vbrev8.v.yaml
@@ -6,8 +6,7 @@ name: vbrev8.v
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vd
 encoding:
   match: 010010------01000010-----1010111
diff --git a/arch/inst/Zvbb/vclz.v.yaml b/arch/inst/Zvbb/vclz.v.yaml
index 9dfec9f7cf..574533df2b 100644
--- a/arch/inst/Zvbb/vclz.v.yaml
+++ b/arch/inst/Zvbb/vclz.v.yaml
@@ -6,8 +6,7 @@ name: vclz.v
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vd
 encoding:
   match: 010010------01100010-----1010111
diff --git a/arch/inst/Zvbb/vcpop.v.yaml b/arch/inst/Zvbb/vcpop.v.yaml
index ce91a11f12..911ddb00ce 100644
--- a/arch/inst/Zvbb/vcpop.v.yaml
+++ b/arch/inst/Zvbb/vcpop.v.yaml
@@ -6,8 +6,7 @@ name: vcpop.v
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vd
 encoding:
   match: 010010------01110010-----1010111
diff --git a/arch/inst/Zvbb/vctz.v.yaml b/arch/inst/Zvbb/vctz.v.yaml
index af27a74933..85e92d1eb4 100644
--- a/arch/inst/Zvbb/vctz.v.yaml
+++ b/arch/inst/Zvbb/vctz.v.yaml
@@ -6,8 +6,7 @@ name: vctz.v
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vd
 encoding:
   match: 010010------01101010-----1010111
diff --git a/arch/inst/Zvbb/vrev8.v.yaml b/arch/inst/Zvbb/vrev8.v.yaml
index 409d295ffe..e055ad878b 100644
--- a/arch/inst/Zvbb/vrev8.v.yaml
+++ b/arch/inst/Zvbb/vrev8.v.yaml
@@ -6,8 +6,7 @@ name: vrev8.v
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vd
 encoding:
   match: 010010------01001010-----1010111
diff --git a/arch/inst/Zvbb/vrol.vv.yaml b/arch/inst/Zvbb/vrol.vv.yaml
index 8b074c0674..43d9be037d 100644
--- a/arch/inst/Zvbb/vrol.vv.yaml
+++ b/arch/inst/Zvbb/vrol.vv.yaml
@@ -6,8 +6,7 @@ name: vrol.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vs1, vd
 encoding:
   match: 010101-----------000-----1010111
diff --git a/arch/inst/Zvbb/vrol.vx.yaml b/arch/inst/Zvbb/vrol.vx.yaml
index 7a1ac9f9b7..ed007dcc61 100644
--- a/arch/inst/Zvbb/vrol.vx.yaml
+++ b/arch/inst/Zvbb/vrol.vx.yaml
@@ -6,8 +6,7 @@ name: vrol.vx
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, xs1, vd
 encoding:
   match: 010101-----------100-----1010111
diff --git a/arch/inst/Zvbb/vror.vi.yaml b/arch/inst/Zvbb/vror.vi.yaml
index 113a5a85e2..c672eda3c0 100644
--- a/arch/inst/Zvbb/vror.vi.yaml
+++ b/arch/inst/Zvbb/vror.vi.yaml
@@ -6,8 +6,7 @@ name: vror.vi
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vd, imm
 encoding:
   match: 01010------------011-----1010111
diff --git a/arch/inst/Zvbb/vror.vv.yaml b/arch/inst/Zvbb/vror.vv.yaml
index 41b8d4074f..e6bff2c705 100644
--- a/arch/inst/Zvbb/vror.vv.yaml
+++ b/arch/inst/Zvbb/vror.vv.yaml
@@ -6,8 +6,7 @@ name: vror.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vs1, vd
 encoding:
   match: 010100-----------000-----1010111
diff --git a/arch/inst/Zvbb/vror.vx.yaml b/arch/inst/Zvbb/vror.vx.yaml
index 85c7425f1d..b81de87514 100644
--- a/arch/inst/Zvbb/vror.vx.yaml
+++ b/arch/inst/Zvbb/vror.vx.yaml
@@ -6,8 +6,7 @@ name: vror.vx
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, xs1, vd
 encoding:
   match: 010100-----------100-----1010111
diff --git a/arch/inst/Zvbb/vwsll.vi.yaml b/arch/inst/Zvbb/vwsll.vi.yaml
index ae3468bc75..b98eb8b470 100644
--- a/arch/inst/Zvbb/vwsll.vi.yaml
+++ b/arch/inst/Zvbb/vwsll.vi.yaml
@@ -6,8 +6,7 @@ name: vwsll.vi
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vd, imm
 encoding:
   match: 110101-----------011-----1010111
diff --git a/arch/inst/Zvbb/vwsll.vv.yaml b/arch/inst/Zvbb/vwsll.vv.yaml
index bf5c1ffade..e3dad0f5db 100644
--- a/arch/inst/Zvbb/vwsll.vv.yaml
+++ b/arch/inst/Zvbb/vwsll.vv.yaml
@@ -6,8 +6,7 @@ name: vwsll.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, vs1, vd
 encoding:
   match: 110101-----------000-----1010111
diff --git a/arch/inst/Zvbb/vwsll.vx.yaml b/arch/inst/Zvbb/vwsll.vx.yaml
index f270898f0c..ff4eb7a39b 100644
--- a/arch/inst/Zvbb/vwsll.vx.yaml
+++ b/arch/inst/Zvbb/vwsll.vx.yaml
@@ -6,8 +6,7 @@ name: vwsll.vx
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbb, Zvkn, Zvks]
+definedBy: Zvbb
 assembly: vm, vs2, xs1, vd
 encoding:
   match: 110101-----------100-----1010111
diff --git a/arch/inst/Zvbc/vclmul.vv.yaml b/arch/inst/Zvbc/vclmul.vv.yaml
index 3e8170ec69..2c4449e633 100644
--- a/arch/inst/Zvbc/vclmul.vv.yaml
+++ b/arch/inst/Zvbc/vclmul.vv.yaml
@@ -6,8 +6,7 @@ name: vclmul.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbc, Zvkn, Zvks]
+definedBy: Zvbc
 assembly: vm, vs2, vs1, vd
 encoding:
   match: 001100-----------010-----1010111
diff --git a/arch/inst/Zvbc/vclmul.vx.yaml b/arch/inst/Zvbc/vclmul.vx.yaml
index 8432653a03..03e44164d5 100644
--- a/arch/inst/Zvbc/vclmul.vx.yaml
+++ b/arch/inst/Zvbc/vclmul.vx.yaml
@@ -6,8 +6,7 @@ name: vclmul.vx
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbc, Zvkn, Zvks]
+definedBy: Zvbc
 assembly: vm, vs2, xs1, vd
 encoding:
   match: 001100-----------110-----1010111
diff --git a/arch/inst/Zvbc/vclmulh.vv.yaml b/arch/inst/Zvbc/vclmulh.vv.yaml
index 43515fc677..4e2735b101 100644
--- a/arch/inst/Zvbc/vclmulh.vv.yaml
+++ b/arch/inst/Zvbc/vclmulh.vv.yaml
@@ -6,8 +6,7 @@ name: vclmulh.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbc, Zvkn, Zvks]
+definedBy: Zvbc
 assembly: vm, vs2, vs1, vd
 encoding:
   match: 001101-----------010-----1010111
diff --git a/arch/inst/Zvbc/vclmulh.vx.yaml b/arch/inst/Zvbc/vclmulh.vx.yaml
index 023a959d0d..9f898de644 100644
--- a/arch/inst/Zvbc/vclmulh.vx.yaml
+++ b/arch/inst/Zvbc/vclmulh.vx.yaml
@@ -6,8 +6,7 @@ name: vclmulh.vx
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvbc, Zvkn, Zvks]
+definedBy: Zvbc
 assembly: vm, vs2, xs1, vd
 encoding:
   match: 001101-----------110-----1010111
diff --git a/arch/inst/Zvkn/vaesdf.vs.yaml b/arch/inst/Zvkned/vaesdf.vs.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesdf.vs.yaml
rename to arch/inst/Zvkned/vaesdf.vs.yaml
index 6741428ed2..e440d526b3 100644
--- a/arch/inst/Zvkn/vaesdf.vs.yaml
+++ b/arch/inst/Zvkned/vaesdf.vs.yaml
@@ -6,8 +6,7 @@ name: vaesdf.vs
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010011-----00001010-----1110111
diff --git a/arch/inst/Zvkn/vaesdf.vv.yaml b/arch/inst/Zvkned/vaesdf.vv.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesdf.vv.yaml
rename to arch/inst/Zvkned/vaesdf.vv.yaml
index 5f2b460ff8..ee94103bc1 100644
--- a/arch/inst/Zvkn/vaesdf.vv.yaml
+++ b/arch/inst/Zvkned/vaesdf.vv.yaml
@@ -6,8 +6,7 @@ name: vaesdf.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010001-----00001010-----1110111
diff --git a/arch/inst/Zvkn/vaesdm.vs.yaml b/arch/inst/Zvkned/vaesdm.vs.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesdm.vs.yaml
rename to arch/inst/Zvkned/vaesdm.vs.yaml
index 27c9e740ea..c128d12e31 100644
--- a/arch/inst/Zvkn/vaesdm.vs.yaml
+++ b/arch/inst/Zvkned/vaesdm.vs.yaml
@@ -6,8 +6,7 @@ name: vaesdm.vs
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010011-----00000010-----1110111
diff --git a/arch/inst/Zvkn/vaesdm.vv.yaml b/arch/inst/Zvkned/vaesdm.vv.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesdm.vv.yaml
rename to arch/inst/Zvkned/vaesdm.vv.yaml
index 209a1b9471..a60531c26e 100644
--- a/arch/inst/Zvkn/vaesdm.vv.yaml
+++ b/arch/inst/Zvkned/vaesdm.vv.yaml
@@ -6,8 +6,7 @@ name: vaesdm.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010001-----00000010-----1110111
diff --git a/arch/inst/Zvkn/vaesef.vs.yaml b/arch/inst/Zvkned/vaesef.vs.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesef.vs.yaml
rename to arch/inst/Zvkned/vaesef.vs.yaml
index 0ad2f94902..c9a4c1c7c9 100644
--- a/arch/inst/Zvkn/vaesef.vs.yaml
+++ b/arch/inst/Zvkned/vaesef.vs.yaml
@@ -6,8 +6,7 @@ name: vaesef.vs
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010011-----00011010-----1110111
diff --git a/arch/inst/Zvkn/vaesef.vv.yaml b/arch/inst/Zvkned/vaesef.vv.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesef.vv.yaml
rename to arch/inst/Zvkned/vaesef.vv.yaml
index 283bc428c5..0c4f416e3d 100644
--- a/arch/inst/Zvkn/vaesef.vv.yaml
+++ b/arch/inst/Zvkned/vaesef.vv.yaml
@@ -6,8 +6,7 @@ name: vaesef.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010001-----00011010-----1110111
diff --git a/arch/inst/Zvkn/vaesem.vs.yaml b/arch/inst/Zvkned/vaesem.vs.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesem.vs.yaml
rename to arch/inst/Zvkned/vaesem.vs.yaml
index ec1a733828..2614c8eaef 100644
--- a/arch/inst/Zvkn/vaesem.vs.yaml
+++ b/arch/inst/Zvkned/vaesem.vs.yaml
@@ -6,8 +6,7 @@ name: vaesem.vs
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010011-----00010010-----1110111
diff --git a/arch/inst/Zvkn/vaesem.vv.yaml b/arch/inst/Zvkned/vaesem.vv.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesem.vv.yaml
rename to arch/inst/Zvkned/vaesem.vv.yaml
index 866d20bdbd..109f7e12da 100644
--- a/arch/inst/Zvkn/vaesem.vv.yaml
+++ b/arch/inst/Zvkned/vaesem.vv.yaml
@@ -6,8 +6,7 @@ name: vaesem.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010001-----00010010-----1110111
diff --git a/arch/inst/Zvkn/vaeskf1.vi.yaml b/arch/inst/Zvkned/vaeskf1.vi.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaeskf1.vi.yaml
rename to arch/inst/Zvkned/vaeskf1.vi.yaml
index 89ca6562de..0923ee0e7f 100644
--- a/arch/inst/Zvkn/vaeskf1.vi.yaml
+++ b/arch/inst/Zvkned/vaeskf1.vi.yaml
@@ -6,8 +6,7 @@ name: vaeskf1.vi
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd, imm
 encoding:
   match: 1000101----------010-----1110111
diff --git a/arch/inst/Zvkn/vaeskf2.vi.yaml b/arch/inst/Zvkned/vaeskf2.vi.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaeskf2.vi.yaml
rename to arch/inst/Zvkned/vaeskf2.vi.yaml
index ac12aef4f1..6fceb7c73d 100644
--- a/arch/inst/Zvkn/vaeskf2.vi.yaml
+++ b/arch/inst/Zvkned/vaeskf2.vi.yaml
@@ -6,8 +6,7 @@ name: vaeskf2.vi
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd, imm
 encoding:
   match: 1010101----------010-----1110111
diff --git a/arch/inst/Zvkn/vaesz.vs.yaml b/arch/inst/Zvkned/vaesz.vs.yaml
similarity index 93%
rename from arch/inst/Zvkn/vaesz.vs.yaml
rename to arch/inst/Zvkned/vaesz.vs.yaml
index a518fab1f1..0228a44197 100644
--- a/arch/inst/Zvkn/vaesz.vs.yaml
+++ b/arch/inst/Zvkned/vaesz.vs.yaml
@@ -6,8 +6,7 @@ name: vaesz.vs
 long_name: Vector AES round zero
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvkned]
+definedBy: Zvkned
 assembly: vs2, vd
 encoding:
   match: 1010011-----00111010-----1110111
diff --git a/arch/inst/Zvkn/vsha2ch.vv.yaml b/arch/inst/Zvknha/vsha2ch.vv.yaml
similarity index 92%
rename from arch/inst/Zvkn/vsha2ch.vv.yaml
rename to arch/inst/Zvknha/vsha2ch.vv.yaml
index d57cf09b2a..d50a856ad0 100644
--- a/arch/inst/Zvkn/vsha2ch.vv.yaml
+++ b/arch/inst/Zvknha/vsha2ch.vv.yaml
@@ -6,8 +6,7 @@ name: vsha2ch.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvknha, Zvknhb]
+definedBy: Zvknha
 assembly: vs2, vs1, vd
 encoding:
   match: 1011101----------010-----1110111
diff --git a/arch/inst/Zvkn/vsha2cl.vv.yaml b/arch/inst/Zvknha/vsha2cl.vv.yaml
similarity index 92%
rename from arch/inst/Zvkn/vsha2cl.vv.yaml
rename to arch/inst/Zvknha/vsha2cl.vv.yaml
index 46c07b102a..765453f53d 100644
--- a/arch/inst/Zvkn/vsha2cl.vv.yaml
+++ b/arch/inst/Zvknha/vsha2cl.vv.yaml
@@ -6,8 +6,7 @@ name: vsha2cl.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvknha, Zvknhb]
+definedBy: Zvknha
 assembly: vs2, vs1, vd
 encoding:
   match: 1011111----------010-----1110111
diff --git a/arch/inst/Zvkn/vsha2ms.vv.yaml b/arch/inst/Zvknha/vsha2ms.vv.yaml
similarity index 92%
rename from arch/inst/Zvkn/vsha2ms.vv.yaml
rename to arch/inst/Zvknha/vsha2ms.vv.yaml
index c63f13abb5..fd905f0df4 100644
--- a/arch/inst/Zvkn/vsha2ms.vv.yaml
+++ b/arch/inst/Zvknha/vsha2ms.vv.yaml
@@ -6,8 +6,7 @@ name: vsha2ms.vv
 long_name: No synopsis available.
 description: |
   No description available.
-definedBy:
-  anyOf: [Zvkn, Zvknha, Zvknhb]
+definedBy: Zvknha
 assembly: vs2, vs1, vd
 encoding:
   match: 1011011----------010-----1110111

From 914e2891f87de53c998477bf5b6e81785d9cbb82 Mon Sep 17 00:00:00 2001
From: Afonso Oliveira 
Date: Thu, 24 Apr 2025 16:57:44 +0100
Subject: [PATCH 039/207] LLVM verification (#356)

* Add simple Docker environment variable

Signed-off-by: Afonso Oliveira 

* Fix errors due to incorrect parsing of VM

Signed-off-by: Afonso Oliveira 

* First Refactor to pytest

Signed-off-by: Afonso Oliveira 

* Allow 16 bit instructions for C extension

Signed-off-by: Afonso Oliveira 

* Revert bad parsing

Signed-off-by: Afonso Oliveira 

* Allow only one value

Signed-off-by: Afonso Oliveira 

* Use AsmString instead of name

Signed-off-by: Afonso Oliveira 

* Small Refactor on parsing.py

* refactor to do unit tests

* refactor to file name

* Modify to have seveal Unit tests instead of just one

Signed-off-by: Afonso Oliveira 

* Clean up and code reorganization

Signed-off-by: Afonso Oliveira 

* Ensure it is not pseudo

Signed-off-by: Afonso Oliveira 

* Skip aq/rl instructions

Signed-off-by: Afonso Oliveira 

* add pytest to requirements

Signed-off-by: Afonso Oliveira 

* add LLVM path as environment variable

Signed-off-by: Afonso Oliveira 

* remove and ignor python cache

Signed-off-by: Afonso Oliveira 

* Add LLVM test to the Rakefile

Signed-off-by: Afonso Oliveira 

* Optimizations to test logic and modify test order

Signed-off-by: Afonso Oliveira 

* Add prerequisites syntax

Signed-off-by: root 

* Fix pre-commit related issues

Signed-off-by: root 

* Add LLVM tblgen to regress.yaml && change Rakefile for new changes

Signed-off-by: Afonso Oliveira 

* Fix caching

Signed-off-by: Afonso Oliveira 

* Fix caching

Signed-off-by: Afonso Oliveira 

* Fix caching

Signed-off-by: Afonso Oliveira 

* Add dependencie for smoke test

Signed-off-by: Afonso Oliveira 

* Change logic for LLVM's path

Signed-off-by: Afonso Oliveira 

* Change CI logic for LLVM

Signed-off-by: Afonso Oliveira 

* Add cache and update paths

Signed-off-by: Afonso Oliveira 

* Add corner case when implementation of LLVM does not need to follow the ISA Spec

Signed-off-by: Afonso Oliveira 

* Work around for FENCE. ISA and compiler should treat it differently

* Set CM instruction length 16 bit instead of 32

* Add LICENSE compliant to UDB native files.

Signed-off-by: Afonso Oliveira 

---------

Signed-off-by: Afonso Oliveira 
Signed-off-by: root 
Co-authored-by: root 
Co-authored-by: Derek Hower 
---
 .github/workflows/regress.yml |  60 ++++++++
 .gitignore                    |   3 +
 .gitmodules                   |   4 +
 Rakefile                      |  11 ++
 ext/auto-inst/parsing.py      | 278 ++++++++++++++++++++++++++++++++++
 ext/auto-inst/test_parsing.py | 165 ++++++++++++++++++++
 ext/llvm-project              |   1 +
 requirements.txt              |   1 +
 8 files changed, 523 insertions(+)
 mode change 100644 => 100755 .github/workflows/regress.yml
 create mode 100755 ext/auto-inst/parsing.py
 create mode 100755 ext/auto-inst/test_parsing.py
 create mode 160000 ext/llvm-project

diff --git a/.github/workflows/regress.yml b/.github/workflows/regress.yml
old mode 100644
new mode 100755
index e1f2b8c4ae..7ae0bcef31
--- a/.github/workflows/regress.yml
+++ b/.github/workflows/regress.yml
@@ -17,12 +17,24 @@ jobs:
       - uses: actions/setup-python@v5
       - uses: pre-commit/action@v3.0.1
   regress-smoke:
+    needs: build-llvm
     runs-on: ubuntu-latest
     env:
       SINGULARITY: 1
     steps:
       - name: Clone Github Repo Action
         uses: actions/checkout@v4
+      - name: Get current LLVM submodule commit SHA
+        id: get-llvm-sha
+        run: echo "LLVM_SHA=$(git ls-tree HEAD ext/llvm-project | awk '{print $3}')" >> $GITHUB_ENV
+      - name: Restore cache RISC-V JSON
+        id: cache-riscv
+        uses: actions/cache@v4
+        with:
+          path: ext/llvm-project/riscv.json
+          key: ${{ runner.os }}-riscv-json-${{ env.LLVM_SHA }}
+          restore-keys: |
+            ${{ runner.os }}-riscv-json-
       - name: singularity setup
         uses: ./.github/actions/singularity-setup
       - name: Run smoke
@@ -98,6 +110,54 @@ jobs:
         uses: ./.github/actions/singularity-setup
       - name: Generate extension PDF
         run: ./do gen:profile_release_pdf[Mock]
+  build-llvm:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Check out repository (no submodules, shallow fetch)
+        uses: actions/checkout@v4
+        with:
+          submodules: false
+          fetch-depth: 1
+      - name: Get current LLVM submodule commit SHA
+        id: get-llvm-sha
+        run: echo "LLVM_SHA=$(git ls-tree HEAD ext/llvm-project | awk '{print $3}')" >> $GITHUB_ENV
+      - name: Cache RISC-V JSON
+        id: cache-riscv
+        uses: actions/cache@v4
+        with:
+          path: ext/llvm-project/riscv.json
+          key: ${{ runner.os }}-riscv-json-${{ env.LLVM_SHA }}
+          restore-keys: |
+            ${{ runner.os }}-riscv-json-
+      - name: Initialize LLVM submodule (shallow + sparse)
+        if: ${{ steps.cache-riscv.outputs.cache-hit != 'true' }}
+        run: |
+          git submodule sync --recursive
+          git submodule update --init --recursive --depth=1 ext/llvm-project
+
+      - name: Check for required directories and files
+        if: ${{ steps.cache-riscv.outputs.cache-hit != 'true' }}
+        run: |
+          ls -l ext/llvm-project/llvm/include
+          ls -l ext/llvm-project/llvm/lib/Target/RISCV
+          ls -l ext/llvm-project/llvm/lib/Target/RISCV/RISCV.td
+      - name: Configure and build llvm-tblgen
+        if: ${{ steps.cache-riscv.outputs.cache-hit != 'true' }}
+        run: |
+          cmake -S ext/llvm-project/llvm -B ext/llvm-project/build -DCMAKE_BUILD_TYPE=Release
+          cmake --build ext/llvm-project/build --target llvm-tblgen
+      - name: Generate RISC-V JSON
+        if: ${{ steps.cache-riscv.outputs.cache-hit != 'true' }}
+        run: |
+          chmod +x ./ext/llvm-project/build/bin/llvm-tblgen
+          ./ext/llvm-project/build/bin/llvm-tblgen \
+            -I ext/llvm-project/llvm/include \
+            -I ext/llvm-project/llvm/lib/Target/RISCV \
+            ext/llvm-project/llvm/lib/Target/RISCV/RISCV.td \
+            --dump-json \
+            -o ext/llvm-project/riscv.json
+      - name: Show riscv.json output
+        run: ls -l ext/llvm-project/riscv.json
   regress-gen-go:
     runs-on: ubuntu-latest
     env:
diff --git a/.gitignore b/.gitignore
index 433377dccb..e0ca947a49 100644
--- a/.gitignore
+++ b/.gitignore
@@ -16,5 +16,8 @@ gen
 node_modules
 _site
 images
+__pycache__/
+*.pyc
+.pytest_cache/
 *.bak
 *.log
diff --git a/.gitmodules b/.gitmodules
index dca08ddbfe..2265f46f88 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -7,6 +7,10 @@
 [submodule "ext/riscv-isa-manual"]
 	path = ext/riscv-isa-manual
 	url = https://github.com/riscv/riscv-isa-manual
+[submodule "ext/llvm-project"]
+	path = ext/llvm-project
+	url = https://github.com/llvm/llvm-project.git
+	branch = main
 [submodule "ext/riscv-tests"]
 	path = ext/riscv-tests
 	url = https://github.com/riscv-software-src/riscv-tests.git
diff --git a/Rakefile b/Rakefile
index 8b70c5f4fe..d991c195c8 100755
--- a/Rakefile
+++ b/Rakefile
@@ -157,6 +157,15 @@ namespace :serve do
 end
 
 namespace :test do
+
+  # "Run the cross-validation against LLVM"
+  task :llvm do
+      begin
+        sh "#{$root}/.home/.venv/bin/python3 -m pytest ext/auto-inst/test_parsing.py -v"
+      rescue => e
+        raise unless e.message.include?("status (5)") # don't fail on skipped tests
+    end
+  end
   # "Run the IDL compiler test suite"
   task :idl_compiler do
     t = Minitest::TestTask.new(:lib_test)
@@ -430,6 +439,8 @@ namespace :test do
     Rake::Task["test:idl"].invoke
     puts "UPDATE: Running test:inst_encodings"
     Rake::Task["test:inst_encodings"].invoke
+    puts "UPDATE: Running test:llvm"
+    Rake::Task["test:llvm"].invoke
     puts "UPDATE: Done test:smoke"
   end
 
diff --git a/ext/auto-inst/parsing.py b/ext/auto-inst/parsing.py
new file mode 100755
index 0000000000..605b1e511b
--- /dev/null
+++ b/ext/auto-inst/parsing.py
@@ -0,0 +1,278 @@
+# SPDX-FileCopyrightText: Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-FileCopyrightText: 2024-2025 Contributors to the RISCV UnifiedDB 
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+import os
+import re
+import yaml
+from pathlib import Path
+import pytest
+
+yaml_instructions = {}
+REPO_DIRECTORY = None
+
+
+def safe_get(data, key, default=""):
+    """Safely get a value from a dictionary, return default if not found or error."""
+    try:
+        if isinstance(data, dict):
+            return data.get(key, default)
+        return default
+    except:
+        return default
+
+
+def get_json_path():
+    """
+    Resolves the path to riscv.json in the repository.
+    Returns the Path object if file exists, otherwise skips the test.
+    """
+    # Print current working directory and script location for debugging
+    cwd = Path.cwd()
+    script_dir = Path(__file__).parent.resolve()
+    print(f"Current working directory: {cwd}")
+    print(f"Script directory: {script_dir}")
+
+    # Try to find the repository root
+    repo_root = os.environ.get("GITHUB_WORKSPACE", cwd)
+    repo_root = Path(repo_root)
+
+    llvm_json_path = repo_root / "ext" / "llvm-project" / "riscv.json"
+    print(f"Looking for riscv.json at: {llvm_json_path}")
+
+    if not llvm_json_path.is_file():
+        print(f"\nNo 'riscv.json' found at {llvm_json_path}.")
+        print("Tests will be skipped.\n")
+        pytest.skip("riscv.json does not exist in the repository at the expected path.")
+
+    return llvm_json_path
+
+
+def get_yaml_directory():
+    return "arch/inst/"
+
+
+def load_inherited_variable(var_path, repo_dir):
+    """Load variable definition from an inherited YAML file."""
+    try:
+        path, anchor = var_path.split("#")
+        if anchor.startswith("/"):
+            anchor = anchor[1:]
+
+        full_path = os.path.join(repo_dir, path)
+
+        if not os.path.exists(full_path):
+            print(f"Warning: Inherited file not found: {full_path}")
+            return None
+
+        with open(full_path) as f:
+            data = yaml.safe_load(f)
+
+        for key in anchor.split("/"):
+            if key in data:
+                data = data[key]
+            else:
+                print(f"Warning: Anchor path {anchor} not found in {path}")
+                return None
+
+        return data
+    except Exception as e:
+        print(f"Error loading inherited variable {var_path}: {str(e)}")
+        return None
+
+
+def resolve_variable_definition(var, repo_dir):
+    """Resolve variable definition, handling inheritance if needed."""
+    if "location" in var:
+        return var
+    elif "$inherits" in var:
+        print(f"Warning: Failed to resolve inheritance for variable: {var}")
+    return None
+
+
+def parse_location(loc_str):
+    """Parse location string that may contain multiple ranges."""
+    if not loc_str:
+        return []
+
+    loc_str = str(loc_str).strip()
+    ranges = []
+
+    for range_str in loc_str.split("|"):
+        range_str = range_str.strip()
+        if "-" in range_str:
+            high, low = map(int, range_str.split("-"))
+            ranges.append((high, low))
+        else:
+            try:
+                val = int(range_str)
+                ranges.append((val, val))
+            except ValueError:
+                print(f"Warning: Invalid location format: {range_str}")
+                continue
+
+    return ranges
+
+
+def load_yaml_encoding(instr_name):
+    """Load YAML encoding data for an instruction."""
+    candidates = set()
+    lower_name = instr_name.lower()
+    candidates.add(lower_name)
+    candidates.add(lower_name.replace("_", "."))
+
+    yaml_file_path = None
+    for cand in candidates:
+        if cand in yaml_instructions:
+            yaml_category = yaml_instructions[cand]
+            yaml_file_path = os.path.join(REPO_DIRECTORY, yaml_category, cand + ".yaml")
+            if os.path.isfile(yaml_file_path):
+                break
+            else:
+                yaml_file_path = None
+
+    if not yaml_file_path or not os.path.isfile(yaml_file_path):
+        return None, None
+
+    with open(yaml_file_path) as yf:
+        ydata = yaml.safe_load(yf)
+
+    encoding = safe_get(ydata, "encoding", {})
+    yaml_match = safe_get(encoding, "match", None)
+    yaml_vars = safe_get(encoding, "variables", [])
+
+    return yaml_match, yaml_vars
+
+
+def compare_yaml_json_encoding(
+    instr_name, yaml_match, yaml_vars, json_encoding_str, repo_dir
+):
+    """Compare the YAML encoding with the JSON encoding."""
+    if not yaml_match:
+        return ["No YAML match field available for comparison."]
+    if not json_encoding_str:
+        return ["No JSON encoding available for comparison."]
+
+    expected_length = (
+        16 if instr_name.lower().startswith(("c_", "c.", "cm_", "cm.")) else 32
+    )
+
+    yaml_pattern_str = yaml_match.replace("-", ".")
+    if len(yaml_pattern_str) != expected_length:
+        return [
+            f"YAML match pattern length is {len(yaml_pattern_str)}, expected {expected_length}. Cannot compare properly."
+        ]
+
+    yaml_var_positions = {}
+    for var in yaml_vars or []:
+        resolved_var = resolve_variable_definition(var, repo_dir)
+        if not resolved_var or "location" not in resolved_var:
+            print(
+                f"Warning: Could not resolve variable definition for {var.get('name', 'unknown')}"
+            )
+            continue
+
+        ranges = parse_location(resolved_var["location"])
+        if ranges:
+            yaml_var_positions[var["name"]] = ranges
+
+    tokens = re.findall(r"(?:[01]|[A-Za-z0-9]+(?:\[\d+\]|\[\?\])?)", json_encoding_str)
+    json_bits = []
+    bit_index = expected_length - 1
+    for t in tokens:
+        json_bits.append((bit_index, t))
+        bit_index -= 1
+
+    if bit_index != -1:
+        return [
+            f"JSON encoding does not appear to be {expected_length} bits. Ends at bit {bit_index+1}."
+        ]
+
+    normalized_json_bits = []
+    for pos, tt in json_bits:
+        if re.match(r"vm\[[^\]]*\]", tt):
+            tt = "vm"
+        normalized_json_bits.append((pos, tt))
+    json_bits = normalized_json_bits
+
+    differences = []
+
+    for b in range(expected_length):
+        yaml_bit = yaml_pattern_str[expected_length - 1 - b]
+        token = [tt for (pos, tt) in json_bits if pos == b]
+        if not token:
+            differences.append(f"Bit {b}: No corresponding JSON bit found.")
+            continue
+        json_bit_str = token[0]
+
+        if yaml_bit in ["0", "1"]:
+            if json_bit_str not in ["0", "1"]:
+                differences.append(
+                    f"Bit {b}: YAML expects fixed bit '{yaml_bit}' but JSON has '{json_bit_str}'"
+                )
+            elif json_bit_str != yaml_bit:
+                differences.append(
+                    f"Bit {b}: YAML expects '{yaml_bit}' but JSON has '{json_bit_str}'"
+                )
+        else:
+            if json_bit_str in ["0", "1"]:
+                differences.append(
+                    f"Bit {b}: YAML variable bit but JSON is fixed '{json_bit_str}'"
+                )
+
+    for var_name, ranges in yaml_var_positions.items():
+        for high, low in ranges:
+            if high >= expected_length or low < 0:
+                differences.append(
+                    f"Variable {var_name}: location {high}-{low} is out of range for {expected_length}-bit instruction."
+                )
+                continue
+
+            json_var_fields = []
+            for bb in range(low, high + 1):
+                token = [tt for (pos, tt) in json_bits if pos == bb]
+                if token:
+                    json_var_fields.append(token[0])
+                else:
+                    json_var_fields.append("?")
+
+            field_names = set(
+                re.findall(
+                    r"([A-Za-z0-9]+)(?:\[\d+\]|\[\?\])?", " ".join(json_var_fields)
+                )
+            )
+            if len(field_names) == 0:
+                differences.append(
+                    f"Variable {var_name}: No corresponding field found in JSON bits {high}-{low}"
+                )
+            elif len(field_names) > 1:
+                differences.append(
+                    f"Variable {var_name}: Multiple fields {field_names} found in JSON for bits {high}-{low}"
+                )
+
+    return differences
+
+
+def get_yaml_instructions(repo_directory):
+    """Recursively find all YAML files in the repository and load their encodings."""
+    global yaml_instructions, REPO_DIRECTORY
+    REPO_DIRECTORY = repo_directory
+    yaml_instructions = {}
+
+    for root, _, files in os.walk(repo_directory):
+        for file in files:
+            if file.endswith(".yaml"):
+                instr_name = os.path.splitext(file)[0]
+                relative_path = os.path.relpath(root, repo_directory)
+                yaml_instructions[instr_name.lower()] = relative_path
+
+    instructions_with_encodings = {}
+    for instr_name_lower, path in yaml_instructions.items():
+        yaml_match, yaml_vars = load_yaml_encoding(instr_name_lower)
+        instructions_with_encodings[instr_name_lower] = {
+            "category": path,
+            "yaml_match": yaml_match,
+            "yaml_vars": yaml_vars,
+        }
+
+    return instructions_with_encodings
diff --git a/ext/auto-inst/test_parsing.py b/ext/auto-inst/test_parsing.py
new file mode 100755
index 0000000000..dde64d41fe
--- /dev/null
+++ b/ext/auto-inst/test_parsing.py
@@ -0,0 +1,165 @@
+# SPDX-FileCopyrightText: Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-FileCopyrightText: 2024-2025 Contributors to the RISCV UnifiedDB 
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+import pytest
+import json
+import os
+from parsing import (
+    get_json_path,
+    get_yaml_directory,
+    get_yaml_instructions,
+    compare_yaml_json_encoding,
+)
+
+# Global variables to store loaded data
+_yaml_instructions = None
+_json_data = None
+_repo_dir = None
+
+
+def load_test_data():
+    """Load test data once and cache it."""
+    global _yaml_instructions, _json_data, _repo_dir
+    if _yaml_instructions is None:
+        # Load YAML instructions
+        _repo_dir = get_yaml_directory()
+        if not os.path.exists(_repo_dir):
+            pytest.skip(f"Repository directory not found at {_repo_dir}")
+        _yaml_instructions = get_yaml_instructions(_repo_dir)
+
+        # Load JSON data
+        json_file = get_json_path()
+        if not os.path.exists(json_file):
+            pytest.skip(f"JSON file not found at {json_file}")
+        with open(json_file) as f:
+            _json_data = json.load(f)
+
+    return _yaml_instructions, _json_data, _repo_dir
+
+
+def has_aqrl_variables(yaml_vars):
+    """Check if instruction has aq/rl variables."""
+    if not yaml_vars:
+        return False
+    return any(var.get("name") in ["aq", "rl"] for var in yaml_vars)
+
+
+def pytest_generate_tests(metafunc):
+    """Generate test cases dynamically."""
+    if "instr_name" in metafunc.fixturenames:
+        yaml_instructions, _, _ = load_test_data()
+        metafunc.parametrize("instr_name", list(yaml_instructions.keys()))
+
+
+class TestInstructionEncoding:
+    @classmethod
+    def setup_class(cls):
+        """Setup class-level test data."""
+        cls.yaml_instructions, cls.json_data, cls.repo_dir = load_test_data()
+        cls.rv_instructions = cls.json_data.get("!instanceof", {}).get(
+            "RVInstCommon", []
+        )
+
+    def _find_matching_instruction(self, yaml_instr_name):
+        """Find matching instruction in JSON data by comparing instruction names."""
+        yaml_instr_name = yaml_instr_name.lower().strip()
+
+        for def_name in self.rv_instructions:
+            value = self.json_data.get(def_name)
+            if not isinstance(value, dict):
+                continue
+
+            is_pseudo = value.get("isPseudo", "")
+            if is_pseudo == 1:
+                continue
+
+            is_codegen_only = value.get("isCodeGenOnly", "")
+            if is_codegen_only == 1:
+                continue
+
+            asm_string = value.get("AsmString", "").lower().strip()
+            if not asm_string:
+                continue
+
+            base_asm_name = asm_string.split()[0]
+            if base_asm_name == yaml_instr_name:
+                return def_name
+
+        return None
+
+    def _get_json_encoding(self, json_instr):
+        """Extract encoding string from JSON instruction data."""
+        encoding_bits = []
+        try:
+            inst = json_instr.get("Inst", [])
+            for bit in inst:
+                if isinstance(bit, dict):
+                    encoding_bits.append(
+                        f"{bit.get('var', '?')}[{bit.get('index', '?')}]"
+                    )
+                else:
+                    encoding_bits.append(str(bit))
+            encoding_bits.reverse()
+            return "".join(encoding_bits)
+        except:
+            return ""
+
+    def test_instruction_encoding(self, instr_name):
+        """Test encoding for a single instruction."""
+        yaml_data = self.yaml_instructions[instr_name]
+
+        # Skip if the instruction has aq/rl variables
+        if has_aqrl_variables(yaml_data.get("yaml_vars", [])):
+            pytest.skip(f"Skipping instruction {instr_name} due to aq/rl variables")
+
+        # Skip if no YAML match pattern
+        if not yaml_data.get("yaml_match"):
+            pytest.skip(f"Instruction {instr_name} has no YAML match pattern")
+
+        if (
+            instr_name == "fence.i"
+            or instr_name == "c.nop"
+            or instr_name == "fcvtmod.w.d"
+            or instr_name == "fence"
+        ):
+            pytest.skip(
+                f"Instruction {instr_name} is a corner case and implementation should not follow ISA spec"
+            )
+
+        # Find matching JSON instruction
+        json_key = self._find_matching_instruction(instr_name)
+        if not json_key:
+            pytest.skip(f"No matching JSON instruction found for {instr_name}")
+
+        # Get JSON encoding
+        json_encoding = self._get_json_encoding(self.json_data[json_key])
+
+        # Compare encodings
+        differences = compare_yaml_json_encoding(
+            instr_name,
+            yaml_data["yaml_match"],
+            yaml_data.get("yaml_vars", []),
+            json_encoding,
+            self.repo_dir,
+        )
+
+        # If there are differences, format them nicely and fail the test
+        if differences and differences != [
+            "No YAML match field available for comparison."
+        ]:
+            error_msg = f"\nEncoding mismatch for instruction: {instr_name}\n"
+            error_msg += f"name : {instr_name}\n"
+            error_msg += f"JSON key: {json_key}\n"
+            error_msg += f"YAML match: {yaml_data['yaml_match']}\n"
+            error_msg += f"JSON encoding: {json_encoding}\n"
+            error_msg += "Differences:\n"
+            for diff in differences:
+                error_msg += f"  - {diff}\n"
+            pytest.fail(error_msg)
+
+
+def pytest_configure(config):
+    """Configure the test session."""
+    print(f"\nUsing JSON file: {get_json_path()}")
+    print(f"Using YAML directory: {get_yaml_directory()}\n")
diff --git a/ext/llvm-project b/ext/llvm-project
new file mode 160000
index 0000000000..8e85b77f6a
--- /dev/null
+++ b/ext/llvm-project
@@ -0,0 +1 @@
+Subproject commit 8e85b77f6a73477ab094acf0dccce61590a29222
diff --git a/requirements.txt b/requirements.txt
index 37293bfb9b..f0d4e11b04 100644
--- a/requirements.txt
+++ b/requirements.txt
@@ -3,3 +3,4 @@ jsonschema==4.23.0
 tqdm==4.67.1
 ruamel.yaml==0.18.6
 mergedeep==1.3.4
+pytest==8.3.4

From cd2b7eabccf31e722e23eca54fb98576d282daa6 Mon Sep 17 00:00:00 2001
From: Derek Hower <134728312+dhower-qc@users.noreply.github.com>
Date: Fri, 25 Apr 2025 16:09:20 -0400
Subject: [PATCH 040/207] refactor(cpp): better handling of unknowns in
 cpp_hart (#626)

* refactor(cpp): better handling of unknowns in Bits class

* test(cpp): add cpp unit test task

* ci: temporarily disable clang-format

* ci(cpp): add cpp unit test to regression

* ci: add permissions to regress workflow

* fix(cpp): adjust DecodeTree to new defined_by api

* fix(ruby): csr possible_fields_for cache was broken

* fix(cpp): could_be_undefined is not implemented, assume the worst

* refactor(cpp): remove spurious comments in bits.hpp

* ci(clang-format): only temporarily disable clang-format in libhart

---------

Signed-off-by: Derek Hower <134728312+dhower-qc@users.noreply.github.com>
---
 .clang-format                                 |    1 +
 .github/workflows/regress.yml                 |   14 +
 .pre-commit-config.yaml                       |    3 +
 .../cpp_hart_gen/cpp/include/udb/bits.hpp     | 2647 ++++++++++-------
 backends/cpp_hart_gen/cpp/test/test_bits.cpp  |  562 +++-
 backends/cpp_hart_gen/lib/decode_tree.rb      |    7 +-
 backends/cpp_hart_gen/tasks.rake              |   78 +-
 .../cpp_hart_gen/templates/csrs_impl.hxx.erb  |    8 -
 backends/cpp_hart_gen/templates/hart.hxx.erb  |    2 +-
 .../cpp_hart_gen/templates/params.cxx.erb     |    6 +-
 cfgs/config_validation.rb                     |   93 -
 lib/arch_obj_models/csr.rb                    |    9 +-
 12 files changed, 2068 insertions(+), 1362 deletions(-)
 delete mode 100644 cfgs/config_validation.rb

diff --git a/.clang-format b/.clang-format
index e655c54104..458c0c9703 100644
--- a/.clang-format
+++ b/.clang-format
@@ -2,6 +2,7 @@
 BasedOnStyle: Google
 IndentWidth: 2
 Language: Cpp
+ColumnLimit: 100
 # AlignConsecutiveAssignments: true
 # AlignConsecutiveDeclarations: true
 # AlignEscapedNewlines: Right
diff --git a/.github/workflows/regress.yml b/.github/workflows/regress.yml
index 7ae0bcef31..33d0be8686 100755
--- a/.github/workflows/regress.yml
+++ b/.github/workflows/regress.yml
@@ -1,4 +1,7 @@
 name: Regression test
+permissions:
+  contents: read
+  pull-requests: write
 on:
   push:
     branches:
@@ -169,3 +172,14 @@ jobs:
         uses: ./.github/actions/singularity-setup
       - name: Generate Go code
         run: ./do gen:go
+  regress-cpp-unit:
+    runs-on: ubuntu-latest
+    env:
+      SINGULARITY: 1
+    steps:
+      - name: Clone Github Repo Action
+        uses: actions/checkout@v4
+      - name: singularity setup
+        uses: ./.github/actions/singularity-setup
+      - name: Run cpp unit tests
+        run: ./do test:cpp_hart CONFIG=rv64
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 4ceb74ea6b..48e68fca82 100755
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -64,6 +64,9 @@ repos:
       - id: clang-format
         types_or: [c++, c]
         files: \.(hpp|cpp)$
+        # TEMPORARILY DISABLE CLANG-FORMAT IN LIBHART
+        # WIll RE-ENABLE WHEN NEXT PATCH COMES THROUGH
+        exclude: backends/cpp_hart_gen
   - repo: https://github.com/psf/black-pre-commit-mirror
     rev: 25.1.0
     hooks:
diff --git a/backends/cpp_hart_gen/cpp/include/udb/bits.hpp b/backends/cpp_hart_gen/cpp/include/udb/bits.hpp
index 8eaac27b20..007cdc74f8 100644
--- a/backends/cpp_hart_gen/cpp/include/udb/bits.hpp
+++ b/backends/cpp_hart_gen/cpp/include/udb/bits.hpp
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -17,20 +18,22 @@
 //
 // There are four Bits types in C++:
 //
-//  _Bits:                          Compile-time known vector length
-//  holding a known value _PossiblyUnknownBits: Compile-time known
-//  vector length holding a possibly unknown value _RuntimeBits:
-//  Compile-time unknown vector length, at most MaxN, holding a known value
-//  _PossiblyUnknownRuntimeBits: Compile-time unknown vector
-//  length, at most MaxN, holding a possibly unknown value
+//  * _Bits: Compile-time known vector length holding a known value
+//
+//  * _PossiblyUnknownBits: Compile-time known vector length holding a
+//     possibly unknown value
+//
+//  * _RuntimeBits: Compile-time unknown vector length, at most MaxN,
+//     holding a known value
+//
+//  * _PossiblyUnknownRuntimeBits: Compile-time unknown vector length, at most MaxN,
+//     holding a possibly unknown value
 //
 // You can convert:
 //
 //   - _Bits                          -> *any
-//   - _PossiblyUnknownBits           ->
-//   _PossiblyUnknownRuntimeBits
-//   - _RuntimeBits                ->
-//   _PossiblyUnknownRuntimeBits
+//   - _PossiblyUnknownBits           -> _PossiblyUnknownRuntimeBits
+//   - _RuntimeBits                -> _PossiblyUnknownRuntimeBits
 //   - _PossiblyUnknownRuntimeBits ->  none
 //
 // The bits classes attempt to hold the smallest native type to hold the value,
@@ -40,6 +43,12 @@
 // length isn't known at compile-time (e.g., because the length is a config
 // parameter).
 //
+//                                        Value always known at runtime?
+//                                          Yes                No
+//                                       ----------------------------
+//   Width known at compile time?   Yes  | Bits        |  PossiblyUnknownBits
+//                                   No  | RuntimeBits |  PossiblyUnknownRuntimeBits
+//
 
 // we need this to be true for GMP
 static_assert(sizeof(long unsigned int) == sizeof(long long unsigned int));
@@ -72,9 +81,16 @@ namespace udb {
   template 
   static constexpr unsigned constmax_v = constmax<_N...>::value;
 
-  static_assert(constmax::max(),
-                         std::numeric_limits::max()>::value ==
-                std::numeric_limits::max());
+  static_assert(
+      constmax::max(), std::numeric_limits::max()>::value ==
+      std::numeric_limits::max());
+
+  // N that actually means infinite
+  constexpr static unsigned BitsInfinitePrecision = std::numeric_limits::max();
+
+  // max N value where storage is using a native integer type
+  // above this, the storage is GMP, and the Bits type can't be constexpr
+  constexpr static unsigned BitsMaxNativePrecision = 128;
 
   // given the Bits vector length, get the type of the underlying storage for
   // unsigned values
@@ -103,48 +119,138 @@ namespace udb {
         (N > 128), mpz_class,
         std::conditional_t<
             (N > 64), __int128,
-            std::conditional_t<
-                (N > 32), int64_t,
-                std::conditional_t<
-                    (N > 16), int32_t,
-                    std::conditional_t<(N > 8), int16_t, int8_t>>>>>;
+            std::conditional_t<(N > 32), int64_t,
+                               std::conditional_t<(N > 16), int32_t,
+                                                  std::conditional_t<(N > 8), int16_t, int8_t>>>>>;
   };
 
-  // need to define the conversion since GMP doesn (int128 isn't standard)
-  static inline auto to_mpz(const unsigned __int128 &rhs) {
-    mpz_class i = static_cast(rhs >> 64);
-    i <<= 64;
-    i |= static_cast(rhs);
-    return i;
+  template 
+  static mpz_class to_gmp(const IntType &val) {
+    if constexpr (sizeof(IntType) == 16) {
+      if constexpr (std::is_signed_v) {
+        if (val == std::numeric_limits<__int128>::min()) {
+          // can't just negate this, so it's a special case
+          return -(1_mpz << 127);
+        } else {
+          __int128 abs = (val < 0) ? -val : val;
+          mpz_class gmp_val = static_cast(abs >> 64);
+          gmp_val <<= 64;
+          gmp_val |= static_cast(abs);
+          if (val < 0) {
+            gmp_val = -gmp_val;
+          }
+          return gmp_val;
+        }
+      } else {
+        mpz_class gmp_val = static_cast(val >> 64);
+        gmp_val <<= 64;
+        gmp_val |= static_cast(val);
+        return gmp_val;
+      }
+    } else {
+      return val;
+    }
   }
 
-  // need to define the conversion since GMP doesn (int128 isn't standard)
-  static inline mpz_class to_mpz(const __int128 &rhs) {
-    if (rhs < 0) {
-      if (rhs == std::numeric_limits<__int128>::min()) {
-        // special case, since we can't represent -rhs
-        return (-to_mpz(static_cast(-(rhs + 1)))) - 1;
+  static mpz_class to_gmp(const mpz_class &val) { return val; }
+
+  template 
+  static typename BitsStorageType::type from_gmp(const mpz_class &val) {
+    if constexpr (ToN <= 64) {
+      if (val < 0) {
+        return static_cast::type>(0) -
+               static_cast(abs(val)).get_ui();
+      } else {
+        return val.get_ui();
+      }
+    } else if constexpr (ToN <= BitsMaxNativePrecision) {
+      if (val < 0) {
+        typename BitsStorageType::type result =
+            static_cast(abs(val) >> 64).get_ui();
+        result <<= 64;
+        result |= static_cast(abs(val)).get_ui();
+        return 0 - result;
       } else {
-        return -to_mpz(static_cast(-rhs));
+        typename BitsStorageType::type result =
+            static_cast(abs(val) >> 64).get_ui();
+        result <<= 64;
+        result |= static_cast(abs(val)).get_ui();
+        return result;
       }
     } else {
-      return to_mpz(static_cast(rhs));
+      // this is gmp
+      return val;
     }
   }
 
-  template 
-    requires(sizeof(IntType) < 16)
-  mpz_class to_mpz(const IntType &rhs) {
-    return {rhs};
+  template 
+  static std::conditional_t<(ToN > BitsMaxNativePrecision), mpz_class &&,
+                            typename BitsStorageType::type>
+  from_gmp(mpz_class &&val) {
+    if constexpr (ToN <= 64) {
+      if (val < 0) {
+        return static_cast::type>(0) -
+               static_cast(abs(val)).get_ui();
+      } else {
+        return val.get_ui();
+      }
+    } else if constexpr (ToN <= BitsMaxNativePrecision) {
+      if (val < 0) {
+        typename BitsStorageType::type result =
+            static_cast(abs(val) >> 64).get_ui();
+        result <<= 64;
+        result |= static_cast(abs(val)).get_ui();
+        return 0 - result;
+      } else {
+        typename BitsStorageType::type result =
+            static_cast(abs(val) >> 64).get_ui();
+        result <<= 64;
+        result |= static_cast(abs(val)).get_ui();
+        return result;
+      }
+    } else {
+      // this is gmp
+      return std::move(val);
+    }
   }
 
-  // N that actually means infinite
-  constexpr static unsigned BitsInfinitePrecision =
-      std::numeric_limits::max();
+  template