1- /// `RV64`: Convenience macro to wrap the `csrrs` assembly instruction for reading a CSR register.
1+ /// Convenience macro to wrap the `csrrs` assembly instruction for reading a CSR register.
22///
33/// This macro should generally not be called directly.
44///
@@ -10,14 +10,14 @@ macro_rules! read_csr {
1010 #[ inline]
1111 unsafe fn _read( ) -> usize {
1212 match ( ) {
13- #[ cfg( riscv ) ]
13+ #[ cfg( any ( target_arch = "riscv32" , target_arch = "riscv64" ) ) ]
1414 ( ) => {
1515 let r: usize ;
1616 core:: arch:: asm!( concat!( "csrrs {0}, " , stringify!( $csr_number) , ", x0" ) , out( reg) r) ;
1717 r
1818 }
1919
20- #[ cfg( not( riscv ) ) ]
20+ #[ cfg( not( any ( target_arch = "riscv32" , target_arch = "riscv64" ) ) ) ]
2121 ( ) => unimplemented!( ) ,
2222 }
2323 }
@@ -36,21 +36,21 @@ macro_rules! read_csr_rv32 {
3636 #[ inline]
3737 unsafe fn _read( ) -> usize {
3838 match ( ) {
39- #[ cfg( riscv32) ]
39+ #[ cfg( target_arch = " riscv32" ) ]
4040 ( ) => {
4141 let r: usize ;
4242 core:: arch:: asm!( concat!( "csrrs {0}, " , stringify!( $csr_number) , ", x0" ) , out( reg) r) ;
4343 r
4444 }
4545
46- #[ cfg( not( riscv32) ) ]
46+ #[ cfg( not( target_arch = " riscv32" ) ) ]
4747 ( ) => unimplemented!( ) ,
4848 }
4949 }
5050 } ;
5151}
5252
53- /// `RV64`: Convenience macro to read a CSR register value as a `register` type.
53+ /// Convenience macro to read a CSR register value as a `register` type.
5454///
5555/// The `register` type must be a defined type in scope of the macro call.
5656#[ macro_export]
@@ -86,7 +86,7 @@ macro_rules! read_csr_as_rv32 {
8686 } ;
8787}
8888
89- /// `RV64`: Convenience macro to read a CSR register value as a [`usize`].
89+ /// Convenience macro to read a CSR register value as a [`usize`].
9090#[ macro_export]
9191macro_rules! read_csr_as_usize {
9292 ( $csr_number: literal) => {
@@ -114,7 +114,7 @@ macro_rules! read_csr_as_usize_rv32 {
114114 } ;
115115}
116116
117- /// `RV64`: Convenience macro to wrap the `csrrw` assembly instruction for writing to CSR registers.
117+ /// Convenience macro to wrap the `csrrw` assembly instruction for writing to CSR registers.
118118///
119119/// This macro should generally not be called directly.
120120///
@@ -127,10 +127,10 @@ macro_rules! write_csr {
127127 #[ allow( unused_variables) ]
128128 unsafe fn _write( bits: usize ) {
129129 match ( ) {
130- #[ cfg( riscv ) ]
130+ #[ cfg( any ( target_arch = "riscv32" , target_arch = "riscv64" ) ) ]
131131 ( ) => core:: arch:: asm!( concat!( "csrrw x0, " , stringify!( $csr_number) , ", {0}" ) , in( reg) bits) ,
132132
133- #[ cfg( not( riscv ) ) ]
133+ #[ cfg( not( any ( target_arch = "riscv32" , target_arch = "riscv64" ) ) ) ]
134134 ( ) => unimplemented!( ) ,
135135 }
136136 }
@@ -150,17 +150,17 @@ macro_rules! write_csr_rv32 {
150150 #[ allow( unused_variables) ]
151151 unsafe fn _write( bits: usize ) {
152152 match ( ) {
153- #[ cfg( riscv32) ]
153+ #[ cfg( target_arch = " riscv32" ) ]
154154 ( ) => core:: arch:: asm!( concat!( "csrrw x0, " , stringify!( $csr_number) , ", {0}" ) , in( reg) bits) ,
155155
156- #[ cfg( not( riscv32) ) ]
156+ #[ cfg( not( target_arch = " riscv32" ) ) ]
157157 ( ) => unimplemented!( ) ,
158158 }
159159 }
160160 } ;
161161}
162162
163- /// `RV64`: Convenience macro to write a [`usize`] value to a CSR register.
163+ /// Convenience macro to write a [`usize`] value to a CSR register.
164164#[ macro_export]
165165macro_rules! write_csr_as_usize {
166166 ( $csr_number: literal) => {
@@ -188,7 +188,7 @@ macro_rules! write_csr_as_usize_rv32 {
188188 } ;
189189}
190190
191- /// `RV64`: Convenience macro around the `csrrs` assembly instruction to set the CSR register.
191+ /// Convenience macro around the `csrrs` assembly instruction to set the CSR register.
192192///
193193/// This macro is intended for use with the [set_csr](crate::set_csr) or [set_clear_csr](crate::set_clear_csr) macros.
194194#[ macro_export]
@@ -199,10 +199,10 @@ macro_rules! set {
199199 #[ allow( unused_variables) ]
200200 unsafe fn _set( bits: usize ) {
201201 match ( ) {
202- #[ cfg( riscv ) ]
202+ #[ cfg( any ( target_arch = "riscv32" , target_arch = "riscv64" ) ) ]
203203 ( ) => core:: arch:: asm!( concat!( "csrrs x0, " , stringify!( $csr_number) , ", {0}" ) , in( reg) bits) ,
204204
205- #[ cfg( not( riscv ) ) ]
205+ #[ cfg( not( any ( target_arch = "riscv32" , target_arch = "riscv64" ) ) ) ]
206206 ( ) => unimplemented!( ) ,
207207 }
208208 }
@@ -220,17 +220,17 @@ macro_rules! set_rv32 {
220220 #[ allow( unused_variables) ]
221221 unsafe fn _set( bits: usize ) {
222222 match ( ) {
223- #[ cfg( riscv32) ]
223+ #[ cfg( target_arch = " riscv32" ) ]
224224 ( ) => core:: arch:: asm!( concat!( "csrrs x0, " , stringify!( $csr_number) , ", {0}" ) , in( reg) bits) ,
225225
226- #[ cfg( not( riscv32) ) ]
226+ #[ cfg( not( target_arch = " riscv32" ) ) ]
227227 ( ) => unimplemented!( ) ,
228228 }
229229 }
230230 } ;
231231}
232232
233- /// `RV64`: Convenience macro around the `csrrc` assembly instruction to clear the CSR register.
233+ /// Convenience macro around the `csrrc` assembly instruction to clear the CSR register.
234234///
235235/// This macro is intended for use with the [clear_csr](crate::clear_csr) or [set_clear_csr](crate::set_clear_csr) macros.
236236#[ macro_export]
@@ -241,10 +241,10 @@ macro_rules! clear {
241241 #[ allow( unused_variables) ]
242242 unsafe fn _clear( bits: usize ) {
243243 match ( ) {
244- #[ cfg( riscv ) ]
244+ #[ cfg( any ( target_arch = "riscv32" , target_arch = "riscv64" ) ) ]
245245 ( ) => core:: arch:: asm!( concat!( "csrrc x0, " , stringify!( $csr_number) , ", {0}" ) , in( reg) bits) ,
246246
247- #[ cfg( not( riscv ) ) ]
247+ #[ cfg( not( any ( target_arch = "riscv32" , target_arch = "riscv64" ) ) ) ]
248248 ( ) => unimplemented!( ) ,
249249 }
250250 }
@@ -262,10 +262,10 @@ macro_rules! clear_rv32 {
262262 #[ allow( unused_variables) ]
263263 unsafe fn _clear( bits: usize ) {
264264 match ( ) {
265- #[ cfg( riscv32) ]
265+ #[ cfg( target_arch = " riscv32" ) ]
266266 ( ) => core:: arch:: asm!( concat!( "csrrc x0, " , stringify!( $csr_number) , ", {0}" ) , in( reg) bits) ,
267267
268- #[ cfg( not( riscv32) ) ]
268+ #[ cfg( not( target_arch = " riscv32" ) ) ]
269269 ( ) => unimplemented!( ) ,
270270 }
271271 }
@@ -316,7 +316,7 @@ macro_rules! read_composite_csr {
316316 #[ inline]
317317 pub fn read64( ) -> u64 {
318318 match ( ) {
319- #[ cfg( riscv32) ]
319+ #[ cfg( target_arch = " riscv32" ) ]
320320 ( ) => loop {
321321 let hi = $hi;
322322 let lo = $lo;
@@ -325,7 +325,7 @@ macro_rules! read_composite_csr {
325325 }
326326 } ,
327327
328- #[ cfg( not( riscv32) ) ]
328+ #[ cfg( not( target_arch = " riscv32" ) ) ]
329329 ( ) => $lo as u64 ,
330330 }
331331 }
@@ -337,10 +337,10 @@ macro_rules! set_pmp {
337337 /// Set the pmp configuration corresponding to the index
338338 #[ inline]
339339 pub unsafe fn set_pmp( index: usize , range: Range , permission: Permission , locked: bool ) {
340- #[ cfg( riscv32) ]
340+ #[ cfg( target_arch = " riscv32" ) ]
341341 assert!( index < 4 ) ;
342342
343- #[ cfg( riscv64) ]
343+ #[ cfg( target_arch = " riscv64" ) ]
344344 assert!( index < 8 ) ;
345345
346346 let mut value = _read( ) ;
@@ -357,10 +357,10 @@ macro_rules! clear_pmp {
357357 /// Clear the pmp configuration corresponding to the index
358358 #[ inline]
359359 pub unsafe fn clear_pmp( index: usize ) {
360- #[ cfg( riscv32) ]
360+ #[ cfg( target_arch = " riscv32" ) ]
361361 assert!( index < 4 ) ;
362362
363- #[ cfg( riscv64) ]
363+ #[ cfg( target_arch = " riscv64" ) ]
364364 assert!( index < 8 ) ;
365365
366366 let mut value = _read( ) ;
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