Rollup merge of #144559 - CaiWeiran:extract-insert-dyn_test, r=Mark-Simulacrum

Enable extract-insert-dyn.rs test on RISC-V (riscv64)

This PR adds support for running the `tests/codegen-llvm/simd/extract-insert-dyn.rs` test on the RISC-V (riscv64) architecture.

Previously, this test would fail on RISC-V targets due to architecture-specific code generation issues. This patch modifies the test to ensure compatibility while preserving its intent.

The change has been tested locally using `./x test` on a riscv64 target, and the test now passes as expected.

### Notes:
- This change is scoped specifically to improve RISC-V compatibility.
- It does not affect behavior or test results on other architectures.

Author: Zalathar