spi problem #524
Description
For the W25Q64 (Flash) hardware, if the cs register is not set before transmission, sometimes the data can be read, and sometimes the data cannot be read.
Output
[255, 239, 64, 23]
#![no_std]
#![no_main]
use cortex_m_rt::entry;
use cortex_m::Peripherals;
use cortex_m_semihosting::debug::exit;
use cortex_m_semihosting::hprintln;
// pick a panicking behavior
use panic_halt as _;
// you can put a breakpoint on `rust_begin_unwind` to catch panics
// use panic_abort as _; // requires nightly
// use panic_itm as _; // logs messages over ITM; requires ITM support
// use panic_semihosting as _; // logs messages to the host stderr; requires a debugger
use stm32f1xx_hal::pac as pac;
use stm32f1xx_hal::prelude::*;
use stm32f1xx_hal::spi::Mode;
use stm32f1xx_hal::spi::Phase;
use stm32f1xx_hal::spi::Spi;
use stm32f1xx_hal::spi::Polarity;
#[entry]
fn main() -> ! {
let cp = Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
let rcc = dp.RCC.constrain();
let mut flash = dp.FLASH.constrain();
let clocks = rcc.cfgr.freeze(&mut flash.acr);
let mut afio = dp.AFIO.constrain();
let mut gpioa = dp.GPIOA.split();
let pins = (
gpioa.pa5.into_alternate_push_pull(&mut gpioa.crl),
gpioa.pa6.into_pull_up_input(&mut gpioa.crl),
gpioa.pa7.into_alternate_push_pull(&mut gpioa.crl)
);
let mut spi = Spi::spi1(dp.SPI1, pins, &mut afio.mapr, Mode {
polarity: Polarity::IdleLow,
phase: Phase::CaptureOnFirstTransition,
}, 8.MHz(), clocks);
// initialze spi
let mut cs = gpioa.pa4.into_push_pull_output(&mut gpioa.crl);
cs.set_high();
// start spi
cs.set_low();
let mut buf = [0x9f, 0xff, 0xff, 0xff];
spi.transfer(&mut buf).unwrap();
// stop spi
cs.set_high();
hprintln!("{:?}", buf);
exit(Ok(()));
loop {
}
}