Merge pull request #2854 from fpistm/stm32cubeWL_update

system(WL) update STM32WLxx HAL Drivers to v1.4.0

Author: fpistm

system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/stm32l552xx.h

@@ -214,7 +214,7 @@ typedef enum
 #define __FPU_PRESENT             1U        /* FPU present */
 #define __DSP_PRESENT             1U        /* DSP extension present */
 
-#include <core_cm33.h>                      /*!< ARM Cortex-M33 processor and core peripherals */
+#include "core_cm33.h"                      /*!< ARM Cortex-M33 processor and core peripherals */
 #include "system_stm32l5xx.h"               /*!< STM32L5xx System */
 
 
@@ -14729,7 +14729,7 @@ typedef struct
 
 /*******************  Bit definition for TIM_CCR5 register  *******************/
 #define TIM_CCR5_CCR5_Pos         (0U)
-#define TIM_CCR5_CCR5_Msk         (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos)          /*!< 0xFFFFFFFF */
+#define TIM_CCR5_CCR5_Msk         (0xFFFFUL << TIM_CCR5_CCR5_Pos)              /*!< 0xFFFF */
 #define TIM_CCR5_CCR5             TIM_CCR5_CCR5_Msk                            /*!<Capture/Compare 5 Value */
 #define TIM_CCR5_GC5C1_Pos        (29U)
 #define TIM_CCR5_GC5C1_Msk        (0x1UL << TIM_CCR5_GC5C1_Pos)                /*!< 0x20000000 */

system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/stm32l562xx.h

@@ -217,7 +217,7 @@ typedef enum
 #define __FPU_PRESENT             1U        /* FPU present */
 #define __DSP_PRESENT             1U        /* DSP extension present */
 
-#include <core_cm33.h>                      /*!< ARM Cortex-M33 processor and core peripherals */
+#include "core_cm33.h"                      /*!< ARM Cortex-M33 processor and core peripherals */
 #include "system_stm32l5xx.h"               /*!< STM32L5xx System */
 
 
@@ -15468,7 +15468,7 @@ typedef struct
 
 /*******************  Bit definition for TIM_CCR5 register  *******************/
 #define TIM_CCR5_CCR5_Pos         (0U)
-#define TIM_CCR5_CCR5_Msk         (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos)          /*!< 0xFFFFFFFF */
+#define TIM_CCR5_CCR5_Msk         (0xFFFFUL << TIM_CCR5_CCR5_Pos)              /*!< 0xFFFF */
 #define TIM_CCR5_CCR5             TIM_CCR5_CCR5_Msk                            /*!<Capture/Compare 5 Value */
 #define TIM_CCR5_GC5C1_Pos        (29U)
 #define TIM_CCR5_GC5C1_Msk        (0x1UL << TIM_CCR5_GC5C1_Pos)                /*!< 0x20000000 */

system/Drivers/CMSIS/Device/ST/STM32L5xx/Include/stm32l5xx.h

@@ -78,7 +78,7 @@
   */
 #define __STM32L5_CMSIS_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
 #define __STM32L5_CMSIS_VERSION_SUB1   (0x00U) /*!< [23:16] sub1 version */
-#define __STM32L5_CMSIS_VERSION_SUB2   (0x06U) /*!< [15:8]  sub2 version */
+#define __STM32L5_CMSIS_VERSION_SUB2   (0x07U) /*!< [15:8]  sub2 version */
 #define __STM32L5_CMSIS_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
 #define __STM32L5_CMSIS_VERSION        ((__STM32L5_CMSIS_VERSION_MAIN << 24U)\
                                        |(__STM32L5_CMSIS_VERSION_SUB1 << 16U)\

system/Drivers/CMSIS/Device/ST/STM32L5xx/License.md renamed to system/Drivers/CMSIS/Device/ST/STM32L5xx/LICENSE.md

@@ -2,20 +2,20 @@
 
 ![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/cmsis_device_l5.svg?color=brightgreen)
 
-## Overview
+## Overview of the STM32Cube MCU offer on GitHub
 
-**STM32Cube** is an STMicroelectronics original initiative to ease developers' life by reducing efforts, time and cost.
+**STM32Cube** is an original initiative by STMicroelectronics to **simplify** prototyping and development by **reducing** effort, time, and cost. It supports the entire ARM™ Cortex-based STM32 microcontroller portfolio and provides a **comprehensive** software solution including:
+  * The CMSIS Core and Device interfaces enabling access to processor core features and device-specific peripherals of STM32 microcontrollers.
+  * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio.
+  * The BSP drivers enabling access to peripherals on the STM32 development boards, external to the microcontroller itself.
+  * A consistent set of middleware libraries offering standardized, high-level functionalities — such as USB, TCP/IP, file systems, and graphics.
+  * A full set of software projects (basic examples, applications, and demonstrations) that showcase specific functionalities or use cases, and provided with support for multiple IDEs.
 
-**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series.
-   * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product.
-   * The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio.
-   * The BSP drivers of each evaluation, demonstration or nucleo board provided for this STM32 series.
-   * A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library...
-   * A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series.
+The **STM32Cube embedded software** is available in two flavors:
+  * The **MCU Firmware** _monolithic_ offer, where **all** software components (Drivers, Middleware, Projects, Utilities) are included in a **single** repository for each STM32 series.
+  * The **MCU Software Components** _modular_ offer, where **each** software component (mainly Drivers and Middleware) is provided in a **dedicated** repository, allowing users to **select** only the components they need.
 
-Two models of publication are proposed for the STM32Cube embedded software:
-   * The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series).
-   * The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions.
+The complete list of repositories is available [here](https://github.com/STMicroelectronics/STM32Cube_MCU_Overall_Offer/blob/master/README.md#content).
 
 ## Description
 
@@ -29,10 +29,6 @@ Details about the content of this release are available in the release note [her
 
 It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeL5/blob/master/Release_Notes.html) release note.
 
-The full **STM32CubeL5** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeL5).
+## Feedback and contributions
 
-## Troubleshooting
-
-If you have any issue with the **software content** of this repository, you can file an issue [here](https://github.com/STMicroelectronics/cmsis_device_l5/issues/new/choose).
-
-For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
+Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.

system/Drivers/CMSIS/Device/ST/STM32L5xx/README.md

@@ -43,14 +43,15 @@ <h1 id="purpose">Purpose</h1>
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history">Update History</h1>
 <div class="collapse">
-<input type="checkbox" id="collapse-section7" checked aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.0.6 / 09-February-2024</strong></label>
+<input type="checkbox" id="collapse-section8" checked aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.0.7 / 29-October-2025</strong></label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
 <p><strong>Maintenance release</strong></p>
 <h2 id="contents">Contents</h2>
 <ul>
-<li>Fix the location of .size directive in STM32CubeIDE’s startup code to allow proper size information of vector table.</li>
-<li>Add the READONLY tag to sections containing lookup tables to avoid GCC12 linker warnings if a segment is marked RWX.</li>
+<li>Fix Capture Compare register TIMx_CCR5 definition.</li>
+<li>Allow redefinition of the macro ‘VECT_TAB_OFFSET’ externally from the IDE, makefile, or command line.</li>
+<li>Update core_cm33 header file inclusion to use double quotes instead of angle brackets.</li>
 </ul>
 <h2 id="notes">Notes</h2>
 <p>Reminder:</p>
@@ -72,20 +73,49 @@ <h2 id="notes">Notes</h2>
 </div>
 </div>
 <div class="collapse">
-<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.0.5 / 04-November-2022</strong></label>
+<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.0.6 / 09-February-2024</strong></label>
 <div>
 <h2 id="main-changes-1">Main Changes</h2>
 <p><strong>Maintenance release</strong></p>
 <h2 id="contents-1">Contents</h2>
 <ul>
+<li>Fix the location of .size directive in STM32CubeIDE’s startup code to allow proper size information of vector table.</li>
+<li>Add the READONLY tag to sections containing lookup tables to avoid GCC12 linker warnings if a segment is marked RWX.</li>
+</ul>
+<h2 id="notes-1">Notes</h2>
+<p>Reminder:</p>
+<ul>
+<li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
+<ul>
+<li>template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core).</li>
+<li>default Security Attribute Unit (SAU) configuration in the partition_stm32l552xx.h and partition_stm32l562xx.h:
+<ul>
+<li>SAU region 0: 0x0C03E000-0x0C03FFFF (Secure, Non-Secure Callable)</li>
+<li>SAU region 1: 0x08040000-0x0807FFFF (Non-Secure FLASH Bank2 (256 Kbytes))</li>
+<li>SAU region 2: 0x20018000-0x2003FFFF (Non-Secure RAM (2nd half SRAM1 + SRAM2 (160 Kbytes)))</li>
+<li>SAU region 3: 0x40000000-0x4FFFFFFF (Non-Secure Peripheral mapped memory)</li>
+<li>SAU region 4: 0x60000000-0x9FFFFFFF (Non-Secure external memories)</li>
+<li>SAU region 5: 0x0BF90000-0x0BFA8FFF (Non-Secure System memory)</li>
+</ul></li>
+</ul></li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.0.5 / 04-November-2022</strong></label>
+<div>
+<h2 id="main-changes-2">Main Changes</h2>
+<p><strong>Maintenance release</strong></p>
+<h2 id="contents-2">Contents</h2>
+<ul>
 <li>General updates to fix known defects and implementation enhancements.</li>
 <li>All source files: update disclaimer to add reference to the new license agreement.</li>
 <li>Add new atomic register access macros in stm32l5xx.h file.</li>
 <li>Update to fix compilation error “-Werror=undef” with ARMCC version.</li>
 <li>Add missing parameter after <span class="citation" data-cites="param">@param</span> in order to fix warning in generated documentation</li>
 <li>Change addresses of ROM symbols in <em><em>sram</em></em>.icf template files to code region alias in order to increase performance while running code from SRAM</li>
 </ul>
-<h2 id="notes-1">Notes</h2>
+<h2 id="notes-2">Notes</h2>
 <p>Reminder:</p>
 <ul>
 <li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
@@ -107,9 +137,9 @@ <h2 id="notes-1">Notes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.0.4 / 10-February-2021</strong></label>
 <div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
 <p><strong>Maintenance release</strong></p>
-<h2 id="contents-2">Contents</h2>
+<h2 id="contents-3">Contents</h2>
 <p>Maintenance release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
 <ul>
 <li>stm32l552xx.h and stm32l562xx.h updates
@@ -118,7 +148,7 @@ <h2 id="contents-2">Contents</h2>
 <li>Fix I2C4_EV_IRQn and I2C4_ER_IRQn order in IRQn_Type</li>
 </ul></li>
 </ul>
-<h2 id="notes-2">Notes</h2>
+<h2 id="notes-3">Notes</h2>
 <p>Reminder:</p>
 <ul>
 <li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
@@ -140,9 +170,9 @@ <h2 id="notes-2">Notes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 26-June-2020</strong></label>
 <div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
 <p><strong>Fourth release</strong></p>
-<h2 id="contents-3">Contents</h2>
+<h2 id="contents-4">Contents</h2>
 <p>Fourth release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
 <ul>
 <li>stm32l552xx.h and stm32l562xx.h updates
@@ -158,7 +188,7 @@ <h2 id="contents-3">Contents</h2>
 <li>Add README.md and License.md files for GitHub publication</li>
 <li>Misspelled words corrections in driver descriptions</li>
 </ul>
-<h2 id="notes-3">Notes</h2>
+<h2 id="notes-4">Notes</h2>
 <p>Reminder:</p>
 <ul>
 <li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
@@ -180,9 +210,9 @@ <h2 id="notes-3">Notes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 12-February-2020</strong></label>
 <div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
 <p><strong>Third release</strong></p>
-<h2 id="contents-4">Contents</h2>
+<h2 id="contents-5">Contents</h2>
 <p>Third official release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
 <ul>
 <li>stm32l552xx.h and stm32l562xx.h updates
@@ -192,7 +222,7 @@ <h2 id="contents-4">Contents</h2>
 <li>Align DBGMCU_APB2FZR register and bits definitions with RM0438</li>
 </ul></li>
 </ul>
-<h2 id="notes-4">Notes</h2>
+<h2 id="notes-5">Notes</h2>
 <p>Reminder:</p>
 <ul>
 <li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
@@ -214,17 +244,17 @@ <h2 id="notes-4">Notes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section2" unchecked aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 22-January-2020</strong></label>
 <div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
 <p><strong>Second release</strong></p>
-<h2 id="contents-5">Contents</h2>
+<h2 id="contents-6">Contents</h2>
 <p>Second official release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
 <ul>
 <li>Templates system_stm32l5xx.c, system_stm32l5xx_s.c and system_stm32l5xx_ns.c
 <ul>
 <li>Add vector table relocation capability with conditional USER_VECT_TAB_ADDRESS</li>
 </ul></li>
 </ul>
-<h2 id="notes-5">Notes</h2>
+<h2 id="notes-6">Notes</h2>
 <p>Reminder:</p>
 <ul>
 <li>When TrustZone is enabled in the system (Flash option bit TZEN=1)
@@ -246,9 +276,9 @@ <h2 id="notes-5">Notes</h2>
 <div class="collapse">
 <input type="checkbox" id="collapse-section1" unchecked aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 13-December-2019</strong></label>
 <div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
 <p><strong>First release</strong></p>
-<h2 id="contents-6">Contents</h2>
+<h2 id="contents-7">Contents</h2>
 <p>First official release of STM32L5xx CMSIS Device drivers to support <strong>STM32L552xx and STM32L562xx</strong> devices</p>
 <ul>
 <li>Templates
@@ -266,7 +296,7 @@ <h2 id="contents-6">Contents</h2>
 <li>Linker files for 256 and 512 Kbytes Flash device configurations</li>
 </ul></li>
 </ul>
-<h2 id="notes-6">Notes</h2>
+<h2 id="notes-7">Notes</h2>
 <p>When TrustZone is enabled in the system (Flash option bit TZEN=1), template device partition_stm32l552xx.h or partition_stm32l562xx.h file must be copied and optionally updated in user application secure project to configure the system (SAU, interrupts, core)</p>
 </div>
 </div>

system/Drivers/CMSIS/Device/ST/STM32L5xx/Release_Notes.html

@@ -143,14 +143,14 @@
 #if defined(VECT_TAB_SRAM)
 #define VECT_TAB_BASE_ADDRESS   SRAM1_BASE      /*!< Vector Table base address field.
                                                      This value must be a multiple of 0x200. */
-#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
-                                                     This value must be a multiple of 0x200. */
 #else
 #define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
                                                      This value must be a multiple of 0x200. */
-#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
-                                                     This value must be a multiple of 0x200. */
 #endif /* VECT_TAB_SRAM */
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table offset field.
+                                                     This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_OFFSET */
 #endif /* USER_VECT_TAB_ADDRESS */
 
 /******************************************************************************/

system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/system_stm32l5xx.c

@@ -97,13 +97,19 @@
 #if defined(VECT_TAB_SRAM)
 #define VECT_TAB_BASE_ADDRESS   SRAM1_BASE_NS   /*!< Vector Table base address field.
                                                      This value must be a multiple of 0x200. */
+#if !defined(VECT_TAB_OFFSET)
 #define VECT_TAB_OFFSET         0x00018000U     /*!< Vector Table base offset field.
                                                      This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_OFFSET */
+
 #else
 #define VECT_TAB_BASE_ADDRESS   FLASH_BASE_NS   /*!< Vector Table base address field.
                                                      This value must be a multiple of 0x200. */
+#if !defined(VECT_TAB_OFFSET)
 #define VECT_TAB_OFFSET         0x00040000U     /*!< Vector Table base offset field.
                                                      This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_OFFSET */
+
 #endif /* VECT_TAB_SRAM */
 #endif /* USER_VECT_TAB_ADDRESS */
 

system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/system_stm32l5xx_ns.c

@@ -159,14 +159,14 @@
 #if defined(VECT_TAB_SRAM)
 #define VECT_TAB_BASE_ADDRESS   SRAM1_BASE_S    /*!< Vector Table base address field.
                                                      This value must be a multiple of 0x200. */
-#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
-                                                     This value must be a multiple of 0x200. */
 #else
 #define VECT_TAB_BASE_ADDRESS   FLASH_BASE_S    /*!< Vector Table base address field.
                                                      This value must be a multiple of 0x200. */
-#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
-                                                     This value must be a multiple of 0x200. */
 #endif /* VECT_TAB_SRAM */
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table offset field.
+                                                     This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_OFFSET */
 #endif /* USER_VECT_TAB_ADDRESS */
 
 /******************************************************************************/

system/Drivers/CMSIS/Device/ST/STM32L5xx/Source/Templates/system_stm32l5xx_s.c

@@ -80,7 +80,7 @@
   * @brief CMSIS Device version number
   */
 #define __STM32WLxx_CMSIS_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
-#define __STM32WLxx_CMSIS_VERSION_SUB1   (0x02U) /*!< [23:16] sub1 version */
+#define __STM32WLxx_CMSIS_VERSION_SUB1   (0x03U) /*!< [23:16] sub1 version */
 #define __STM32WLxx_CMSIS_VERSION_SUB2   (0x00U) /*!< [15:8]  sub2 version */
 #define __STM32WLxx_CMSIS_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
 #define __STM32WLxx_CMSIS_DEVICE_VERSION        ((__STM32WLxx_CMSIS_VERSION_MAIN << 24)\