From b36c0de90c143837d507b923c0b2cc75a622638f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20W=C3=BCtherich?= <117232355+wuetj@users.noreply.github.com> Date: Wed, 26 Nov 2025 20:50:58 +0100 Subject: [PATCH 1/2] tests: Update exc_return test CPU The previously used UC_MODE_MCLASS causes UC_CPU_ARM_CORTEX_M33 to be used. This CPU features ARM_FEATURE_M_SECURITY for which handler mode checks are skipped upopn exception return. This reveals a previously undetected issue. --- tests/unit/test_arm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/unit/test_arm.c b/tests/unit/test_arm.c index 3b0c7915cb..b804892f96 100644 --- a/tests/unit/test_arm.c +++ b/tests/unit/test_arm.c @@ -286,8 +286,8 @@ static void test_arm_m_exc_return(void) int r_sp = 0x8000; uc_hook hook; - uc_common_setup(&uc, UC_ARCH_ARM, UC_MODE_THUMB | UC_MODE_MCLASS, code, - sizeof(code) - 1, UC_CPU_ARM_CORTEX_A15); + uc_common_setup(&uc, UC_ARCH_ARM, UC_MODE_THUMB, code, + sizeof(code) - 1, UC_CPU_ARM_CORTEX_M7); OK(uc_mem_map(uc, r_sp - 0x1000, 0x1000, UC_PROT_ALL)); OK(uc_hook_add(uc, &hook, UC_HOOK_INTR, test_arm_m_exc_return_hook_interrupt, NULL, 0, 0)); From 565aba0b57c077db44b252a2ab3778c9dbabb14f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20W=C3=BCtherich?= <117232355+wuetj@users.noreply.github.com> Date: Wed, 26 Nov 2025 20:50:58 +0100 Subject: [PATCH 2/2] target/arm: Rebuild hflags after modifying xpsr Modifying xpsr might change processor state, after which the cached TBFLAGS need to be rebuild. --- qemu/target/arm/unicorn_arm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/qemu/target/arm/unicorn_arm.c b/qemu/target/arm/unicorn_arm.c index 7ecd0416d6..0a2a578800 100644 --- a/qemu/target/arm/unicorn_arm.c +++ b/qemu/target/arm/unicorn_arm.c @@ -154,6 +154,7 @@ static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask, uint32_t reg, } xpsr_write(env, val, xpsrmask); + arm_rebuild_hflags(env); } static uc_err read_cp_reg(CPUARMState *env, uc_arm_cp_reg *cp)