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duynguyenxaduynguyenxa
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drivers: misc: Initial support for drw driver on Renesas RA
First commit to add support for Renesas RA drw driver Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
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‎drivers/misc/CMakeLists.txt‎

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@@ -14,6 +14,7 @@ add_subdirectory_ifdef(CONFIG_RENESAS_RA_EXTERNAL_INTERRUPT renesas_ra_external_
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add_subdirectory_ifdef(CONFIG_RENESAS_RX_EXTERNAL_INTERRUPT renesas_rx_external_interrupt)
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add_subdirectory_ifdef(CONFIG_NXP_RTXXX_DSP_CTRL nxp_rtxxx_dsp_ctrl)
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add_subdirectory_ifdef(CONFIG_STM32N6_AXISRAM stm32n6_axisram)
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add_subdirectory_ifdef(CONFIG_RENESAS_DRW renesas_drw)
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add_subdirectory(coresight)
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add_subdirectory(interconn)

‎drivers/misc/Kconfig‎

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@@ -22,5 +22,6 @@ source "drivers/misc/renesas_rx_external_interrupt/Kconfig"
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source "drivers/misc/nxp_rtxxx_dsp_ctrl/Kconfig"
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source "drivers/misc/stm32n6_axisram/Kconfig"
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source "drivers/misc/nxp_inputmux/Kconfig"
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source "drivers/misc/renesas_drw/Kconfig"
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endmenu

‎drivers/misc/renesas_drw/CMakeLists.txt‎

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# SPDX-License-Identifier: Apache-2.0
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zephyr_library()
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zephyr_library_sources_ifdef(CONFIG_RENESAS_RA_DRW renesas_ra_drw.c)

‎drivers/misc/renesas_drw/Kconfig‎

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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# Renesas Event Link Controller config options
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menuconfig RENESAS_DRW
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bool "Renesas DRW Driver"
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depends on SOC_FAMILY_RENESAS_RA
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help
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Enable config options for Renesas DRW driver
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if RENESAS_DRW
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config RENESAS_DRW_INIT_PRIORITY
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int "Renesas DRW initialization priority"
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default KERNEL_INIT_PRIORITY_DEVICE
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help
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System initialization priority for Renesas DRW drivers.
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source "drivers/misc/renesas_drw/Kconfig.renesas_ra_drw"
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endif # RENESAS_DRW

‎drivers/misc/renesas_drw/Kconfig.renesas_ra_drw‎

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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config RENESAS_RA_DRW
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bool "Renesas RA DRW Driver"
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depends on DT_HAS_RENESAS_RA_DRW_ENABLED
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select USE_RA_FSP_DRW if SOC_FAMILY_RENESAS_RA
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select USE_RENESAS_DAVE2D_LIB
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default y
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help
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Enable config options for Renesas DRW driver
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if RENESAS_RA_DRW
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config RENESAS_DAVE2D_RUNTIME_HEAP_SIZE
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int "Renesas DAVE2D runtime heap size"
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default 8192
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help
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Set the size of the runtime heap for DAVE2D driver.
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This heap is used for dynamic meory allocation during runtime.
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endif # RENESAS_RA_DRW

‎drivers/misc/renesas_drw/renesas_ra_drw.c‎

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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_ra_drw
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#include <zephyr/kernel.h>
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#include <zephyr/irq.h>
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#include <soc.h>
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#include <r_drw_base.h>
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#include <r_drw_cfg.h>
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#define DRW_PRV_IRQCTL_DLISTIRQ_ENABLE (1U << 1)
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#define DRW_PRV_IRQCTL_ENUMIRQ_CLEAR (1U << 2)
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#define DRW_PRV_IRQCTL_DLISTIRQ_CLEAR (1U << 3)
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#define DRW_PRV_IRQCTL_BUSIRQ_CLEAR (1U << 5)
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#define DRW_PRV_IRQCTL_ALLIRQ_DISABLE_AND_CLEAR \
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(DRW_PRV_IRQCTL_BUSIRQ_CLEAR | DRW_PRV_IRQCTL_DLISTIRQ_CLEAR | DRW_PRV_IRQCTL_ENUMIRQ_CLEAR)
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#define DRW_PRV_IRQCTL_ALLIRQ_CLEAR_AND_DLISTIRQ_ENABLE \
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(DRW_PRV_IRQCTL_BUSIRQ_CLEAR | DRW_PRV_IRQCTL_DLISTIRQ_CLEAR | \
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DRW_PRV_IRQCTL_ENUMIRQ_CLEAR | DRW_PRV_IRQCTL_DLISTIRQ_ENABLE)
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#define DRW_PRV_STATUS_DLISTIRQ_TRIGGERED (1U << 5)
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#define VECTOR_NUMBER_DRW_INT DT_IRQN(DT_NODELABEL(drw))
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#if defined(VECTOR_NUMBER_DRW_INT)
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#define DRW_CFG_INT_IRQ VECTOR_NUMBER_DRW_INT
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#endif
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static struct k_sem d1_queryirq_sem;
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K_HEAP_DEFINE(drw_heap_runtime, CONFIG_RENESAS_DAVE2D_RUNTIME_HEAP_SIZE);
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d1_int_t d1_initirq_intern(d1_device_flex *handle)
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{
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d1_int_t ret = 1;
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if (DRW_CFG_INT_IRQ >= 0) {
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/* Clear all the D/AVE 2D IRQs and enable Display list IRQ. */
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R_DRW->IRQCTL = DRW_PRV_IRQCTL_ALLIRQ_CLEAR_AND_DLISTIRQ_ENABLE;
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R_FSP_IsrContextSet((IRQn_Type)DRW_CFG_INT_IRQ, handle);
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}
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/* Initialize semaphore for use in d1_queryirq() */
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if (0 != k_sem_init(&d1_queryirq_sem, 0, 1)) {
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ret = 0;
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}
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return ret;
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}
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d1_int_t d1_shutdownirq_intern(d1_device_flex *handle)
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{
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ARG_UNUSED(handle);
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/* Disable D/AVE 2D interrupt in NVIC. */
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irq_disable(DRW_CFG_INT_IRQ);
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/* Clear all the D/AVE 2D IRQs and disable Display list IRQ. */
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R_DRW->IRQCTL = DRW_PRV_IRQCTL_ALLIRQ_DISABLE_AND_CLEAR;
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return 1;
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}
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d1_int_t d1_queryirq(d1_device *handle, d1_int_t irqmask, d1_int_t timeout)
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{
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d1_int_t ret = 1;
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/* Wait for dlist processing to complete. */
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int err = k_sem_take(&d1_queryirq_sem, K_MSEC(timeout));
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/* If the wait timed out return 0. */
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if (err != 0) {
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ret = 0;
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}
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return ret;
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}
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void *d1_malloc(d1_uint_t size)
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{
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return k_heap_alloc(&drw_heap_runtime, size, K_NO_WAIT);
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}
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void d1_free(void *ptr)
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{
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k_heap_free(&drw_heap_runtime, ptr);
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}
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void drw_zephyr_irq_handler(const struct device *dev)
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{
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uint32_t int_status;
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IRQn_Type irq = R_FSP_CurrentIrqGet();
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/* Read D/AVE 2D interrupt status */
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int_status = R_DRW->STATUS;
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/* Get current IRQ number */
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/* Clear all D/AVE 2D interrupts except for Display List IRQ enable */
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R_DRW->IRQCTL = DRW_PRV_IRQCTL_ALLIRQ_CLEAR_AND_DLISTIRQ_ENABLE;
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if (int_status & DRW_PRV_STATUS_DLISTIRQ_TRIGGERED) {
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#if DRW_CFG_USE_DLIST_INDIRECT
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d1_device_flex *p_context = (d1_device_flex *)R_FSP_IsrContextGet(irq);
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if (p_context->dlist_indirect_enable &&
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(NULL != (uint32_t *)*(p_context->pp_dlist_indirect_start))) {
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R_DRW->DLISTSTART = *(p_context->pp_dlist_indirect_start);
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p_context->pp_dlist_indirect_start++;
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} else
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#endif
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{
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k_sem_give(&d1_queryirq_sem);
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}
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}
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/* Clear IRQ status. */
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R_BSP_IrqStatusClear(irq);
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/* No explicit irq_clear needed unless your platform requires it */
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}
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#define DRW_INIT(inst) \
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static int drw_renesas_ra_configure_func_##inst(void) \
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{ \
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R_ICU->IELSR[DT_INST_IRQ_BY_NAME(inst, drw, irq)] = ELC_EVENT_DRW_INT; \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(inst, drw, irq), \
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DT_INST_IRQ_BY_NAME(inst, drw, priority), drw_zephyr_irq_handler, \
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DEVICE_DT_INST_GET(inst), 0); \
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irq_enable(DT_INST_IRQ_BY_NAME(inst, drw, irq)); \
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return 0; \
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} \
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static int renesas_drw_init_##inst(const struct device *dev) \
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{ \
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ARG_UNUSED(dev); \
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return drw_renesas_ra_configure_func_##inst(); \
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} \
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DEVICE_DT_INST_DEFINE(inst, renesas_drw_init_##inst, NULL, NULL, NULL, POST_KERNEL, \
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CONFIG_RENESAS_DRW_INIT_PRIORITY, NULL);
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DT_INST_FOREACH_STATUS_OKAY(DRW_INIT)

‎dts/bindings/misc/renesas,ra-drw.yaml‎

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Renesas RA DRW
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compatible: "renesas,ra-drw"
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include: base.yaml
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properties:
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interrupts:
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required: true

‎modules/Kconfig.renesas‎

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@@ -243,6 +243,11 @@ config USE_RA_FSP_IPC
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help
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Enable RA FSP IPC driver
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config USE_RA_FSP_DRW
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bool
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help
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Enable RA FSP DRW driver
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endif # HAS_RENESAS_RA_FSP
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if HAS_RENESAS_RZ_FSP

‎modules/lvgl/Kconfig‎

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@@ -198,6 +198,10 @@ config LV_DRAW_DMA2D_HAL_INCLUDE
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Must be defined to include path of CMSIS header of target processor
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e.g. "stm32f769xx.h" or "stm32f429xx.h"
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config LV_USE_DRAW_DAVE2D
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bool
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select RENESAS_DRW
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config LV_Z_USE_OSAL
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bool "Use OSAL enabling parallel rendering"
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depends on DYNAMIC_THREAD

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