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drivers: interrupt-controller: Add support Group interrupt driver on RX
Add support Group interrupt driver on RX Signed-off-by: Tatsuya Ogawa <tatsuya.ogawa.nx@renesas.com>
1 parent cfe81d9 commit ba23599

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6 files changed

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-3
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6 files changed

+314
-3
lines changed

‎drivers/interrupt_controller/CMakeLists.txt‎

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Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ zephyr_library_sources_ifdef(CONFIG_NXP_SIUL2_EIRQ intc_nxp_siul2_eirq.
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zephyr_library_sources_ifdef(CONFIG_NXP_S32_WKPU intc_wkpu_nxp_s32.c)
4545
zephyr_library_sources_ifdef(CONFIG_XMC4XXX_INTC intc_xmc4xxx.c)
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zephyr_library_sources_ifdef(CONFIG_NXP_PINT intc_nxp_pint.c)
47+
zephyr_library_sources_ifdef(CONFIG_RENESAS_RX_GRP_INTC intc_renesas_rx_grp_int.c)
4748
zephyr_library_sources_ifdef(CONFIG_RENESAS_RX_ICU intc_renesas_rx_icu.c)
4849
zephyr_library_sources_ifdef(CONFIG_RENESAS_RZ_EXT_IRQ intc_renesas_rz_ext_irq.c)
4950
zephyr_library_sources_ifdef(CONFIG_NXP_IRQSTEER intc_nxp_irqsteer.c)

‎drivers/interrupt_controller/Kconfig.renesas_rx‎

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Original file line numberDiff line numberDiff line change
@@ -7,3 +7,10 @@ config RENESAS_RX_ICU
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depends on DT_HAS_RENESAS_RX_ICU_ENABLED
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help
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Renesas RX series interrupt controller unit
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config RENESAS_RX_GRP_INTC
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bool "Renesas RX series group interrupt"
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default y
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depends on DT_HAS_RENESAS_RX_GRP_INTC_ENABLED
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help
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Renesas RX series group interrupt feature

‎drivers/interrupt_controller/intc_renesas_rx_grp_int.c‎

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@@ -0,0 +1,155 @@
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_rx_grp_intc
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#include <zephyr/device.h>
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#include <zephyr/irq.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/drivers/interrupt_controller/intc_renesas_rx_grp_int.h>
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#include <errno.h>
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extern void group_bl0_handler_isr(void);
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extern void group_bl1_handler_isr(void);
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extern void group_bl2_handler_isr(void);
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extern void group_al0_handler_isr(void);
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extern void group_al1_handler_isr(void);
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#define VECT_GROUP_BL0 DT_IRQN(DT_NODELABEL(group_irq_bl0))
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#define VECT_GROUP_BL1 DT_IRQN(DT_NODELABEL(group_irq_bl1))
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#define VECT_GROUP_BL2 DT_IRQN(DT_NODELABEL(group_irq_bl2))
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#define VECT_GROUP_AL0 DT_IRQN(DT_NODELABEL(group_irq_al0))
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#define VECT_GROUP_AL1 DT_IRQN(DT_NODELABEL(group_irq_al1))
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/**
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* @brief configuration data for a group interrupt device
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*/
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struct rx_grp_int_cfg {
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/* address of the Group Interrupt Request Enable Register (GENxxx) */
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volatile uint32_t *gen;
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/* vector number of the interrupt */
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const uint8_t vect;
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/* priority of the interrupt */
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const uint8_t prio;
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};
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struct rx_grp_int_data {
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struct k_spinlock lock;
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};
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int rx_grp_intc_set_callback(const struct device *dev, bsp_int_src_t vector, bsp_int_cb_t callback,
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void *context)
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{
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ARG_UNUSED(dev);
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bsp_int_err_t err;
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err = R_BSP_InterruptWrite_EX(vector, callback, context);
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if (err != BSP_INT_SUCCESS) {
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err = -EINVAL;
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}
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return err;
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}
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int rx_grp_intc_set_grp_int(const struct device *dev, bsp_int_src_t vector, bool set)
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{
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const struct rx_grp_int_cfg *cfg = dev->config;
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struct rx_grp_int_data *data = dev->data;
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volatile bsp_int_ctrl_t group_priority;
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bsp_int_err_t err;
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group_priority.ipl = cfg->prio;
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k_spinlock_key_t key = k_spin_lock(&data->lock);
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if (set) {
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/* ENABLE GROUP INTERRUPTS */
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err = R_BSP_InterruptControl(vector, BSP_INT_CMD_GROUP_INTERRUPT_ENABLE,
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(void *)&group_priority);
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} else {
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/* DISABLE GROUP INTERRUPTS */
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err = R_BSP_InterruptControl(vector, BSP_INT_CMD_GROUP_INTERRUPT_DISABLE, NULL);
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}
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k_spin_unlock(&data->lock, key);
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if (err != BSP_INT_SUCCESS) {
80+
return -EINVAL;
81+
}
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return err;
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}
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int rx_grp_intc_set_gen(const struct device *dev, int is_number, bool set)
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{
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const struct rx_grp_int_cfg *cfg = dev->config;
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struct rx_grp_int_data *data = dev->data;
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if (is_number < 0 || is_number > 31) {
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return -EINVAL;
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}
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k_spinlock_key_t key = k_spin_lock(&data->lock);
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if (set) {
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/* ENABLE GROUP INTERRUPTS */
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*cfg->gen |= (1U << is_number);
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} else {
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/* DISABLE GROUP INTERRUPTS */
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*cfg->gen &= ~(1U << is_number);
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}
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k_spin_unlock(&data->lock, key);
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return 0;
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}
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static int rx_grp_intc_init(const struct device *dev)
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{
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const struct rx_grp_int_cfg *cfg = dev->config;
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switch (cfg->vect) {
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case VECT_GROUP_BL0:
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IRQ_CONNECT(VECT_GROUP_BL0, cfg->prio, group_bl0_handler_isr, NULL, 0);
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break;
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case VECT_GROUP_BL1:
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IRQ_CONNECT(VECT_GROUP_BL1, cfg->prio, group_bl1_handler_isr, NULL, 0);
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break;
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case VECT_GROUP_BL2:
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IRQ_CONNECT(VECT_GROUP_BL2, cfg->prio, group_bl2_handler_isr, NULL, 0);
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break;
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case VECT_GROUP_AL0:
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IRQ_CONNECT(VECT_GROUP_AL0, cfg->prio, group_al0_handler_isr, NULL, 0);
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break;
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case VECT_GROUP_AL1:
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IRQ_CONNECT(VECT_GROUP_AL1, cfg->prio, group_al1_handler_isr, NULL, 0);
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break;
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default:
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/* ERROR */
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return -EINVAL;
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}
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irq_enable(cfg->vect);
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return 0;
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}
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#define GRP_INT_RX_INIT(index) \
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static struct rx_grp_int_cfg rx_grp_int_##index##_cfg = { \
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.gen = (uint32_t *)DT_INST_REG_ADDR_BY_NAME(index, GEN), \
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.vect = DT_INST_IRQN(index), \
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.prio = DT_INST_IRQ(index, priority), \
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}; \
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static struct rx_grp_int_data rx_grp_int_##index##_data; \
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static int rx_grp_int_##index##_init(const struct device *dev) \
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{ \
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return rx_grp_intc_init(dev); \
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} \
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DEVICE_DT_INST_DEFINE(index, rx_grp_int_##index##_init, NULL, &rx_grp_int_##index##_data, \
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&rx_grp_int_##index##_cfg, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, NULL);
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DT_INST_FOREACH_STATUS_OKAY(GRP_INT_RX_INIT);

‎dts/bindings/interrupt-controller/renesas,rx-grp-intc.yaml‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
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# Copyright (c) 2021 KT-Elektronik Klaucke und Partner GmbH
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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Renesas group interrupt
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compatible: "renesas,rx-grp-intc"
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include: [interrupt-controller.yaml, base.yaml]
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properties:
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reg:
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required: true
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reg-names:
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required: true
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"#interrupt-cells":
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const: 2
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interrupt-cells:
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- irq
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- priority

‎dts/rx/renesas/rx26t-common.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -38,9 +38,12 @@
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<0x0087300 0xff>,
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<0x00872f0 0x02>,
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<0x0087500 0x0f>,
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<0x0087510 0x01>,
42-
<0x0087514 0x01>;
43-
reg-names = "IR", "IER", "IPR", "FIR", "IRQCR", "IRQFLTE", "IRQFLTC0";
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<0x0087520 0x01>,
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<0x0087521 0x01>,
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<0x0087528 0x01>,
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<0x008752a 0x01>;
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reg-names = "IR", "IER", "IPR", "FIR", "IRQCR", "IRQFLTE",
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"IRQFLTE1", "IRQFLTC0", "IRQFLTC1";
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4548
swint1: swint1@872e0 {
4649
compatible = "renesas,rx-swint";
@@ -558,5 +561,77 @@
558561
zephyr,memory-region = "OFSM";
559562
status = "okay";
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};
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group_irq_be0: grp_intc@87600 {
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compatible = "renesas,rx-grp-intc";
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interrupt-controller;
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label = "be0";
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reg = <0x00087600 0x04>,
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<0x00087640 0x04>;
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reg-names = "GRP", "GEN";
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interrupts = <106 4>;
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status = "disabled";
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#interrupt-cells = <2>;
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};
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group_irq_bl0: grp_intc@87630 {
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compatible = "renesas,rx-grp-intc";
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interrupt-controller;
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label = "bl0";
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reg = <0x00087630 0x04>,
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<0x00087670 0x04>;
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reg-names = "GRP", "GEN";
584+
interrupts = <110 4>;
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status = "okay";
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#interrupt-cells = <2>;
587+
};
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group_irq_bl1: grp_intc@87634 {
590+
compatible = "renesas,rx-grp-intc";
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interrupt-controller;
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label = "bl1";
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reg = <0x00087634 0x04>,
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<0x00087674 0x04>;
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reg-names = "GRP", "GEN";
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interrupts = <111 4>;
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status = "disabled";
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#interrupt-cells = <2>;
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};
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group_irq_bl2: grp_intc@87638 {
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compatible = "renesas,rx-grp-intc";
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interrupt-controller;
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label = "bl2";
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reg = <0x00087638 0x04>,
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<0x00087678 0x04>;
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reg-names = "GRP", "GEN";
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interrupts = <107 4>;
609+
status = "disabled";
610+
#interrupt-cells = <2>;
611+
};
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group_irq_al0: grp_intc@87830 {
614+
compatible = "renesas,rx-grp-intc";
615+
interrupt-controller;
616+
label = "al0";
617+
reg = <0x00087830 0x04>,
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<0x00087870 0x04>;
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reg-names = "GRP", "GEN";
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interrupts = <112 4>;
621+
status = "disabled";
622+
#interrupt-cells = <2>;
623+
};
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625+
group_irq_al1: grp_intc@87834 {
626+
compatible = "renesas,rx-grp-intc";
627+
interrupt-controller;
628+
label = "al1";
629+
reg = <0x00087834 0x04>,
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<0x00087874 0x04>;
631+
reg-names = "GRP", "GEN";
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interrupts = <113 4>;
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status = "disabled";
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#interrupt-cells = <2>;
635+
};
561636
};
562637
};

‎include/zephyr/drivers/interrupt_controller/intc_renesas_rx_grp_int.h‎

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@@ -0,0 +1,51 @@
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RENESAS_RX_GRP_INT_H_
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#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RENESAS_RX_GRP_INT_H_
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9+
#include "platform.h"
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/**
12+
* @brief Enables or disables a group interrupt for a given interrupt vector.
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*
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* @param dev RX group interrupt device.
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* @param vector The interrupt vector (bsp_int_src_t) to be controlled.
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* @param set A boolean indicating enable or disable.
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*
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* @retval 0 If successful.
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* @retval -EINVAL if the interrupt control operation fails.
20+
*/
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int rx_grp_intc_set_grp_int(const struct device *dev, bsp_int_src_t vector, bool set);
22+
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/**
24+
* @brief Enables or disables a specific group interrupt source by setting or clearing the
25+
* corresponding bit (is_number) in the group interrupt register.
26+
*
27+
* @param dev RX group interrupt device.
28+
* @param is_number Index of the interrupt source (0–31) within the group.
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* @param set A boolean indicating enable or disable.
30+
*
31+
* @retval 0 If successful.
32+
* @retval -EINVAL if the interrupt control operation fails.
33+
*/
34+
int rx_grp_intc_set_gen(const struct device *dev, int is_number, bool set);
35+
36+
/**
37+
* @brief Registers a callback function for a specific group interrupt source (vector). When the
38+
* interrupt is triggered, the provided callback is executed with the associated context.
39+
*
40+
* @param dev RX group interrupt device.
41+
* @param vector Interrupt source to attach the callback to.
42+
* @param callback Function to be called when the interrupt occurs.
43+
* @param context Pointer to user-defined data passed to the callback.
44+
*
45+
* @retval 0 if successful.
46+
* @retval -EINVAL if the callback registration fails.
47+
*/
48+
int rx_grp_intc_set_callback(const struct device *dev, bsp_int_src_t vector, bsp_int_cb_t callback,
49+
void *context);
50+
51+
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RENESAS_RX_GRP_INT_H_ */

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