Skip to content

2 ‐ Architecture

QualityCroissant edited this page Jan 15, 2025 · 7 revisions

Fox Architecture Fox architecture is inspired primarily by x86/x64 and a little by PIC Microcontroller architecture. However, it is more simplistic than both of these systems in multiple ways. By staying familiar and not trying to introduce too many new concepts, the aim is to make the architecture as easy to work with as possible.

In Fox, every size matches the word-size of 64 bits (8 bytes): opcodes are 64 bits, operands are 64 bits each, memory addresses are 64 bits each, the data at the addresses in memory take 64 bits each, etc. However, there is one exception to this rule, and that is reading/writing to Input and Output, for Standard I/O and Secondary Storage. In this case, only the lowest byte of the Memory Data Register is written or read to (Fox uses little-Endian). As of v0.1-alpha, setting the position of Disk access only uses the first four bytes of the MDR, and treats them as a signed integer, too.

To describe the inner-workings of Fox architecture in a more clear way, here is a flowchart showing the steps taken from boot-to-end of any given ROM: Fox Execution Concerning I/O, this is the main way that a given process can interact with everything on the machine, not just external Input and Output: both Main Memory and the Callstack are interacted with through this facet as well.

Every I/O operation is performed using the MAR, the MDR, and the MCH. The MCH, or Memory Channel, is used to select which area of I/O read/write operations will affect. It can contain the values 0, 1, 2, 3, for Main Memory, Input, Output, and Callstack respectively. Any read/write operations will reference the value in MCH in order to determine how the values in MAR and MDR should be handled.

For loading and storing values to both the Callstack and Main Memory, MAR is simply the arbitrary number of the cell where a select 64 bits of data is stored. The addresses in each ranges from 0 to x, where x is the maximum address possible by the amount of RAM the particular machine has. In a read to Main Memory or the Callstack, all 64 bits of the data at the address indicated by MAR overwrite the contents of the MDR. In a write to Main Memory or the Callstack, all 64 bits of data in the MDR overwrite the contents of the address indicated by MAR.

Input and Output are slightly more complex. For each, If MAR contains 0, Standard I/O will be used for the operation, and any reads or writes will only affect the lowest byte of MDR. If MAR contains 1, Secondary Storage will be used for the operation, and any reads or writes will only affect the lowest byte of MDR. If MAR contains 2, this indicates that an operation involving the Screen Buffer will occur, and if MAR contains 3 or more, this indicates that an operation involving an external Peripheral with a custom File Descriptor will be occur. As of v0.4-alpha, operations on the Screen Buffer are now fully implemented, although operations for Peripheral File Descriptor are currently unimplemented.

Introduced in v0.1-alpha, for operations involving Secondary Storage specifically, Input and Output as discrete faculties are repurposed slightly: if MCH is set to Input, a store operation will set the current offset (in bytes) from the first byte of the disk to MDR, only using the first four bytes of it, and as a signed integer; a load operation will write the current offset from the first byte of the disk to MDR. Moreover, if MCH is set to Output, a store operation will overwrite the byte at the current offset on the disk with the lowest byte of MDR, thereafter incrementing the offset by one byte, and a load operation will overwrite the lowest byte of MDR with the byte on the disk at the current offset, again thereafter incrementing the offset by one byte.

Other than managing I/O, the remainder of Fox architecture is fairly simple:-

Calling simply pushes the address of the call onto the Callstack, and updates the Callstack Pointer (CSP) to the topmost address of the Callstack currently containing an address (addresses are pushed from Callstack address 0, upwards). Returning simply sets CEA equal to the value at the address of CSP in the Callstack, and then decrements CSP.

Any arithmetic operations are performed using Data and the Accumulator, or just the Accumulator for unary operations. All binary arithmetic operations are performed using the Accumulator as the left operand and Data as the right, and the result of the operation overwrites the contents of the Accumulator.

Other notable extras:-

rom being loaded into Main Memory means that program memory and data memory are not separated. Additionally, values can freely be moved between registers, absolving the architecture of the need to implement many multiple-operand instructions.

Clone this wiki locally