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Specified the status of the VRAM DMA register once a transfer is done. #624

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Specified the status of the VRAM DMA register once a transfer is done. #624

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Update CGB_Registers.md
Phidias618 Sep 14, 2025
333c116
Update CGB_Registers.md
Phidias618 Sep 14, 2025
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Update CGB_Registers.md
Phidias618 Sep 14, 2025
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Moved the description of the state of the VRAM DMA source and destina…
Phidias618 Sep 26, 2025
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Update src/CGB_Registers.md
Phidias618 Sep 27, 2025
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5 changes: 5 additions & 0 deletions src/CGB_Registers.md
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Expand Up @@ -124,6 +124,11 @@ Speed Mode).

This allows for a transfer of 2280 bytes during VBlank, which is up to 142.5 tiles.

#### Status of the registers after the end of the transfer

The source and destination address regisers are both incremented by $10 bytes for each block of $10 bytes transfered after the transfer is done.
FF55 is always equal to $FF once the transfer ends

### VRAM Banks

The CGB has twice the VRAM of the DMG, but it is banked and either bank
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