dcd/dwc2: support ISO IN transfer when bInterval > 1 #3275
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Pull Request Overview
This PR enhances the DWC2 USB device controller driver to properly support isochronous IN transfers when the bInterval is greater than 1, which is commonly used in audio applications. The changes address hardware limitations where the Even/Odd frame toggling mechanism needs special handling for different DWC2 controller variants.
Key changes include:
- Enhanced ISO IN transfer scheduling to work with any bInterval value
- Added incomplete isochronous transfer interrupt handling for robust error recovery
- Optimized single-packet transfers by writing directly to FIFO without enabling TX empty interrupts
dwc2 requires manually toggle Even/Odd bit manually for ISO IN transfer, that's poses a problem when bInterval > 1 mainly for audio class, as the moment the transfer is scheduled, we don't know when the host will issue IN token (bInterval vs bRefresh schenanigans). Linux driver use NAK interrupt to detect when the host is sending IN token and toggle the Even/Odd bit accordingly based on the current frame number and bInterval. However on ST's stripped down DWC2 FS controller (e.g STM32F4, STM32F7), NAK interrupt is not supported, even it's marked as always present in DWC2 databook. NAK interrupt is only supported on HS controller with external PHY. Instead I schedule all ISO IN transfer for next frame, if the transfer failed, incomplete isochronous IN transfer interrupt will be triggered and we can relaunch the transfer. Signed-off-by: HiFiPhile <admin@hifiphile.com>
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The programming manual section 8.2.5 says we can simply toggle Even/Odd inside Incomplete transfer interrupt, but I tried all boards I have from 2.70a to 4.20a and it never worked. 
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Isochronous IN transfer handling:
dwc2 requires manually toggle Even/Odd bit manually for ISO IN transfer, that's poses a problem when bInterval > 1 mainly for audio class, as the moment the transfer is scheduled, we don't know when the host will issue IN token (bInterval vs bRefresh shenanigans).
Linux driver use NAK interrupt to detect when the host is sending IN token and toggle the Even/Odd bit accordingly based on the current frame number and bInterval.
However on ST's stripped down DWC2 FS controller (e.g STM32F4, STM32F7), NAK interrupt is not supported, even it's marked as always present in DWC2 databook. NAK interrupt is only supported on HS controller.
Instead I schedule all ISO IN transfer for next frame, if the transfer failed, incomplete isochronous IN transfer interrupt will be triggered and we can relaunch the transfer.
Fix some issues in #3270