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farzonl
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Icohedron
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[Matrix] Add swizzle test cases (#483)
fixes #482 --------- Co-authored-by: Deric C. <cheung.deric@gmail.com>
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‎test/Basic/matrix_swizzle_one_based.test‎

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#--- source.hlsl
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RWBuffer<int> In : register(u0);
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RWBuffer<int> RowOut : register(u1);
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RWBuffer<int> ColOut : register(u2);
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[numthreads(4,1,1)]
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void main(uint GI : SV_GroupIndex) {
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int4x4 A;
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int4x4 B;
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switch(GI) {
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case 0:
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A._11_12_13_14 = In[GI].xxxx;
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B._11_21_31_41 = In[GI].xxxx;
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break;
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case 1:
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A._21_22_23_24 = In[GI].xxxx;
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B._12_22_32_42 = In[GI].xxxx;
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break;
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case 2:
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A._31_32_33_34 = In[GI].xxxx;
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B._13_23_33_43 = In[GI].xxxx;
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break;
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case 3:
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A._41_42_43_44 = In[GI].xxxx;
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B._14_24_34_44 = In[GI].xxxx;
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break;
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}
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int4 vec1;
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int4 vec2;
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switch(GI) {
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case 0:
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vec1 = A._11_12_13_14;
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vec2 = B._11_21_31_41;
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break;
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case 1:
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vec1 = A._21_22_23_24;
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vec2 = B._12_22_32_42;
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break;
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case 2:
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vec1 = A._31_32_33_34;
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vec2 = B._13_23_33_43;
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break;
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case 3:
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vec1 = A._41_42_43_44;
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vec2 = B._14_24_34_44;
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break;
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}
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for(int i = 0; i < 4; i++) {
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RowOut[GI*4+i] = vec1[i];
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ColOut[i*4+GI] = vec2[i];
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}
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: In
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Format: Int32
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Data: [ 1, 2, 3, 4]
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- Name: RowOut
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Format: Int32
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FillSize: 64
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- Name: ColOut
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Format: Int32
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FillSize: 64
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- Name: ExpectedRowOut
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Format: Int32
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Data: [ 1,1,1,1, 2,2,2,2, 3,3,3,3, 4,4,4,4 ]
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- Name: ExpectedColOut
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Format: Int32
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Data: [ 1,2,3,4, 1,2,3,4, 1,2,3,4, 1,2,3,4 ]
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Results:
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- Result: RowOut
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Rule: BufferExact
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Actual: RowOut
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Expected: ExpectedRowOut
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- Result: ColOut
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Rule: BufferExact
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Actual: ColOut
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Expected: ExpectedColOut
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DescriptorSets:
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- Resources:
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- Name: In
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Kind: RWBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: RowOut
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Kind: RWBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: ColOut
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Kind: RWBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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...
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#--- end
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# UNSUPPORTED: Clang
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_0 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

‎test/Basic/matrix_swizzle_zero_based.test‎

Lines changed: 117 additions & 0 deletions
Original file line numberDiff line numberDiff line change
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#--- source.hlsl
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RWBuffer<int> In : register(u0);
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RWBuffer<int> RowOut : register(u1);
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RWBuffer<int> ColOut : register(u2);
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[numthreads(4,1,1)]
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void main(uint GI : SV_GroupIndex) {
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int4x4 A;
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int4x4 B;
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switch(GI) {
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case 0:
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A._m00_m01_m02_m03 = In[GI].xxxx;
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B._m00_m10_m20_m30 = In[GI].xxxx;
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break;
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case 1:
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A._m10_m11_m12_m13 = In[GI].xxxx;
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B._m01_m11_m21_m31 = In[GI].xxxx;
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break;
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case 2:
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A._m20_m21_m22_m23 = In[GI].xxxx;
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B._m02_m12_m22_m32 = In[GI].xxxx;
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break;
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case 3:
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A._m30_m31_m32_m33 = In[GI].xxxx;
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B._m03_m13_m23_m33 = In[GI].xxxx;
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break;
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}
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int4 vec1;
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int4 vec2;
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switch(GI) {
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case 0:
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vec1 = A._m00_m01_m02_m03;
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vec2 = B._m00_m10_m20_m30;
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break;
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case 1:
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vec1 = A._m10_m11_m12_m13;
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vec2 = B._m01_m11_m21_m31;
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break;
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case 2:
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vec1 = A._m20_m21_m22_m23;
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vec2 = B._m02_m12_m22_m32;
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break;
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case 3:
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vec1 = A._m30_m31_m32_m33;
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vec2 = B._m03_m13_m23_m33;
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break;
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}
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for(int i = 0; i < 4; i++) {
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RowOut[GI*4+i] = vec1[i];
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ColOut[i*4+GI] = vec2[i];
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}
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: In
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Format: Int32
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Data: [ 1, 2, 3, 4]
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- Name: RowOut
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Format: Int32
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FillSize: 64
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- Name: ColOut
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Format: Int32
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FillSize: 64
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- Name: ExpectedRowOut
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Format: Int32
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Data: [ 1,1,1,1, 2,2,2,2, 3,3,3,3, 4,4,4,4 ]
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- Name: ExpectedColOut
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Format: Int32
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Data: [ 1,2,3,4, 1,2,3,4, 1,2,3,4, 1,2,3,4 ]
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Results:
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- Result: RowOut
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Rule: BufferExact
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Actual: RowOut
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Expected: ExpectedRowOut
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- Result: ColOut
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Rule: BufferExact
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Actual: ColOut
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Expected: ExpectedColOut
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DescriptorSets:
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- Resources:
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- Name: In
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Kind: RWBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: RowOut
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Kind: RWBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: ColOut
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Kind: RWBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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...
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#--- end
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# UNSUPPORTED: Clang
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_0 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

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