Add LTspice schematic

.gitignore

@@ -195,4 +195,10 @@ pip-log.txt
 ## Misc
 #############
 
-/Misc
+/Misc
+
+# SPICE
+*.log
+*.raw
+*.op.raw
+*.net

README.md

@@ -16,6 +16,7 @@ Repository Contents
 * **/Fritzing** - Fritzing Example wiring images
 * **/Hardware** - All Eagle design files (.brd, .sch)
 * **/Production** - production panel files
+* **/SPICE** - LTspice schematic
 * **/Software** - Demo program files for hookup guide
 
 

SPICE/AD8232.asy

@@ -0,0 +1,68 @@
+Version 4
+SymbolType BLOCK
+RECTANGLE Normal -144 -168 144 168
+WINDOW 0 0 -168 Bottom 2
+WINDOW 3 0 168 Top 2
+SYMATTR Prefix X
+SYMATTR Value AD8232
+SYMATTR ModelFile AD8232.cir
+PIN -144 -144 LEFT 8
+PINATTR PinName HPDRIVE
+PINATTR SpiceOrder 1
+PIN -144 -112 LEFT 8
+PINATTR PinName +IN
+PINATTR SpiceOrder 2
+PIN -144 -80 LEFT 8
+PINATTR PinName -IN
+PINATTR SpiceOrder 3
+PIN -144 -48 LEFT 8
+PINATTR PinName RLDFB
+PINATTR SpiceOrder 4
+PIN -144 -16 LEFT 8
+PINATTR PinName RLD
+PINATTR SpiceOrder 5
+PIN -144 16 LEFT 8
+PINATTR PinName SW
+PINATTR SpiceOrder 6
+PIN -144 48 LEFT 8
+PINATTR PinName OPAMP+
+PINATTR SpiceOrder 7
+PIN -144 80 LEFT 8
+PINATTR PinName REFOUT
+PINATTR SpiceOrder 8
+PIN -144 112 LEFT 8
+PINATTR PinName OPAMP-
+PINATTR SpiceOrder 9
+PIN -144 144 LEFT 8
+PINATTR PinName OUT
+PINATTR SpiceOrder 10
+PIN 144 144 RIGHT 8
+PINATTR PinName LOD-
+PINATTR SpiceOrder 11
+PIN 144 112 RIGHT 8
+PINATTR PinName LOD+
+PINATTR SpiceOrder 12
+PIN 144 80 RIGHT 8
+PINATTR PinName SDN_BAR
+PINATTR SpiceOrder 13
+PIN 144 48 RIGHT 8
+PINATTR PinName AC_DC_BAR
+PINATTR SpiceOrder 14
+PIN 144 16 RIGHT 8
+PINATTR PinName FR
+PINATTR SpiceOrder 15
+PIN 144 -16 RIGHT 8
+PINATTR PinName GND
+PINATTR SpiceOrder 16
+PIN 144 -48 RIGHT 8
+PINATTR PinName +VS
+PINATTR SpiceOrder 17
+PIN 144 -80 RIGHT 8
+PINATTR PinName REFIN
+PINATTR SpiceOrder 18
+PIN 144 -112 RIGHT 8
+PINATTR PinName IAOUT
+PINATTR SpiceOrder 19
+PIN 144 -144 RIGHT 8
+PINATTR PinName HPSENSE
+PINATTR SpiceOrder 20

SPICE/AD8232.cir

@@ -0,0 +1,189 @@
+****************************************************************************************
+* AD8232 SPICE Macro-Model		04/3 Rev. BETA 0 **		*
+* Function: Single-Lead Heart Rate Monitor 				*
+* Model created for: TOSHIBA						*
+* Generated by EA							*
+* Revised by GC							*
+* Thu, Jan 30, 2014 15:36:07 						*
+* Rev. Beta 1 revised by EA - Oct 2014 - Added CMRR and Gain Error Performacne *
+****************************************************************************************
+* Copyright 2014 by Analog Devices, Inc.
+* Refer to http://www.analog.com/Analog_Root/static/techSupport/designTools/spiceModels/license/spice_general.html
+* for License Statement. Use of this model indicates your acceptance
+* of the terms and provisions in the License Statement.
+*
+*
+* Node Assignments
+*					1
+*					|   2
+*					|   |     3
+*					|   |     |     4
+*					|   |     |     |    5
+*					|   |     |     |    |    6
+*					|   |     |     |    |    |     7
+*					|   |     |     |    |    |     |	    8
+*					|   |     |     |    |    |     |       |       9
+*					|   |     |     |    |    |     |       |       |      10
+*					|   |     |     |    |    |     |       |       |      |     11
+*					|   |     |     |    |    |     |       |       |      |     |     12
+*					|   |     |     |    |    |     |       |       |      |     |     |      13
+*					|   |     |     |    |    |     |       |       |      |     |     |      |       14
+*					|   |     |     |    |    |     |       |       |      |     |     |      |       |         15
+*					|   |     |     |    |    |     |       |       |      |     |     |      |       |         |   16
+*					|   |     |     |    |    |     |       |       |      |     |     |      |       |         |   |     17
+*					|   |     |     |    |    |     |       |       |      |     |     |      |       |         |   |     |     18
+*					|   |     |     |    |    |     |       |       |      |     |     |      |       |         |   |     |     |      19
+*					|   |     |     |    |    |     |       |       |      |     |     |      |       |         |   |     |     |      |      20
+.SUBCKT AD8232  HPDRIVE +IN -IN   RLDFB  RLD  SW  OPAMP+  REFOUT  OPAMP-   OUT  LOD-  LOD+  SDN_BAR  AC_DC_BAR  FR  GND  +VS  REFIN  IAOUT  HPSENSE
+
+C6 0 47 1e-006
+C5 0 23 1.5727e-006
+I20 0 ppp dc 3e-006 ac 0 0
+C16 HPDRIVE 0 1.5727e-006
+EV38 17 0 VALUE = { if(V(VVV)<0,-V(VVV)+50m,V(VVV)+50m) }
+EV35 IAOUT 0 47 0 1
+R46 0 47 10000000
+G19 0 47 18 47 1
+V34 VCCX 49 dc 0.9 ac 0 0
+D21 47 49 DW
+V33 48 0 dc 0.9 ac 0 0
+D20 48 47 DW
+V32 VCCX 44 dc 0.7 ac 0
+V31 45 0 dc 0.72 ac 0 0
+D19 IN+ 44 DW
+D18 45 IN+ DW
+V30 VCCX 37 dc 0.7 ac 0 0
+V29 43 0 dc 0.72 ac 0 0
+D17 IN- 37 DW
+D16 43 IN- DW
+V28 25 +IN dc 0.003 ac 0 0
+I18 0 +IN dc 5e-011 ac 0 0
+I17 -IN 0 dc 5e-011 ac 0 0
+R45 41 +IN 0.1
+R44 -IN 52 0.1
+V27 20 -IN dc 0.27 ac 0 0
+V26 42 +IN dc 0.27 ac 0 0
+D15 52 42 DY
+D14 41 20 DY
+GI16 ppp 0 VALUE = { if(V(VVV)<0,V(YYY)*.17*(V(VVV)/-.3),0) }
+R43 YYY 34 1018
+R42 32 YYY 5200
+C14 32 34 1e-007
+R41 YYY 0 1000
+E25 32 0 33 0 1
+R40 33 31 1018
+R39 29 33 5200
+C13 29 31 1e-007
+R38 33 0 1000
+E24 29 0 35 0 1
+R37 VCM 35 100000
+C12 VCM 35 1e-009
+R36 35 0 1000
+GI15 ppp 0 VALUE = { if(V(VVV)>0,V(XXX)*.17*(V(VVV)/.3),0) }
+R35 XXX 21 1018
+R34 38 XXX 7709
+C11 38 21 1.2e-007
+R33 XXX 0 1000
+E23 38 0 30 0 1
+R31 30 19 1018
+R30 51 30 7709
+C10 51 19 1.2e-007
+R29 30 0 1000
+E22 51 0 24 0 1
+R28 VCM 24 100000
+C9 VCM 24 1e-009
+R27 24 0 1000
+GI14 B 0 VALUE = { ((V(+IN)-V(-IN))/0.3)*0.0000063*V(56) }
+E21 56 0 55 0 3.46
+D13 17 55 DZ
+R26 55 0 3300
+R25 26 0 1000
+E17 36 0 53 0 1
+R19 36 26 280000
+C8 36 26 3.7e-010
+R18 VCM 53 280000
+C7 VCM 53 3.7e-010
+R17 53 0 1000
+EV36 54 0 -IN 0 1
+EV7 50 0 +IN 0 1
+R16 54 40 1000000
+C17 0 40 1.5915e-005
+R15 50 28 1000000
+C15 0 28 1.5915e-005
+E16 VVV 0 28 40 1
+GI13 ppp 0 26 0 0.435
+E15 VCM 0 46 0 1
+R13 46 IN+ 100000000
+R12 IN- 46 100000000
+R11 0 IN- 10000000
+GI12 0 IN- -IN IN- 1
+R10 0 IN+ 10000000
+GI11 0 IN+ 25 IN+ 1
+E2 18 0 23 0 1
+E1 22 0 HPDRIVE 0 1
+R9 0 HPDRIVE 320000
+GI10 0 HPDRIVE REFOUT HPSENSE 1
+R8 REFOUT B 1000
+R7 18 B 99000
+C4 ppp 23 8.5e-007
+R6 0 23 320000
+GI9 0 23 REFOUT ppp 1
+GI8 REFOUT ppp B 22 1
+GI7 REFOUT ppp IN- IN+ 1
+C3 0 3 1.5727e-006
+R32 0 3 320000
+R24 39 LOD- 10000000
+R23 39 SW 10000000
+R22 39 LOD+ 10000000
+R21 39 AC_DC_BAR 10000000
+R20 39 SDN_BAR 10000000
+R3 39 FR 10000000
+R14 0 27 320000
+V18 REFIN 14 dc 0.001 ac 0 0
+D7 27 16 DX
+V20 VCCX 16 dc 0.1 ac 0 0
+D5 11 13 DX
+V14 VCCX 13 dc 0.1 ac 0 0
+D6 15 27 DX
+V19 15 0 dc 0.1 ac 0 0
+D4 12 11 DX
+V13 12 0 dc 0.1 ac 0 0
+C2 27 0 1.5727e-006
+I6 REFIN 0 dc 1e-010 ac 0 0
+GI4 0 27 14 27 1
+EV3 REFOUT 0 27 0 1
+D8 2 6 DX
+V5 VCCX 6 dc 0.1 ac 0 0
+D3 10 2 DX
+V10 10 0 dc 0.1 ac 0 0
+R5 VCM RLDFB 150000
+C1 0 11 1.5727e-006
+E12 RLD 0 11 0 1
+R4 0 11 320000
+GI5 0 11 REFOUT RLDFB 1
+D10 8 1 DX
+V11 8 0 dc 0.1 ac 0 0
+D1 1 9 DX
+V8 VCCX 9 dc 0.1 ac 0 0
+R1 0 1 10000000000
+GI2 0 1 4 1 1
+D9 7 3 DX
+D2 3 5 DX
+V9 7 0 dc 0.1 ac 0 0
+V4 VCCX 5 dc 0.1 ac 0 0
+R2 0 2 10000000000
+I26 +VS 0 dc 0.00017 ac 0 0
+E52 VCCX 0 +VS 0 1
+IBN_OPAMP 0 OPAMP- dc 5e-011 ac 0 0
+GI3 0 2 OPAMP- 2 1
+VOSIN_OPAMP OPAMP+ 4 dc 0.001 ac 0 0
+E6 OUT 0 3 0 1
+GI1 0 3 1 2 1
+IBP_OPAMP OPAMP+ 0 dc 5e-011 ac 0 0
+
+.model DX  D(IS=5)
+.model DW  D
+.model DY  D(IBV=1e-012)
+.model DZ  D(IS=1e-009)
+
+.ENDS AD8232