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FaultTool

The aim of this project is to create an open-source tool to analyse the vulnerability of circuit against fault attacks.

So far the tool implements the analysis against Fault Sensitivity Analysis (FSA).

Getting Started

Every analysis is configured with the file FSAConfig.txt, where the needed files are and their paths are requested. First time it is recommended to activate flag debug to see the output of internal processes. All phases of the configuration file should be place at 0 start a process from the beginning. To compile the code is enough with running make all in the console, and to create a documentation make docs. To run the analysis run in the console ./bin /FSA.

The needed files are:

  1. HDL description: The folder containing these files should be specified in the configuration file
    1. VHDL circuit: The specification of the module in vdhl code
    2. src.txt: list of the vhdl files starting from the smallest modules until the top level module. Every line should contain one filename.
  2. TestBenches: The folder containing these files and their names should be specified in the configuration file
    1. Testbench for RTL level: This file should output Testbench successful or Testbench fail
    2. Testbench for gate level module
  3. SW model: This files should be place in the folder Templates. The name of this software model class is the same name of the project. The class is specify in .cpp and .h files. The model is a c++ class inheriting from ModelSW and should inclcude ../src/ModelSW.h. If error cannot allocate abstract ... appears is because the model in not implementing all functions of ModelSW.

Current version was tested in CentOS 7 for 64 bits. The environment was configure to use c-shell.

License

Copyright (C) 2020 Andrés Felipe Valencia

This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program. If not, see https://www.gnu.org/licenses/.

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This project implements a tool for analyzing the vulnerability of a circuit against fautl attacks

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