drivers: dma: stm32: take "stream offset" into account when DMAV1 + DMAMUX is used

[erwango]

Depending on the series in use dma_config should take into account a stream offset for the channel in use.

Fixes #93617

[erwango]

Probably we need to review this whole offset handling and see why it can't be directly dealt from inside dma driver.

[mathieuchopstm]

Probably we need to review this whole offset handling and see why it can't be directly dealt from inside dma driver.

From

zephyr/include/zephyr/drivers/dma/dma_stm32.h

Lines 18 to 31 in 2a88cb5

	#if defined(CONFIG_DMA_STM32U5)
	/* from DTS the dma stream id is in range 0..N-1 */
	#define STM32_DMA_STREAM_OFFSET 0
	#elif !defined(CONFIG_DMA_STM32_V1)
	/* from DTS the dma stream id is in range 1..N */
	/* so decrease to set range from 0 from now on */
	#define STM32_DMA_STREAM_OFFSET 1
	#elif defined(CONFIG_DMA_STM32_V1) && defined(CONFIG_DMAMUX_STM32)
	/* typically on the stm32H7 series, DMA V1 with mux */
	#define STM32_DMA_STREAM_OFFSET 1
	#else
	/* from DTS the dma stream id is in range 0..N-1 */
	#define STM32_DMA_STREAM_OFFSET 0
	#endif /* ! CONFIG_DMA_STM32_V1 */

DMAv1 + DMAMUX ==> STM32_DMA_STREAM_OFFSET = 1 (this is the HW configuration on STM32G0)

However, neither dmamux_stm32.c nor dma_stm32_v1.c use STM32_DMA_STREAM_OFFSET.

dma_stm32.c does:

zephyr/drivers/dma/dma_stm32.c

Lines 108 to 112 in 2a88cb5

	#ifdef CONFIG_DMAMUX_STM32
	callback_arg = stream->mux_channel;
	#else
	callback_arg = id + STM32_DMA_STREAM_OFFSET;
	#endif /* CONFIG_DMAMUX_STM32 */

Possibly, this #ifdef CONFIG_DMAMUX_STM32 is wrong.

[rjackson159]

Probably we need to review this whole offset handling and see why it can't be directly dealt from inside dma driver.

From

zephyr/include/zephyr/drivers/dma/dma_stm32.h

Lines 18 to 31 in 2a88cb5

	#if defined(CONFIG_DMA_STM32U5)
	/* from DTS the dma stream id is in range 0..N-1 */
	#define STM32_DMA_STREAM_OFFSET 0
	#elif !defined(CONFIG_DMA_STM32_V1)
	/* from DTS the dma stream id is in range 1..N */
	/* so decrease to set range from 0 from now on */
	#define STM32_DMA_STREAM_OFFSET 1
	#elif defined(CONFIG_DMA_STM32_V1) && defined(CONFIG_DMAMUX_STM32)
	/* typically on the stm32H7 series, DMA V1 with mux */
	#define STM32_DMA_STREAM_OFFSET 1
	#else
	/* from DTS the dma stream id is in range 0..N-1 */
	#define STM32_DMA_STREAM_OFFSET 0
	#endif /* ! CONFIG_DMA_STM32_V1 */

DMAv1 + DMAMUX ==> STM32_DMA_STREAM_OFFSET = 1 (this is the HW configuration on STM32G0)

However, neither dmamux_stm32.c nor dma_stm32_v1.c use STM32_DMA_STREAM_OFFSET.

dma_stm32.c does:

zephyr/drivers/dma/dma_stm32.c

Lines 108 to 112 in 2a88cb5

	#ifdef CONFIG_DMAMUX_STM32
	callback_arg = stream->mux_channel;
	#else
	callback_arg = id + STM32_DMA_STREAM_OFFSET;
	#endif /* CONFIG_DMAMUX_STM32 */

Possibly, this #ifdef CONFIG_DMAMUX_STM32 is wrong.

This seems to be the case, if the STM32_DMA_STREAM_OFFSET is applied to both cases:

 #ifdef CONFIG_DMAMUX_STM32 
 	callback_arg = stream->mux_channel + STM32_DMA_STREAM_OFFSET; 
 #else 
 	callback_arg = id + STM32_DMA_STREAM_OFFSET; 
 #endif /* CONFIG_DMAMUX_STM32 */ 

The end result appears to operate correctly

[erwango]

The end result appears to operate correctly

Thanks for this feedback. I've just pushed an update.

I've also performed a satisfying (and logically harmless) clean up on U5 driver.

@djiatsaf-st could you perform a non regression on this whole PR to remain on the safe side ? I'm particularly worried about the potential impact of the dmamux related change as potentially this misalignment was compensated in other clients drivers to achieve functional state.

[mathieuchopstm]

Otherwise LGTM (though possibly now we need to remove the id + STM32_DMA_STREAM_OFFSET in the few drivers that have it...)

[mathieuchopstm]

I think we should instead apply the offset here:

zephyr/drivers/dma/dma_stm32.c

Lines 656 to 659 in 0cc6d52

	#ifdef CONFIG_DMAMUX_STM32
	/* Each further stream->mux_channel is fixed here */
	config->streams[i].mux_channel = i + config->offset;
	#endif /* CONFIG_DMAMUX_STM32 */

#ifdef CONFIG_DMAMUX_STM32
 		/* Each further stream->mux_channel is fixed here */
- 		config->streams[i].mux_channel = i + config->offset;
+ 		config->streams[i].mux_channel = i + config->offset + STM32_DMA_STREAM_OFFSET;
#endif /* CONFIG_DMAMUX_STM32 */

[sonarqubecloud]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

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