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boards: rw612: Fix enablement of XTAL32 Kconfig #93686

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merged 2 commits into from
Aug 20, 2025
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boards: rw612: Fix enablement of XTAL32 Kconfig #93686

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5edbb6a
dts: nxp_rw6xx: Use device tree property to configure XTAL32
mmahadevan108 Aug 14, 2025
54855c9
boards: rw612: Enable XTAL32
mmahadevan108 Aug 14, 2025
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4 changes: 3 additions & 1 deletion boards/nxp/frdm_rw612/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,8 @@

zephyr_library()
zephyr_library_sources(init.c)
dt_nodelabel(xtal32 NODELABEL "xtal32")
dt_node_has_status(xtal32_status PATH ${xtal32} STATUS okay)

if(CONFIG_NXP_RW6XX_BOOT_HEADER)
zephyr_compile_definitions(BOARD_FLASH_SIZE=CONFIG_FLASH_SIZE*1024)
Expand All @@ -16,7 +18,7 @@ if(CONFIG_NXP_RW6XX_BOOT_HEADER)
zephyr_library_sources(W25Q512JVFIQ_FCB.c)
endif()

if (CONFIG_DT_HAS_NXP_ENET_MAC_ENABLED AND CONFIG_XTAL32K)
if (CONFIG_DT_HAS_NXP_ENET_MAC_ENABLED AND ${xtal32_status})
message(FATAL_ERROR "Ethernet and external 32K clock source are "
"mutually exclusive on FRDM_RW612 due to shared PCB nets "
"between the ethernet PHY and the external oscillator")
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7 changes: 0 additions & 7 deletions boards/nxp/frdm_rw612/Kconfig.defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -25,11 +25,4 @@ config LV_Z_FLUSH_THREAD

endif # LVGL

if COUNTER_MCUX_LPC_RTC_1HZ

config XTAL32K
default y

endif # COUNTER_MCUX_LPC_RTC_1HZ

endif # BOARD_FRDM_RW612
4 changes: 3 additions & 1 deletion boards/nxp/rd_rw612_bga/CMakeLists.txt
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Expand Up @@ -6,6 +6,8 @@

zephyr_library()
zephyr_library_sources(init.c)
dt_nodelabel(xtal32 NODELABEL "xtal32")
dt_node_has_status(xtal32_status PATH ${xtal32} STATUS okay)

if(CONFIG_NXP_RW6XX_BOOT_HEADER)
if(NOT DEFINED CONFIG_BOARD_RD_RW612_BGA)
Expand All @@ -18,7 +20,7 @@ if(CONFIG_NXP_RW6XX_BOOT_HEADER)
zephyr_library_sources(MX25U51245GZ4I00_FCB.c)
endif()

if (CONFIG_DT_HAS_NXP_ENET_MAC_ENABLED AND CONFIG_XTAL32K)
if (CONFIG_DT_HAS_NXP_ENET_MAC_ENABLED AND ${xtal32_status})
message(FATAL_ERROR "Ethernet and external 32K clock source are "
"mutually exclusive on RD_RW612_BGA due to shared PCB nets "
"between the ethernet PHY and the external oscillator")
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7 changes: 0 additions & 7 deletions boards/nxp/rd_rw612_bga/Kconfig.defconfig
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Expand Up @@ -37,11 +37,4 @@ config NET_L2_ETHERNET

endif # DT_HAS_NXP_ENET_MAC_ENABLED && NETWORKING

if COUNTER_MCUX_LPC_RTC_1HZ

config XTAL32K
default y

endif # COUNTER_MCUX_LPC_RTC_1HZ

endif # BOARD_RD_RW612_BGA
4 changes: 4 additions & 0 deletions boards/nxp/rd_rw612_bga/rd_rw612_bga.dtsi
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Expand Up @@ -87,6 +87,10 @@
};
};

&xtal32 {
status = "okay";
};

&wwdt {
status = "okay";
};
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9 changes: 3 additions & 6 deletions boards/nxp/rd_rw612_bga/rd_rw612_bga_rw612_ethernet.dts
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Expand Up @@ -39,9 +39,6 @@
};

/* XTAL is disconnected */
/* TODO: this should be uncommented once it is added */
/*
* &rtc {
* status = "disabled";
* };
*/
&xtal32 {
status = "disabled";
};
4 changes: 3 additions & 1 deletion boards/u-blox/ubx_evk_iris_w1/CMakeLists.txt
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Expand Up @@ -5,6 +5,8 @@
#

if(CONFIG_NXP_RW6XX_BOOT_HEADER)
dt_nodelabel(xtal32 NODELABEL "xtal32")
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@mmahadevan108 ,
i guess &xtal32 node needs add and enable in ubx_evk_iris_w1_common.dtsi ?

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I did not enable it in the dtsi as by default xtal32 is not connected and requires a hardware modification.
This what I read on Page 24 of this document: https://content.u-blox.com/sites/default/files/documents/EVK-IRIS-W1_UserGuide_UBX-23007837.pdf .
Please correct me if I am missing something.

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Hi @mmahadevan108 ,
You’re correct — the 32 kHz crystal isn’t populated by default, so leaving xtal32 disabled in the DTSI is appropriate.

dt_node_has_status(xtal32_status PATH ${xtal32} STATUS okay)
zephyr_compile_definitions(BOARD_FLASH_SIZE=${CONFIG_FLASH_SIZE}*1024)

if(BOARD_REVISION STREQUAL "macronix")
Expand All @@ -15,7 +17,7 @@ if(CONFIG_NXP_RW6XX_BOOT_HEADER)
message(FATAL_ERROR "Unsupported board revision: ${BOARD_REVISION}")
endif()

if(CONFIG_DT_HAS_NXP_ENET_MAC_ENABLED AND CONFIG_XTAL32K)
if(CONFIG_DT_HAS_NXP_ENET_MAC_ENABLED AND ${xtal32_status})
message(FATAL_ERROR
"Ethernet and external 32K clock source are "
"mutually exclusive on FRDM_RW612 due to shared PCB nets "
Expand Down
15 changes: 0 additions & 15 deletions boards/u-blox/ubx_evk_iris_w1/Kconfig.defconfig
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This file was deleted.

7 changes: 7 additions & 0 deletions dts/arm/nxp/nxp_rw6xx_common.dtsi
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Expand Up @@ -88,6 +88,13 @@
onoff-power-states = <&standby>;
#power-domain-cells = <0>;
};

xtal32: xtal32 {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
status = "disabled";
};
};

&sram {
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5 changes: 0 additions & 5 deletions soc/nxp/rw/Kconfig
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Expand Up @@ -55,9 +55,4 @@ endif # NXP_RW6XX_BOOT_HEADER
rsource "../common/Kconfig.flexspi_xip"
rsource "../common/Kconfig.nbu"

config XTAL32K
bool "Use the External 32K clock"
help
This clock is used by certain peripherals such as RTC.

endif # SOC_SERIES_RW6XX
2 changes: 1 addition & 1 deletion soc/nxp/rw/soc.c
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Expand Up @@ -193,7 +193,7 @@ __weak __ramfunc void clock_init(void)
#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm14), nxp_lpc_i2c, okay)) && CONFIG_I2C
CLOCK_AttachClk(kSFRO_to_FLEXCOMM14);
#endif
#if CONFIG_XTAL32K
#if (DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(xtal32)))
CLOCK_EnableXtal32K(true);
CLOCK_AttachClk(kXTAL32K_to_CLK32K);
#endif
Expand Down
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