-
Notifications
You must be signed in to change notification settings - Fork 75
Pull requests: intel/intel-xpu-backend-for-triton
Author
Label
Projects
Milestones
Reviews
Assignee
Sort
Pull requests list
Disable cache in test_line_info.py::test_line_info_ir_source
#5446
opened Nov 7, 2025 by
slawblauciak
Loading…
Add test name filtering and Python debug options to the test script
#5435
opened Nov 5, 2025 by
slawblauciak
Loading…
[NFI]: XPUBackend refactoring to facilitate arch-specific implementations
#5329
opened Oct 16, 2025 by
AndreyPavlenko
Loading…
Add one autotuning config to the flex attention benchmark
#5303
opened Oct 14, 2025 by
admitric
Loading…
[Draft] Support the globaltimer and smid on Intel Arch
#4816
opened Jul 31, 2025 by
chengjunlu
•
Draft
[LoadStoreToLLVM] Refactor the 2D block load lowering.
#4615
opened Jul 4, 2025 by
chengjunlu
•
Draft
[BACKEND] Enhance the remove layout implementation to reduce the duplicated values with different layout in scf.for.
#4527
opened Jun 18, 2025 by
chengjunlu
Loading…
Clean up Intel specific code in the common TritonGPU dialect source file.
upstream: triton
#4469
opened Jun 10, 2025 by
chengjunlu
•
Draft
Previous Next
ProTip!
Add no:assignee to see everything that’s not assigned.