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@bluncan bluncan commented Sep 4, 2025

PR Description

Adds the AD9084 (Apollo) design.

Requires the following PRs to be merged to main before this one:

After they are merged, I'll rebase this branch and re-check that the projects are building.

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)
  • Documentation

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

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Found a few invalid paths when cloned repo isn't called hdl

@bluncan bluncan force-pushed the dev_apollo_pr branch 6 times, most recently from 7dd9847 to da69c54 Compare September 26, 2025 10:52
bluncan and others added 7 commits September 30, 2025 14:47
Adds AD9084-EBZ (Apollo) base design
for the following carriers:
 - vcu118
 - vck190
 - vpk180
 - fm87

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
Allow to be sourced from testbench

Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Simplifies identifying which SPI are 4-wire or 3-wire.
Also, for vck190, since the SPI interface only has 3 outputs, route
adf4030 to the third.
The adf4030 linux driver defaults to 4-wire, and 3-wire (datasheet
default) can be set through devicetree property adi,spi-3wire-enable.

Signed-off-by: Jorge Marques <jorge.marques@analog.com>
…/4w and unused slave devices

Signed-off-by: Filip Gherman <filip.gherman@analog.com>
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
…ility cores

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
…e automatically

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
…from description

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
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bluncan commented Sep 30, 2025

Updated Versal projects to use the Transceiver Subsystem which was merged to main

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
FilipG24 and others added 2 commits October 14, 2025 13:56
Signed-off-by: Filip Gherman <filip.gherman@analog.com>
Signed-off-by: Filip Gherman <filip.gherman@analog.com>
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bia1708 commented Oct 16, 2025

RetriggerCI

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5 participants