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projects: ad9084_ebz: Initial design #1901

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ae5ad79
projects: ad9084_fmca_ebz: Initial commit
bluncan Jan 23, 2025
0207953
ad9084_ebz/common: Use on source
gastmaier Jun 27, 2025
9a1e51a
fix: ad9084_ebz/common: Invalid hsci clock with ADI_PHY 1
gastmaier Jun 27, 2025
2ee96d6
apollo: spi: Set 4 wire spi through parameters
gastmaier Jul 1, 2025
959c50c
ad9084_ebz/vcu118: Fix spi2 by adding a clear muxing logic between 3w…
Aug 25, 2025
27ce96b
projects: ad9084_ebz: Change spi to 3 wire
bluncan Sep 12, 2025
fc679fc
projects: ad9084_ebz: common: ad9084_ebz_bd.tcl: Migrate to inline ut…
bluncan Sep 26, 2025
6ea8862
projects: ad9084_ebz: versal: Update constraints to read the lane rat…
bluncan Sep 26, 2025
cb71a9d
projects: ad9084_ebz: Add readme file
bluncan Sep 26, 2025
7c8c2c4
projects: ad9084_ebz: fm87: system_project: Remove unused parameters …
bluncan Sep 26, 2025
c1cc0c6
projects: ad9084_ebz: versal: Update to the new Transceiver Subsystem
bluncan Sep 3, 2025
948e151
library: xilinx: scripts: versal_xcvr_subsystem: Remove unused source
bluncan Sep 30, 2025
a8bb1b1
projects: ad9084_ebz: versal: Fix AION cs line
bluncan Oct 1, 2025
9719b71
projects: ad9084_ebz: vcu118: Fix AION CS line
FilipG24 Oct 14, 2025
afa347c
projects: ad9084_ebz: vcu118: Add support for single-link mode
FilipG24 Sep 30, 2025
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2 changes: 0 additions & 2 deletions library/xilinx/scripts/versal_xcvr_subsystem.tcl
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### SPDX short identifier: ADIBSD
###############################################################################

source ../../../projects/scripts/adi_board.tcl

# Parameter description:
# ip_name : The name of the created ip
# jesd_mode : Used physical layer encoder mode
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7 changes: 7 additions & 0 deletions projects/ad9084_ebz/Makefile
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####################################################################################
## Copyright (c) 2018 - 2025 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################

include ../scripts/project-toplevel.mk
15 changes: 15 additions & 0 deletions projects/ad9084_ebz/README.md
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# AD9084-EBZ HDL Project

- Evaluation board product page: [EVAL-AD9084](https://www.analog.com/eval-ad9084)
- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/ad9084_ebz/index.html
- Evaluation board VADJ range: 1.2V - 3.3V

## Supported parts

| Part name | Description |
|------------------------------------------------|--------------------------------------------------------------|
| [AD9084 (Apollo MxFE)](https://www.analog.com/ad9084) | Quad, 16-Bit 28GSPS RF DAC and Quad 12-Bit, 20GSPS RF ADC |

## Building the project

Please enter the folder for the FPGA carrier you want to use and read the README.md.
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